1/* 2 * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230) 3 * 4 * SPDX-License-Identifier: GPL-2.0-only 5 */ 6 7#pragma once 8 9#define PLIC_MAX_NUM_INT 0 10#define IRQ_CNODE_SLOT_BITS 1 11 12static inline irq_t plic_get_claim(void) 13{ 14 return irqInvalid; 15} 16 17static inline void plic_complete_claim(irq_t irq) 18{ 19} 20 21static inline void plic_mask_irq(bool_t disable, irq_t irq) 22{ 23} 24 25static inline void plic_init_controller(void) 26{ 27 28} 29 30/* Available physical memory regions on platform (RAM minus kernel image). */ 31/* NOTE: Regions are not allowed to be adjacent! */ 32static p_region_t BOOT_DATA avail_p_regs[] = { 33 /* The first 2MB are reserved for the SBI in the BBL */ 34 { /*.start = */ 0x0, /* .end = */ 0x10000000} 35}; 36 37static const paddr_t BOOT_RODATA *kernel_devices = NULL; 38 39static const p_region_t BOOT_RODATA *dev_p_regs = NULL; 40