1/* SPDX-License-Identifier: GPL-2.0 2 * 3 * Copyright 2016-2018 HabanaLabs, Ltd. 4 * All Rights Reserved. 5 * 6 */ 7 8/************************************ 9 ** This is an auto-generated file ** 10 ** DO NOT EDIT BELOW ** 11 ************************************/ 12 13#ifndef ASIC_REG_TPC3_QM_REGS_H_ 14#define ASIC_REG_TPC3_QM_REGS_H_ 15 16/* 17 ***************************************** 18 * TPC3_QM (Prototype: QMAN) 19 ***************************************** 20 */ 21 22#define mmTPC3_QM_GLBL_CFG0 0xEC8000 23 24#define mmTPC3_QM_GLBL_CFG1 0xEC8004 25 26#define mmTPC3_QM_GLBL_PROT 0xEC8008 27 28#define mmTPC3_QM_GLBL_ERR_CFG 0xEC800C 29 30#define mmTPC3_QM_GLBL_SECURE_PROPS_0 0xEC8010 31 32#define mmTPC3_QM_GLBL_SECURE_PROPS_1 0xEC8014 33 34#define mmTPC3_QM_GLBL_SECURE_PROPS_2 0xEC8018 35 36#define mmTPC3_QM_GLBL_SECURE_PROPS_3 0xEC801C 37 38#define mmTPC3_QM_GLBL_SECURE_PROPS_4 0xEC8020 39 40#define mmTPC3_QM_GLBL_NON_SECURE_PROPS_0 0xEC8024 41 42#define mmTPC3_QM_GLBL_NON_SECURE_PROPS_1 0xEC8028 43 44#define mmTPC3_QM_GLBL_NON_SECURE_PROPS_2 0xEC802C 45 46#define mmTPC3_QM_GLBL_NON_SECURE_PROPS_3 0xEC8030 47 48#define mmTPC3_QM_GLBL_NON_SECURE_PROPS_4 0xEC8034 49 50#define mmTPC3_QM_GLBL_STS0 0xEC8038 51 52#define mmTPC3_QM_GLBL_STS1_0 0xEC8040 53 54#define mmTPC3_QM_GLBL_STS1_1 0xEC8044 55 56#define mmTPC3_QM_GLBL_STS1_2 0xEC8048 57 58#define mmTPC3_QM_GLBL_STS1_3 0xEC804C 59 60#define mmTPC3_QM_GLBL_STS1_4 0xEC8050 61 62#define mmTPC3_QM_GLBL_MSG_EN_0 0xEC8054 63 64#define mmTPC3_QM_GLBL_MSG_EN_1 0xEC8058 65 66#define mmTPC3_QM_GLBL_MSG_EN_2 0xEC805C 67 68#define mmTPC3_QM_GLBL_MSG_EN_3 0xEC8060 69 70#define mmTPC3_QM_GLBL_MSG_EN_4 0xEC8068 71 72#define mmTPC3_QM_PQ_BASE_LO_0 0xEC8070 73 74#define mmTPC3_QM_PQ_BASE_LO_1 0xEC8074 75 76#define mmTPC3_QM_PQ_BASE_LO_2 0xEC8078 77 78#define mmTPC3_QM_PQ_BASE_LO_3 0xEC807C 79 80#define mmTPC3_QM_PQ_BASE_HI_0 0xEC8080 81 82#define mmTPC3_QM_PQ_BASE_HI_1 0xEC8084 83 84#define mmTPC3_QM_PQ_BASE_HI_2 0xEC8088 85 86#define mmTPC3_QM_PQ_BASE_HI_3 0xEC808C 87 88#define mmTPC3_QM_PQ_SIZE_0 0xEC8090 89 90#define mmTPC3_QM_PQ_SIZE_1 0xEC8094 91 92#define mmTPC3_QM_PQ_SIZE_2 0xEC8098 93 94#define mmTPC3_QM_PQ_SIZE_3 0xEC809C 95 96#define mmTPC3_QM_PQ_PI_0 0xEC80A0 97 98#define mmTPC3_QM_PQ_PI_1 0xEC80A4 99 100#define mmTPC3_QM_PQ_PI_2 0xEC80A8 101 102#define mmTPC3_QM_PQ_PI_3 0xEC80AC 103 104#define mmTPC3_QM_PQ_CI_0 0xEC80B0 105 106#define mmTPC3_QM_PQ_CI_1 0xEC80B4 107 108#define mmTPC3_QM_PQ_CI_2 0xEC80B8 109 110#define mmTPC3_QM_PQ_CI_3 0xEC80BC 111 112#define mmTPC3_QM_PQ_CFG0_0 0xEC80C0 113 114#define mmTPC3_QM_PQ_CFG0_1 0xEC80C4 115 116#define mmTPC3_QM_PQ_CFG0_2 0xEC80C8 117 118#define mmTPC3_QM_PQ_CFG0_3 0xEC80CC 119 120#define mmTPC3_QM_PQ_CFG1_0 0xEC80D0 121 122#define mmTPC3_QM_PQ_CFG1_1 0xEC80D4 123 124#define mmTPC3_QM_PQ_CFG1_2 0xEC80D8 125 126#define mmTPC3_QM_PQ_CFG1_3 0xEC80DC 127 128#define mmTPC3_QM_PQ_ARUSER_31_11_0 0xEC80E0 129 130#define mmTPC3_QM_PQ_ARUSER_31_11_1 0xEC80E4 131 132#define mmTPC3_QM_PQ_ARUSER_31_11_2 0xEC80E8 133 134#define mmTPC3_QM_PQ_ARUSER_31_11_3 0xEC80EC 135 136#define mmTPC3_QM_PQ_STS0_0 0xEC80F0 137 138#define mmTPC3_QM_PQ_STS0_1 0xEC80F4 139 140#define mmTPC3_QM_PQ_STS0_2 0xEC80F8 141 142#define mmTPC3_QM_PQ_STS0_3 0xEC80FC 143 144#define mmTPC3_QM_PQ_STS1_0 0xEC8100 145 146#define mmTPC3_QM_PQ_STS1_1 0xEC8104 147 148#define mmTPC3_QM_PQ_STS1_2 0xEC8108 149 150#define mmTPC3_QM_PQ_STS1_3 0xEC810C 151 152#define mmTPC3_QM_CQ_CFG0_0 0xEC8110 153 154#define mmTPC3_QM_CQ_CFG0_1 0xEC8114 155 156#define mmTPC3_QM_CQ_CFG0_2 0xEC8118 157 158#define mmTPC3_QM_CQ_CFG0_3 0xEC811C 159 160#define mmTPC3_QM_CQ_CFG0_4 0xEC8120 161 162#define mmTPC3_QM_CQ_CFG1_0 0xEC8124 163 164#define mmTPC3_QM_CQ_CFG1_1 0xEC8128 165 166#define mmTPC3_QM_CQ_CFG1_2 0xEC812C 167 168#define mmTPC3_QM_CQ_CFG1_3 0xEC8130 169 170#define mmTPC3_QM_CQ_CFG1_4 0xEC8134 171 172#define mmTPC3_QM_CQ_ARUSER_31_11_0 0xEC8138 173 174#define mmTPC3_QM_CQ_ARUSER_31_11_1 0xEC813C 175 176#define mmTPC3_QM_CQ_ARUSER_31_11_2 0xEC8140 177 178#define mmTPC3_QM_CQ_ARUSER_31_11_3 0xEC8144 179 180#define mmTPC3_QM_CQ_ARUSER_31_11_4 0xEC8148 181 182#define mmTPC3_QM_CQ_STS0_0 0xEC814C 183 184#define mmTPC3_QM_CQ_STS0_1 0xEC8150 185 186#define mmTPC3_QM_CQ_STS0_2 0xEC8154 187 188#define mmTPC3_QM_CQ_STS0_3 0xEC8158 189 190#define mmTPC3_QM_CQ_STS0_4 0xEC815C 191 192#define mmTPC3_QM_CQ_STS1_0 0xEC8160 193 194#define mmTPC3_QM_CQ_STS1_1 0xEC8164 195 196#define mmTPC3_QM_CQ_STS1_2 0xEC8168 197 198#define mmTPC3_QM_CQ_STS1_3 0xEC816C 199 200#define mmTPC3_QM_CQ_STS1_4 0xEC8170 201 202#define mmTPC3_QM_CQ_PTR_LO_0 0xEC8174 203 204#define mmTPC3_QM_CQ_PTR_HI_0 0xEC8178 205 206#define mmTPC3_QM_CQ_TSIZE_0 0xEC817C 207 208#define mmTPC3_QM_CQ_CTL_0 0xEC8180 209 210#define mmTPC3_QM_CQ_PTR_LO_1 0xEC8184 211 212#define mmTPC3_QM_CQ_PTR_HI_1 0xEC8188 213 214#define mmTPC3_QM_CQ_TSIZE_1 0xEC818C 215 216#define mmTPC3_QM_CQ_CTL_1 0xEC8190 217 218#define mmTPC3_QM_CQ_PTR_LO_2 0xEC8194 219 220#define mmTPC3_QM_CQ_PTR_HI_2 0xEC8198 221 222#define mmTPC3_QM_CQ_TSIZE_2 0xEC819C 223 224#define mmTPC3_QM_CQ_CTL_2 0xEC81A0 225 226#define mmTPC3_QM_CQ_PTR_LO_3 0xEC81A4 227 228#define mmTPC3_QM_CQ_PTR_HI_3 0xEC81A8 229 230#define mmTPC3_QM_CQ_TSIZE_3 0xEC81AC 231 232#define mmTPC3_QM_CQ_CTL_3 0xEC81B0 233 234#define mmTPC3_QM_CQ_PTR_LO_4 0xEC81B4 235 236#define mmTPC3_QM_CQ_PTR_HI_4 0xEC81B8 237 238#define mmTPC3_QM_CQ_TSIZE_4 0xEC81BC 239 240#define mmTPC3_QM_CQ_CTL_4 0xEC81C0 241 242#define mmTPC3_QM_CQ_PTR_LO_STS_0 0xEC81C4 243 244#define mmTPC3_QM_CQ_PTR_LO_STS_1 0xEC81C8 245 246#define mmTPC3_QM_CQ_PTR_LO_STS_2 0xEC81CC 247 248#define mmTPC3_QM_CQ_PTR_LO_STS_3 0xEC81D0 249 250#define mmTPC3_QM_CQ_PTR_LO_STS_4 0xEC81D4 251 252#define mmTPC3_QM_CQ_PTR_HI_STS_0 0xEC81D8 253 254#define mmTPC3_QM_CQ_PTR_HI_STS_1 0xEC81DC 255 256#define mmTPC3_QM_CQ_PTR_HI_STS_2 0xEC81E0 257 258#define mmTPC3_QM_CQ_PTR_HI_STS_3 0xEC81E4 259 260#define mmTPC3_QM_CQ_PTR_HI_STS_4 0xEC81E8 261 262#define mmTPC3_QM_CQ_TSIZE_STS_0 0xEC81EC 263 264#define mmTPC3_QM_CQ_TSIZE_STS_1 0xEC81F0 265 266#define mmTPC3_QM_CQ_TSIZE_STS_2 0xEC81F4 267 268#define mmTPC3_QM_CQ_TSIZE_STS_3 0xEC81F8 269 270#define mmTPC3_QM_CQ_TSIZE_STS_4 0xEC81FC 271 272#define mmTPC3_QM_CQ_CTL_STS_0 0xEC8200 273 274#define mmTPC3_QM_CQ_CTL_STS_1 0xEC8204 275 276#define mmTPC3_QM_CQ_CTL_STS_2 0xEC8208 277 278#define mmTPC3_QM_CQ_CTL_STS_3 0xEC820C 279 280#define mmTPC3_QM_CQ_CTL_STS_4 0xEC8210 281 282#define mmTPC3_QM_CQ_IFIFO_CNT_0 0xEC8214 283 284#define mmTPC3_QM_CQ_IFIFO_CNT_1 0xEC8218 285 286#define mmTPC3_QM_CQ_IFIFO_CNT_2 0xEC821C 287 288#define mmTPC3_QM_CQ_IFIFO_CNT_3 0xEC8220 289 290#define mmTPC3_QM_CQ_IFIFO_CNT_4 0xEC8224 291 292#define mmTPC3_QM_CP_MSG_BASE0_ADDR_LO_0 0xEC8228 293 294#define mmTPC3_QM_CP_MSG_BASE0_ADDR_LO_1 0xEC822C 295 296#define mmTPC3_QM_CP_MSG_BASE0_ADDR_LO_2 0xEC8230 297 298#define mmTPC3_QM_CP_MSG_BASE0_ADDR_LO_3 0xEC8234 299 300#define mmTPC3_QM_CP_MSG_BASE0_ADDR_LO_4 0xEC8238 301 302#define mmTPC3_QM_CP_MSG_BASE0_ADDR_HI_0 0xEC823C 303 304#define mmTPC3_QM_CP_MSG_BASE0_ADDR_HI_1 0xEC8240 305 306#define mmTPC3_QM_CP_MSG_BASE0_ADDR_HI_2 0xEC8244 307 308#define mmTPC3_QM_CP_MSG_BASE0_ADDR_HI_3 0xEC8248 309 310#define mmTPC3_QM_CP_MSG_BASE0_ADDR_HI_4 0xEC824C 311 312#define mmTPC3_QM_CP_MSG_BASE1_ADDR_LO_0 0xEC8250 313 314#define mmTPC3_QM_CP_MSG_BASE1_ADDR_LO_1 0xEC8254 315 316#define mmTPC3_QM_CP_MSG_BASE1_ADDR_LO_2 0xEC8258 317 318#define mmTPC3_QM_CP_MSG_BASE1_ADDR_LO_3 0xEC825C 319 320#define mmTPC3_QM_CP_MSG_BASE1_ADDR_LO_4 0xEC8260 321 322#define mmTPC3_QM_CP_MSG_BASE1_ADDR_HI_0 0xEC8264 323 324#define mmTPC3_QM_CP_MSG_BASE1_ADDR_HI_1 0xEC8268 325 326#define mmTPC3_QM_CP_MSG_BASE1_ADDR_HI_2 0xEC826C 327 328#define mmTPC3_QM_CP_MSG_BASE1_ADDR_HI_3 0xEC8270 329 330#define mmTPC3_QM_CP_MSG_BASE1_ADDR_HI_4 0xEC8274 331 332#define mmTPC3_QM_CP_MSG_BASE2_ADDR_LO_0 0xEC8278 333 334#define mmTPC3_QM_CP_MSG_BASE2_ADDR_LO_1 0xEC827C 335 336#define mmTPC3_QM_CP_MSG_BASE2_ADDR_LO_2 0xEC8280 337 338#define mmTPC3_QM_CP_MSG_BASE2_ADDR_LO_3 0xEC8284 339 340#define mmTPC3_QM_CP_MSG_BASE2_ADDR_LO_4 0xEC8288 341 342#define mmTPC3_QM_CP_MSG_BASE2_ADDR_HI_0 0xEC828C 343 344#define mmTPC3_QM_CP_MSG_BASE2_ADDR_HI_1 0xEC8290 345 346#define mmTPC3_QM_CP_MSG_BASE2_ADDR_HI_2 0xEC8294 347 348#define mmTPC3_QM_CP_MSG_BASE2_ADDR_HI_3 0xEC8298 349 350#define mmTPC3_QM_CP_MSG_BASE2_ADDR_HI_4 0xEC829C 351 352#define mmTPC3_QM_CP_MSG_BASE3_ADDR_LO_0 0xEC82A0 353 354#define mmTPC3_QM_CP_MSG_BASE3_ADDR_LO_1 0xEC82A4 355 356#define mmTPC3_QM_CP_MSG_BASE3_ADDR_LO_2 0xEC82A8 357 358#define mmTPC3_QM_CP_MSG_BASE3_ADDR_LO_3 0xEC82AC 359 360#define mmTPC3_QM_CP_MSG_BASE3_ADDR_LO_4 0xEC82B0 361 362#define mmTPC3_QM_CP_MSG_BASE3_ADDR_HI_0 0xEC82B4 363 364#define mmTPC3_QM_CP_MSG_BASE3_ADDR_HI_1 0xEC82B8 365 366#define mmTPC3_QM_CP_MSG_BASE3_ADDR_HI_2 0xEC82BC 367 368#define mmTPC3_QM_CP_MSG_BASE3_ADDR_HI_3 0xEC82C0 369 370#define mmTPC3_QM_CP_MSG_BASE3_ADDR_HI_4 0xEC82C4 371 372#define mmTPC3_QM_CP_LDMA_TSIZE_OFFSET_0 0xEC82C8 373 374#define mmTPC3_QM_CP_LDMA_TSIZE_OFFSET_1 0xEC82CC 375 376#define mmTPC3_QM_CP_LDMA_TSIZE_OFFSET_2 0xEC82D0 377 378#define mmTPC3_QM_CP_LDMA_TSIZE_OFFSET_3 0xEC82D4 379 380#define mmTPC3_QM_CP_LDMA_TSIZE_OFFSET_4 0xEC82D8 381 382#define mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 0xEC82E0 383 384#define mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_1 0xEC82E4 385 386#define mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_2 0xEC82E8 387 388#define mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_3 0xEC82EC 389 390#define mmTPC3_QM_CP_LDMA_SRC_BASE_LO_OFFSET_4 0xEC82F0 391 392#define mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 0xEC82F4 393 394#define mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET_1 0xEC82F8 395 396#define mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET_2 0xEC82FC 397 398#define mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET_3 0xEC8300 399 400#define mmTPC3_QM_CP_LDMA_DST_BASE_LO_OFFSET_4 0xEC8304 401 402#define mmTPC3_QM_CP_FENCE0_RDATA_0 0xEC8308 403 404#define mmTPC3_QM_CP_FENCE0_RDATA_1 0xEC830C 405 406#define mmTPC3_QM_CP_FENCE0_RDATA_2 0xEC8310 407 408#define mmTPC3_QM_CP_FENCE0_RDATA_3 0xEC8314 409 410#define mmTPC3_QM_CP_FENCE0_RDATA_4 0xEC8318 411 412#define mmTPC3_QM_CP_FENCE1_RDATA_0 0xEC831C 413 414#define mmTPC3_QM_CP_FENCE1_RDATA_1 0xEC8320 415 416#define mmTPC3_QM_CP_FENCE1_RDATA_2 0xEC8324 417 418#define mmTPC3_QM_CP_FENCE1_RDATA_3 0xEC8328 419 420#define mmTPC3_QM_CP_FENCE1_RDATA_4 0xEC832C 421 422#define mmTPC3_QM_CP_FENCE2_RDATA_0 0xEC8330 423 424#define mmTPC3_QM_CP_FENCE2_RDATA_1 0xEC8334 425 426#define mmTPC3_QM_CP_FENCE2_RDATA_2 0xEC8338 427 428#define mmTPC3_QM_CP_FENCE2_RDATA_3 0xEC833C 429 430#define mmTPC3_QM_CP_FENCE2_RDATA_4 0xEC8340 431 432#define mmTPC3_QM_CP_FENCE3_RDATA_0 0xEC8344 433 434#define mmTPC3_QM_CP_FENCE3_RDATA_1 0xEC8348 435 436#define mmTPC3_QM_CP_FENCE3_RDATA_2 0xEC834C 437 438#define mmTPC3_QM_CP_FENCE3_RDATA_3 0xEC8350 439 440#define mmTPC3_QM_CP_FENCE3_RDATA_4 0xEC8354 441 442#define mmTPC3_QM_CP_FENCE0_CNT_0 0xEC8358 443 444#define mmTPC3_QM_CP_FENCE0_CNT_1 0xEC835C 445 446#define mmTPC3_QM_CP_FENCE0_CNT_2 0xEC8360 447 448#define mmTPC3_QM_CP_FENCE0_CNT_3 0xEC8364 449 450#define mmTPC3_QM_CP_FENCE0_CNT_4 0xEC8368 451 452#define mmTPC3_QM_CP_FENCE1_CNT_0 0xEC836C 453 454#define mmTPC3_QM_CP_FENCE1_CNT_1 0xEC8370 455 456#define mmTPC3_QM_CP_FENCE1_CNT_2 0xEC8374 457 458#define mmTPC3_QM_CP_FENCE1_CNT_3 0xEC8378 459 460#define mmTPC3_QM_CP_FENCE1_CNT_4 0xEC837C 461 462#define mmTPC3_QM_CP_FENCE2_CNT_0 0xEC8380 463 464#define mmTPC3_QM_CP_FENCE2_CNT_1 0xEC8384 465 466#define mmTPC3_QM_CP_FENCE2_CNT_2 0xEC8388 467 468#define mmTPC3_QM_CP_FENCE2_CNT_3 0xEC838C 469 470#define mmTPC3_QM_CP_FENCE2_CNT_4 0xEC8390 471 472#define mmTPC3_QM_CP_FENCE3_CNT_0 0xEC8394 473 474#define mmTPC3_QM_CP_FENCE3_CNT_1 0xEC8398 475 476#define mmTPC3_QM_CP_FENCE3_CNT_2 0xEC839C 477 478#define mmTPC3_QM_CP_FENCE3_CNT_3 0xEC83A0 479 480#define mmTPC3_QM_CP_FENCE3_CNT_4 0xEC83A4 481 482#define mmTPC3_QM_CP_STS_0 0xEC83A8 483 484#define mmTPC3_QM_CP_STS_1 0xEC83AC 485 486#define mmTPC3_QM_CP_STS_2 0xEC83B0 487 488#define mmTPC3_QM_CP_STS_3 0xEC83B4 489 490#define mmTPC3_QM_CP_STS_4 0xEC83B8 491 492#define mmTPC3_QM_CP_CURRENT_INST_LO_0 0xEC83BC 493 494#define mmTPC3_QM_CP_CURRENT_INST_LO_1 0xEC83C0 495 496#define mmTPC3_QM_CP_CURRENT_INST_LO_2 0xEC83C4 497 498#define mmTPC3_QM_CP_CURRENT_INST_LO_3 0xEC83C8 499 500#define mmTPC3_QM_CP_CURRENT_INST_LO_4 0xEC83CC 501 502#define mmTPC3_QM_CP_CURRENT_INST_HI_0 0xEC83D0 503 504#define mmTPC3_QM_CP_CURRENT_INST_HI_1 0xEC83D4 505 506#define mmTPC3_QM_CP_CURRENT_INST_HI_2 0xEC83D8 507 508#define mmTPC3_QM_CP_CURRENT_INST_HI_3 0xEC83DC 509 510#define mmTPC3_QM_CP_CURRENT_INST_HI_4 0xEC83E0 511 512#define mmTPC3_QM_CP_BARRIER_CFG_0 0xEC83F4 513 514#define mmTPC3_QM_CP_BARRIER_CFG_1 0xEC83F8 515 516#define mmTPC3_QM_CP_BARRIER_CFG_2 0xEC83FC 517 518#define mmTPC3_QM_CP_BARRIER_CFG_3 0xEC8400 519 520#define mmTPC3_QM_CP_BARRIER_CFG_4 0xEC8404 521 522#define mmTPC3_QM_CP_DBG_0_0 0xEC8408 523 524#define mmTPC3_QM_CP_DBG_0_1 0xEC840C 525 526#define mmTPC3_QM_CP_DBG_0_2 0xEC8410 527 528#define mmTPC3_QM_CP_DBG_0_3 0xEC8414 529 530#define mmTPC3_QM_CP_DBG_0_4 0xEC8418 531 532#define mmTPC3_QM_CP_ARUSER_31_11_0 0xEC841C 533 534#define mmTPC3_QM_CP_ARUSER_31_11_1 0xEC8420 535 536#define mmTPC3_QM_CP_ARUSER_31_11_2 0xEC8424 537 538#define mmTPC3_QM_CP_ARUSER_31_11_3 0xEC8428 539 540#define mmTPC3_QM_CP_ARUSER_31_11_4 0xEC842C 541 542#define mmTPC3_QM_CP_AWUSER_31_11_0 0xEC8430 543 544#define mmTPC3_QM_CP_AWUSER_31_11_1 0xEC8434 545 546#define mmTPC3_QM_CP_AWUSER_31_11_2 0xEC8438 547 548#define mmTPC3_QM_CP_AWUSER_31_11_3 0xEC843C 549 550#define mmTPC3_QM_CP_AWUSER_31_11_4 0xEC8440 551 552#define mmTPC3_QM_ARB_CFG_0 0xEC8A00 553 554#define mmTPC3_QM_ARB_CHOISE_Q_PUSH 0xEC8A04 555 556#define mmTPC3_QM_ARB_WRR_WEIGHT_0 0xEC8A08 557 558#define mmTPC3_QM_ARB_WRR_WEIGHT_1 0xEC8A0C 559 560#define mmTPC3_QM_ARB_WRR_WEIGHT_2 0xEC8A10 561 562#define mmTPC3_QM_ARB_WRR_WEIGHT_3 0xEC8A14 563 564#define mmTPC3_QM_ARB_CFG_1 0xEC8A18 565 566#define mmTPC3_QM_ARB_MST_AVAIL_CRED_0 0xEC8A20 567 568#define mmTPC3_QM_ARB_MST_AVAIL_CRED_1 0xEC8A24 569 570#define mmTPC3_QM_ARB_MST_AVAIL_CRED_2 0xEC8A28 571 572#define mmTPC3_QM_ARB_MST_AVAIL_CRED_3 0xEC8A2C 573 574#define mmTPC3_QM_ARB_MST_AVAIL_CRED_4 0xEC8A30 575 576#define mmTPC3_QM_ARB_MST_AVAIL_CRED_5 0xEC8A34 577 578#define mmTPC3_QM_ARB_MST_AVAIL_CRED_6 0xEC8A38 579 580#define mmTPC3_QM_ARB_MST_AVAIL_CRED_7 0xEC8A3C 581 582#define mmTPC3_QM_ARB_MST_AVAIL_CRED_8 0xEC8A40 583 584#define mmTPC3_QM_ARB_MST_AVAIL_CRED_9 0xEC8A44 585 586#define mmTPC3_QM_ARB_MST_AVAIL_CRED_10 0xEC8A48 587 588#define mmTPC3_QM_ARB_MST_AVAIL_CRED_11 0xEC8A4C 589 590#define mmTPC3_QM_ARB_MST_AVAIL_CRED_12 0xEC8A50 591 592#define mmTPC3_QM_ARB_MST_AVAIL_CRED_13 0xEC8A54 593 594#define mmTPC3_QM_ARB_MST_AVAIL_CRED_14 0xEC8A58 595 596#define mmTPC3_QM_ARB_MST_AVAIL_CRED_15 0xEC8A5C 597 598#define mmTPC3_QM_ARB_MST_AVAIL_CRED_16 0xEC8A60 599 600#define mmTPC3_QM_ARB_MST_AVAIL_CRED_17 0xEC8A64 601 602#define mmTPC3_QM_ARB_MST_AVAIL_CRED_18 0xEC8A68 603 604#define mmTPC3_QM_ARB_MST_AVAIL_CRED_19 0xEC8A6C 605 606#define mmTPC3_QM_ARB_MST_AVAIL_CRED_20 0xEC8A70 607 608#define mmTPC3_QM_ARB_MST_AVAIL_CRED_21 0xEC8A74 609 610#define mmTPC3_QM_ARB_MST_AVAIL_CRED_22 0xEC8A78 611 612#define mmTPC3_QM_ARB_MST_AVAIL_CRED_23 0xEC8A7C 613 614#define mmTPC3_QM_ARB_MST_AVAIL_CRED_24 0xEC8A80 615 616#define mmTPC3_QM_ARB_MST_AVAIL_CRED_25 0xEC8A84 617 618#define mmTPC3_QM_ARB_MST_AVAIL_CRED_26 0xEC8A88 619 620#define mmTPC3_QM_ARB_MST_AVAIL_CRED_27 0xEC8A8C 621 622#define mmTPC3_QM_ARB_MST_AVAIL_CRED_28 0xEC8A90 623 624#define mmTPC3_QM_ARB_MST_AVAIL_CRED_29 0xEC8A94 625 626#define mmTPC3_QM_ARB_MST_AVAIL_CRED_30 0xEC8A98 627 628#define mmTPC3_QM_ARB_MST_AVAIL_CRED_31 0xEC8A9C 629 630#define mmTPC3_QM_ARB_MST_CRED_INC 0xEC8AA0 631 632#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_0 0xEC8AA4 633 634#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_1 0xEC8AA8 635 636#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_2 0xEC8AAC 637 638#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_3 0xEC8AB0 639 640#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_4 0xEC8AB4 641 642#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_5 0xEC8AB8 643 644#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_6 0xEC8ABC 645 646#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_7 0xEC8AC0 647 648#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_8 0xEC8AC4 649 650#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_9 0xEC8AC8 651 652#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_10 0xEC8ACC 653 654#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_11 0xEC8AD0 655 656#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_12 0xEC8AD4 657 658#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_13 0xEC8AD8 659 660#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_14 0xEC8ADC 661 662#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_15 0xEC8AE0 663 664#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_16 0xEC8AE4 665 666#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_17 0xEC8AE8 667 668#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_18 0xEC8AEC 669 670#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_19 0xEC8AF0 671 672#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_20 0xEC8AF4 673 674#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_21 0xEC8AF8 675 676#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_22 0xEC8AFC 677 678#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_23 0xEC8B00 679 680#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_24 0xEC8B04 681 682#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_25 0xEC8B08 683 684#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_26 0xEC8B0C 685 686#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_27 0xEC8B10 687 688#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_28 0xEC8B14 689 690#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_29 0xEC8B18 691 692#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_30 0xEC8B1C 693 694#define mmTPC3_QM_ARB_MST_CHOISE_PUSH_OFST_31 0xEC8B20 695 696#define mmTPC3_QM_ARB_SLV_MASTER_INC_CRED_OFST 0xEC8B28 697 698#define mmTPC3_QM_ARB_MST_SLAVE_EN 0xEC8B2C 699 700#define mmTPC3_QM_ARB_MST_QUIET_PER 0xEC8B34 701 702#define mmTPC3_QM_ARB_SLV_CHOISE_WDT 0xEC8B38 703 704#define mmTPC3_QM_ARB_SLV_ID 0xEC8B3C 705 706#define mmTPC3_QM_ARB_MSG_MAX_INFLIGHT 0xEC8B44 707 708#define mmTPC3_QM_ARB_MSG_AWUSER_31_11 0xEC8B48 709 710#define mmTPC3_QM_ARB_MSG_AWUSER_SEC_PROP 0xEC8B4C 711 712#define mmTPC3_QM_ARB_MSG_AWUSER_NON_SEC_PROP 0xEC8B50 713 714#define mmTPC3_QM_ARB_BASE_LO 0xEC8B54 715 716#define mmTPC3_QM_ARB_BASE_HI 0xEC8B58 717 718#define mmTPC3_QM_ARB_STATE_STS 0xEC8B80 719 720#define mmTPC3_QM_ARB_CHOISE_FULLNESS_STS 0xEC8B84 721 722#define mmTPC3_QM_ARB_MSG_STS 0xEC8B88 723 724#define mmTPC3_QM_ARB_SLV_CHOISE_Q_HEAD 0xEC8B8C 725 726#define mmTPC3_QM_ARB_ERR_CAUSE 0xEC8B9C 727 728#define mmTPC3_QM_ARB_ERR_MSG_EN 0xEC8BA0 729 730#define mmTPC3_QM_ARB_ERR_STS_DRP 0xEC8BA8 731 732#define mmTPC3_QM_ARB_MST_CRED_STS_0 0xEC8BB0 733 734#define mmTPC3_QM_ARB_MST_CRED_STS_1 0xEC8BB4 735 736#define mmTPC3_QM_ARB_MST_CRED_STS_2 0xEC8BB8 737 738#define mmTPC3_QM_ARB_MST_CRED_STS_3 0xEC8BBC 739 740#define mmTPC3_QM_ARB_MST_CRED_STS_4 0xEC8BC0 741 742#define mmTPC3_QM_ARB_MST_CRED_STS_5 0xEC8BC4 743 744#define mmTPC3_QM_ARB_MST_CRED_STS_6 0xEC8BC8 745 746#define mmTPC3_QM_ARB_MST_CRED_STS_7 0xEC8BCC 747 748#define mmTPC3_QM_ARB_MST_CRED_STS_8 0xEC8BD0 749 750#define mmTPC3_QM_ARB_MST_CRED_STS_9 0xEC8BD4 751 752#define mmTPC3_QM_ARB_MST_CRED_STS_10 0xEC8BD8 753 754#define mmTPC3_QM_ARB_MST_CRED_STS_11 0xEC8BDC 755 756#define mmTPC3_QM_ARB_MST_CRED_STS_12 0xEC8BE0 757 758#define mmTPC3_QM_ARB_MST_CRED_STS_13 0xEC8BE4 759 760#define mmTPC3_QM_ARB_MST_CRED_STS_14 0xEC8BE8 761 762#define mmTPC3_QM_ARB_MST_CRED_STS_15 0xEC8BEC 763 764#define mmTPC3_QM_ARB_MST_CRED_STS_16 0xEC8BF0 765 766#define mmTPC3_QM_ARB_MST_CRED_STS_17 0xEC8BF4 767 768#define mmTPC3_QM_ARB_MST_CRED_STS_18 0xEC8BF8 769 770#define mmTPC3_QM_ARB_MST_CRED_STS_19 0xEC8BFC 771 772#define mmTPC3_QM_ARB_MST_CRED_STS_20 0xEC8C00 773 774#define mmTPC3_QM_ARB_MST_CRED_STS_21 0xEC8C04 775 776#define mmTPC3_QM_ARB_MST_CRED_STS_22 0xEC8C08 777 778#define mmTPC3_QM_ARB_MST_CRED_STS_23 0xEC8C0C 779 780#define mmTPC3_QM_ARB_MST_CRED_STS_24 0xEC8C10 781 782#define mmTPC3_QM_ARB_MST_CRED_STS_25 0xEC8C14 783 784#define mmTPC3_QM_ARB_MST_CRED_STS_26 0xEC8C18 785 786#define mmTPC3_QM_ARB_MST_CRED_STS_27 0xEC8C1C 787 788#define mmTPC3_QM_ARB_MST_CRED_STS_28 0xEC8C20 789 790#define mmTPC3_QM_ARB_MST_CRED_STS_29 0xEC8C24 791 792#define mmTPC3_QM_ARB_MST_CRED_STS_30 0xEC8C28 793 794#define mmTPC3_QM_ARB_MST_CRED_STS_31 0xEC8C2C 795 796#define mmTPC3_QM_CGM_CFG 0xEC8C70 797 798#define mmTPC3_QM_CGM_STS 0xEC8C74 799 800#define mmTPC3_QM_CGM_CFG1 0xEC8C78 801 802#define mmTPC3_QM_LOCAL_RANGE_BASE 0xEC8C80 803 804#define mmTPC3_QM_LOCAL_RANGE_SIZE 0xEC8C84 805 806#define mmTPC3_QM_CSMR_STRICT_PRIO_CFG 0xEC8C90 807 808#define mmTPC3_QM_HBW_RD_RATE_LIM_CFG_1 0xEC8C94 809 810#define mmTPC3_QM_LBW_WR_RATE_LIM_CFG_0 0xEC8C98 811 812#define mmTPC3_QM_LBW_WR_RATE_LIM_CFG_1 0xEC8C9C 813 814#define mmTPC3_QM_HBW_RD_RATE_LIM_CFG_0 0xEC8CA0 815 816#define mmTPC3_QM_GLBL_AXCACHE 0xEC8CA4 817 818#define mmTPC3_QM_IND_GW_APB_CFG 0xEC8CB0 819 820#define mmTPC3_QM_IND_GW_APB_WDATA 0xEC8CB4 821 822#define mmTPC3_QM_IND_GW_APB_RDATA 0xEC8CB8 823 824#define mmTPC3_QM_IND_GW_APB_STATUS 0xEC8CBC 825 826#define mmTPC3_QM_GLBL_ERR_ADDR_LO 0xEC8CD0 827 828#define mmTPC3_QM_GLBL_ERR_ADDR_HI 0xEC8CD4 829 830#define mmTPC3_QM_GLBL_ERR_WDATA 0xEC8CD8 831 832#define mmTPC3_QM_GLBL_MEM_INIT_BUSY 0xEC8D00 833 834#endif /* ASIC_REG_TPC3_QM_REGS_H_ */ 835