1// Copyright 2017 The Fuchsia Authors. All rights reserved.
2// Use of this source code is governed by a BSD-style license that can be
3// found in the LICENSE file.
4
5#pragma once
6
7#include <ddk/device.h>
8#include <zircon/compiler.h>
9
10__BEGIN_CDECLS;
11
12//
13// Common SD/MMC defines
14//
15#define SDHC_BLOCK_SIZE 512
16
17#define SDMMC_RESP_LEN_EMPTY     (1 << 0)
18#define SDMMC_RESP_LEN_136       (1 << 1)
19#define SDMMC_RESP_LEN_48        (1 << 2)
20#define SDMMC_RESP_LEN_48B       (1 << 3)
21#define SDMMC_RESP_CRC_CHECK     (1 << 4)
22#define SDMMC_RESP_CMD_IDX_CHECK (1 << 5)
23#define SDMMC_RESP_DATA_PRESENT  (1 << 6)
24
25#define SDMMC_CMD_TYPE_NORMAL    (1 << 7)
26#define SDMMC_CMD_TYPE_SUSPEND   (1 << 8)
27#define SDMMC_CMD_TYPE_RESUME    (1 << 9)
28#define SDMMC_CMD_TYPE_ABORT     (1 << 10)
29
30#define SDMMC_CMD_DMA_EN         (1 << 11)
31#define SDMMC_CMD_BLKCNT_EN      (1 << 12)
32#define SDMMC_CMD_AUTO12         (1 << 13)
33#define SDMMC_CMD_AUTO23         (1 << 14)
34#define SDMMC_CMD_READ           (1 << 15)
35#define SDMMC_CMD_MULTI_BLK      (1 << 16)
36
37#define SDMMC_RESP_NONE (0x0)
38#define SDMMC_RESP_R1   (SDMMC_RESP_LEN_48 | SDMMC_RESP_CMD_IDX_CHECK | SDMMC_RESP_CRC_CHECK)
39#define SDMMC_RESP_R1b  (SDMMC_RESP_LEN_48B | SDMMC_RESP_CMD_IDX_CHECK | SDMMC_RESP_CRC_CHECK)
40#define SDMMC_RESP_R2   (SDMMC_RESP_LEN_136 | SDMMC_RESP_CRC_CHECK)
41#define SDMMC_RESP_R3   (SDMMC_RESP_LEN_48)
42#define SDMMC_RESP_R4   (SDMMC_RESP_LEN_48)
43#define SDMMC_RESP_R5   (SDMMC_RESP_LEN_48 | SDMMC_RESP_CMD_IDX_CHECK | SDMMC_RESP_CRC_CHECK)
44#define SDMMC_RESP_R5b  (SDMMC_RESP_LEN_48B | SDMMC_RESP_CMD_IDX_CHECK | SDMMC_RESP_CRC_CHECK)
45#define SDMMC_RESP_R6   (SDMMC_RESP_LEN_48 | SDMMC_RESP_CMD_IDX_CHECK | SDMMC_RESP_CRC_CHECK)
46#define SDMMC_RESP_R7   (SDMMC_RESP_LEN_48 | SDMMC_RESP_CMD_IDX_CHECK | SDMMC_RESP_CRC_CHECK)
47
48// Common SD/MMC commands
49#define SDMMC_GO_IDLE_STATE_FLAGS           SDMMC_RESP_NONE
50#define SDMMC_ALL_SEND_CID_FLAGS            SDMMC_RESP_R2
51#define SDMMC_SEND_CSD_FLAGS                SDMMC_RESP_R2
52#define SDMMC_STOP_TRANSMISSION_FLAGS       SDMMC_RESP_R1b | SDMMC_CMD_TYPE_ABORT
53#define SDMMC_SEND_STATUS_FLAGS             SDMMC_RESP_R1
54#define SDMMC_READ_BLOCK_FLAGS              SDMMC_RESP_R1 | \
55                                            SDMMC_RESP_DATA_PRESENT | SDMMC_CMD_READ
56#define SDMMC_READ_MULTIPLE_BLOCK_FLAGS     SDMMC_RESP_R1 | SDMMC_RESP_DATA_PRESENT | \
57                                            SDMMC_CMD_READ | SDMMC_CMD_MULTI_BLK | \
58                                            SDMMC_CMD_BLKCNT_EN
59#define SDMMC_WRITE_BLOCK_FLAGS             SDMMC_RESP_R1 | SDMMC_RESP_DATA_PRESENT
60#define SDMMC_WRITE_MULTIPLE_BLOCK_FLAGS    SDMMC_RESP_R1 | SDMMC_RESP_DATA_PRESENT | \
61                                            SDMMC_CMD_MULTI_BLK | SDMMC_CMD_BLKCNT_EN
62#define SDMMC_LOCK_UNLOCK_FLAGS             SDMMC_RESP_R1
63#define SDMMC_APP_CMD_FLAGS                 SDMMC_RESP_R1
64#define SDMMC_GEN_CMD_FLAGS                 SDMMC_RESP_R1 | SD_CMD_ISDATA
65
66// SD Commands
67#define SD_SEND_RELATIVE_ADDR_FLAGS         SDMMC_RESP_R6
68#define SD_SWITCH_FUNC_FLAGS                SDMMC_RESP_R1
69#define SD_SELECT_CARD_FLAGS                SDMMC_RESP_R1b
70#define SD_SEND_IF_COND_FLAGS               SDMMC_RESP_R7
71#define SD_VOLTAGE_SWITCH_FLAGS             SDMMC_RESP_R1
72#define SD_APP_SEND_SCR_FLAGS               SDMMC_RESP_R1 | SDMMC_RESP_DATA_PRESENT | \
73                                            SDMMC_CMD_READ
74// MMC Commands
75#define MMC_SEND_OP_COND_FLAGS              SDMMC_RESP_R3
76#define MMC_SET_RELATIVE_ADDR_FLAGS         SDMMC_RESP_R1
77#define MMC_SWITCH_FLAGS                    SDMMC_RESP_R1b
78#define MMC_SELECT_CARD_FLAGS               SDMMC_RESP_R1
79#define MMC_SEND_EXT_CSD_FLAGS              SDMMC_RESP_R1 | SDMMC_RESP_DATA_PRESENT | \
80                                            SDMMC_CMD_READ
81#define MMC_SEND_TUNING_BLOCK_FLAGS         SDMMC_RESP_R1 | SDMMC_RESP_DATA_PRESENT | \
82                                            SDMMC_CMD_READ
83// Common SD/MMC commands
84#define SDMMC_GO_IDLE_STATE           0
85#define SDMMC_ALL_SEND_CID            2
86#define SDMMC_SEND_CSD                9
87#define SDMMC_STOP_TRANSMISSION       12
88#define SDMMC_SEND_STATUS             13
89#define SDMMC_READ_BLOCK              17
90#define SDMMC_READ_MULTIPLE_BLOCK     18
91#define SDMMC_WRITE_BLOCK             24
92#define SDMMC_WRITE_MULTIPLE_BLOCK    25
93#define SDMMC_LOCK_UNLOCK             42
94#define SDMMC_APP_CMD                 55
95#define SDMMC_GEN_CMD                 56
96
97// SD Commands
98#define SD_SEND_RELATIVE_ADDR         3
99#define SD_SWITCH_FUNC                6
100#define SD_SELECT_CARD                7
101#define SD_SEND_IF_COND               8
102#define SD_VOLTAGE_SWITCH             11
103#define SD_APP_SEND_SCR               51
104#define SD_SEND_TUNING_BLOCK          19
105
106// MMC Commands
107#define MMC_SEND_OP_COND              1
108#define MMC_SET_RELATIVE_ADDR         3
109#define MMC_SWITCH                    6
110#define MMC_SELECT_CARD               7
111#define MMC_SEND_EXT_CSD              8
112#define MMC_SEND_TUNING_BLOCK         21
113
114// CID fields (SD/MMC)
115#define MMC_CID_SPEC_VRSN_40    3
116#define MMC_CID_PRODUCT_NAME_START    7
117#define MMC_CID_REVISION              6
118#define MMC_CID_SERIAL                2
119
120// CSD fields (SD/MMC)
121#define MMC_CSD_SPEC_VERSION          15
122#define MMC_CSD_SIZE_START            7
123
124// OCR fields (MMC)
125#define MMC_OCR_BUSY            (1 << 31)
126
127// EXT_CSD fields (MMC)
128#define MMC_EXT_CSD_BUS_WIDTH   183
129#define MMC_EXT_CSD_BUS_WIDTH_8_DDR 6
130#define MMC_EXT_CSD_BUS_WIDTH_4_DDR 5
131#define MMC_EXT_CSD_BUS_WIDTH_8     2
132#define MMC_EXT_CSD_BUS_WIDTH_4     1
133#define MMC_EXT_CSD_BUS_WIDTH_1     0
134
135#define MMC_EXT_CSD_HS_TIMING   185
136#define MMC_EXT_CSD_HS_TIMING_LEGACY    0
137#define MMC_EXT_CSD_HS_TIMING_HS        1
138#define MMC_EXT_CSD_HS_TIMING_HS200     2
139#define MMC_EXT_CSD_HS_TIMING_HS400     3
140
141#define MMC_EXT_CSD_DEVICE_TYPE 196
142
143// Device register (CMD13 response) fields (SD/MMC)
144#define MMC_STATUS_ADDR_OUT_OF_RANGE    (1 << 31)
145#define MMC_STATUS_ADDR_MISALIGN        (1 << 30)
146#define MMC_STATUS_BLOCK_LEN_ERR        (1 << 29)
147#define MMC_STATUS_ERASE_SEQ_ERR        (1 << 28)
148#define MMC_STATUS_ERASE_PARAM          (1 << 27)
149#define MMC_STATUS_WP_VIOLATION         (1 << 26)
150#define MMC_STATUS_DEVICE_LOCKED        (1 << 25)
151#define MMC_STATUS_LOCK_UNLOCK_FAILED   (1 << 24)
152#define MMC_STATUS_COM_CRC_ERR          (1 << 23)
153#define MMC_STATUS_ILLEGAL_COMMAND      (1 << 22)
154#define MMC_STATUS_DEVICE_ECC_FAILED    (1 << 21)
155#define MMC_STATUS_CC_ERR               (1 << 20)
156#define MMC_STATUS_ERR                  (1 << 19)
157#define MMC_STATUS_CXD_OVERWRITE        (1 << 16)
158#define MMC_STATUS_WP_ERASE_SKIP        (1 << 15)
159#define MMC_STATUS_ERASE_RESET          (1 << 13)
160#define MMC_STATUS_CURRENT_STATE_MASK   (0xf << 9)
161#define MMC_STATUS_CURRENT_STATE(resp)  ((resp) & MMC_STATUS_CURRENT_STATE_MASK)
162/* eMMC4.5 Spec, Section 6.13, page 140: CURRENT_STATE Field:
163 * 0 = Idle 1 = Ready 2 = Ident 3 = Stby command. 4 = Tran 5 = Data
164 * 6 = Rcv 7 = Prg 8 = Dis 9 = Btst 10 = Slp 11���15 = reserved
165 */
166#define MMC_STATUS_CURRENT_STATE_TRAN   (0x4 << 9)
167#define MMC_STATUS_CURRENT_STATE_DATA   (0x5 << 9)
168#define MMC_STATUS_CURRENT_STATE_RECV   (0x6 << 9)
169#define MMC_STATUS_READY_FOR_DATA       (1 << 8)
170#define MMC_STATUS_SWITCH_ERR           (1 << 7)
171#define MMC_STATUS_EXCEPTION_EVENT      (1 << 6)
172#define MMC_STATUS_APP_CMD              (1 << 5)
173
174__END_CDECLS;
175