1/*- 2 * Copyright (c) 2014 Andrew Turner 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 */ 27 28#if defined(KASAN) || defined(KCSAN) 29#define SAN_RUNTIME 30#endif 31 32#include "opt_platform.h" 33 34#include <sys/param.h> 35#include <vm/vm.h> 36#include <vm/pmap.h> 37 38#include <machine/bus.h> 39 40uint8_t generic_bs_r_1(void *, bus_space_handle_t, bus_size_t); 41uint16_t generic_bs_r_2(void *, bus_space_handle_t, bus_size_t); 42uint32_t generic_bs_r_4(void *, bus_space_handle_t, bus_size_t); 43uint64_t generic_bs_r_8(void *, bus_space_handle_t, bus_size_t); 44 45void generic_bs_rm_1(void *, bus_space_handle_t, bus_size_t, uint8_t *, 46 bus_size_t); 47void generic_bs_rm_2(void *, bus_space_handle_t, bus_size_t, uint16_t *, 48 bus_size_t); 49void generic_bs_rm_4(void *, bus_space_handle_t, bus_size_t, uint32_t *, 50 bus_size_t); 51void generic_bs_rm_8(void *, bus_space_handle_t, bus_size_t, uint64_t *, 52 bus_size_t); 53 54void generic_bs_rr_1(void *, bus_space_handle_t, bus_size_t, uint8_t *, 55 bus_size_t); 56void generic_bs_rr_2(void *, bus_space_handle_t, bus_size_t, uint16_t *, 57 bus_size_t); 58void generic_bs_rr_4(void *, bus_space_handle_t, bus_size_t, uint32_t *, 59 bus_size_t); 60void generic_bs_rr_8(void *, bus_space_handle_t, bus_size_t, uint64_t *, 61 bus_size_t); 62 63void generic_bs_w_1(void *, bus_space_handle_t, bus_size_t, uint8_t); 64void generic_bs_w_2(void *, bus_space_handle_t, bus_size_t, uint16_t); 65void generic_bs_w_4(void *, bus_space_handle_t, bus_size_t, uint32_t); 66void generic_bs_w_8(void *, bus_space_handle_t, bus_size_t, uint64_t); 67 68void generic_bs_wm_1(void *, bus_space_handle_t, bus_size_t, const uint8_t *, 69 bus_size_t); 70void generic_bs_wm_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *, 71 bus_size_t); 72void generic_bs_wm_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *, 73 bus_size_t); 74void generic_bs_wm_8(void *, bus_space_handle_t, bus_size_t, const uint64_t *, 75 bus_size_t); 76 77void generic_bs_wr_1(void *, bus_space_handle_t, bus_size_t, const uint8_t *, 78 bus_size_t); 79void generic_bs_wr_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *, 80 bus_size_t); 81void generic_bs_wr_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *, 82 bus_size_t); 83void generic_bs_wr_8(void *, bus_space_handle_t, bus_size_t, const uint64_t *, 84 bus_size_t); 85 86int generic_bs_peek_1(void *, bus_space_handle_t, bus_size_t , uint8_t *); 87int generic_bs_peek_2(void *, bus_space_handle_t, bus_size_t , uint16_t *); 88int generic_bs_peek_4(void *, bus_space_handle_t, bus_size_t , uint32_t *); 89int generic_bs_peek_8(void *, bus_space_handle_t, bus_size_t , uint64_t *); 90 91int generic_bs_poke_1(void *, bus_space_handle_t, bus_size_t, uint8_t); 92int generic_bs_poke_2(void *, bus_space_handle_t, bus_size_t, uint16_t); 93int generic_bs_poke_4(void *, bus_space_handle_t, bus_size_t, uint32_t); 94int generic_bs_poke_8(void *, bus_space_handle_t, bus_size_t, uint64_t); 95 96static int 97generic_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags, 98 bus_space_handle_t *bshp) 99{ 100 vm_memattr_t ma; 101 void *va; 102 103 ma = VM_MEMATTR_DEVICE; 104 if (flags == BUS_SPACE_MAP_NONPOSTED) 105 ma = VM_MEMATTR_DEVICE_NP; 106 va = pmap_mapdev_attr(bpa, size, ma); 107 if (va == NULL) 108 return (ENOMEM); 109 *bshp = (bus_space_handle_t)va; 110 return (0); 111} 112 113static void 114generic_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size) 115{ 116 117 pmap_unmapdev((void *)bsh, size); 118} 119 120static void 121generic_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset, 122 bus_size_t size, int flags) 123{ 124} 125 126static int 127generic_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset, 128 bus_size_t size, bus_space_handle_t *nbshp) 129{ 130 131 *nbshp = bsh + offset; 132 return (0); 133} 134 135/* 136 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described 137 * by tag/handle starting at `offset'. 138 */ 139static void 140generic_bs_sr_1(void *t, bus_space_handle_t bsh, 141 bus_size_t offset, uint8_t value, size_t count) 142{ 143 144 for (; count != 0; count--, offset++) 145 generic_bs_w_1(t, bsh, offset, value); 146} 147 148static void 149generic_bs_sr_2(void *t, bus_space_handle_t bsh, 150 bus_size_t offset, uint16_t value, size_t count) 151{ 152 153 for (; count != 0; count--, offset += 2) 154 generic_bs_w_2(t, bsh, offset, value); 155} 156 157static void 158generic_bs_sr_4(void *t, bus_space_handle_t bsh, 159 bus_size_t offset, uint32_t value, size_t count) 160{ 161 162 for (; count != 0; count--, offset += 4) 163 generic_bs_w_4(t, bsh, offset, value); 164} 165 166static void 167generic_bs_sr_8(void *t, bus_space_handle_t bsh, bus_size_t offset, 168 uint64_t value, size_t count) 169{ 170 171 for (; count != 0; count--, offset += 8) 172 generic_bs_w_8(t, bsh, offset, value); 173} 174 175struct bus_space memmap_bus = { 176 /* cookie */ 177 .bs_cookie = NULL, 178 179 /* mapping/unmapping */ 180 .bs_map = generic_bs_map, 181 .bs_unmap = generic_bs_unmap, 182 .bs_subregion = generic_bs_subregion, 183 184 /* allocation/deallocation */ 185 .bs_alloc = NULL, 186 .bs_free = NULL, 187 188 /* barrier */ 189 .bs_barrier = generic_bs_barrier, 190 191 /* read single */ 192 .bs_r_1 = generic_bs_r_1, 193 .bs_r_2 = generic_bs_r_2, 194 .bs_r_4 = generic_bs_r_4, 195 .bs_r_8 = generic_bs_r_8, 196 197 /* read multiple */ 198 .bs_rm_1 = generic_bs_rm_1, 199 .bs_rm_2 = generic_bs_rm_2, 200 .bs_rm_4 = generic_bs_rm_4, 201 .bs_rm_8 = generic_bs_rm_8, 202 203 /* read region */ 204 .bs_rr_1 = generic_bs_rr_1, 205 .bs_rr_2 = generic_bs_rr_2, 206 .bs_rr_4 = generic_bs_rr_4, 207 .bs_rr_8 = generic_bs_rr_8, 208 209 /* write single */ 210 .bs_w_1 = generic_bs_w_1, 211 .bs_w_2 = generic_bs_w_2, 212 .bs_w_4 = generic_bs_w_4, 213 .bs_w_8 = generic_bs_w_8, 214 215 /* write multiple */ 216 .bs_wm_1 = generic_bs_wm_1, 217 .bs_wm_2 = generic_bs_wm_2, 218 .bs_wm_4 = generic_bs_wm_4, 219 .bs_wm_8 = generic_bs_wm_8, 220 221 /* write region */ 222 .bs_wr_1 = generic_bs_wr_1, 223 .bs_wr_2 = generic_bs_wr_2, 224 .bs_wr_4 = generic_bs_wr_4, 225 .bs_wr_8 = generic_bs_wr_8, 226 227 /* set multiple */ 228 .bs_sm_1 = NULL, 229 .bs_sm_2 = NULL, 230 .bs_sm_4 = NULL, 231 .bs_sm_8 = NULL, 232 233 /* set region */ 234 .bs_sr_1 = generic_bs_sr_1, 235 .bs_sr_2 = generic_bs_sr_2, 236 .bs_sr_4 = generic_bs_sr_4, 237 .bs_sr_8 = generic_bs_sr_8, 238 239 /* copy */ 240 .bs_c_1 = NULL, 241 .bs_c_2 = NULL, 242 .bs_c_4 = NULL, 243 .bs_c_8 = NULL, 244 245 /* read single stream */ 246 .bs_r_1_s = NULL, 247 .bs_r_2_s = NULL, 248 .bs_r_4_s = NULL, 249 .bs_r_8_s = NULL, 250 251 /* read multiple stream */ 252 .bs_rm_1_s = generic_bs_rm_1, 253 .bs_rm_2_s = generic_bs_rm_2, 254 .bs_rm_4_s = generic_bs_rm_4, 255 .bs_rm_8_s = generic_bs_rm_8, 256 257 /* read region stream */ 258 .bs_rr_1_s = NULL, 259 .bs_rr_2_s = NULL, 260 .bs_rr_4_s = NULL, 261 .bs_rr_8_s = NULL, 262 263 /* write single stream */ 264 .bs_w_1_s = NULL, 265 .bs_w_2_s = NULL, 266 .bs_w_4_s = NULL, 267 .bs_w_8_s = NULL, 268 269 /* write multiple stream */ 270 .bs_wm_1_s = generic_bs_wm_1, 271 .bs_wm_2_s = generic_bs_wm_2, 272 .bs_wm_4_s = generic_bs_wm_4, 273 .bs_wm_8_s = generic_bs_wm_8, 274 275 /* write region stream */ 276 .bs_wr_1_s = NULL, 277 .bs_wr_2_s = NULL, 278 .bs_wr_4_s = NULL, 279 .bs_wr_8_s = NULL, 280 281 /* peek */ 282 .bs_peek_1 = generic_bs_peek_1, 283 .bs_peek_2 = generic_bs_peek_2, 284 .bs_peek_4 = generic_bs_peek_4, 285 .bs_peek_8 = generic_bs_peek_8, 286 287 /* poke */ 288 .bs_poke_1 = generic_bs_poke_1, 289 .bs_poke_2 = generic_bs_poke_2, 290 .bs_poke_4 = generic_bs_poke_4, 291 .bs_poke_8 = generic_bs_poke_8, 292}; 293 294#ifdef FDT 295bus_space_tag_t fdtbus_bs_tag = &memmap_bus; 296#endif 297