1/*- 2 * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights 3 * reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in 13 * the documentation and/or other materials provided with the 14 * distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 26 * THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * NETLOGIC_BSD 29 * $FreeBSD$ 30 */ 31 32#ifndef __NLM_XLP_H__ 33#define __NLM_XLP_H__ 34#include <mips/nlm/hal/mips-extns.h> 35#include <mips/nlm/hal/iomap.h> 36 37/* XLP 8xx/4xx A0, A1, A2 CPU COP0 PRIDs */ 38#define CHIP_PROCESSOR_ID_XLP_8XX 0x10 39#define CHIP_PROCESSOR_ID_XLP_3XX 0x11 40#define CHIP_PROCESSOR_ID_XLP_416 0x94 41#define CHIP_PROCESSOR_ID_XLP_432 0x14 42 43/* Revision id's */ 44#define XLP_REVISION_A0 0x00 45#define XLP_REVISION_A1 0x01 46#define XLP_REVISION_A2 0x02 47#define XLP_REVISION_B0 0x03 48#define XLP_REVISION_B1 0x04 49 50#ifndef LOCORE 51/* 52 * FreeBSD can be started with few threads and cores turned off, 53 * so have a hardware thread id to FreeBSD cpuid mapping. 54 */ 55extern int xlp_ncores; 56extern int xlp_threads_per_core; 57extern uint32_t xlp_hw_thread_mask; 58extern int xlp_cpuid_to_hwtid[]; 59extern int xlp_hwtid_to_cpuid[]; 60#ifdef SMP 61extern void xlp_enable_threads(int code); 62#endif 63uint32_t xlp_get_cpu_frequency(int node, int core); 64int nlm_set_device_frequency(int node, int devtype, int frequency); 65int xlp_irq_to_irt(int irq); 66 67static __inline int nlm_processor_id(void) 68{ 69 return ((mips_rd_prid() >> 8) & 0xff); 70} 71 72static __inline int nlm_is_xlp3xx(void) 73{ 74 75 return (nlm_processor_id() == CHIP_PROCESSOR_ID_XLP_3XX); 76} 77 78static __inline int nlm_is_xlp3xx_ax(void) 79{ 80 uint32_t procid = mips_rd_prid(); 81 int prid = (procid >> 8) & 0xff; 82 int rev = procid & 0xff; 83 84 return (prid == CHIP_PROCESSOR_ID_XLP_3XX && 85 rev < XLP_REVISION_B0); 86} 87 88static __inline int nlm_is_xlp4xx(void) 89{ 90 int prid = nlm_processor_id(); 91 92 return (prid == CHIP_PROCESSOR_ID_XLP_432 || 93 prid == CHIP_PROCESSOR_ID_XLP_416); 94} 95 96static __inline int nlm_is_xlp8xx(void) 97{ 98 int prid = nlm_processor_id(); 99 100 return (prid == CHIP_PROCESSOR_ID_XLP_8XX || 101 prid == CHIP_PROCESSOR_ID_XLP_432 || 102 prid == CHIP_PROCESSOR_ID_XLP_416); 103} 104 105static __inline int nlm_is_xlp8xx_ax(void) 106{ 107 uint32_t procid = mips_rd_prid(); 108 int prid = (procid >> 8) & 0xff; 109 int rev = procid & 0xff; 110 111 return ((prid == CHIP_PROCESSOR_ID_XLP_8XX || 112 prid == CHIP_PROCESSOR_ID_XLP_432 || 113 prid == CHIP_PROCESSOR_ID_XLP_416) && 114 (rev < XLP_REVISION_B0)); 115} 116 117static __inline int nlm_is_xlp8xx_b0(void) 118{ 119 uint32_t procid = mips_rd_prid(); 120 int prid = (procid >> 8) & 0xff; 121 int rev = procid & 0xff; 122 123 return ((prid == CHIP_PROCESSOR_ID_XLP_8XX || 124 prid == CHIP_PROCESSOR_ID_XLP_432 || 125 prid == CHIP_PROCESSOR_ID_XLP_416) && 126 rev == XLP_REVISION_B0); 127} 128 129static __inline int xlp_socdev_irt(uint32_t offset) 130{ 131 uint64_t base; 132 133 base = nlm_pcicfg_base(offset); 134 return (nlm_irtstart(base)); 135} 136#endif /* LOCORE */ 137#endif /* __NLM_XLP_H__ */ 138