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331722 |
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29-Mar-2018 |
eadler |
Revert r330897:
This was intended to be a non-functional change. It wasn't. The commit message was thus wrong. In addition it broke arm, and merged crypto related code.
Revert with prejudice.
This revert skips files touched in r316370 since that commit was since MFCed. This revert also skips files that require $FreeBSD$ property changes.
Thank you to those who helped me get out of this mess including but not limited to gonzo, kevans, rgrimes.
Requested by: gjb (re)
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330897 |
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14-Mar-2018 |
eadler |
Partial merge of the SPDX changes
These changes are incomplete but are making it difficult to determine what other changes can/should be merged.
No objections from: pfg
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302408 |
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07-Jul-2016 |
gjb |
Copy head@r302406 to stable/11 as part of the 11.0-RELEASE cycle. Prune svn:mergeinfo from the new branch, as nothing has been merged here.
Additional commits post-branch will follow.
Approved by: re (implicit) Sponsored by: The FreeBSD Foundation |
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279387 |
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27-Feb-2015 |
jchandra |
Whitespace fixes for files in sys/mips/nlm
Clean up whitespace issues under sys/mips/nlm (except dev). No functional change in this commit.
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279306 |
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26-Feb-2015 |
jchandra |
Remove run-time allocation of XLP IRQs
Follow the same static IRQ to Interrupt Table Entry mapping as the other OS supported on XLP.
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279304 |
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25-Feb-2015 |
jchandra |
Fix up interrupt definitions for Broadcom XLP
Gather all the IRQ definitions to interrupt.h. Earlier these were in xlp.h and pic.h. Update the definition of XLP_IRQ_IS_PICINTR to check for last irq as well.
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238290 |
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09-Jul-2012 |
jchandra |
Identify Netlogic XLP 8xx B1 chip revisions
Add functions to check for 8xx B0 and 3xx Ax revisions which will be used in network block initialization.
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233563 |
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27-Mar-2012 |
jchandra |
Update memory and resource allocation code for SoC devices
The XLP on-chip devices have PCI configuration headers, but some of the devices need custom resource allocation code. - devices with no MEM/IO BARs with registers in PCIe extended reg space have to be handled in memory resource allocation - devices without INTPIN/INTLINE in PCI header can be supported by having these faked with a shadow register. - Some devices does not allow 8/16 bit access to the register space, he default bus space cannot be used for these.
Subclass pci and override attach and resource allocation methods to take care of this.
Remove earlier code which did this partially.
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233533 |
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27-Mar-2012 |
jchandra |
Support for XLP4xx and XLP 8xx B0 revision
- Add 4xx processor IDs, add workaround in CPU detection code. - Update frequency detection code for XLP 8xx. - Add setting device frequency code. - Update processor ID checking code.
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227783 |
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21-Nov-2011 |
jchandra |
Merge XLP 3XX updates and related rework.
* Update message station (CMS) code, read queue ids from PCI header. * Use interrupts to wakeup message handling threads on 3XX * Update PIC code, read interrupt information from PCI header instead of using fixed values. * Update PCI interrupt handling for the PIC change. * Update code for getting chip frequency, new code support XLP 3XX * Misc style(9) fixes
In collaboration with: prabhath at netlogicmicro com (CMS/PIC) venkatesh at netlogicmicro.com (PCI)
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225394 |
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05-Sep-2011 |
jchandra |
MIPS XLP platform code update.
* Update the hardware access register definitions and functions to bring them in line with other Netlogic software. * Update the platform bus to use PCI even for on-chip devices. Add a dummy PCI driver to ignore on-chip devices which do not need driver. * Provide memory and IRQ resource allocation code for on-chip devices which cannot get it from PCI config. * add support for on-chip PCI and USB interfaces. * update conf files, enable pci and retain old MAXCPU until we can support >32 cpus.
Approved by: re(kib), jmallett
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224110 |
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16-Jul-2011 |
jchandra |
Add MIPS platform files for Netlogic XLP SoC.
Processor, UART, PIC and Messaging Network code. Also add sys/mips/nlm/hal for on-chip device registers.
In collaboration with: Prabhath Raman <prabhathpr at netlogicmicro com>
Approved by: bz(re), jmallett, imp(mips)
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