if_urtw.c revision 345636
1/*- 2 * Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org> 3 * 4 * Permission to use, copy, modify, and distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#include <sys/cdefs.h> 18__FBSDID("$FreeBSD: stable/11/sys/dev/usb/wlan/if_urtw.c 345636 2019-03-28 09:50:25Z avos $"); 19#include <sys/param.h> 20#include <sys/sockio.h> 21#include <sys/sysctl.h> 22#include <sys/lock.h> 23#include <sys/mutex.h> 24#include <sys/mbuf.h> 25#include <sys/kernel.h> 26#include <sys/socket.h> 27#include <sys/systm.h> 28#include <sys/malloc.h> 29#include <sys/module.h> 30#include <sys/bus.h> 31#include <sys/endian.h> 32#include <sys/kdb.h> 33 34#include <net/if.h> 35#include <net/if_var.h> 36#include <net/if_arp.h> 37#include <net/ethernet.h> 38#include <net/if_dl.h> 39#include <net/if_media.h> 40#include <net/if_types.h> 41 42#ifdef INET 43#include <netinet/in.h> 44#include <netinet/in_systm.h> 45#include <netinet/in_var.h> 46#include <netinet/if_ether.h> 47#include <netinet/ip.h> 48#endif 49 50#include <net80211/ieee80211_var.h> 51#include <net80211/ieee80211_regdomain.h> 52#include <net80211/ieee80211_radiotap.h> 53 54#include <dev/usb/usb.h> 55#include <dev/usb/usbdi.h> 56#include "usbdevs.h" 57 58#include <dev/usb/wlan/if_urtwreg.h> 59#include <dev/usb/wlan/if_urtwvar.h> 60 61static SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW, 0, "USB Realtek 8187L"); 62#ifdef URTW_DEBUG 63int urtw_debug = 0; 64SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RWTUN, &urtw_debug, 0, 65 "control debugging printfs"); 66enum { 67 URTW_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 68 URTW_DEBUG_RECV = 0x00000002, /* basic recv operation */ 69 URTW_DEBUG_RESET = 0x00000004, /* reset processing */ 70 URTW_DEBUG_TX_PROC = 0x00000008, /* tx ISR proc */ 71 URTW_DEBUG_RX_PROC = 0x00000010, /* rx ISR proc */ 72 URTW_DEBUG_STATE = 0x00000020, /* 802.11 state transitions */ 73 URTW_DEBUG_STAT = 0x00000040, /* statistic */ 74 URTW_DEBUG_INIT = 0x00000080, /* initialization of dev */ 75 URTW_DEBUG_TXSTATUS = 0x00000100, /* tx status */ 76 URTW_DEBUG_ANY = 0xffffffff 77}; 78#define DPRINTF(sc, m, fmt, ...) do { \ 79 if (sc->sc_debug & (m)) \ 80 printf(fmt, __VA_ARGS__); \ 81} while (0) 82#else 83#define DPRINTF(sc, m, fmt, ...) do { \ 84 (void) sc; \ 85} while (0) 86#endif 87static int urtw_preamble_mode = URTW_PREAMBLE_MODE_LONG; 88SYSCTL_INT(_hw_usb_urtw, OID_AUTO, preamble_mode, CTLFLAG_RWTUN, 89 &urtw_preamble_mode, 0, "set the preable mode (long or short)"); 90 91/* recognized device vendors/products */ 92#define urtw_lookup(v, p) \ 93 ((const struct urtw_type *)usb_lookup(urtw_devs, v, p)) 94#define URTW_DEV_B(v,p) \ 95 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187B) } 96#define URTW_DEV_L(v,p) \ 97 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187L) } 98#define URTW_REV_RTL8187B 0 99#define URTW_REV_RTL8187L 1 100static const STRUCT_USB_HOST_ID urtw_devs[] = { 101 URTW_DEV_B(NETGEAR, WG111V3), 102 URTW_DEV_B(REALTEK, RTL8187B_0), 103 URTW_DEV_B(REALTEK, RTL8187B_1), 104 URTW_DEV_B(REALTEK, RTL8187B_2), 105 URTW_DEV_B(SITECOMEU, WL168V4), 106 URTW_DEV_L(ASUS, P5B_WIFI), 107 URTW_DEV_L(BELKIN, F5D7050E), 108 URTW_DEV_L(LINKSYS4, WUSB54GCV2), 109 URTW_DEV_L(NETGEAR, WG111V2), 110 URTW_DEV_L(REALTEK, RTL8187), 111 URTW_DEV_L(SITECOMEU, WL168V1), 112 URTW_DEV_L(SURECOM, EP9001G2A), 113 { USB_VPI(USB_VENDOR_OVISLINK, 0x8187, URTW_REV_RTL8187L) }, 114 { USB_VPI(USB_VENDOR_DICKSMITH, 0x9401, URTW_REV_RTL8187L) }, 115 { USB_VPI(USB_VENDOR_HP, 0xca02, URTW_REV_RTL8187L) }, 116 { USB_VPI(USB_VENDOR_LOGITEC, 0x010c, URTW_REV_RTL8187L) }, 117 { USB_VPI(USB_VENDOR_NETGEAR, 0x6100, URTW_REV_RTL8187L) }, 118 { USB_VPI(USB_VENDOR_SPHAIRON, 0x0150, URTW_REV_RTL8187L) }, 119 { USB_VPI(USB_VENDOR_QCOM, 0x6232, URTW_REV_RTL8187L) }, 120#undef URTW_DEV_L 121#undef URTW_DEV_B 122}; 123 124#define urtw_read8_m(sc, val, data) do { \ 125 error = urtw_read8_c(sc, val, data); \ 126 if (error != 0) \ 127 goto fail; \ 128} while (0) 129#define urtw_write8_m(sc, val, data) do { \ 130 error = urtw_write8_c(sc, val, data); \ 131 if (error != 0) \ 132 goto fail; \ 133} while (0) 134#define urtw_read16_m(sc, val, data) do { \ 135 error = urtw_read16_c(sc, val, data); \ 136 if (error != 0) \ 137 goto fail; \ 138} while (0) 139#define urtw_write16_m(sc, val, data) do { \ 140 error = urtw_write16_c(sc, val, data); \ 141 if (error != 0) \ 142 goto fail; \ 143} while (0) 144#define urtw_read32_m(sc, val, data) do { \ 145 error = urtw_read32_c(sc, val, data); \ 146 if (error != 0) \ 147 goto fail; \ 148} while (0) 149#define urtw_write32_m(sc, val, data) do { \ 150 error = urtw_write32_c(sc, val, data); \ 151 if (error != 0) \ 152 goto fail; \ 153} while (0) 154#define urtw_8187_write_phy_ofdm(sc, val, data) do { \ 155 error = urtw_8187_write_phy_ofdm_c(sc, val, data); \ 156 if (error != 0) \ 157 goto fail; \ 158} while (0) 159#define urtw_8187_write_phy_cck(sc, val, data) do { \ 160 error = urtw_8187_write_phy_cck_c(sc, val, data); \ 161 if (error != 0) \ 162 goto fail; \ 163} while (0) 164#define urtw_8225_write(sc, val, data) do { \ 165 error = urtw_8225_write_c(sc, val, data); \ 166 if (error != 0) \ 167 goto fail; \ 168} while (0) 169 170struct urtw_pair { 171 uint32_t reg; 172 uint32_t val; 173}; 174 175static uint8_t urtw_8225_agc[] = { 176 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b, 177 0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 178 0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85, 179 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a, 180 0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 181 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24, 182 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 183 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 184 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 185 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 186 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 187 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 188}; 189 190static uint8_t urtw_8225z2_agc[] = { 191 0x5e, 0x5e, 0x5e, 0x5e, 0x5d, 0x5b, 0x59, 0x57, 0x55, 0x53, 0x51, 192 0x4f, 0x4d, 0x4b, 0x49, 0x47, 0x45, 0x43, 0x41, 0x3f, 0x3d, 0x3b, 193 0x39, 0x37, 0x35, 0x33, 0x31, 0x2f, 0x2d, 0x2b, 0x29, 0x27, 0x25, 194 0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 0x15, 0x13, 0x11, 0x0f, 195 0x0d, 0x0b, 0x09, 0x07, 0x05, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 196 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x19, 0x19, 197 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x20, 0x21, 0x22, 0x23, 198 0x24, 0x25, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29, 0x2a, 0x2a, 199 0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2d, 200 0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x31, 0x31, 201 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 202 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31 203}; 204 205static uint32_t urtw_8225_channel[] = { 206 0x0000, /* dummy channel 0 */ 207 0x085c, /* 1 */ 208 0x08dc, /* 2 */ 209 0x095c, /* 3 */ 210 0x09dc, /* 4 */ 211 0x0a5c, /* 5 */ 212 0x0adc, /* 6 */ 213 0x0b5c, /* 7 */ 214 0x0bdc, /* 8 */ 215 0x0c5c, /* 9 */ 216 0x0cdc, /* 10 */ 217 0x0d5c, /* 11 */ 218 0x0ddc, /* 12 */ 219 0x0e5c, /* 13 */ 220 0x0f72, /* 14 */ 221}; 222 223static uint8_t urtw_8225_gain[] = { 224 0x23, 0x88, 0x7c, 0xa5, /* -82dbm */ 225 0x23, 0x88, 0x7c, 0xb5, /* -82dbm */ 226 0x23, 0x88, 0x7c, 0xc5, /* -82dbm */ 227 0x33, 0x80, 0x79, 0xc5, /* -78dbm */ 228 0x43, 0x78, 0x76, 0xc5, /* -74dbm */ 229 0x53, 0x60, 0x73, 0xc5, /* -70dbm */ 230 0x63, 0x58, 0x70, 0xc5, /* -66dbm */ 231}; 232 233static struct urtw_pair urtw_8225_rf_part1[] = { 234 { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 235 { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a }, 236 { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 }, 237 { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 }, 238}; 239 240static struct urtw_pair urtw_8225_rf_part2[] = { 241 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 242 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 243 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 }, 244 { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 }, 245 { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 }, 246 { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, { 0x18, 0xef }, 247 { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x76 }, { 0x1c, 0x04 }, 248 { 0x1e, 0x95 }, { 0x1f, 0x75 }, { 0x20, 0x1f }, { 0x21, 0x27 }, 249 { 0x22, 0x16 }, { 0x24, 0x46 }, { 0x25, 0x20 }, { 0x26, 0x90 }, 250 { 0x27, 0x88 } 251}; 252 253static struct urtw_pair urtw_8225_rf_part3[] = { 254 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 255 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x10, 0x9b }, 256 { 0x11, 0x88 }, { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, 257 { 0x1a, 0xa0 }, { 0x1b, 0x08 }, { 0x40, 0x86 }, { 0x41, 0x8d }, 258 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x1f }, { 0x45, 0x1e }, 259 { 0x46, 0x1a }, { 0x47, 0x15 }, { 0x48, 0x10 }, { 0x49, 0x0a }, 260 { 0x4a, 0x05 }, { 0x4b, 0x02 }, { 0x4c, 0x05 } 261}; 262 263static uint16_t urtw_8225_rxgain[] = { 264 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 265 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 266 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 267 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 268 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 269 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 270 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 271 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 272 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 273 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 274 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3, 275 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb 276}; 277 278static uint8_t urtw_8225_threshold[] = { 279 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd, 280}; 281 282static uint8_t urtw_8225_tx_gain_cck_ofdm[] = { 283 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e 284}; 285 286static uint8_t urtw_8225_txpwr_cck[] = { 287 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02, 288 0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02, 289 0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02, 290 0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02, 291 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03, 292 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03 293}; 294 295static uint8_t urtw_8225_txpwr_cck_ch14[] = { 296 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00, 297 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00, 298 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00, 299 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00, 300 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00, 301 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00 302}; 303 304static uint8_t urtw_8225_txpwr_ofdm[]={ 305 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4 306}; 307 308static uint8_t urtw_8225v2_gain_bg[]={ 309 0x23, 0x15, 0xa5, /* -82-1dbm */ 310 0x23, 0x15, 0xb5, /* -82-2dbm */ 311 0x23, 0x15, 0xc5, /* -82-3dbm */ 312 0x33, 0x15, 0xc5, /* -78dbm */ 313 0x43, 0x15, 0xc5, /* -74dbm */ 314 0x53, 0x15, 0xc5, /* -70dbm */ 315 0x63, 0x15, 0xc5, /* -66dbm */ 316}; 317 318static struct urtw_pair urtw_8225v2_rf_part1[] = { 319 { 0x00, 0x02bf }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 320 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 321 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 322 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 323}; 324 325static struct urtw_pair urtw_8225v2b_rf_part0[] = { 326 { 0x00, 0x00b7 }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 327 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 328 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 329 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 330}; 331 332static struct urtw_pair urtw_8225v2b_rf_part1[] = { 333 {0x0f0, 0x32}, {0x0f1, 0x32}, {0x0f2, 0x00}, 334 {0x0f3, 0x00}, {0x0f4, 0x32}, {0x0f5, 0x43}, 335 {0x0f6, 0x00}, {0x0f7, 0x00}, {0x0f8, 0x46}, 336 {0x0f9, 0xa4}, {0x0fa, 0x00}, {0x0fb, 0x00}, 337 {0x0fc, 0x96}, {0x0fd, 0xa4}, {0x0fe, 0x00}, 338 {0x0ff, 0x00}, {0x158, 0x4b}, {0x159, 0x00}, 339 {0x15a, 0x4b}, {0x15b, 0x00}, {0x160, 0x4b}, 340 {0x161, 0x09}, {0x162, 0x4b}, {0x163, 0x09}, 341 {0x1ce, 0x0f}, {0x1cf, 0x00}, {0x1e0, 0xff}, 342 {0x1e1, 0x0f}, {0x1e2, 0x00}, {0x1f0, 0x4e}, 343 {0x1f1, 0x01}, {0x1f2, 0x02}, {0x1f3, 0x03}, 344 {0x1f4, 0x04}, {0x1f5, 0x05}, {0x1f6, 0x06}, 345 {0x1f7, 0x07}, {0x1f8, 0x08}, {0x24e, 0x00}, 346 {0x20c, 0x04}, {0x221, 0x61}, {0x222, 0x68}, 347 {0x223, 0x6f}, {0x224, 0x76}, {0x225, 0x7d}, 348 {0x226, 0x84}, {0x227, 0x8d}, {0x24d, 0x08}, 349 {0x250, 0x05}, {0x251, 0xf5}, {0x252, 0x04}, 350 {0x253, 0xa0}, {0x254, 0x1f}, {0x255, 0x23}, 351 {0x256, 0x45}, {0x257, 0x67}, {0x258, 0x08}, 352 {0x259, 0x08}, {0x25a, 0x08}, {0x25b, 0x08}, 353 {0x260, 0x08}, {0x261, 0x08}, {0x262, 0x08}, 354 {0x263, 0x08}, {0x264, 0xcf}, {0x272, 0x56}, 355 {0x273, 0x9a}, {0x034, 0xf0}, {0x035, 0x0f}, 356 {0x05b, 0x40}, {0x084, 0x88}, {0x085, 0x24}, 357 {0x088, 0x54}, {0x08b, 0xb8}, {0x08c, 0x07}, 358 {0x08d, 0x00}, {0x094, 0x1b}, {0x095, 0x12}, 359 {0x096, 0x00}, {0x097, 0x06}, {0x09d, 0x1a}, 360 {0x09f, 0x10}, {0x0b4, 0x22}, {0x0be, 0x80}, 361 {0x0db, 0x00}, {0x0ee, 0x00}, {0x091, 0x03}, 362 {0x24c, 0x00}, {0x39f, 0x00}, {0x08c, 0x01}, 363 {0x08d, 0x10}, {0x08e, 0x08}, {0x08f, 0x00} 364}; 365 366static struct urtw_pair urtw_8225v2_rf_part2[] = { 367 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 368 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 369 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x08 }, { 0x0b, 0x80 }, 370 { 0x0c, 0x01 }, { 0x0d, 0x43 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, 371 { 0x10, 0x84 }, { 0x11, 0x07 }, { 0x12, 0x20 }, { 0x13, 0x20 }, 372 { 0x14, 0x00 }, { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, 373 { 0x18, 0xef }, { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x15 }, 374 { 0x1c, 0x04 }, { 0x1d, 0xc5 }, { 0x1e, 0x95 }, { 0x1f, 0x75 }, 375 { 0x20, 0x1f }, { 0x21, 0x17 }, { 0x22, 0x16 }, { 0x23, 0x80 }, 376 { 0x24, 0x46 }, { 0x25, 0x00 }, { 0x26, 0x90 }, { 0x27, 0x88 } 377}; 378 379static struct urtw_pair urtw_8225v2b_rf_part2[] = { 380 { 0x00, 0x10 }, { 0x01, 0x0d }, { 0x02, 0x01 }, { 0x03, 0x00 }, 381 { 0x04, 0x14 }, { 0x05, 0xfb }, { 0x06, 0xfb }, { 0x07, 0x60 }, 382 { 0x08, 0x00 }, { 0x09, 0x60 }, { 0x0a, 0x00 }, { 0x0b, 0x00 }, 383 { 0x0c, 0x00 }, { 0x0d, 0x5c }, { 0x0e, 0x00 }, { 0x0f, 0x00 }, 384 { 0x10, 0x40 }, { 0x11, 0x00 }, { 0x12, 0x40 }, { 0x13, 0x00 }, 385 { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0xa8 }, { 0x17, 0x26 }, 386 { 0x18, 0x32 }, { 0x19, 0x33 }, { 0x1a, 0x07 }, { 0x1b, 0xa5 }, 387 { 0x1c, 0x6f }, { 0x1d, 0x55 }, { 0x1e, 0xc8 }, { 0x1f, 0xb3 }, 388 { 0x20, 0x0a }, { 0x21, 0xe1 }, { 0x22, 0x2C }, { 0x23, 0x8a }, 389 { 0x24, 0x86 }, { 0x25, 0x83 }, { 0x26, 0x34 }, { 0x27, 0x0f }, 390 { 0x28, 0x4f }, { 0x29, 0x24 }, { 0x2a, 0x6f }, { 0x2b, 0xc2 }, 391 { 0x2c, 0x6b }, { 0x2d, 0x40 }, { 0x2e, 0x80 }, { 0x2f, 0x00 }, 392 { 0x30, 0xc0 }, { 0x31, 0xc1 }, { 0x32, 0x58 }, { 0x33, 0xf1 }, 393 { 0x34, 0x00 }, { 0x35, 0xe4 }, { 0x36, 0x90 }, { 0x37, 0x3e }, 394 { 0x38, 0x6d }, { 0x39, 0x3c }, { 0x3a, 0xfb }, { 0x3b, 0x07 } 395}; 396 397static struct urtw_pair urtw_8225v2_rf_part3[] = { 398 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 399 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x09, 0x11 }, 400 { 0x0a, 0x17 }, { 0x0b, 0x11 }, { 0x10, 0x9b }, { 0x11, 0x88 }, 401 { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, { 0x1a, 0xa0 }, 402 { 0x1b, 0x08 }, { 0x1d, 0x00 }, { 0x40, 0x86 }, { 0x41, 0x9d }, 403 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x36 }, { 0x45, 0x35 }, 404 { 0x46, 0x2e }, { 0x47, 0x25 }, { 0x48, 0x1c }, { 0x49, 0x12 }, 405 { 0x4a, 0x09 }, { 0x4b, 0x04 }, { 0x4c, 0x05 } 406}; 407 408static uint16_t urtw_8225v2_rxgain[] = { 409 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009, 410 0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141, 411 0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183, 412 0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244, 413 0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288, 414 0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345, 415 0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389, 416 0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393, 417 0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d, 418 0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9, 419 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 420 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 421}; 422 423static uint16_t urtw_8225v2b_rxgain[] = { 424 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 425 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 426 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 427 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 428 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 429 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 430 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 431 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 432 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 433 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 434 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 435 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 436}; 437 438static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = { 439 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 440 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 441 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 442 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 443 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 444 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, 445}; 446 447static uint8_t urtw_8225v2_txpwr_cck[] = { 448 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04 449}; 450 451static uint8_t urtw_8225v2_txpwr_cck_ch14[] = { 452 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00 453}; 454 455static uint8_t urtw_8225v2b_txpwr_cck[] = { 456 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04, 457 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03, 458 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03, 459 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03 460}; 461 462static uint8_t urtw_8225v2b_txpwr_cck_ch14[] = { 463 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00, 464 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 465 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 466 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00 467}; 468 469static struct urtw_pair urtw_ratetable[] = { 470 { 2, 0 }, { 4, 1 }, { 11, 2 }, { 12, 4 }, { 18, 5 }, 471 { 22, 3 }, { 24, 6 }, { 36, 7 }, { 48, 8 }, { 72, 9 }, 472 { 96, 10 }, { 108, 11 } 473}; 474 475#if 0 476static const uint8_t urtw_8187b_reg_table[][3] = { 477 { 0xf0, 0x32, 0 }, { 0xf1, 0x32, 0 }, { 0xf2, 0x00, 0 }, 478 { 0xf3, 0x00, 0 }, { 0xf4, 0x32, 0 }, { 0xf5, 0x43, 0 }, 479 { 0xf6, 0x00, 0 }, { 0xf7, 0x00, 0 }, { 0xf8, 0x46, 0 }, 480 { 0xf9, 0xa4, 0 }, { 0xfa, 0x00, 0 }, { 0xfb, 0x00, 0 }, 481 { 0xfc, 0x96, 0 }, { 0xfd, 0xa4, 0 }, { 0xfe, 0x00, 0 }, 482 { 0xff, 0x00, 0 }, { 0x58, 0x4b, 1 }, { 0x59, 0x00, 1 }, 483 { 0x5a, 0x4b, 1 }, { 0x5b, 0x00, 1 }, { 0x60, 0x4b, 1 }, 484 { 0x61, 0x09, 1 }, { 0x62, 0x4b, 1 }, { 0x63, 0x09, 1 }, 485 { 0xce, 0x0f, 1 }, { 0xcf, 0x00, 1 }, { 0xe0, 0xff, 1 }, 486 { 0xe1, 0x0f, 1 }, { 0xe2, 0x00, 1 }, { 0xf0, 0x4e, 1 }, 487 { 0xf1, 0x01, 1 }, { 0xf2, 0x02, 1 }, { 0xf3, 0x03, 1 }, 488 { 0xf4, 0x04, 1 }, { 0xf5, 0x05, 1 }, { 0xf6, 0x06, 1 }, 489 { 0xf7, 0x07, 1 }, { 0xf8, 0x08, 1 }, { 0x4e, 0x00, 2 }, 490 { 0x0c, 0x04, 2 }, { 0x21, 0x61, 2 }, { 0x22, 0x68, 2 }, 491 { 0x23, 0x6f, 2 }, { 0x24, 0x76, 2 }, { 0x25, 0x7d, 2 }, 492 { 0x26, 0x84, 2 }, { 0x27, 0x8d, 2 }, { 0x4d, 0x08, 2 }, 493 { 0x50, 0x05, 2 }, { 0x51, 0xf5, 2 }, { 0x52, 0x04, 2 }, 494 { 0x53, 0xa0, 2 }, { 0x54, 0x1f, 2 }, { 0x55, 0x23, 2 }, 495 { 0x56, 0x45, 2 }, { 0x57, 0x67, 2 }, { 0x58, 0x08, 2 }, 496 { 0x59, 0x08, 2 }, { 0x5a, 0x08, 2 }, { 0x5b, 0x08, 2 }, 497 { 0x60, 0x08, 2 }, { 0x61, 0x08, 2 }, { 0x62, 0x08, 2 }, 498 { 0x63, 0x08, 2 }, { 0x64, 0xcf, 2 }, { 0x72, 0x56, 2 }, 499 { 0x73, 0x9a, 2 }, { 0x34, 0xf0, 0 }, { 0x35, 0x0f, 0 }, 500 { 0x5b, 0x40, 0 }, { 0x84, 0x88, 0 }, { 0x85, 0x24, 0 }, 501 { 0x88, 0x54, 0 }, { 0x8b, 0xb8, 0 }, { 0x8c, 0x07, 0 }, 502 { 0x8d, 0x00, 0 }, { 0x94, 0x1b, 0 }, { 0x95, 0x12, 0 }, 503 { 0x96, 0x00, 0 }, { 0x97, 0x06, 0 }, { 0x9d, 0x1a, 0 }, 504 { 0x9f, 0x10, 0 }, { 0xb4, 0x22, 0 }, { 0xbe, 0x80, 0 }, 505 { 0xdb, 0x00, 0 }, { 0xee, 0x00, 0 }, { 0x91, 0x03, 0 }, 506 { 0x4c, 0x00, 2 }, { 0x9f, 0x00, 3 }, { 0x8c, 0x01, 0 }, 507 { 0x8d, 0x10, 0 }, { 0x8e, 0x08, 0 }, { 0x8f, 0x00, 0 } 508}; 509#endif 510 511static usb_callback_t urtw_bulk_rx_callback; 512static usb_callback_t urtw_bulk_tx_callback; 513static usb_callback_t urtw_bulk_tx_status_callback; 514 515static const struct usb_config urtw_8187b_usbconfig[URTW_8187B_N_XFERS] = { 516 [URTW_8187B_BULK_RX] = { 517 .type = UE_BULK, 518 .endpoint = 0x83, 519 .direction = UE_DIR_IN, 520 .bufsize = MCLBYTES, 521 .flags = { 522 .ext_buffer = 1, 523 .pipe_bof = 1, 524 .short_xfer_ok = 1 525 }, 526 .callback = urtw_bulk_rx_callback 527 }, 528 [URTW_8187B_BULK_TX_STATUS] = { 529 .type = UE_BULK, 530 .endpoint = 0x89, 531 .direction = UE_DIR_IN, 532 .bufsize = sizeof(uint64_t), 533 .flags = { 534 .pipe_bof = 1, 535 .short_xfer_ok = 1 536 }, 537 .callback = urtw_bulk_tx_status_callback 538 }, 539 [URTW_8187B_BULK_TX_BE] = { 540 .type = UE_BULK, 541 .endpoint = URTW_8187B_TXPIPE_BE, 542 .direction = UE_DIR_OUT, 543 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT, 544 .flags = { 545 .force_short_xfer = 1, 546 .pipe_bof = 1, 547 }, 548 .callback = urtw_bulk_tx_callback, 549 .timeout = URTW_DATA_TIMEOUT 550 }, 551 [URTW_8187B_BULK_TX_BK] = { 552 .type = UE_BULK, 553 .endpoint = URTW_8187B_TXPIPE_BK, 554 .direction = UE_DIR_OUT, 555 .bufsize = URTW_TX_MAXSIZE, 556 .flags = { 557 .ext_buffer = 1, 558 .force_short_xfer = 1, 559 .pipe_bof = 1, 560 }, 561 .callback = urtw_bulk_tx_callback, 562 .timeout = URTW_DATA_TIMEOUT 563 }, 564 [URTW_8187B_BULK_TX_VI] = { 565 .type = UE_BULK, 566 .endpoint = URTW_8187B_TXPIPE_VI, 567 .direction = UE_DIR_OUT, 568 .bufsize = URTW_TX_MAXSIZE, 569 .flags = { 570 .ext_buffer = 1, 571 .force_short_xfer = 1, 572 .pipe_bof = 1, 573 }, 574 .callback = urtw_bulk_tx_callback, 575 .timeout = URTW_DATA_TIMEOUT 576 }, 577 [URTW_8187B_BULK_TX_VO] = { 578 .type = UE_BULK, 579 .endpoint = URTW_8187B_TXPIPE_VO, 580 .direction = UE_DIR_OUT, 581 .bufsize = URTW_TX_MAXSIZE, 582 .flags = { 583 .ext_buffer = 1, 584 .force_short_xfer = 1, 585 .pipe_bof = 1, 586 }, 587 .callback = urtw_bulk_tx_callback, 588 .timeout = URTW_DATA_TIMEOUT 589 }, 590 [URTW_8187B_BULK_TX_EP12] = { 591 .type = UE_BULK, 592 .endpoint = 0xc, 593 .direction = UE_DIR_OUT, 594 .bufsize = URTW_TX_MAXSIZE, 595 .flags = { 596 .ext_buffer = 1, 597 .force_short_xfer = 1, 598 .pipe_bof = 1, 599 }, 600 .callback = urtw_bulk_tx_callback, 601 .timeout = URTW_DATA_TIMEOUT 602 } 603}; 604 605static const struct usb_config urtw_8187l_usbconfig[URTW_8187L_N_XFERS] = { 606 [URTW_8187L_BULK_RX] = { 607 .type = UE_BULK, 608 .endpoint = 0x81, 609 .direction = UE_DIR_IN, 610 .bufsize = MCLBYTES, 611 .flags = { 612 .ext_buffer = 1, 613 .pipe_bof = 1, 614 .short_xfer_ok = 1 615 }, 616 .callback = urtw_bulk_rx_callback 617 }, 618 [URTW_8187L_BULK_TX_LOW] = { 619 .type = UE_BULK, 620 .endpoint = 0x2, 621 .direction = UE_DIR_OUT, 622 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT, 623 .flags = { 624 .force_short_xfer = 1, 625 .pipe_bof = 1, 626 }, 627 .callback = urtw_bulk_tx_callback, 628 .timeout = URTW_DATA_TIMEOUT 629 }, 630 [URTW_8187L_BULK_TX_NORMAL] = { 631 .type = UE_BULK, 632 .endpoint = 0x3, 633 .direction = UE_DIR_OUT, 634 .bufsize = URTW_TX_MAXSIZE, 635 .flags = { 636 .ext_buffer = 1, 637 .force_short_xfer = 1, 638 .pipe_bof = 1, 639 }, 640 .callback = urtw_bulk_tx_callback, 641 .timeout = URTW_DATA_TIMEOUT 642 }, 643}; 644 645static struct ieee80211vap *urtw_vap_create(struct ieee80211com *, 646 const char [IFNAMSIZ], int, enum ieee80211_opmode, 647 int, const uint8_t [IEEE80211_ADDR_LEN], 648 const uint8_t [IEEE80211_ADDR_LEN]); 649static void urtw_vap_delete(struct ieee80211vap *); 650static void urtw_init(struct urtw_softc *); 651static void urtw_stop(struct urtw_softc *); 652static void urtw_parent(struct ieee80211com *); 653static int urtw_transmit(struct ieee80211com *, struct mbuf *); 654static void urtw_start(struct urtw_softc *); 655static int urtw_alloc_rx_data_list(struct urtw_softc *); 656static int urtw_alloc_tx_data_list(struct urtw_softc *); 657static int urtw_raw_xmit(struct ieee80211_node *, struct mbuf *, 658 const struct ieee80211_bpf_params *); 659static void urtw_scan_start(struct ieee80211com *); 660static void urtw_scan_end(struct ieee80211com *); 661static void urtw_getradiocaps(struct ieee80211com *, int, int *, 662 struct ieee80211_channel[]); 663static void urtw_set_channel(struct ieee80211com *); 664static void urtw_update_promisc(struct ieee80211com *); 665static void urtw_update_mcast(struct ieee80211com *); 666static int urtw_tx_start(struct urtw_softc *, 667 struct ieee80211_node *, struct mbuf *, 668 struct urtw_data *, int); 669static int urtw_newstate(struct ieee80211vap *, 670 enum ieee80211_state, int); 671static void urtw_led_ch(void *); 672static void urtw_ledtask(void *, int); 673static void urtw_watchdog(void *); 674static void urtw_set_multi(void *); 675static int urtw_isbmode(uint16_t); 676static uint16_t urtw_rate2rtl(uint32_t); 677static uint16_t urtw_rtl2rate(uint32_t); 678static usb_error_t urtw_set_rate(struct urtw_softc *); 679static usb_error_t urtw_update_msr(struct urtw_softc *); 680static usb_error_t urtw_read8_c(struct urtw_softc *, int, uint8_t *); 681static usb_error_t urtw_read16_c(struct urtw_softc *, int, uint16_t *); 682static usb_error_t urtw_read32_c(struct urtw_softc *, int, uint32_t *); 683static usb_error_t urtw_write8_c(struct urtw_softc *, int, uint8_t); 684static usb_error_t urtw_write16_c(struct urtw_softc *, int, uint16_t); 685static usb_error_t urtw_write32_c(struct urtw_softc *, int, uint32_t); 686static usb_error_t urtw_eprom_cs(struct urtw_softc *, int); 687static usb_error_t urtw_eprom_ck(struct urtw_softc *); 688static usb_error_t urtw_eprom_sendbits(struct urtw_softc *, int16_t *, 689 int); 690static usb_error_t urtw_eprom_read32(struct urtw_softc *, uint32_t, 691 uint32_t *); 692static usb_error_t urtw_eprom_readbit(struct urtw_softc *, int16_t *); 693static usb_error_t urtw_eprom_writebit(struct urtw_softc *, int16_t); 694static usb_error_t urtw_get_macaddr(struct urtw_softc *); 695static usb_error_t urtw_get_txpwr(struct urtw_softc *); 696static usb_error_t urtw_get_rfchip(struct urtw_softc *); 697static usb_error_t urtw_led_init(struct urtw_softc *); 698static usb_error_t urtw_8185_rf_pins_enable(struct urtw_softc *); 699static usb_error_t urtw_8185_tx_antenna(struct urtw_softc *, uint8_t); 700static usb_error_t urtw_8187_write_phy(struct urtw_softc *, uint8_t, 701 uint32_t); 702static usb_error_t urtw_8187_write_phy_ofdm_c(struct urtw_softc *, 703 uint8_t, uint32_t); 704static usb_error_t urtw_8187_write_phy_cck_c(struct urtw_softc *, uint8_t, 705 uint32_t); 706static usb_error_t urtw_8225_setgain(struct urtw_softc *, int16_t); 707static usb_error_t urtw_8225_usb_init(struct urtw_softc *); 708static usb_error_t urtw_8225_write_c(struct urtw_softc *, uint8_t, 709 uint16_t); 710static usb_error_t urtw_8225_write_s16(struct urtw_softc *, uint8_t, int, 711 uint16_t *); 712static usb_error_t urtw_8225_read(struct urtw_softc *, uint8_t, 713 uint32_t *); 714static usb_error_t urtw_8225_rf_init(struct urtw_softc *); 715static usb_error_t urtw_8225_rf_set_chan(struct urtw_softc *, int); 716static usb_error_t urtw_8225_rf_set_sens(struct urtw_softc *, int); 717static usb_error_t urtw_8225_set_txpwrlvl(struct urtw_softc *, int); 718static usb_error_t urtw_8225_rf_stop(struct urtw_softc *); 719static usb_error_t urtw_8225v2_rf_init(struct urtw_softc *); 720static usb_error_t urtw_8225v2_rf_set_chan(struct urtw_softc *, int); 721static usb_error_t urtw_8225v2_set_txpwrlvl(struct urtw_softc *, int); 722static usb_error_t urtw_8225v2_setgain(struct urtw_softc *, int16_t); 723static usb_error_t urtw_8225_isv2(struct urtw_softc *, int *); 724static usb_error_t urtw_8225v2b_rf_init(struct urtw_softc *); 725static usb_error_t urtw_8225v2b_rf_set_chan(struct urtw_softc *, int); 726static usb_error_t urtw_read8e(struct urtw_softc *, int, uint8_t *); 727static usb_error_t urtw_write8e(struct urtw_softc *, int, uint8_t); 728static usb_error_t urtw_8180_set_anaparam(struct urtw_softc *, uint32_t); 729static usb_error_t urtw_8185_set_anaparam2(struct urtw_softc *, uint32_t); 730static usb_error_t urtw_intr_enable(struct urtw_softc *); 731static usb_error_t urtw_intr_disable(struct urtw_softc *); 732static usb_error_t urtw_reset(struct urtw_softc *); 733static usb_error_t urtw_led_on(struct urtw_softc *, int); 734static usb_error_t urtw_led_ctl(struct urtw_softc *, int); 735static usb_error_t urtw_led_blink(struct urtw_softc *); 736static usb_error_t urtw_led_mode0(struct urtw_softc *, int); 737static usb_error_t urtw_led_mode1(struct urtw_softc *, int); 738static usb_error_t urtw_led_mode2(struct urtw_softc *, int); 739static usb_error_t urtw_led_mode3(struct urtw_softc *, int); 740static usb_error_t urtw_rx_setconf(struct urtw_softc *); 741static usb_error_t urtw_rx_enable(struct urtw_softc *); 742static usb_error_t urtw_tx_enable(struct urtw_softc *sc); 743static void urtw_free_tx_data_list(struct urtw_softc *); 744static void urtw_free_rx_data_list(struct urtw_softc *); 745static void urtw_free_data_list(struct urtw_softc *, 746 struct urtw_data data[], int, int); 747static usb_error_t urtw_adapter_start(struct urtw_softc *); 748static usb_error_t urtw_adapter_start_b(struct urtw_softc *); 749static usb_error_t urtw_set_mode(struct urtw_softc *, uint32_t); 750static usb_error_t urtw_8187b_cmd_reset(struct urtw_softc *); 751static usb_error_t urtw_do_request(struct urtw_softc *, 752 struct usb_device_request *, void *); 753static usb_error_t urtw_8225v2b_set_txpwrlvl(struct urtw_softc *, int); 754static usb_error_t urtw_led_off(struct urtw_softc *, int); 755static void urtw_abort_xfers(struct urtw_softc *); 756static struct urtw_data * 757 urtw_getbuf(struct urtw_softc *sc); 758static int urtw_compute_txtime(uint16_t, uint16_t, uint8_t, 759 uint8_t); 760static void urtw_updateslot(struct ieee80211com *); 761static void urtw_updateslottask(void *, int); 762static void urtw_sysctl_node(struct urtw_softc *); 763 764static int 765urtw_match(device_t dev) 766{ 767 struct usb_attach_arg *uaa = device_get_ivars(dev); 768 769 if (uaa->usb_mode != USB_MODE_HOST) 770 return (ENXIO); 771 if (uaa->info.bConfigIndex != URTW_CONFIG_INDEX) 772 return (ENXIO); 773 if (uaa->info.bIfaceIndex != URTW_IFACE_INDEX) 774 return (ENXIO); 775 776 return (usbd_lookup_id_by_uaa(urtw_devs, sizeof(urtw_devs), uaa)); 777} 778 779static int 780urtw_attach(device_t dev) 781{ 782 const struct usb_config *setup_start; 783 int ret = ENXIO; 784 struct urtw_softc *sc = device_get_softc(dev); 785 struct usb_attach_arg *uaa = device_get_ivars(dev); 786 struct ieee80211com *ic = &sc->sc_ic; 787 uint8_t iface_index = URTW_IFACE_INDEX; /* XXX */ 788 uint16_t n_setup; 789 uint32_t data; 790 usb_error_t error; 791 792 device_set_usb_desc(dev); 793 794 sc->sc_dev = dev; 795 sc->sc_udev = uaa->device; 796 if (USB_GET_DRIVER_INFO(uaa) == URTW_REV_RTL8187B) 797 sc->sc_flags |= URTW_RTL8187B; 798#ifdef URTW_DEBUG 799 sc->sc_debug = urtw_debug; 800#endif 801 802 mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), MTX_NETWORK_LOCK, 803 MTX_DEF); 804 usb_callout_init_mtx(&sc->sc_led_ch, &sc->sc_mtx, 0); 805 TASK_INIT(&sc->sc_led_task, 0, urtw_ledtask, sc); 806 TASK_INIT(&sc->sc_updateslot_task, 0, urtw_updateslottask, sc); 807 callout_init(&sc->sc_watchdog_ch, 0); 808 mbufq_init(&sc->sc_snd, ifqmaxlen); 809 810 if (sc->sc_flags & URTW_RTL8187B) { 811 setup_start = urtw_8187b_usbconfig; 812 n_setup = URTW_8187B_N_XFERS; 813 } else { 814 setup_start = urtw_8187l_usbconfig; 815 n_setup = URTW_8187L_N_XFERS; 816 } 817 818 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 819 setup_start, n_setup, sc, &sc->sc_mtx); 820 if (error) { 821 device_printf(dev, "could not allocate USB transfers, " 822 "err=%s\n", usbd_errstr(error)); 823 ret = ENXIO; 824 goto fail0; 825 } 826 827 if (sc->sc_flags & URTW_RTL8187B) { 828 sc->sc_tx_dma_buf = 829 usbd_xfer_get_frame_buffer(sc->sc_xfer[ 830 URTW_8187B_BULK_TX_BE], 0); 831 } else { 832 sc->sc_tx_dma_buf = 833 usbd_xfer_get_frame_buffer(sc->sc_xfer[ 834 URTW_8187L_BULK_TX_LOW], 0); 835 } 836 837 URTW_LOCK(sc); 838 839 urtw_read32_m(sc, URTW_RX, &data); 840 sc->sc_epromtype = (data & URTW_RX_9356SEL) ? URTW_EEPROM_93C56 : 841 URTW_EEPROM_93C46; 842 843 error = urtw_get_rfchip(sc); 844 if (error != 0) 845 goto fail; 846 error = urtw_get_macaddr(sc); 847 if (error != 0) 848 goto fail; 849 error = urtw_get_txpwr(sc); 850 if (error != 0) 851 goto fail; 852 error = urtw_led_init(sc); 853 if (error != 0) 854 goto fail; 855 856 URTW_UNLOCK(sc); 857 858 sc->sc_rts_retry = URTW_DEFAULT_RTS_RETRY; 859 sc->sc_tx_retry = URTW_DEFAULT_TX_RETRY; 860 sc->sc_currate = 3; 861 sc->sc_preamble_mode = urtw_preamble_mode; 862 863 ic->ic_softc = sc; 864 ic->ic_name = device_get_nameunit(dev); 865 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 866 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 867 868 /* set device capabilities */ 869 ic->ic_caps = 870 IEEE80211_C_STA | /* station mode */ 871 IEEE80211_C_MONITOR | /* monitor mode supported */ 872 IEEE80211_C_TXPMGT | /* tx power management */ 873 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 874 IEEE80211_C_SHSLOT | /* short slot time supported */ 875 IEEE80211_C_BGSCAN | /* capable of bg scanning */ 876 IEEE80211_C_WPA; /* 802.11i */ 877 878 /* XXX TODO: setup regdomain if URTW_EPROM_CHANPLAN_BY_HW bit is set.*/ 879 880 urtw_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans, 881 ic->ic_channels); 882 883 ieee80211_ifattach(ic); 884 ic->ic_raw_xmit = urtw_raw_xmit; 885 ic->ic_scan_start = urtw_scan_start; 886 ic->ic_scan_end = urtw_scan_end; 887 ic->ic_getradiocaps = urtw_getradiocaps; 888 ic->ic_set_channel = urtw_set_channel; 889 ic->ic_updateslot = urtw_updateslot; 890 ic->ic_vap_create = urtw_vap_create; 891 ic->ic_vap_delete = urtw_vap_delete; 892 ic->ic_update_promisc = urtw_update_promisc; 893 ic->ic_update_mcast = urtw_update_mcast; 894 ic->ic_parent = urtw_parent; 895 ic->ic_transmit = urtw_transmit; 896 897 ieee80211_radiotap_attach(ic, 898 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 899 URTW_TX_RADIOTAP_PRESENT, 900 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 901 URTW_RX_RADIOTAP_PRESENT); 902 903 urtw_sysctl_node(sc); 904 905 if (bootverbose) 906 ieee80211_announce(ic); 907 return (0); 908 909fail: 910 URTW_UNLOCK(sc); 911 usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ? 912 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS); 913fail0: 914 return (ret); 915} 916 917static int 918urtw_detach(device_t dev) 919{ 920 struct urtw_softc *sc = device_get_softc(dev); 921 struct ieee80211com *ic = &sc->sc_ic; 922 unsigned int x; 923 unsigned int n_xfers; 924 925 /* Prevent further ioctls */ 926 URTW_LOCK(sc); 927 sc->sc_flags |= URTW_DETACHED; 928 urtw_stop(sc); 929 URTW_UNLOCK(sc); 930 931 ieee80211_draintask(ic, &sc->sc_updateslot_task); 932 ieee80211_draintask(ic, &sc->sc_led_task); 933 934 usb_callout_drain(&sc->sc_led_ch); 935 callout_drain(&sc->sc_watchdog_ch); 936 937 n_xfers = (sc->sc_flags & URTW_RTL8187B) ? 938 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS; 939 940 /* prevent further allocations from RX/TX data lists */ 941 URTW_LOCK(sc); 942 STAILQ_INIT(&sc->sc_tx_active); 943 STAILQ_INIT(&sc->sc_tx_inactive); 944 STAILQ_INIT(&sc->sc_tx_pending); 945 946 STAILQ_INIT(&sc->sc_rx_active); 947 STAILQ_INIT(&sc->sc_rx_inactive); 948 URTW_UNLOCK(sc); 949 950 /* drain USB transfers */ 951 for (x = 0; x != n_xfers; x++) 952 usbd_transfer_drain(sc->sc_xfer[x]); 953 954 /* free data buffers */ 955 URTW_LOCK(sc); 956 urtw_free_tx_data_list(sc); 957 urtw_free_rx_data_list(sc); 958 URTW_UNLOCK(sc); 959 960 /* free USB transfers and some data buffers */ 961 usbd_transfer_unsetup(sc->sc_xfer, n_xfers); 962 963 ieee80211_ifdetach(ic); 964 mbufq_drain(&sc->sc_snd); 965 mtx_destroy(&sc->sc_mtx); 966 return (0); 967} 968 969static void 970urtw_free_tx_data_list(struct urtw_softc *sc) 971{ 972 urtw_free_data_list(sc, sc->sc_tx, URTW_TX_DATA_LIST_COUNT, 0); 973} 974 975static void 976urtw_free_rx_data_list(struct urtw_softc *sc) 977{ 978 urtw_free_data_list(sc, sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1); 979} 980 981static void 982urtw_free_data_list(struct urtw_softc *sc, struct urtw_data data[], int ndata, 983 int fillmbuf) 984{ 985 int i; 986 987 for (i = 0; i < ndata; i++) { 988 struct urtw_data *dp = &data[i]; 989 990 if (fillmbuf == 1) { 991 if (dp->m != NULL) { 992 m_freem(dp->m); 993 dp->m = NULL; 994 dp->buf = NULL; 995 } 996 } else { 997 dp->buf = NULL; 998 } 999 if (dp->ni != NULL) { 1000 ieee80211_free_node(dp->ni); 1001 dp->ni = NULL; 1002 } 1003 } 1004} 1005 1006static struct ieee80211vap * 1007urtw_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 1008 enum ieee80211_opmode opmode, int flags, 1009 const uint8_t bssid[IEEE80211_ADDR_LEN], 1010 const uint8_t mac[IEEE80211_ADDR_LEN]) 1011{ 1012 struct urtw_vap *uvp; 1013 struct ieee80211vap *vap; 1014 1015 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 1016 return (NULL); 1017 uvp = malloc(sizeof(struct urtw_vap), M_80211_VAP, M_WAITOK | M_ZERO); 1018 vap = &uvp->vap; 1019 /* enable s/w bmiss handling for sta mode */ 1020 1021 if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 1022 flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) { 1023 /* out of memory */ 1024 free(uvp, M_80211_VAP); 1025 return (NULL); 1026 } 1027 1028 /* override state transition machine */ 1029 uvp->newstate = vap->iv_newstate; 1030 vap->iv_newstate = urtw_newstate; 1031 1032 /* complete setup */ 1033 ieee80211_vap_attach(vap, ieee80211_media_change, 1034 ieee80211_media_status, mac); 1035 ic->ic_opmode = opmode; 1036 return (vap); 1037} 1038 1039static void 1040urtw_vap_delete(struct ieee80211vap *vap) 1041{ 1042 struct urtw_vap *uvp = URTW_VAP(vap); 1043 1044 ieee80211_vap_detach(vap); 1045 free(uvp, M_80211_VAP); 1046} 1047 1048static void 1049urtw_init(struct urtw_softc *sc) 1050{ 1051 usb_error_t error; 1052 int ret; 1053 1054 URTW_ASSERT_LOCKED(sc); 1055 1056 if (sc->sc_flags & URTW_RUNNING) 1057 urtw_stop(sc); 1058 1059 error = (sc->sc_flags & URTW_RTL8187B) ? urtw_adapter_start_b(sc) : 1060 urtw_adapter_start(sc); 1061 if (error != 0) 1062 goto fail; 1063 1064 /* reset softc variables */ 1065 sc->sc_txtimer = 0; 1066 1067 if (!(sc->sc_flags & URTW_INIT_ONCE)) { 1068 ret = urtw_alloc_rx_data_list(sc); 1069 if (ret != 0) 1070 goto fail; 1071 ret = urtw_alloc_tx_data_list(sc); 1072 if (ret != 0) 1073 goto fail; 1074 sc->sc_flags |= URTW_INIT_ONCE; 1075 } 1076 1077 error = urtw_rx_enable(sc); 1078 if (error != 0) 1079 goto fail; 1080 error = urtw_tx_enable(sc); 1081 if (error != 0) 1082 goto fail; 1083 1084 if (sc->sc_flags & URTW_RTL8187B) 1085 usbd_transfer_start(sc->sc_xfer[URTW_8187B_BULK_TX_STATUS]); 1086 1087 sc->sc_flags |= URTW_RUNNING; 1088 1089 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1090fail: 1091 return; 1092} 1093 1094static usb_error_t 1095urtw_adapter_start_b(struct urtw_softc *sc) 1096{ 1097 uint8_t data8; 1098 usb_error_t error; 1099 1100 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1101 if (error) 1102 goto fail; 1103 1104 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1105 urtw_write8_m(sc, URTW_CONFIG3, 1106 data8 | URTW_CONFIG3_ANAPARAM_WRITE | URTW_CONFIG3_GNT_SELECT); 1107 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8187B_8225_ANAPARAM2_ON); 1108 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_ON); 1109 urtw_write8_m(sc, URTW_ANAPARAM3, URTW_8187B_8225_ANAPARAM3_ON); 1110 1111 urtw_write8_m(sc, 0x61, 0x10); 1112 urtw_read8_m(sc, 0x62, &data8); 1113 urtw_write8_m(sc, 0x62, data8 & ~(1 << 5)); 1114 urtw_write8_m(sc, 0x62, data8 | (1 << 5)); 1115 1116 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1117 data8 &= ~URTW_CONFIG3_ANAPARAM_WRITE; 1118 urtw_write8_m(sc, URTW_CONFIG3, data8); 1119 1120 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1121 if (error) 1122 goto fail; 1123 1124 error = urtw_8187b_cmd_reset(sc); 1125 if (error) 1126 goto fail; 1127 1128 error = sc->sc_rf_init(sc); 1129 if (error != 0) 1130 goto fail; 1131 urtw_write8_m(sc, URTW_CMD, URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1132 1133 /* fix RTL8187B RX stall */ 1134 error = urtw_intr_enable(sc); 1135 if (error) 1136 goto fail; 1137 1138 error = urtw_write8e(sc, 0x41, 0xf4); 1139 if (error) 1140 goto fail; 1141 error = urtw_write8e(sc, 0x40, 0x00); 1142 if (error) 1143 goto fail; 1144 error = urtw_write8e(sc, 0x42, 0x00); 1145 if (error) 1146 goto fail; 1147 error = urtw_write8e(sc, 0x42, 0x01); 1148 if (error) 1149 goto fail; 1150 error = urtw_write8e(sc, 0x40, 0x0f); 1151 if (error) 1152 goto fail; 1153 error = urtw_write8e(sc, 0x42, 0x00); 1154 if (error) 1155 goto fail; 1156 error = urtw_write8e(sc, 0x42, 0x01); 1157 if (error) 1158 goto fail; 1159 1160 urtw_read8_m(sc, 0xdb, &data8); 1161 urtw_write8_m(sc, 0xdb, data8 | (1 << 2)); 1162 urtw_write16_m(sc, 0x372, 0x59fa); 1163 urtw_write16_m(sc, 0x374, 0x59d2); 1164 urtw_write16_m(sc, 0x376, 0x59d2); 1165 urtw_write16_m(sc, 0x378, 0x19fa); 1166 urtw_write16_m(sc, 0x37a, 0x19fa); 1167 urtw_write16_m(sc, 0x37c, 0x00d0); 1168 urtw_write8_m(sc, 0x61, 0); 1169 1170 urtw_write8_m(sc, 0x180, 0x0f); 1171 urtw_write8_m(sc, 0x183, 0x03); 1172 urtw_write8_m(sc, 0xda, 0x10); 1173 urtw_write8_m(sc, 0x24d, 0x08); 1174 urtw_write32_m(sc, URTW_HSSI_PARA, 0x0600321b); 1175 1176 urtw_write16_m(sc, 0x1ec, 0x800); /* RX MAX SIZE */ 1177fail: 1178 return (error); 1179} 1180 1181static usb_error_t 1182urtw_adapter_start(struct urtw_softc *sc) 1183{ 1184 struct ieee80211com *ic = &sc->sc_ic; 1185 usb_error_t error; 1186 1187 error = urtw_reset(sc); 1188 if (error) 1189 goto fail; 1190 1191 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 0); 1192 urtw_write8_m(sc, URTW_GPIO, 0); 1193 1194 /* for led */ 1195 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1196 error = urtw_led_ctl(sc, URTW_LED_CTL_POWER_ON); 1197 if (error != 0) 1198 goto fail; 1199 1200 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1201 if (error) 1202 goto fail; 1203 /* applying MAC address again. */ 1204 urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)ic->ic_macaddr)[0]); 1205 urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)ic->ic_macaddr)[1] & 0xffff); 1206 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1207 if (error) 1208 goto fail; 1209 1210 error = urtw_update_msr(sc); 1211 if (error) 1212 goto fail; 1213 1214 urtw_write32_m(sc, URTW_INT_TIMEOUT, 0); 1215 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 1216 urtw_write8_m(sc, URTW_RATE_FALLBACK, URTW_RATE_FALLBACK_ENABLE | 0x1); 1217 error = urtw_set_rate(sc); 1218 if (error != 0) 1219 goto fail; 1220 1221 error = sc->sc_rf_init(sc); 1222 if (error != 0) 1223 goto fail; 1224 if (sc->sc_rf_set_sens != NULL) 1225 sc->sc_rf_set_sens(sc, sc->sc_sens); 1226 1227 /* XXX correct? to call write16 */ 1228 urtw_write16_m(sc, URTW_PSR, 1); 1229 urtw_write16_m(sc, URTW_ADDR_MAGIC2, 0x10); 1230 urtw_write8_m(sc, URTW_TALLY_SEL, 0x80); 1231 urtw_write8_m(sc, URTW_ADDR_MAGIC3, 0x60); 1232 /* XXX correct? to call write16 */ 1233 urtw_write16_m(sc, URTW_PSR, 0); 1234 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1235 1236 error = urtw_intr_enable(sc); 1237 if (error != 0) 1238 goto fail; 1239 1240fail: 1241 return (error); 1242} 1243 1244static usb_error_t 1245urtw_set_mode(struct urtw_softc *sc, uint32_t mode) 1246{ 1247 uint8_t data; 1248 usb_error_t error; 1249 1250 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 1251 data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT); 1252 data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK); 1253 urtw_write8_m(sc, URTW_EPROM_CMD, data); 1254fail: 1255 return (error); 1256} 1257 1258static usb_error_t 1259urtw_8187b_cmd_reset(struct urtw_softc *sc) 1260{ 1261 int i; 1262 uint8_t data8; 1263 usb_error_t error; 1264 1265 /* XXX the code can be duplicate with urtw_reset(). */ 1266 urtw_read8_m(sc, URTW_CMD, &data8); 1267 data8 = (data8 & 0x2) | URTW_CMD_RST; 1268 urtw_write8_m(sc, URTW_CMD, data8); 1269 1270 for (i = 0; i < 20; i++) { 1271 usb_pause_mtx(&sc->sc_mtx, 2); 1272 urtw_read8_m(sc, URTW_CMD, &data8); 1273 if (!(data8 & URTW_CMD_RST)) 1274 break; 1275 } 1276 if (i >= 20) { 1277 device_printf(sc->sc_dev, "reset timeout\n"); 1278 goto fail; 1279 } 1280fail: 1281 return (error); 1282} 1283 1284static usb_error_t 1285urtw_do_request(struct urtw_softc *sc, 1286 struct usb_device_request *req, void *data) 1287{ 1288 usb_error_t err; 1289 int ntries = 10; 1290 1291 URTW_ASSERT_LOCKED(sc); 1292 1293 while (ntries--) { 1294 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 1295 req, data, 0, NULL, 250 /* ms */); 1296 if (err == 0) 1297 break; 1298 1299 DPRINTF(sc, URTW_DEBUG_INIT, 1300 "Control request failed, %s (retrying)\n", 1301 usbd_errstr(err)); 1302 usb_pause_mtx(&sc->sc_mtx, hz / 100); 1303 } 1304 return (err); 1305} 1306 1307static void 1308urtw_stop(struct urtw_softc *sc) 1309{ 1310 uint8_t data8; 1311 usb_error_t error; 1312 1313 URTW_ASSERT_LOCKED(sc); 1314 1315 sc->sc_flags &= ~URTW_RUNNING; 1316 1317 error = urtw_intr_disable(sc); 1318 if (error) 1319 goto fail; 1320 urtw_read8_m(sc, URTW_CMD, &data8); 1321 data8 &= ~(URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1322 urtw_write8_m(sc, URTW_CMD, data8); 1323 1324 error = sc->sc_rf_stop(sc); 1325 if (error != 0) 1326 goto fail; 1327 1328 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1329 if (error) 1330 goto fail; 1331 urtw_read8_m(sc, URTW_CONFIG4, &data8); 1332 urtw_write8_m(sc, URTW_CONFIG4, data8 | URTW_CONFIG4_VCOOFF); 1333 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1334 if (error) 1335 goto fail; 1336fail: 1337 if (error) 1338 device_printf(sc->sc_dev, "failed to stop (%s)\n", 1339 usbd_errstr(error)); 1340 1341 usb_callout_stop(&sc->sc_led_ch); 1342 callout_stop(&sc->sc_watchdog_ch); 1343 1344 urtw_abort_xfers(sc); 1345} 1346 1347static void 1348urtw_abort_xfers(struct urtw_softc *sc) 1349{ 1350 int i, max; 1351 1352 URTW_ASSERT_LOCKED(sc); 1353 1354 max = (sc->sc_flags & URTW_RTL8187B) ? URTW_8187B_N_XFERS : 1355 URTW_8187L_N_XFERS; 1356 1357 /* abort any pending transfers */ 1358 for (i = 0; i < max; i++) 1359 usbd_transfer_stop(sc->sc_xfer[i]); 1360} 1361 1362static void 1363urtw_parent(struct ieee80211com *ic) 1364{ 1365 struct urtw_softc *sc = ic->ic_softc; 1366 int startall = 0; 1367 1368 URTW_LOCK(sc); 1369 if (sc->sc_flags & URTW_DETACHED) { 1370 URTW_UNLOCK(sc); 1371 return; 1372 } 1373 1374 if (ic->ic_nrunning > 0) { 1375 if (sc->sc_flags & URTW_RUNNING) { 1376 if (ic->ic_promisc > 0 || ic->ic_allmulti > 0) 1377 urtw_set_multi(sc); 1378 } else { 1379 urtw_init(sc); 1380 startall = 1; 1381 } 1382 } else if (sc->sc_flags & URTW_RUNNING) 1383 urtw_stop(sc); 1384 URTW_UNLOCK(sc); 1385 if (startall) 1386 ieee80211_start_all(ic); 1387} 1388 1389static int 1390urtw_transmit(struct ieee80211com *ic, struct mbuf *m) 1391{ 1392 struct urtw_softc *sc = ic->ic_softc; 1393 int error; 1394 1395 URTW_LOCK(sc); 1396 if ((sc->sc_flags & URTW_RUNNING) == 0) { 1397 URTW_UNLOCK(sc); 1398 return (ENXIO); 1399 } 1400 error = mbufq_enqueue(&sc->sc_snd, m); 1401 if (error) { 1402 URTW_UNLOCK(sc); 1403 return (error); 1404 } 1405 urtw_start(sc); 1406 URTW_UNLOCK(sc); 1407 1408 return (0); 1409} 1410 1411static void 1412urtw_start(struct urtw_softc *sc) 1413{ 1414 struct urtw_data *bf; 1415 struct ieee80211_node *ni; 1416 struct mbuf *m; 1417 1418 URTW_ASSERT_LOCKED(sc); 1419 1420 if ((sc->sc_flags & URTW_RUNNING) == 0) 1421 return; 1422 1423 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 1424 bf = urtw_getbuf(sc); 1425 if (bf == NULL) { 1426 mbufq_prepend(&sc->sc_snd, m); 1427 break; 1428 } 1429 1430 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 1431 m->m_pkthdr.rcvif = NULL; 1432 1433 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_NORMAL) != 0) { 1434 if_inc_counter(ni->ni_vap->iv_ifp, 1435 IFCOUNTER_OERRORS, 1); 1436 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1437 ieee80211_free_node(ni); 1438 break; 1439 } 1440 1441 sc->sc_txtimer = 5; 1442 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1443 } 1444} 1445 1446static int 1447urtw_alloc_data_list(struct urtw_softc *sc, struct urtw_data data[], 1448 int ndata, int maxsz, void *dma_buf) 1449{ 1450 int i, error; 1451 1452 for (i = 0; i < ndata; i++) { 1453 struct urtw_data *dp = &data[i]; 1454 1455 dp->sc = sc; 1456 if (dma_buf == NULL) { 1457 dp->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1458 if (dp->m == NULL) { 1459 device_printf(sc->sc_dev, 1460 "could not allocate rx mbuf\n"); 1461 error = ENOMEM; 1462 goto fail; 1463 } 1464 dp->buf = mtod(dp->m, uint8_t *); 1465 } else { 1466 dp->m = NULL; 1467 dp->buf = ((uint8_t *)dma_buf) + 1468 (i * maxsz); 1469 } 1470 dp->ni = NULL; 1471 } 1472 return (0); 1473 1474fail: urtw_free_data_list(sc, data, ndata, 1); 1475 return (error); 1476} 1477 1478static int 1479urtw_alloc_rx_data_list(struct urtw_softc *sc) 1480{ 1481 int error, i; 1482 1483 error = urtw_alloc_data_list(sc, 1484 sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1485 MCLBYTES, NULL /* mbufs */); 1486 if (error != 0) 1487 return (error); 1488 1489 STAILQ_INIT(&sc->sc_rx_active); 1490 STAILQ_INIT(&sc->sc_rx_inactive); 1491 1492 for (i = 0; i < URTW_RX_DATA_LIST_COUNT; i++) 1493 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1494 1495 return (0); 1496} 1497 1498static int 1499urtw_alloc_tx_data_list(struct urtw_softc *sc) 1500{ 1501 int error, i; 1502 1503 error = urtw_alloc_data_list(sc, 1504 sc->sc_tx, URTW_TX_DATA_LIST_COUNT, URTW_TX_MAXSIZE, 1505 sc->sc_tx_dma_buf /* no mbufs */); 1506 if (error != 0) 1507 return (error); 1508 1509 STAILQ_INIT(&sc->sc_tx_active); 1510 STAILQ_INIT(&sc->sc_tx_inactive); 1511 STAILQ_INIT(&sc->sc_tx_pending); 1512 1513 for (i = 0; i < URTW_TX_DATA_LIST_COUNT; i++) 1514 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], 1515 next); 1516 1517 return (0); 1518} 1519 1520static int 1521urtw_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1522 const struct ieee80211_bpf_params *params) 1523{ 1524 struct ieee80211com *ic = ni->ni_ic; 1525 struct urtw_softc *sc = ic->ic_softc; 1526 struct urtw_data *bf; 1527 1528 /* prevent management frames from being sent if we're not ready */ 1529 if (!(sc->sc_flags & URTW_RUNNING)) { 1530 m_freem(m); 1531 return ENETDOWN; 1532 } 1533 URTW_LOCK(sc); 1534 bf = urtw_getbuf(sc); 1535 if (bf == NULL) { 1536 m_freem(m); 1537 URTW_UNLOCK(sc); 1538 return (ENOBUFS); /* XXX */ 1539 } 1540 1541 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_LOW) != 0) { 1542 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1543 URTW_UNLOCK(sc); 1544 return (EIO); 1545 } 1546 URTW_UNLOCK(sc); 1547 1548 sc->sc_txtimer = 5; 1549 return (0); 1550} 1551 1552static void 1553urtw_scan_start(struct ieee80211com *ic) 1554{ 1555 1556 /* XXX do nothing? */ 1557} 1558 1559static void 1560urtw_scan_end(struct ieee80211com *ic) 1561{ 1562 1563 /* XXX do nothing? */ 1564} 1565 1566static void 1567urtw_getradiocaps(struct ieee80211com *ic, 1568 int maxchans, int *nchans, struct ieee80211_channel chans[]) 1569{ 1570 uint8_t bands[IEEE80211_MODE_BYTES]; 1571 1572 memset(bands, 0, sizeof(bands)); 1573 setbit(bands, IEEE80211_MODE_11B); 1574 setbit(bands, IEEE80211_MODE_11G); 1575 ieee80211_add_channels_default_2ghz(chans, maxchans, nchans, bands, 0); 1576} 1577 1578static void 1579urtw_set_channel(struct ieee80211com *ic) 1580{ 1581 struct urtw_softc *sc = ic->ic_softc; 1582 uint32_t data, orig; 1583 usb_error_t error; 1584 1585 /* 1586 * if the user set a channel explicitly using ifconfig(8) this function 1587 * can be called earlier than we're expected that in some cases the 1588 * initialization would be failed if setting a channel is called before 1589 * the init have done. 1590 */ 1591 if (!(sc->sc_flags & URTW_RUNNING)) 1592 return; 1593 1594 if (sc->sc_curchan != NULL && sc->sc_curchan == ic->ic_curchan) 1595 return; 1596 1597 URTW_LOCK(sc); 1598 1599 /* 1600 * during changing th channel we need to temporarily be disable 1601 * TX. 1602 */ 1603 urtw_read32_m(sc, URTW_TX_CONF, &orig); 1604 data = orig & ~URTW_TX_LOOPBACK_MASK; 1605 urtw_write32_m(sc, URTW_TX_CONF, data | URTW_TX_LOOPBACK_MAC); 1606 1607 error = sc->sc_rf_set_chan(sc, ieee80211_chan2ieee(ic, ic->ic_curchan)); 1608 if (error != 0) 1609 goto fail; 1610 usb_pause_mtx(&sc->sc_mtx, 10); 1611 urtw_write32_m(sc, URTW_TX_CONF, orig); 1612 1613 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1614 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1615 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 1616 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1617 1618fail: 1619 URTW_UNLOCK(sc); 1620 1621 sc->sc_curchan = ic->ic_curchan; 1622 1623 if (error != 0) 1624 device_printf(sc->sc_dev, "could not change the channel\n"); 1625} 1626 1627static void 1628urtw_update_promisc(struct ieee80211com *ic) 1629{ 1630 struct urtw_softc *sc = ic->ic_softc; 1631 1632 URTW_LOCK(sc); 1633 if (sc->sc_flags & URTW_RUNNING) 1634 urtw_rx_setconf(sc); 1635 URTW_UNLOCK(sc); 1636} 1637 1638static void 1639urtw_update_mcast(struct ieee80211com *ic) 1640{ 1641 1642 /* XXX do nothing? */ 1643} 1644 1645static int 1646urtw_tx_start(struct urtw_softc *sc, struct ieee80211_node *ni, struct mbuf *m0, 1647 struct urtw_data *data, int prior) 1648{ 1649 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 1650 struct ieee80211_key *k; 1651 const struct ieee80211_txparam *tp; 1652 struct ieee80211com *ic = &sc->sc_ic; 1653 struct ieee80211vap *vap = ni->ni_vap; 1654 struct usb_xfer *rtl8187b_pipes[URTW_8187B_TXPIPE_MAX] = { 1655 sc->sc_xfer[URTW_8187B_BULK_TX_BE], 1656 sc->sc_xfer[URTW_8187B_BULK_TX_BK], 1657 sc->sc_xfer[URTW_8187B_BULK_TX_VI], 1658 sc->sc_xfer[URTW_8187B_BULK_TX_VO] 1659 }; 1660 struct usb_xfer *xfer; 1661 int dur = 0, rtsdur = 0, rtsenable = 0, ctsenable = 0, rate, 1662 pkttime = 0, txdur = 0, isshort = 0, xferlen; 1663 uint16_t acktime, rtstime, ctstime; 1664 uint32_t flags; 1665 usb_error_t error; 1666 1667 URTW_ASSERT_LOCKED(sc); 1668 1669 /* 1670 * Software crypto. 1671 */ 1672 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1673 k = ieee80211_crypto_encap(ni, m0); 1674 if (k == NULL) { 1675 device_printf(sc->sc_dev, 1676 "ieee80211_crypto_encap returns NULL.\n"); 1677 /* XXX we don't expect the fragmented frames */ 1678 m_freem(m0); 1679 return (ENOBUFS); 1680 } 1681 1682 /* in case packet header moved, reset pointer */ 1683 wh = mtod(m0, struct ieee80211_frame *); 1684 } 1685 1686 if (ieee80211_radiotap_active_vap(vap)) { 1687 struct urtw_tx_radiotap_header *tap = &sc->sc_txtap; 1688 1689 tap->wt_flags = 0; 1690 ieee80211_radiotap_tx(vap, m0); 1691 } 1692 1693 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_MGT || 1694 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_CTL) { 1695 tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)]; 1696 rate = tp->mgmtrate; 1697 } else { 1698 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1699 /* for data frames */ 1700 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1701 rate = tp->mcastrate; 1702 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 1703 rate = tp->ucastrate; 1704 else 1705 rate = urtw_rtl2rate(sc->sc_currate); 1706 } 1707 1708 sc->sc_stats.txrates[sc->sc_currate]++; 1709 1710 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1711 txdur = pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1712 IEEE80211_CRC_LEN, rate, 0, 0); 1713 else { 1714 acktime = urtw_compute_txtime(14, 2,0, 0); 1715 if ((m0->m_pkthdr.len + 4) > vap->iv_rtsthreshold) { 1716 rtsenable = 1; 1717 ctsenable = 0; 1718 rtstime = urtw_compute_txtime(URTW_ACKCTS_LEN, 2, 0, 0); 1719 ctstime = urtw_compute_txtime(14, 2, 0, 0); 1720 pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1721 IEEE80211_CRC_LEN, rate, 0, isshort); 1722 rtsdur = ctstime + pkttime + acktime + 1723 3 * URTW_ASIFS_TIME; 1724 txdur = rtstime + rtsdur; 1725 } else { 1726 rtsenable = ctsenable = rtsdur = 0; 1727 pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1728 IEEE80211_CRC_LEN, rate, 0, isshort); 1729 txdur = pkttime + URTW_ASIFS_TIME + acktime; 1730 } 1731 1732 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1733 dur = urtw_compute_txtime(m0->m_pkthdr.len + 1734 IEEE80211_CRC_LEN, rate, 0, isshort) + 1735 3 * URTW_ASIFS_TIME + 1736 2 * acktime; 1737 else 1738 dur = URTW_ASIFS_TIME + acktime; 1739 } 1740 USETW(wh->i_dur, dur); 1741 1742 xferlen = m0->m_pkthdr.len; 1743 xferlen += (sc->sc_flags & URTW_RTL8187B) ? (4 * 8) : (4 * 3); 1744 if ((0 == xferlen % 64) || (0 == xferlen % 512)) 1745 xferlen += 1; 1746 1747 memset(data->buf, 0, URTW_TX_MAXSIZE); 1748 flags = m0->m_pkthdr.len & 0xfff; 1749 flags |= URTW_TX_FLAG_NO_ENC; 1750 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1751 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE) && 1752 (sc->sc_preamble_mode == URTW_PREAMBLE_MODE_SHORT) && 1753 (sc->sc_currate != 0)) 1754 flags |= URTW_TX_FLAG_SPLCP; 1755 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1756 flags |= URTW_TX_FLAG_MOREFRAG; 1757 1758 flags |= (sc->sc_currate & 0xf) << URTW_TX_FLAG_TXRATE_SHIFT; 1759 1760 if (sc->sc_flags & URTW_RTL8187B) { 1761 struct urtw_8187b_txhdr *tx; 1762 1763 tx = (struct urtw_8187b_txhdr *)data->buf; 1764 if (ctsenable) 1765 flags |= URTW_TX_FLAG_CTS; 1766 if (rtsenable) { 1767 flags |= URTW_TX_FLAG_RTS; 1768 flags |= (urtw_rate2rtl(11) & 0xf) << 1769 URTW_TX_FLAG_RTSRATE_SHIFT; 1770 tx->rtsdur = rtsdur; 1771 } 1772 tx->flag = htole32(flags); 1773 tx->txdur = txdur; 1774 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1775 IEEE80211_FC0_TYPE_MGT && 1776 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1777 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1778 tx->retry = 1; 1779 else 1780 tx->retry = URTW_TX_MAXRETRY; 1781 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1)); 1782 } else { 1783 struct urtw_8187l_txhdr *tx; 1784 1785 tx = (struct urtw_8187l_txhdr *)data->buf; 1786 if (rtsenable) { 1787 flags |= URTW_TX_FLAG_RTS; 1788 tx->rtsdur = rtsdur; 1789 } 1790 flags |= (urtw_rate2rtl(11) & 0xf) << URTW_TX_FLAG_RTSRATE_SHIFT; 1791 tx->flag = htole32(flags); 1792 tx->retry = 3; /* CW minimum */ 1793 tx->retry |= 7 << 4; /* CW maximum */ 1794 tx->retry |= URTW_TX_MAXRETRY << 8; /* retry limitation */ 1795 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1)); 1796 } 1797 1798 data->buflen = xferlen; 1799 data->ni = ni; 1800 data->m = m0; 1801 1802 if (sc->sc_flags & URTW_RTL8187B) { 1803 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1804 case IEEE80211_FC0_TYPE_CTL: 1805 case IEEE80211_FC0_TYPE_MGT: 1806 xfer = sc->sc_xfer[URTW_8187B_BULK_TX_EP12]; 1807 break; 1808 default: 1809 KASSERT(M_WME_GETAC(m0) < URTW_8187B_TXPIPE_MAX, 1810 ("unsupported WME pipe %d", M_WME_GETAC(m0))); 1811 xfer = rtl8187b_pipes[M_WME_GETAC(m0)]; 1812 break; 1813 } 1814 } else 1815 xfer = (prior == URTW_PRIORITY_LOW) ? 1816 sc->sc_xfer[URTW_8187L_BULK_TX_LOW] : 1817 sc->sc_xfer[URTW_8187L_BULK_TX_NORMAL]; 1818 1819 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 1820 usbd_transfer_start(xfer); 1821 1822 error = urtw_led_ctl(sc, URTW_LED_CTL_TX); 1823 if (error != 0) 1824 device_printf(sc->sc_dev, "could not control LED (%d)\n", 1825 error); 1826 return (0); 1827} 1828 1829static int 1830urtw_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1831{ 1832 struct ieee80211com *ic = vap->iv_ic; 1833 struct urtw_softc *sc = ic->ic_softc; 1834 struct urtw_vap *uvp = URTW_VAP(vap); 1835 struct ieee80211_node *ni; 1836 usb_error_t error = 0; 1837 1838 DPRINTF(sc, URTW_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1839 ieee80211_state_name[vap->iv_state], 1840 ieee80211_state_name[nstate]); 1841 1842 sc->sc_state = nstate; 1843 1844 IEEE80211_UNLOCK(ic); 1845 URTW_LOCK(sc); 1846 usb_callout_stop(&sc->sc_led_ch); 1847 callout_stop(&sc->sc_watchdog_ch); 1848 1849 switch (nstate) { 1850 case IEEE80211_S_INIT: 1851 case IEEE80211_S_SCAN: 1852 case IEEE80211_S_AUTH: 1853 case IEEE80211_S_ASSOC: 1854 break; 1855 case IEEE80211_S_RUN: 1856 ni = ieee80211_ref_node(vap->iv_bss); 1857 /* setting bssid. */ 1858 urtw_write32_m(sc, URTW_BSSID, ((uint32_t *)ni->ni_bssid)[0]); 1859 urtw_write16_m(sc, URTW_BSSID + 4, 1860 ((uint16_t *)ni->ni_bssid)[2]); 1861 urtw_update_msr(sc); 1862 /* XXX maybe the below would be incorrect. */ 1863 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1864 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1865 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 0x64); 1866 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1867 error = urtw_led_ctl(sc, URTW_LED_CTL_LINK); 1868 if (error != 0) 1869 device_printf(sc->sc_dev, 1870 "could not control LED (%d)\n", error); 1871 ieee80211_free_node(ni); 1872 break; 1873 default: 1874 break; 1875 } 1876fail: 1877 URTW_UNLOCK(sc); 1878 IEEE80211_LOCK(ic); 1879 return (uvp->newstate(vap, nstate, arg)); 1880} 1881 1882static void 1883urtw_watchdog(void *arg) 1884{ 1885 struct urtw_softc *sc = arg; 1886 1887 if (sc->sc_txtimer > 0) { 1888 if (--sc->sc_txtimer == 0) { 1889 device_printf(sc->sc_dev, "device timeout\n"); 1890 counter_u64_add(sc->sc_ic.ic_oerrors, 1); 1891 return; 1892 } 1893 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1894 } 1895} 1896 1897static void 1898urtw_set_multi(void *arg) 1899{ 1900 /* XXX don't know how to set a device. Lack of docs. */ 1901} 1902 1903static usb_error_t 1904urtw_set_rate(struct urtw_softc *sc) 1905{ 1906 int i, basic_rate, min_rr_rate, max_rr_rate; 1907 uint16_t data; 1908 usb_error_t error; 1909 1910 basic_rate = urtw_rate2rtl(48); 1911 min_rr_rate = urtw_rate2rtl(12); 1912 max_rr_rate = urtw_rate2rtl(48); 1913 1914 urtw_write8_m(sc, URTW_RESP_RATE, 1915 max_rr_rate << URTW_RESP_MAX_RATE_SHIFT | 1916 min_rr_rate << URTW_RESP_MIN_RATE_SHIFT); 1917 1918 urtw_read16_m(sc, URTW_BRSR, &data); 1919 data &= ~URTW_BRSR_MBR_8185; 1920 1921 for (i = 0; i <= basic_rate; i++) 1922 data |= (1 << i); 1923 1924 urtw_write16_m(sc, URTW_BRSR, data); 1925fail: 1926 return (error); 1927} 1928 1929static uint16_t 1930urtw_rate2rtl(uint32_t rate) 1931{ 1932 unsigned int i; 1933 1934 for (i = 0; i < nitems(urtw_ratetable); i++) { 1935 if (rate == urtw_ratetable[i].reg) 1936 return urtw_ratetable[i].val; 1937 } 1938 1939 return (3); 1940} 1941 1942static uint16_t 1943urtw_rtl2rate(uint32_t rate) 1944{ 1945 unsigned int i; 1946 1947 for (i = 0; i < nitems(urtw_ratetable); i++) { 1948 if (rate == urtw_ratetable[i].val) 1949 return urtw_ratetable[i].reg; 1950 } 1951 1952 return (0); 1953} 1954 1955static usb_error_t 1956urtw_update_msr(struct urtw_softc *sc) 1957{ 1958 struct ieee80211com *ic = &sc->sc_ic; 1959 uint8_t data; 1960 usb_error_t error; 1961 1962 urtw_read8_m(sc, URTW_MSR, &data); 1963 data &= ~URTW_MSR_LINK_MASK; 1964 1965 if (sc->sc_state == IEEE80211_S_RUN) { 1966 switch (ic->ic_opmode) { 1967 case IEEE80211_M_STA: 1968 case IEEE80211_M_MONITOR: 1969 data |= URTW_MSR_LINK_STA; 1970 if (sc->sc_flags & URTW_RTL8187B) 1971 data |= URTW_MSR_LINK_ENEDCA; 1972 break; 1973 case IEEE80211_M_IBSS: 1974 data |= URTW_MSR_LINK_ADHOC; 1975 break; 1976 case IEEE80211_M_HOSTAP: 1977 data |= URTW_MSR_LINK_HOSTAP; 1978 break; 1979 default: 1980 DPRINTF(sc, URTW_DEBUG_STATE, 1981 "unsupported operation mode 0x%x\n", 1982 ic->ic_opmode); 1983 error = USB_ERR_INVAL; 1984 goto fail; 1985 } 1986 } else 1987 data |= URTW_MSR_LINK_NONE; 1988 1989 urtw_write8_m(sc, URTW_MSR, data); 1990fail: 1991 return (error); 1992} 1993 1994static usb_error_t 1995urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data) 1996{ 1997 struct usb_device_request req; 1998 usb_error_t error; 1999 2000 URTW_ASSERT_LOCKED(sc); 2001 2002 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2003 req.bRequest = URTW_8187_GETREGS_REQ; 2004 USETW(req.wValue, (val & 0xff) | 0xff00); 2005 USETW(req.wIndex, (val >> 8) & 0x3); 2006 USETW(req.wLength, sizeof(uint8_t)); 2007 2008 error = urtw_do_request(sc, &req, data); 2009 return (error); 2010} 2011 2012static usb_error_t 2013urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data) 2014{ 2015 struct usb_device_request req; 2016 usb_error_t error; 2017 2018 URTW_ASSERT_LOCKED(sc); 2019 2020 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2021 req.bRequest = URTW_8187_GETREGS_REQ; 2022 USETW(req.wValue, (val & 0xff) | 0xff00); 2023 USETW(req.wIndex, (val >> 8) & 0x3); 2024 USETW(req.wLength, sizeof(uint16_t)); 2025 2026 error = urtw_do_request(sc, &req, data); 2027 return (error); 2028} 2029 2030static usb_error_t 2031urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data) 2032{ 2033 struct usb_device_request req; 2034 usb_error_t error; 2035 2036 URTW_ASSERT_LOCKED(sc); 2037 2038 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2039 req.bRequest = URTW_8187_GETREGS_REQ; 2040 USETW(req.wValue, (val & 0xff) | 0xff00); 2041 USETW(req.wIndex, (val >> 8) & 0x3); 2042 USETW(req.wLength, sizeof(uint32_t)); 2043 2044 error = urtw_do_request(sc, &req, data); 2045 return (error); 2046} 2047 2048static usb_error_t 2049urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data) 2050{ 2051 struct usb_device_request req; 2052 2053 URTW_ASSERT_LOCKED(sc); 2054 2055 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2056 req.bRequest = URTW_8187_SETREGS_REQ; 2057 USETW(req.wValue, (val & 0xff) | 0xff00); 2058 USETW(req.wIndex, (val >> 8) & 0x3); 2059 USETW(req.wLength, sizeof(uint8_t)); 2060 2061 return (urtw_do_request(sc, &req, &data)); 2062} 2063 2064static usb_error_t 2065urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data) 2066{ 2067 struct usb_device_request req; 2068 2069 URTW_ASSERT_LOCKED(sc); 2070 2071 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2072 req.bRequest = URTW_8187_SETREGS_REQ; 2073 USETW(req.wValue, (val & 0xff) | 0xff00); 2074 USETW(req.wIndex, (val >> 8) & 0x3); 2075 USETW(req.wLength, sizeof(uint16_t)); 2076 2077 return (urtw_do_request(sc, &req, &data)); 2078} 2079 2080static usb_error_t 2081urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data) 2082{ 2083 struct usb_device_request req; 2084 2085 URTW_ASSERT_LOCKED(sc); 2086 2087 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2088 req.bRequest = URTW_8187_SETREGS_REQ; 2089 USETW(req.wValue, (val & 0xff) | 0xff00); 2090 USETW(req.wIndex, (val >> 8) & 0x3); 2091 USETW(req.wLength, sizeof(uint32_t)); 2092 2093 return (urtw_do_request(sc, &req, &data)); 2094} 2095 2096static usb_error_t 2097urtw_get_macaddr(struct urtw_softc *sc) 2098{ 2099 struct ieee80211com *ic = &sc->sc_ic; 2100 uint32_t data; 2101 usb_error_t error; 2102 2103 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data); 2104 if (error != 0) 2105 goto fail; 2106 ic->ic_macaddr[0] = data & 0xff; 2107 ic->ic_macaddr[1] = (data & 0xff00) >> 8; 2108 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data); 2109 if (error != 0) 2110 goto fail; 2111 ic->ic_macaddr[2] = data & 0xff; 2112 ic->ic_macaddr[3] = (data & 0xff00) >> 8; 2113 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data); 2114 if (error != 0) 2115 goto fail; 2116 ic->ic_macaddr[4] = data & 0xff; 2117 ic->ic_macaddr[5] = (data & 0xff00) >> 8; 2118fail: 2119 return (error); 2120} 2121 2122static usb_error_t 2123urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data) 2124{ 2125#define URTW_READCMD_LEN 3 2126 int addrlen, i; 2127 int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 }; 2128 usb_error_t error; 2129 2130 /* NB: make sure the buffer is initialized */ 2131 *data = 0; 2132 2133 /* enable EPROM programming */ 2134 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_PROGRAM_MODE); 2135 DELAY(URTW_EPROM_DELAY); 2136 2137 error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE); 2138 if (error != 0) 2139 goto fail; 2140 error = urtw_eprom_ck(sc); 2141 if (error != 0) 2142 goto fail; 2143 error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN); 2144 if (error != 0) 2145 goto fail; 2146 if (sc->sc_epromtype == URTW_EEPROM_93C56) { 2147 addrlen = 8; 2148 addrstr[0] = addr & (1 << 7); 2149 addrstr[1] = addr & (1 << 6); 2150 addrstr[2] = addr & (1 << 5); 2151 addrstr[3] = addr & (1 << 4); 2152 addrstr[4] = addr & (1 << 3); 2153 addrstr[5] = addr & (1 << 2); 2154 addrstr[6] = addr & (1 << 1); 2155 addrstr[7] = addr & (1 << 0); 2156 } else { 2157 addrlen=6; 2158 addrstr[0] = addr & (1 << 5); 2159 addrstr[1] = addr & (1 << 4); 2160 addrstr[2] = addr & (1 << 3); 2161 addrstr[3] = addr & (1 << 2); 2162 addrstr[4] = addr & (1 << 1); 2163 addrstr[5] = addr & (1 << 0); 2164 } 2165 error = urtw_eprom_sendbits(sc, addrstr, addrlen); 2166 if (error != 0) 2167 goto fail; 2168 2169 error = urtw_eprom_writebit(sc, 0); 2170 if (error != 0) 2171 goto fail; 2172 2173 for (i = 0; i < 16; i++) { 2174 error = urtw_eprom_ck(sc); 2175 if (error != 0) 2176 goto fail; 2177 error = urtw_eprom_readbit(sc, &data16); 2178 if (error != 0) 2179 goto fail; 2180 2181 (*data) |= (data16 << (15 - i)); 2182 } 2183 2184 error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE); 2185 if (error != 0) 2186 goto fail; 2187 error = urtw_eprom_ck(sc); 2188 if (error != 0) 2189 goto fail; 2190 2191 /* now disable EPROM programming */ 2192 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE); 2193fail: 2194 return (error); 2195#undef URTW_READCMD_LEN 2196} 2197 2198static usb_error_t 2199urtw_eprom_cs(struct urtw_softc *sc, int able) 2200{ 2201 uint8_t data; 2202 usb_error_t error; 2203 2204 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2205 if (able == URTW_EPROM_ENABLE) 2206 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CS); 2207 else 2208 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CS); 2209 DELAY(URTW_EPROM_DELAY); 2210fail: 2211 return (error); 2212} 2213 2214static usb_error_t 2215urtw_eprom_ck(struct urtw_softc *sc) 2216{ 2217 uint8_t data; 2218 usb_error_t error; 2219 2220 /* masking */ 2221 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2222 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK); 2223 DELAY(URTW_EPROM_DELAY); 2224 /* unmasking */ 2225 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2226 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK); 2227 DELAY(URTW_EPROM_DELAY); 2228fail: 2229 return (error); 2230} 2231 2232static usb_error_t 2233urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data) 2234{ 2235 uint8_t data8; 2236 usb_error_t error; 2237 2238 urtw_read8_m(sc, URTW_EPROM_CMD, &data8); 2239 *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0; 2240 DELAY(URTW_EPROM_DELAY); 2241 2242fail: 2243 return (error); 2244} 2245 2246static usb_error_t 2247urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit) 2248{ 2249 uint8_t data; 2250 usb_error_t error; 2251 2252 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2253 if (bit != 0) 2254 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_WRITEBIT); 2255 else 2256 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_WRITEBIT); 2257 DELAY(URTW_EPROM_DELAY); 2258fail: 2259 return (error); 2260} 2261 2262static usb_error_t 2263urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen) 2264{ 2265 int i = 0; 2266 usb_error_t error = 0; 2267 2268 for (i = 0; i < buflen; i++) { 2269 error = urtw_eprom_writebit(sc, buf[i]); 2270 if (error != 0) 2271 goto fail; 2272 error = urtw_eprom_ck(sc); 2273 if (error != 0) 2274 goto fail; 2275 } 2276fail: 2277 return (error); 2278} 2279 2280 2281static usb_error_t 2282urtw_get_txpwr(struct urtw_softc *sc) 2283{ 2284 int i, j; 2285 uint32_t data; 2286 usb_error_t error; 2287 2288 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW_BASE, &data); 2289 if (error != 0) 2290 goto fail; 2291 sc->sc_txpwr_cck_base = data & 0xf; 2292 sc->sc_txpwr_ofdm_base = (data >> 4) & 0xf; 2293 2294 for (i = 1, j = 0; i < 6; i += 2, j++) { 2295 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW0 + j, &data); 2296 if (error != 0) 2297 goto fail; 2298 sc->sc_txpwr_cck[i] = data & 0xf; 2299 sc->sc_txpwr_cck[i + 1] = (data & 0xf00) >> 8; 2300 sc->sc_txpwr_ofdm[i] = (data & 0xf0) >> 4; 2301 sc->sc_txpwr_ofdm[i + 1] = (data & 0xf000) >> 12; 2302 } 2303 for (i = 1, j = 0; i < 4; i += 2, j++) { 2304 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW1 + j, &data); 2305 if (error != 0) 2306 goto fail; 2307 sc->sc_txpwr_cck[i + 6] = data & 0xf; 2308 sc->sc_txpwr_cck[i + 6 + 1] = (data & 0xf00) >> 8; 2309 sc->sc_txpwr_ofdm[i + 6] = (data & 0xf0) >> 4; 2310 sc->sc_txpwr_ofdm[i + 6 + 1] = (data & 0xf000) >> 12; 2311 } 2312 if (sc->sc_flags & URTW_RTL8187B) { 2313 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2, &data); 2314 if (error != 0) 2315 goto fail; 2316 sc->sc_txpwr_cck[1 + 6 + 4] = data & 0xf; 2317 sc->sc_txpwr_ofdm[1 + 6 + 4] = (data & 0xf0) >> 4; 2318 error = urtw_eprom_read32(sc, 0x0a, &data); 2319 if (error != 0) 2320 goto fail; 2321 sc->sc_txpwr_cck[2 + 6 + 4] = data & 0xf; 2322 sc->sc_txpwr_ofdm[2 + 6 + 4] = (data & 0xf0) >> 4; 2323 error = urtw_eprom_read32(sc, 0x1c, &data); 2324 if (error != 0) 2325 goto fail; 2326 sc->sc_txpwr_cck[3 + 6 + 4] = data & 0xf; 2327 sc->sc_txpwr_cck[3 + 6 + 4 + 1] = (data & 0xf00) >> 8; 2328 sc->sc_txpwr_ofdm[3 + 6 + 4] = (data & 0xf0) >> 4; 2329 sc->sc_txpwr_ofdm[3 + 6 + 4 + 1] = (data & 0xf000) >> 12; 2330 } else { 2331 for (i = 1, j = 0; i < 4; i += 2, j++) { 2332 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2 + j, 2333 &data); 2334 if (error != 0) 2335 goto fail; 2336 sc->sc_txpwr_cck[i + 6 + 4] = data & 0xf; 2337 sc->sc_txpwr_cck[i + 6 + 4 + 1] = (data & 0xf00) >> 8; 2338 sc->sc_txpwr_ofdm[i + 6 + 4] = (data & 0xf0) >> 4; 2339 sc->sc_txpwr_ofdm[i + 6 + 4 + 1] = (data & 0xf000) >> 12; 2340 } 2341 } 2342fail: 2343 return (error); 2344} 2345 2346 2347static usb_error_t 2348urtw_get_rfchip(struct urtw_softc *sc) 2349{ 2350 int ret; 2351 uint8_t data8; 2352 uint32_t data; 2353 usb_error_t error; 2354 2355 if (sc->sc_flags & URTW_RTL8187B) { 2356 urtw_read8_m(sc, 0xe1, &data8); 2357 switch (data8) { 2358 case 0: 2359 sc->sc_flags |= URTW_RTL8187B_REV_B; 2360 break; 2361 case 1: 2362 sc->sc_flags |= URTW_RTL8187B_REV_D; 2363 break; 2364 case 2: 2365 sc->sc_flags |= URTW_RTL8187B_REV_E; 2366 break; 2367 default: 2368 device_printf(sc->sc_dev, "unknown type: %#x\n", data8); 2369 sc->sc_flags |= URTW_RTL8187B_REV_B; 2370 break; 2371 } 2372 } else { 2373 urtw_read32_m(sc, URTW_TX_CONF, &data); 2374 switch (data & URTW_TX_HWMASK) { 2375 case URTW_TX_R8187vD_B: 2376 sc->sc_flags |= URTW_RTL8187B; 2377 break; 2378 case URTW_TX_R8187vD: 2379 break; 2380 default: 2381 device_printf(sc->sc_dev, "unknown RTL8187L type: %#x\n", 2382 data & URTW_TX_HWMASK); 2383 break; 2384 } 2385 } 2386 2387 error = urtw_eprom_read32(sc, URTW_EPROM_RFCHIPID, &data); 2388 if (error != 0) 2389 goto fail; 2390 switch (data & 0xff) { 2391 case URTW_EPROM_RFCHIPID_RTL8225U: 2392 error = urtw_8225_isv2(sc, &ret); 2393 if (error != 0) 2394 goto fail; 2395 if (ret == 0) { 2396 sc->sc_rf_init = urtw_8225_rf_init; 2397 sc->sc_rf_set_sens = urtw_8225_rf_set_sens; 2398 sc->sc_rf_set_chan = urtw_8225_rf_set_chan; 2399 sc->sc_rf_stop = urtw_8225_rf_stop; 2400 } else { 2401 sc->sc_rf_init = urtw_8225v2_rf_init; 2402 sc->sc_rf_set_chan = urtw_8225v2_rf_set_chan; 2403 sc->sc_rf_stop = urtw_8225_rf_stop; 2404 } 2405 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2406 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2407 break; 2408 case URTW_EPROM_RFCHIPID_RTL8225Z2: 2409 sc->sc_rf_init = urtw_8225v2b_rf_init; 2410 sc->sc_rf_set_chan = urtw_8225v2b_rf_set_chan; 2411 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2412 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2413 sc->sc_rf_stop = urtw_8225_rf_stop; 2414 break; 2415 default: 2416 DPRINTF(sc, URTW_DEBUG_STATE, 2417 "unsupported RF chip %d\n", data & 0xff); 2418 error = USB_ERR_INVAL; 2419 goto fail; 2420 } 2421 2422 device_printf(sc->sc_dev, "%s rf %s hwrev %s\n", 2423 (sc->sc_flags & URTW_RTL8187B) ? "rtl8187b" : "rtl8187l", 2424 ((data & 0xff) == URTW_EPROM_RFCHIPID_RTL8225U) ? "rtl8225u" : 2425 "rtl8225z2", 2426 (sc->sc_flags & URTW_RTL8187B) ? ((data8 == 0) ? "b" : 2427 (data8 == 1) ? "d" : "e") : "none"); 2428 2429fail: 2430 return (error); 2431} 2432 2433 2434static usb_error_t 2435urtw_led_init(struct urtw_softc *sc) 2436{ 2437 uint32_t rev; 2438 usb_error_t error; 2439 2440 urtw_read8_m(sc, URTW_PSR, &sc->sc_psr); 2441 error = urtw_eprom_read32(sc, URTW_EPROM_SWREV, &rev); 2442 if (error != 0) 2443 goto fail; 2444 2445 switch (rev & URTW_EPROM_CID_MASK) { 2446 case URTW_EPROM_CID_ALPHA0: 2447 sc->sc_strategy = URTW_SW_LED_MODE1; 2448 break; 2449 case URTW_EPROM_CID_SERCOMM_PS: 2450 sc->sc_strategy = URTW_SW_LED_MODE3; 2451 break; 2452 case URTW_EPROM_CID_HW_LED: 2453 sc->sc_strategy = URTW_HW_LED; 2454 break; 2455 case URTW_EPROM_CID_RSVD0: 2456 case URTW_EPROM_CID_RSVD1: 2457 default: 2458 sc->sc_strategy = URTW_SW_LED_MODE0; 2459 break; 2460 } 2461 2462 sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0; 2463 2464fail: 2465 return (error); 2466} 2467 2468 2469static usb_error_t 2470urtw_8225_rf_init(struct urtw_softc *sc) 2471{ 2472 unsigned int i; 2473 uint16_t data; 2474 usb_error_t error; 2475 2476 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2477 if (error) 2478 goto fail; 2479 2480 error = urtw_8225_usb_init(sc); 2481 if (error) 2482 goto fail; 2483 2484 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2485 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2486 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2487 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2488 2489 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2490 if (error) 2491 goto fail; 2492 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2493 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2494 if (error) 2495 goto fail; 2496 2497 error = urtw_8185_rf_pins_enable(sc); 2498 if (error) 2499 goto fail; 2500 usb_pause_mtx(&sc->sc_mtx, 1000); 2501 2502 for (i = 0; i < nitems(urtw_8225_rf_part1); i++) { 2503 urtw_8225_write(sc, urtw_8225_rf_part1[i].reg, 2504 urtw_8225_rf_part1[i].val); 2505 usb_pause_mtx(&sc->sc_mtx, 1); 2506 } 2507 usb_pause_mtx(&sc->sc_mtx, 100); 2508 urtw_8225_write(sc, 2509 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2510 usb_pause_mtx(&sc->sc_mtx, 200); 2511 urtw_8225_write(sc, 2512 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2513 usb_pause_mtx(&sc->sc_mtx, 200); 2514 urtw_8225_write(sc, 2515 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC3); 2516 2517 for (i = 0; i < 95; i++) { 2518 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2519 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, urtw_8225_rxgain[i]); 2520 } 2521 2522 urtw_8225_write(sc, 2523 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC4); 2524 urtw_8225_write(sc, 2525 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC5); 2526 2527 for (i = 0; i < 128; i++) { 2528 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2529 usb_pause_mtx(&sc->sc_mtx, 1); 2530 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2531 usb_pause_mtx(&sc->sc_mtx, 1); 2532 } 2533 2534 for (i = 0; i < nitems(urtw_8225_rf_part2); i++) { 2535 urtw_8187_write_phy_ofdm(sc, urtw_8225_rf_part2[i].reg, 2536 urtw_8225_rf_part2[i].val); 2537 usb_pause_mtx(&sc->sc_mtx, 1); 2538 } 2539 2540 error = urtw_8225_setgain(sc, 4); 2541 if (error) 2542 goto fail; 2543 2544 for (i = 0; i < nitems(urtw_8225_rf_part3); i++) { 2545 urtw_8187_write_phy_cck(sc, urtw_8225_rf_part3[i].reg, 2546 urtw_8225_rf_part3[i].val); 2547 usb_pause_mtx(&sc->sc_mtx, 1); 2548 } 2549 2550 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2551 2552 error = urtw_8225_set_txpwrlvl(sc, 1); 2553 if (error) 2554 goto fail; 2555 2556 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2557 usb_pause_mtx(&sc->sc_mtx, 1); 2558 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2559 usb_pause_mtx(&sc->sc_mtx, 1); 2560 2561 /* TX ant A, 0x0 for B */ 2562 error = urtw_8185_tx_antenna(sc, 0x3); 2563 if (error) 2564 goto fail; 2565 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2566 2567 error = urtw_8225_rf_set_chan(sc, 1); 2568fail: 2569 return (error); 2570} 2571 2572static usb_error_t 2573urtw_8185_rf_pins_enable(struct urtw_softc *sc) 2574{ 2575 usb_error_t error = 0; 2576 2577 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1ff7); 2578fail: 2579 return (error); 2580} 2581 2582static usb_error_t 2583urtw_8185_tx_antenna(struct urtw_softc *sc, uint8_t ant) 2584{ 2585 usb_error_t error; 2586 2587 urtw_write8_m(sc, URTW_TX_ANTENNA, ant); 2588 usb_pause_mtx(&sc->sc_mtx, 1); 2589fail: 2590 return (error); 2591} 2592 2593static usb_error_t 2594urtw_8187_write_phy_ofdm_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2595{ 2596 2597 data = data & 0xff; 2598 return urtw_8187_write_phy(sc, addr, data); 2599} 2600 2601static usb_error_t 2602urtw_8187_write_phy_cck_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2603{ 2604 2605 data = data & 0xff; 2606 return urtw_8187_write_phy(sc, addr, data | 0x10000); 2607} 2608 2609static usb_error_t 2610urtw_8187_write_phy(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2611{ 2612 uint32_t phyw; 2613 usb_error_t error; 2614 2615 phyw = ((data << 8) | (addr | 0x80)); 2616 urtw_write8_m(sc, URTW_PHY_MAGIC4, ((phyw & 0xff000000) >> 24)); 2617 urtw_write8_m(sc, URTW_PHY_MAGIC3, ((phyw & 0x00ff0000) >> 16)); 2618 urtw_write8_m(sc, URTW_PHY_MAGIC2, ((phyw & 0x0000ff00) >> 8)); 2619 urtw_write8_m(sc, URTW_PHY_MAGIC1, ((phyw & 0x000000ff))); 2620 usb_pause_mtx(&sc->sc_mtx, 1); 2621fail: 2622 return (error); 2623} 2624 2625static usb_error_t 2626urtw_8225_setgain(struct urtw_softc *sc, int16_t gain) 2627{ 2628 usb_error_t error; 2629 2630 urtw_8187_write_phy_ofdm(sc, 0x0d, urtw_8225_gain[gain * 4]); 2631 urtw_8187_write_phy_ofdm(sc, 0x1b, urtw_8225_gain[gain * 4 + 2]); 2632 urtw_8187_write_phy_ofdm(sc, 0x1d, urtw_8225_gain[gain * 4 + 3]); 2633 urtw_8187_write_phy_ofdm(sc, 0x23, urtw_8225_gain[gain * 4 + 1]); 2634fail: 2635 return (error); 2636} 2637 2638static usb_error_t 2639urtw_8225_usb_init(struct urtw_softc *sc) 2640{ 2641 uint8_t data; 2642 usb_error_t error; 2643 2644 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 0); 2645 urtw_write8_m(sc, URTW_GPIO, 0); 2646 error = urtw_read8e(sc, 0x53, &data); 2647 if (error) 2648 goto fail; 2649 error = urtw_write8e(sc, 0x53, data | (1 << 7)); 2650 if (error) 2651 goto fail; 2652 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 4); 2653 urtw_write8_m(sc, URTW_GPIO, 0x20); 2654 urtw_write8_m(sc, URTW_GP_ENABLE, 0); 2655 2656 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x80); 2657 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x80); 2658 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x80); 2659 2660 usb_pause_mtx(&sc->sc_mtx, 500); 2661fail: 2662 return (error); 2663} 2664 2665static usb_error_t 2666urtw_8225_write_c(struct urtw_softc *sc, uint8_t addr, uint16_t data) 2667{ 2668 uint16_t d80, d82, d84; 2669 usb_error_t error; 2670 2671 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &d80); 2672 d80 &= URTW_RF_PINS_MAGIC1; 2673 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &d82); 2674 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &d84); 2675 d84 &= URTW_RF_PINS_MAGIC2; 2676 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, d82 | URTW_RF_PINS_MAGIC3); 2677 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84 | URTW_RF_PINS_MAGIC3); 2678 DELAY(10); 2679 2680 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2681 DELAY(2); 2682 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80); 2683 DELAY(10); 2684 2685 error = urtw_8225_write_s16(sc, addr, 0x8225, &data); 2686 if (error != 0) 2687 goto fail; 2688 2689 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2690 DELAY(10); 2691 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2692 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84); 2693 usb_pause_mtx(&sc->sc_mtx, 2); 2694fail: 2695 return (error); 2696} 2697 2698static usb_error_t 2699urtw_8225_write_s16(struct urtw_softc *sc, uint8_t addr, int index, 2700 uint16_t *data) 2701{ 2702 uint8_t buf[2]; 2703 uint16_t data16; 2704 struct usb_device_request req; 2705 usb_error_t error = 0; 2706 2707 data16 = *data; 2708 2709 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2710 req.bRequest = URTW_8187_SETREGS_REQ; 2711 USETW(req.wValue, addr); 2712 USETW(req.wIndex, index); 2713 USETW(req.wLength, sizeof(uint16_t)); 2714 buf[0] = (data16 & 0x00ff); 2715 buf[1] = (data16 & 0xff00) >> 8; 2716 2717 error = urtw_do_request(sc, &req, buf); 2718 2719 return (error); 2720} 2721 2722static usb_error_t 2723urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan) 2724{ 2725 usb_error_t error; 2726 2727 error = urtw_8225_set_txpwrlvl(sc, chan); 2728 if (error) 2729 goto fail; 2730 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 2731 usb_pause_mtx(&sc->sc_mtx, 10); 2732fail: 2733 return (error); 2734} 2735 2736static usb_error_t 2737urtw_8225_rf_set_sens(struct urtw_softc *sc, int sens) 2738{ 2739 usb_error_t error; 2740 2741 if (sens < 0 || sens > 6) 2742 return -1; 2743 2744 if (sens > 4) 2745 urtw_8225_write(sc, 2746 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC1); 2747 else 2748 urtw_8225_write(sc, 2749 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC2); 2750 2751 sens = 6 - sens; 2752 error = urtw_8225_setgain(sc, sens); 2753 if (error) 2754 goto fail; 2755 2756 urtw_8187_write_phy_cck(sc, 0x41, urtw_8225_threshold[sens]); 2757 2758fail: 2759 return (error); 2760} 2761 2762static usb_error_t 2763urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan) 2764{ 2765 int i, idx, set; 2766 uint8_t *cck_pwltable; 2767 uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max; 2768 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 2769 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 2770 usb_error_t error; 2771 2772 cck_pwrlvl_max = 11; 2773 ofdm_pwrlvl_max = 25; /* 12 -> 25 */ 2774 ofdm_pwrlvl_min = 10; 2775 2776 /* CCK power setting */ 2777 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 2778 idx = cck_pwrlvl % 6; 2779 set = cck_pwrlvl / 6; 2780 cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 : 2781 urtw_8225_txpwr_cck; 2782 2783 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 2784 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2785 for (i = 0; i < 8; i++) { 2786 urtw_8187_write_phy_cck(sc, 0x44 + i, 2787 cck_pwltable[idx * 8 + i]); 2788 } 2789 usb_pause_mtx(&sc->sc_mtx, 1); 2790 2791 /* OFDM power setting */ 2792 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 2793 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 2794 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 2795 2796 idx = ofdm_pwrlvl % 6; 2797 set = ofdm_pwrlvl / 6; 2798 2799 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 2800 if (error) 2801 goto fail; 2802 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 2803 urtw_8187_write_phy_ofdm(sc, 6, 0); 2804 urtw_8187_write_phy_ofdm(sc, 8, 0); 2805 2806 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 2807 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2808 urtw_8187_write_phy_ofdm(sc, 0x5, urtw_8225_txpwr_ofdm[idx]); 2809 urtw_8187_write_phy_ofdm(sc, 0x7, urtw_8225_txpwr_ofdm[idx]); 2810 usb_pause_mtx(&sc->sc_mtx, 1); 2811fail: 2812 return (error); 2813} 2814 2815 2816static usb_error_t 2817urtw_8225_rf_stop(struct urtw_softc *sc) 2818{ 2819 uint8_t data; 2820 usb_error_t error; 2821 2822 urtw_8225_write(sc, 0x4, 0x1f); 2823 2824 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2825 if (error) 2826 goto fail; 2827 2828 urtw_read8_m(sc, URTW_CONFIG3, &data); 2829 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 2830 if (sc->sc_flags & URTW_RTL8187B) { 2831 urtw_write32_m(sc, URTW_ANAPARAM2, 2832 URTW_8187B_8225_ANAPARAM2_OFF); 2833 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_OFF); 2834 urtw_write32_m(sc, URTW_ANAPARAM3, 2835 URTW_8187B_8225_ANAPARAM3_OFF); 2836 } else { 2837 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8225_ANAPARAM2_OFF); 2838 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8225_ANAPARAM_OFF); 2839 } 2840 2841 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 2842 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2843 if (error) 2844 goto fail; 2845 2846fail: 2847 return (error); 2848} 2849 2850static usb_error_t 2851urtw_8225v2_rf_init(struct urtw_softc *sc) 2852{ 2853 unsigned int i; 2854 uint16_t data; 2855 uint32_t data32; 2856 usb_error_t error; 2857 2858 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2859 if (error) 2860 goto fail; 2861 2862 error = urtw_8225_usb_init(sc); 2863 if (error) 2864 goto fail; 2865 2866 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2867 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2868 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2869 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2870 2871 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2872 if (error) 2873 goto fail; 2874 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2875 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2876 if (error) 2877 goto fail; 2878 2879 error = urtw_8185_rf_pins_enable(sc); 2880 if (error) 2881 goto fail; 2882 2883 usb_pause_mtx(&sc->sc_mtx, 500); 2884 2885 for (i = 0; i < nitems(urtw_8225v2_rf_part1); i++) { 2886 urtw_8225_write(sc, urtw_8225v2_rf_part1[i].reg, 2887 urtw_8225v2_rf_part1[i].val); 2888 } 2889 usb_pause_mtx(&sc->sc_mtx, 50); 2890 2891 urtw_8225_write(sc, 2892 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 2893 2894 for (i = 0; i < 95; i++) { 2895 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2896 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 2897 urtw_8225v2_rxgain[i]); 2898 } 2899 2900 urtw_8225_write(sc, 2901 URTW_8225_ADDR_3_MAGIC, URTW_8225_ADDR_3_DATA_MAGIC1); 2902 urtw_8225_write(sc, 2903 URTW_8225_ADDR_5_MAGIC, URTW_8225_ADDR_5_DATA_MAGIC1); 2904 urtw_8225_write(sc, 2905 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC2); 2906 urtw_8225_write(sc, 2907 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2908 usb_pause_mtx(&sc->sc_mtx, 100); 2909 urtw_8225_write(sc, 2910 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2911 usb_pause_mtx(&sc->sc_mtx, 100); 2912 2913 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2914 if (error != 0) 2915 goto fail; 2916 if (data32 != URTW_8225_ADDR_6_DATA_MAGIC1) 2917 device_printf(sc->sc_dev, "expect 0xe6!! (0x%x)\n", data32); 2918 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) { 2919 urtw_8225_write(sc, 2920 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2921 usb_pause_mtx(&sc->sc_mtx, 100); 2922 urtw_8225_write(sc, 2923 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2924 usb_pause_mtx(&sc->sc_mtx, 50); 2925 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2926 if (error != 0) 2927 goto fail; 2928 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) 2929 device_printf(sc->sc_dev, "RF calibration failed\n"); 2930 } 2931 usb_pause_mtx(&sc->sc_mtx, 100); 2932 2933 urtw_8225_write(sc, 2934 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC6); 2935 for (i = 0; i < 128; i++) { 2936 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2937 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2938 } 2939 2940 for (i = 0; i < nitems(urtw_8225v2_rf_part2); i++) { 2941 urtw_8187_write_phy_ofdm(sc, urtw_8225v2_rf_part2[i].reg, 2942 urtw_8225v2_rf_part2[i].val); 2943 } 2944 2945 error = urtw_8225v2_setgain(sc, 4); 2946 if (error) 2947 goto fail; 2948 2949 for (i = 0; i < nitems(urtw_8225v2_rf_part3); i++) { 2950 urtw_8187_write_phy_cck(sc, urtw_8225v2_rf_part3[i].reg, 2951 urtw_8225v2_rf_part3[i].val); 2952 } 2953 2954 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2955 2956 error = urtw_8225v2_set_txpwrlvl(sc, 1); 2957 if (error) 2958 goto fail; 2959 2960 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2961 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2962 2963 /* TX ant A, 0x0 for B */ 2964 error = urtw_8185_tx_antenna(sc, 0x3); 2965 if (error) 2966 goto fail; 2967 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2968 2969 error = urtw_8225_rf_set_chan(sc, 1); 2970fail: 2971 return (error); 2972} 2973 2974static usb_error_t 2975urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan) 2976{ 2977 usb_error_t error; 2978 2979 error = urtw_8225v2_set_txpwrlvl(sc, chan); 2980 if (error) 2981 goto fail; 2982 2983 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 2984 usb_pause_mtx(&sc->sc_mtx, 10); 2985fail: 2986 return (error); 2987} 2988 2989static usb_error_t 2990urtw_8225_read(struct urtw_softc *sc, uint8_t addr, uint32_t *data) 2991{ 2992 int i; 2993 int16_t bit; 2994 uint8_t rlen = 12, wlen = 6; 2995 uint16_t o1, o2, o3, tmp; 2996 uint32_t d2w = ((uint32_t)(addr & 0x1f)) << 27; 2997 uint32_t mask = 0x80000000, value = 0; 2998 usb_error_t error; 2999 3000 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &o1); 3001 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &o2); 3002 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &o3); 3003 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2 | URTW_RF_PINS_MAGIC4); 3004 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3 | URTW_RF_PINS_MAGIC4); 3005 o1 &= ~URTW_RF_PINS_MAGIC4; 3006 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN); 3007 DELAY(5); 3008 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1); 3009 DELAY(5); 3010 3011 for (i = 0; i < (wlen / 2); i++, mask = mask >> 1) { 3012 bit = ((d2w & mask) != 0) ? 1 : 0; 3013 3014 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3015 DELAY(2); 3016 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3017 URTW_BB_HOST_BANG_CLK); 3018 DELAY(2); 3019 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3020 URTW_BB_HOST_BANG_CLK); 3021 DELAY(2); 3022 mask = mask >> 1; 3023 if (i == 2) 3024 break; 3025 bit = ((d2w & mask) != 0) ? 1 : 0; 3026 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3027 URTW_BB_HOST_BANG_CLK); 3028 DELAY(2); 3029 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3030 URTW_BB_HOST_BANG_CLK); 3031 DELAY(2); 3032 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3033 DELAY(1); 3034 } 3035 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW | 3036 URTW_BB_HOST_BANG_CLK); 3037 DELAY(2); 3038 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW); 3039 DELAY(2); 3040 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_RW); 3041 DELAY(2); 3042 3043 mask = 0x800; 3044 for (i = 0; i < rlen; i++, mask = mask >> 1) { 3045 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3046 o1 | URTW_BB_HOST_BANG_RW); 3047 DELAY(2); 3048 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3049 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3050 DELAY(2); 3051 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3052 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3053 DELAY(2); 3054 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3055 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3056 DELAY(2); 3057 3058 urtw_read16_m(sc, URTW_RF_PINS_INPUT, &tmp); 3059 value |= ((tmp & URTW_BB_HOST_BANG_CLK) ? mask : 0); 3060 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3061 o1 | URTW_BB_HOST_BANG_RW); 3062 DELAY(2); 3063 } 3064 3065 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN | 3066 URTW_BB_HOST_BANG_RW); 3067 DELAY(2); 3068 3069 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2); 3070 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3); 3071 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_OUTPUT_MAGIC1); 3072 3073 if (data != NULL) 3074 *data = value; 3075fail: 3076 return (error); 3077} 3078 3079 3080static usb_error_t 3081urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan) 3082{ 3083 int i; 3084 uint8_t *cck_pwrtable; 3085 uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10; 3086 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3087 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3088 usb_error_t error; 3089 3090 /* CCK power setting */ 3091 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 3092 cck_pwrlvl += sc->sc_txpwr_cck_base; 3093 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3094 cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 : 3095 urtw_8225v2_txpwr_cck; 3096 3097 for (i = 0; i < 8; i++) 3098 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3099 3100 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3101 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl]); 3102 usb_pause_mtx(&sc->sc_mtx, 1); 3103 3104 /* OFDM power setting */ 3105 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 3106 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 3107 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3108 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3109 3110 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3111 if (error) 3112 goto fail; 3113 3114 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 3115 urtw_8187_write_phy_ofdm(sc, 5, 0x0); 3116 urtw_8187_write_phy_ofdm(sc, 6, 0x40); 3117 urtw_8187_write_phy_ofdm(sc, 7, 0x0); 3118 urtw_8187_write_phy_ofdm(sc, 8, 0x40); 3119 3120 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3121 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]); 3122 usb_pause_mtx(&sc->sc_mtx, 1); 3123fail: 3124 return (error); 3125} 3126 3127static usb_error_t 3128urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain) 3129{ 3130 uint8_t *gainp; 3131 usb_error_t error; 3132 3133 /* XXX for A? */ 3134 gainp = urtw_8225v2_gain_bg; 3135 urtw_8187_write_phy_ofdm(sc, 0x0d, gainp[gain * 3]); 3136 usb_pause_mtx(&sc->sc_mtx, 1); 3137 urtw_8187_write_phy_ofdm(sc, 0x1b, gainp[gain * 3 + 1]); 3138 usb_pause_mtx(&sc->sc_mtx, 1); 3139 urtw_8187_write_phy_ofdm(sc, 0x1d, gainp[gain * 3 + 2]); 3140 usb_pause_mtx(&sc->sc_mtx, 1); 3141 urtw_8187_write_phy_ofdm(sc, 0x21, 0x17); 3142 usb_pause_mtx(&sc->sc_mtx, 1); 3143fail: 3144 return (error); 3145} 3146 3147static usb_error_t 3148urtw_8225_isv2(struct urtw_softc *sc, int *ret) 3149{ 3150 uint32_t data; 3151 usb_error_t error; 3152 3153 *ret = 1; 3154 3155 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_MAGIC5); 3156 urtw_write16_m(sc, URTW_RF_PINS_SELECT, URTW_RF_PINS_MAGIC5); 3157 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, URTW_RF_PINS_MAGIC5); 3158 usb_pause_mtx(&sc->sc_mtx, 500); 3159 3160 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3161 URTW_8225_ADDR_0_DATA_MAGIC1); 3162 3163 error = urtw_8225_read(sc, URTW_8225_ADDR_8_MAGIC, &data); 3164 if (error != 0) 3165 goto fail; 3166 if (data != URTW_8225_ADDR_8_DATA_MAGIC1) 3167 *ret = 0; 3168 else { 3169 error = urtw_8225_read(sc, URTW_8225_ADDR_9_MAGIC, &data); 3170 if (error != 0) 3171 goto fail; 3172 if (data != URTW_8225_ADDR_9_DATA_MAGIC1) 3173 *ret = 0; 3174 } 3175 3176 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3177 URTW_8225_ADDR_0_DATA_MAGIC2); 3178fail: 3179 return (error); 3180} 3181 3182static usb_error_t 3183urtw_8225v2b_rf_init(struct urtw_softc *sc) 3184{ 3185 struct ieee80211com *ic = &sc->sc_ic; 3186 unsigned int i; 3187 uint8_t data8; 3188 usb_error_t error; 3189 3190 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3191 if (error) 3192 goto fail; 3193 3194 /* 3195 * initialize extra registers on 8187 3196 */ 3197 urtw_write16_m(sc, URTW_BRSR_8187B, 0xfff); 3198 3199 /* retry limit */ 3200 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3201 data8 |= URTW_CW_CONF_PERPACKET_RETRY; 3202 urtw_write8_m(sc, URTW_CW_CONF, data8); 3203 3204 /* TX AGC */ 3205 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3206 data8 |= URTW_TX_AGC_CTL_PERPACKET_GAIN; 3207 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3208 3209 /* Auto Rate Fallback Control */ 3210#define URTW_ARFR 0x1e0 3211 urtw_write16_m(sc, URTW_ARFR, 0xfff); 3212 urtw_read8_m(sc, URTW_RATE_FALLBACK, &data8); 3213 urtw_write8_m(sc, URTW_RATE_FALLBACK, 3214 data8 | URTW_RATE_FALLBACK_ENABLE); 3215 3216 urtw_read8_m(sc, URTW_MSR, &data8); 3217 urtw_write8_m(sc, URTW_MSR, data8 & 0xf3); 3218 urtw_read8_m(sc, URTW_MSR, &data8); 3219 urtw_write8_m(sc, URTW_MSR, data8 | URTW_MSR_LINK_ENEDCA); 3220 urtw_write8_m(sc, URTW_ACM_CONTROL, sc->sc_acmctl); 3221 3222 urtw_write16_m(sc, URTW_ATIM_WND, 2); 3223 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 3224#define URTW_FEMR_FOR_8187B 0x1d4 3225 urtw_write16_m(sc, URTW_FEMR_FOR_8187B, 0xffff); 3226 3227 /* led type */ 3228 urtw_read8_m(sc, URTW_CONFIG1, &data8); 3229 data8 = (data8 & 0x3f) | 0x80; 3230 urtw_write8_m(sc, URTW_CONFIG1, data8); 3231 3232 /* applying MAC address again. */ 3233 urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)ic->ic_macaddr)[0]); 3234 urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)ic->ic_macaddr)[1] & 0xffff); 3235 3236 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3237 if (error) 3238 goto fail; 3239 3240 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 3241 3242 /* 3243 * MAC configuration 3244 */ 3245 for (i = 0; i < nitems(urtw_8225v2b_rf_part1); i++) 3246 urtw_write8_m(sc, urtw_8225v2b_rf_part1[i].reg, 3247 urtw_8225v2b_rf_part1[i].val); 3248 urtw_write16_m(sc, URTW_TID_AC_MAP, 0xfa50); 3249 urtw_write16_m(sc, URTW_INT_MIG, 0x0000); 3250 urtw_write32_m(sc, 0x1f0, 0); 3251 urtw_write32_m(sc, 0x1f4, 0); 3252 urtw_write8_m(sc, 0x1f8, 0); 3253 urtw_write32_m(sc, URTW_RF_TIMING, 0x4001); 3254 3255#define URTW_RFSW_CTRL 0x272 3256 urtw_write16_m(sc, URTW_RFSW_CTRL, 0x569a); 3257 3258 /* 3259 * initialize PHY 3260 */ 3261 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3262 if (error) 3263 goto fail; 3264 urtw_read8_m(sc, URTW_CONFIG3, &data8); 3265 urtw_write8_m(sc, URTW_CONFIG3, 3266 data8 | URTW_CONFIG3_ANAPARAM_WRITE); 3267 3268 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3269 if (error) 3270 goto fail; 3271 3272 /* setup RFE initial timing */ 3273 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x0480); 3274 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x2488); 3275 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1fff); 3276 usb_pause_mtx(&sc->sc_mtx, 1100); 3277 3278 for (i = 0; i < nitems(urtw_8225v2b_rf_part0); i++) { 3279 urtw_8225_write(sc, urtw_8225v2b_rf_part0[i].reg, 3280 urtw_8225v2b_rf_part0[i].val); 3281 usb_pause_mtx(&sc->sc_mtx, 1); 3282 } 3283 urtw_8225_write(sc, 0x00, 0x01b7); 3284 3285 for (i = 0; i < 95; i++) { 3286 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 3287 usb_pause_mtx(&sc->sc_mtx, 1); 3288 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 3289 urtw_8225v2b_rxgain[i]); 3290 usb_pause_mtx(&sc->sc_mtx, 1); 3291 } 3292 3293 urtw_8225_write(sc, URTW_8225_ADDR_3_MAGIC, 0x080); 3294 usb_pause_mtx(&sc->sc_mtx, 1); 3295 urtw_8225_write(sc, URTW_8225_ADDR_5_MAGIC, 0x004); 3296 usb_pause_mtx(&sc->sc_mtx, 1); 3297 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x0b7); 3298 usb_pause_mtx(&sc->sc_mtx, 1); 3299 usb_pause_mtx(&sc->sc_mtx, 3000); 3300 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0xc4d); 3301 usb_pause_mtx(&sc->sc_mtx, 2000); 3302 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0x44d); 3303 usb_pause_mtx(&sc->sc_mtx, 1); 3304 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x2bf); 3305 usb_pause_mtx(&sc->sc_mtx, 1); 3306 3307 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 0x03); 3308 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 0x07); 3309 urtw_write8_m(sc, URTW_TX_ANTENNA, 0x03); 3310 3311 urtw_8187_write_phy_ofdm(sc, 0x80, 0x12); 3312 for (i = 0; i < 128; i++) { 3313 uint32_t addr, data; 3314 3315 data = (urtw_8225z2_agc[i] << 8) | 0x0000008f; 3316 addr = ((i + 0x80) << 8) | 0x0000008e; 3317 3318 urtw_8187_write_phy_ofdm(sc, data & 0x7f, (data >> 8) & 0xff); 3319 urtw_8187_write_phy_ofdm(sc, addr & 0x7f, (addr >> 8) & 0xff); 3320 urtw_8187_write_phy_ofdm(sc, 0x0e, 0x00); 3321 } 3322 urtw_8187_write_phy_ofdm(sc, 0x80, 0x10); 3323 3324 for (i = 0; i < nitems(urtw_8225v2b_rf_part2); i++) 3325 urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val); 3326 3327 urtw_write32_m(sc, URTW_8187B_AC_VO, (7 << 12) | (3 << 8) | 0x1c); 3328 urtw_write32_m(sc, URTW_8187B_AC_VI, (7 << 12) | (3 << 8) | 0x1c); 3329 urtw_write32_m(sc, URTW_8187B_AC_BE, (7 << 12) | (3 << 8) | 0x1c); 3330 urtw_write32_m(sc, URTW_8187B_AC_BK, (7 << 12) | (3 << 8) | 0x1c); 3331 3332 urtw_8187_write_phy_ofdm(sc, 0x97, 0x46); 3333 urtw_8187_write_phy_ofdm(sc, 0xa4, 0xb6); 3334 urtw_8187_write_phy_ofdm(sc, 0x85, 0xfc); 3335 urtw_8187_write_phy_cck(sc, 0xc1, 0x88); 3336 3337fail: 3338 return (error); 3339} 3340 3341static usb_error_t 3342urtw_8225v2b_rf_set_chan(struct urtw_softc *sc, int chan) 3343{ 3344 usb_error_t error; 3345 3346 error = urtw_8225v2b_set_txpwrlvl(sc, chan); 3347 if (error) 3348 goto fail; 3349 3350 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3351 usb_pause_mtx(&sc->sc_mtx, 10); 3352fail: 3353 return (error); 3354} 3355 3356static usb_error_t 3357urtw_8225v2b_set_txpwrlvl(struct urtw_softc *sc, int chan) 3358{ 3359 int i; 3360 uint8_t *cck_pwrtable; 3361 uint8_t cck_pwrlvl_max = 15; 3362 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3363 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3364 usb_error_t error; 3365 3366 /* CCK power setting */ 3367 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? 3368 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? cck_pwrlvl_max : 22) : 3369 (cck_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 0 : 7)); 3370 cck_pwrlvl += sc->sc_txpwr_cck_base; 3371 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3372 cck_pwrtable = (chan == 14) ? urtw_8225v2b_txpwr_cck_ch14 : 3373 urtw_8225v2b_txpwr_cck; 3374 3375 if (sc->sc_flags & URTW_RTL8187B_REV_B) 3376 cck_pwrtable += (cck_pwrlvl <= 6) ? 0 : 3377 ((cck_pwrlvl <= 11) ? 8 : 16); 3378 else 3379 cck_pwrtable += (cck_pwrlvl <= 5) ? 0 : 3380 ((cck_pwrlvl <= 11) ? 8 : ((cck_pwrlvl <= 17) ? 16 : 24)); 3381 3382 for (i = 0; i < 8; i++) 3383 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3384 3385 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3386 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl] << 1); 3387 usb_pause_mtx(&sc->sc_mtx, 1); 3388 3389 /* OFDM power setting */ 3390 ofdm_pwrlvl = (ofdm_pwrlvl > 15) ? 3391 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 17 : 25) : 3392 (ofdm_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 2 : 10)); 3393 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3394 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3395 3396 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3397 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl] << 1); 3398 3399 if (sc->sc_flags & URTW_RTL8187B_REV_B) { 3400 if (ofdm_pwrlvl <= 11) { 3401 urtw_8187_write_phy_ofdm(sc, 0x87, 0x60); 3402 urtw_8187_write_phy_ofdm(sc, 0x89, 0x60); 3403 } else { 3404 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3405 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3406 } 3407 } else { 3408 if (ofdm_pwrlvl <= 11) { 3409 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3410 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3411 } else if (ofdm_pwrlvl <= 17) { 3412 urtw_8187_write_phy_ofdm(sc, 0x87, 0x54); 3413 urtw_8187_write_phy_ofdm(sc, 0x89, 0x54); 3414 } else { 3415 urtw_8187_write_phy_ofdm(sc, 0x87, 0x50); 3416 urtw_8187_write_phy_ofdm(sc, 0x89, 0x50); 3417 } 3418 } 3419 usb_pause_mtx(&sc->sc_mtx, 1); 3420fail: 3421 return (error); 3422} 3423 3424static usb_error_t 3425urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data) 3426{ 3427 struct usb_device_request req; 3428 usb_error_t error; 3429 3430 req.bmRequestType = UT_READ_VENDOR_DEVICE; 3431 req.bRequest = URTW_8187_GETREGS_REQ; 3432 USETW(req.wValue, val | 0xfe00); 3433 USETW(req.wIndex, 0); 3434 USETW(req.wLength, sizeof(uint8_t)); 3435 3436 error = urtw_do_request(sc, &req, data); 3437 return (error); 3438} 3439 3440static usb_error_t 3441urtw_write8e(struct urtw_softc *sc, int val, uint8_t data) 3442{ 3443 struct usb_device_request req; 3444 3445 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 3446 req.bRequest = URTW_8187_SETREGS_REQ; 3447 USETW(req.wValue, val | 0xfe00); 3448 USETW(req.wIndex, 0); 3449 USETW(req.wLength, sizeof(uint8_t)); 3450 3451 return (urtw_do_request(sc, &req, &data)); 3452} 3453 3454static usb_error_t 3455urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val) 3456{ 3457 uint8_t data; 3458 usb_error_t error; 3459 3460 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3461 if (error) 3462 goto fail; 3463 3464 urtw_read8_m(sc, URTW_CONFIG3, &data); 3465 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3466 urtw_write32_m(sc, URTW_ANAPARAM, val); 3467 urtw_read8_m(sc, URTW_CONFIG3, &data); 3468 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3469 3470 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3471 if (error) 3472 goto fail; 3473fail: 3474 return (error); 3475} 3476 3477static usb_error_t 3478urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val) 3479{ 3480 uint8_t data; 3481 usb_error_t error; 3482 3483 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3484 if (error) 3485 goto fail; 3486 3487 urtw_read8_m(sc, URTW_CONFIG3, &data); 3488 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3489 urtw_write32_m(sc, URTW_ANAPARAM2, val); 3490 urtw_read8_m(sc, URTW_CONFIG3, &data); 3491 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3492 3493 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3494 if (error) 3495 goto fail; 3496fail: 3497 return (error); 3498} 3499 3500static usb_error_t 3501urtw_intr_enable(struct urtw_softc *sc) 3502{ 3503 usb_error_t error; 3504 3505 urtw_write16_m(sc, URTW_INTR_MASK, 0xffff); 3506fail: 3507 return (error); 3508} 3509 3510static usb_error_t 3511urtw_intr_disable(struct urtw_softc *sc) 3512{ 3513 usb_error_t error; 3514 3515 urtw_write16_m(sc, URTW_INTR_MASK, 0); 3516fail: 3517 return (error); 3518} 3519 3520static usb_error_t 3521urtw_reset(struct urtw_softc *sc) 3522{ 3523 uint8_t data; 3524 usb_error_t error; 3525 3526 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3527 if (error) 3528 goto fail; 3529 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3530 if (error) 3531 goto fail; 3532 3533 error = urtw_intr_disable(sc); 3534 if (error) 3535 goto fail; 3536 usb_pause_mtx(&sc->sc_mtx, 100); 3537 3538 error = urtw_write8e(sc, 0x18, 0x10); 3539 if (error != 0) 3540 goto fail; 3541 error = urtw_write8e(sc, 0x18, 0x11); 3542 if (error != 0) 3543 goto fail; 3544 error = urtw_write8e(sc, 0x18, 0x00); 3545 if (error != 0) 3546 goto fail; 3547 usb_pause_mtx(&sc->sc_mtx, 100); 3548 3549 urtw_read8_m(sc, URTW_CMD, &data); 3550 data = (data & 0x2) | URTW_CMD_RST; 3551 urtw_write8_m(sc, URTW_CMD, data); 3552 usb_pause_mtx(&sc->sc_mtx, 100); 3553 3554 urtw_read8_m(sc, URTW_CMD, &data); 3555 if (data & URTW_CMD_RST) { 3556 device_printf(sc->sc_dev, "reset timeout\n"); 3557 goto fail; 3558 } 3559 3560 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 3561 if (error) 3562 goto fail; 3563 usb_pause_mtx(&sc->sc_mtx, 100); 3564 3565 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3566 if (error) 3567 goto fail; 3568 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3569 if (error) 3570 goto fail; 3571fail: 3572 return (error); 3573} 3574 3575static usb_error_t 3576urtw_led_ctl(struct urtw_softc *sc, int mode) 3577{ 3578 usb_error_t error = 0; 3579 3580 switch (sc->sc_strategy) { 3581 case URTW_SW_LED_MODE0: 3582 error = urtw_led_mode0(sc, mode); 3583 break; 3584 case URTW_SW_LED_MODE1: 3585 error = urtw_led_mode1(sc, mode); 3586 break; 3587 case URTW_SW_LED_MODE2: 3588 error = urtw_led_mode2(sc, mode); 3589 break; 3590 case URTW_SW_LED_MODE3: 3591 error = urtw_led_mode3(sc, mode); 3592 break; 3593 default: 3594 DPRINTF(sc, URTW_DEBUG_STATE, 3595 "unsupported LED mode %d\n", sc->sc_strategy); 3596 error = USB_ERR_INVAL; 3597 break; 3598 } 3599 3600 return (error); 3601} 3602 3603static usb_error_t 3604urtw_led_mode0(struct urtw_softc *sc, int mode) 3605{ 3606 3607 switch (mode) { 3608 case URTW_LED_CTL_POWER_ON: 3609 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK; 3610 break; 3611 case URTW_LED_CTL_TX: 3612 if (sc->sc_gpio_ledinprogress == 1) 3613 return (0); 3614 3615 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL; 3616 sc->sc_gpio_blinktime = 2; 3617 break; 3618 case URTW_LED_CTL_LINK: 3619 sc->sc_gpio_ledstate = URTW_LED_ON; 3620 break; 3621 default: 3622 DPRINTF(sc, URTW_DEBUG_STATE, 3623 "unsupported LED mode 0x%x", mode); 3624 return (USB_ERR_INVAL); 3625 } 3626 3627 switch (sc->sc_gpio_ledstate) { 3628 case URTW_LED_ON: 3629 if (sc->sc_gpio_ledinprogress != 0) 3630 break; 3631 urtw_led_on(sc, URTW_LED_GPIO); 3632 break; 3633 case URTW_LED_BLINK_NORMAL: 3634 if (sc->sc_gpio_ledinprogress != 0) 3635 break; 3636 sc->sc_gpio_ledinprogress = 1; 3637 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ? 3638 URTW_LED_OFF : URTW_LED_ON; 3639 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3640 break; 3641 case URTW_LED_POWER_ON_BLINK: 3642 urtw_led_on(sc, URTW_LED_GPIO); 3643 usb_pause_mtx(&sc->sc_mtx, 100); 3644 urtw_led_off(sc, URTW_LED_GPIO); 3645 break; 3646 default: 3647 DPRINTF(sc, URTW_DEBUG_STATE, 3648 "unknown LED status 0x%x", sc->sc_gpio_ledstate); 3649 return (USB_ERR_INVAL); 3650 } 3651 return (0); 3652} 3653 3654static usb_error_t 3655urtw_led_mode1(struct urtw_softc *sc, int mode) 3656{ 3657 return (USB_ERR_INVAL); 3658} 3659 3660static usb_error_t 3661urtw_led_mode2(struct urtw_softc *sc, int mode) 3662{ 3663 return (USB_ERR_INVAL); 3664} 3665 3666static usb_error_t 3667urtw_led_mode3(struct urtw_softc *sc, int mode) 3668{ 3669 return (USB_ERR_INVAL); 3670} 3671 3672static usb_error_t 3673urtw_led_on(struct urtw_softc *sc, int type) 3674{ 3675 usb_error_t error; 3676 3677 if (type == URTW_LED_GPIO) { 3678 switch (sc->sc_gpio_ledpin) { 3679 case URTW_LED_PIN_GPIO0: 3680 urtw_write8_m(sc, URTW_GPIO, 0x01); 3681 urtw_write8_m(sc, URTW_GP_ENABLE, 0x00); 3682 break; 3683 default: 3684 DPRINTF(sc, URTW_DEBUG_STATE, 3685 "unsupported LED PIN type 0x%x", 3686 sc->sc_gpio_ledpin); 3687 error = USB_ERR_INVAL; 3688 goto fail; 3689 } 3690 } else { 3691 DPRINTF(sc, URTW_DEBUG_STATE, 3692 "unsupported LED type 0x%x", type); 3693 error = USB_ERR_INVAL; 3694 goto fail; 3695 } 3696 3697 sc->sc_gpio_ledon = 1; 3698fail: 3699 return (error); 3700} 3701 3702static usb_error_t 3703urtw_led_off(struct urtw_softc *sc, int type) 3704{ 3705 usb_error_t error; 3706 3707 if (type == URTW_LED_GPIO) { 3708 switch (sc->sc_gpio_ledpin) { 3709 case URTW_LED_PIN_GPIO0: 3710 urtw_write8_m(sc, URTW_GPIO, URTW_GPIO_DATA_MAGIC1); 3711 urtw_write8_m(sc, 3712 URTW_GP_ENABLE, URTW_GP_ENABLE_DATA_MAGIC1); 3713 break; 3714 default: 3715 DPRINTF(sc, URTW_DEBUG_STATE, 3716 "unsupported LED PIN type 0x%x", 3717 sc->sc_gpio_ledpin); 3718 error = USB_ERR_INVAL; 3719 goto fail; 3720 } 3721 } else { 3722 DPRINTF(sc, URTW_DEBUG_STATE, 3723 "unsupported LED type 0x%x", type); 3724 error = USB_ERR_INVAL; 3725 goto fail; 3726 } 3727 3728 sc->sc_gpio_ledon = 0; 3729 3730fail: 3731 return (error); 3732} 3733 3734static void 3735urtw_led_ch(void *arg) 3736{ 3737 struct urtw_softc *sc = arg; 3738 struct ieee80211com *ic = &sc->sc_ic; 3739 3740 ieee80211_runtask(ic, &sc->sc_led_task); 3741} 3742 3743static void 3744urtw_ledtask(void *arg, int pending) 3745{ 3746 struct urtw_softc *sc = arg; 3747 3748 if (sc->sc_strategy != URTW_SW_LED_MODE0) { 3749 DPRINTF(sc, URTW_DEBUG_STATE, 3750 "could not process a LED strategy 0x%x", 3751 sc->sc_strategy); 3752 return; 3753 } 3754 3755 URTW_LOCK(sc); 3756 urtw_led_blink(sc); 3757 URTW_UNLOCK(sc); 3758} 3759 3760static usb_error_t 3761urtw_led_blink(struct urtw_softc *sc) 3762{ 3763 uint8_t ing = 0; 3764 usb_error_t error; 3765 3766 if (sc->sc_gpio_blinkstate == URTW_LED_ON) 3767 error = urtw_led_on(sc, URTW_LED_GPIO); 3768 else 3769 error = urtw_led_off(sc, URTW_LED_GPIO); 3770 sc->sc_gpio_blinktime--; 3771 if (sc->sc_gpio_blinktime == 0) 3772 ing = 1; 3773 else { 3774 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL && 3775 sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY && 3776 sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3) 3777 ing = 1; 3778 } 3779 if (ing == 1) { 3780 if (sc->sc_gpio_ledstate == URTW_LED_ON && 3781 sc->sc_gpio_ledon == 0) 3782 error = urtw_led_on(sc, URTW_LED_GPIO); 3783 else if (sc->sc_gpio_ledstate == URTW_LED_OFF && 3784 sc->sc_gpio_ledon == 1) 3785 error = urtw_led_off(sc, URTW_LED_GPIO); 3786 3787 sc->sc_gpio_blinktime = 0; 3788 sc->sc_gpio_ledinprogress = 0; 3789 return (0); 3790 } 3791 3792 sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ? 3793 URTW_LED_ON : URTW_LED_OFF; 3794 3795 switch (sc->sc_gpio_ledstate) { 3796 case URTW_LED_BLINK_NORMAL: 3797 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3798 break; 3799 default: 3800 DPRINTF(sc, URTW_DEBUG_STATE, 3801 "unknown LED status 0x%x", 3802 sc->sc_gpio_ledstate); 3803 return (USB_ERR_INVAL); 3804 } 3805 return (0); 3806} 3807 3808static usb_error_t 3809urtw_rx_enable(struct urtw_softc *sc) 3810{ 3811 uint8_t data; 3812 usb_error_t error; 3813 3814 usbd_transfer_start((sc->sc_flags & URTW_RTL8187B) ? 3815 sc->sc_xfer[URTW_8187B_BULK_RX] : sc->sc_xfer[URTW_8187L_BULK_RX]); 3816 3817 error = urtw_rx_setconf(sc); 3818 if (error != 0) 3819 goto fail; 3820 3821 if ((sc->sc_flags & URTW_RTL8187B) == 0) { 3822 urtw_read8_m(sc, URTW_CMD, &data); 3823 urtw_write8_m(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE); 3824 } 3825fail: 3826 return (error); 3827} 3828 3829static usb_error_t 3830urtw_tx_enable(struct urtw_softc *sc) 3831{ 3832 uint8_t data8; 3833 uint32_t data; 3834 usb_error_t error; 3835 3836 if (sc->sc_flags & URTW_RTL8187B) { 3837 urtw_read32_m(sc, URTW_TX_CONF, &data); 3838 data &= ~URTW_TX_LOOPBACK_MASK; 3839 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3840 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3841 data &= ~URTW_TX_SWPLCPLEN; 3842 data |= URTW_TX_HW_SEQNUM | URTW_TX_DISREQQSIZE | 3843 (7 << 8) | /* short retry limit */ 3844 (7 << 0) | /* long retry limit */ 3845 (7 << 21); /* MAX TX DMA */ 3846 urtw_write32_m(sc, URTW_TX_CONF, data); 3847 3848 urtw_read8_m(sc, URTW_MSR, &data8); 3849 data8 |= URTW_MSR_LINK_ENEDCA; 3850 urtw_write8_m(sc, URTW_MSR, data8); 3851 return (error); 3852 } 3853 3854 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3855 data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY); 3856 urtw_write8_m(sc, URTW_CW_CONF, data8); 3857 3858 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3859 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN; 3860 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 3861 data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT; 3862 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3863 3864 urtw_read32_m(sc, URTW_TX_CONF, &data); 3865 data &= ~URTW_TX_LOOPBACK_MASK; 3866 data |= URTW_TX_LOOPBACK_NONE; 3867 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3868 data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT; 3869 data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT; 3870 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3871 data |= URTW_TX_MXDMA_2048 | URTW_TX_CWMIN | URTW_TX_DISCW; 3872 data &= ~URTW_TX_SWPLCPLEN; 3873 data |= URTW_TX_NOICV; 3874 urtw_write32_m(sc, URTW_TX_CONF, data); 3875 3876 urtw_read8_m(sc, URTW_CMD, &data8); 3877 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 3878fail: 3879 return (error); 3880} 3881 3882static usb_error_t 3883urtw_rx_setconf(struct urtw_softc *sc) 3884{ 3885 struct ieee80211com *ic = &sc->sc_ic; 3886 uint32_t data; 3887 usb_error_t error; 3888 3889 urtw_read32_m(sc, URTW_RX, &data); 3890 data = data &~ URTW_RX_FILTER_MASK; 3891 if (sc->sc_flags & URTW_RTL8187B) { 3892 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA | 3893 URTW_RX_FILTER_MCAST | URTW_RX_FILTER_BCAST | 3894 URTW_RX_FIFO_THRESHOLD_NONE | 3895 URTW_MAX_RX_DMA_2048 | 3896 URTW_RX_AUTORESETPHY | URTW_RCR_ONLYERLPKT; 3897 } else { 3898 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA; 3899 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST; 3900 3901 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 3902 data = data | URTW_RX_FILTER_ICVERR; 3903 data = data | URTW_RX_FILTER_PWR; 3904 } 3905 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR) 3906 data = data | URTW_RX_FILTER_CRCERR; 3907 3908 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK; 3909 data = data | URTW_RX_FIFO_THRESHOLD_NONE | 3910 URTW_RX_AUTORESETPHY; 3911 data = data &~ URTW_MAX_RX_DMA_MASK; 3912 data = data | URTW_MAX_RX_DMA_2048 | URTW_RCR_ONLYERLPKT; 3913 } 3914 3915 /* XXX allmulti should not be checked here... */ 3916 if (ic->ic_opmode == IEEE80211_M_MONITOR || 3917 ic->ic_promisc > 0 || ic->ic_allmulti > 0) { 3918 data = data | URTW_RX_FILTER_CTL; 3919 data = data | URTW_RX_FILTER_ALLMAC; 3920 } else { 3921 data = data | URTW_RX_FILTER_NICMAC; 3922 data = data | URTW_RX_CHECK_BSSID; 3923 } 3924 3925 urtw_write32_m(sc, URTW_RX, data); 3926fail: 3927 return (error); 3928} 3929 3930static struct mbuf * 3931urtw_rxeof(struct usb_xfer *xfer, struct urtw_data *data, int *rssi_p, 3932 int8_t *nf_p) 3933{ 3934 int actlen, flen, rssi; 3935 struct ieee80211_frame *wh; 3936 struct mbuf *m, *mnew; 3937 struct urtw_softc *sc = data->sc; 3938 struct ieee80211com *ic = &sc->sc_ic; 3939 uint8_t noise = 0, rate; 3940 3941 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 3942 3943 if (sc->sc_flags & URTW_RTL8187B) { 3944 struct urtw_8187b_rxhdr *rx; 3945 3946 if (actlen < sizeof(*rx) + IEEE80211_ACK_LEN) 3947 goto fail; 3948 3949 rx = (struct urtw_8187b_rxhdr *)(data->buf + 3950 (actlen - (sizeof(struct urtw_8187b_rxhdr)))); 3951 flen = le32toh(rx->flag) & 0xfff; 3952 if (flen > actlen - sizeof(*rx)) 3953 goto fail; 3954 3955 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf; 3956 /* XXX correct? */ 3957 rssi = rx->rssi & URTW_RX_RSSI_MASK; 3958 noise = rx->noise; 3959 } else { 3960 struct urtw_8187l_rxhdr *rx; 3961 3962 if (actlen < sizeof(*rx) + IEEE80211_ACK_LEN) 3963 goto fail; 3964 3965 rx = (struct urtw_8187l_rxhdr *)(data->buf + 3966 (actlen - (sizeof(struct urtw_8187l_rxhdr)))); 3967 flen = le32toh(rx->flag) & 0xfff; 3968 if (flen > actlen - sizeof(*rx)) 3969 goto fail; 3970 3971 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf; 3972 /* XXX correct? */ 3973 rssi = rx->rssi & URTW_RX_8187L_RSSI_MASK; 3974 noise = rx->noise; 3975 } 3976 3977 if (flen < IEEE80211_ACK_LEN) 3978 goto fail; 3979 3980 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 3981 if (mnew == NULL) 3982 goto fail; 3983 3984 m = data->m; 3985 data->m = mnew; 3986 data->buf = mtod(mnew, uint8_t *); 3987 3988 /* finalize mbuf */ 3989 m->m_pkthdr.len = m->m_len = flen - IEEE80211_CRC_LEN; 3990 3991 if (ieee80211_radiotap_active(ic)) { 3992 struct urtw_rx_radiotap_header *tap = &sc->sc_rxtap; 3993 3994 tap->wr_flags = 0; 3995 tap->wr_dbm_antsignal = (int8_t)rssi; 3996 } 3997 3998 wh = mtod(m, struct ieee80211_frame *); 3999 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_DATA) 4000 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate; 4001 4002 *rssi_p = rssi; 4003 *nf_p = noise; /* XXX correct? */ 4004 4005 return (m); 4006 4007fail: 4008 counter_u64_add(ic->ic_ierrors, 1); 4009 return (NULL); 4010} 4011 4012static void 4013urtw_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 4014{ 4015 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4016 struct ieee80211com *ic = &sc->sc_ic; 4017 struct ieee80211_node *ni; 4018 struct mbuf *m = NULL; 4019 struct urtw_data *data; 4020 int8_t nf = -95; 4021 int rssi = 1; 4022 4023 URTW_ASSERT_LOCKED(sc); 4024 4025 switch (USB_GET_STATE(xfer)) { 4026 case USB_ST_TRANSFERRED: 4027 data = STAILQ_FIRST(&sc->sc_rx_active); 4028 if (data == NULL) 4029 goto setup; 4030 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4031 m = urtw_rxeof(xfer, data, &rssi, &nf); 4032 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4033 /* FALLTHROUGH */ 4034 case USB_ST_SETUP: 4035setup: 4036 data = STAILQ_FIRST(&sc->sc_rx_inactive); 4037 if (data == NULL) { 4038 KASSERT(m == NULL, ("mbuf isn't NULL")); 4039 return; 4040 } 4041 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 4042 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 4043 usbd_xfer_set_frame_data(xfer, 0, data->buf, 4044 usbd_xfer_max_len(xfer)); 4045 usbd_transfer_submit(xfer); 4046 4047 /* 4048 * To avoid LOR we should unlock our private mutex here to call 4049 * ieee80211_input() because here is at the end of a USB 4050 * callback and safe to unlock. 4051 */ 4052 URTW_UNLOCK(sc); 4053 if (m != NULL) { 4054 if (m->m_pkthdr.len >= 4055 sizeof(struct ieee80211_frame_min)) { 4056 ni = ieee80211_find_rxnode(ic, 4057 mtod(m, struct ieee80211_frame_min *)); 4058 } else 4059 ni = NULL; 4060 4061 if (ni != NULL) { 4062 (void) ieee80211_input(ni, m, rssi, nf); 4063 /* node is no longer needed */ 4064 ieee80211_free_node(ni); 4065 } else 4066 (void) ieee80211_input_all(ic, m, rssi, nf); 4067 m = NULL; 4068 } 4069 URTW_LOCK(sc); 4070 break; 4071 default: 4072 /* needs it to the inactive queue due to a error. */ 4073 data = STAILQ_FIRST(&sc->sc_rx_active); 4074 if (data != NULL) { 4075 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4076 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4077 } 4078 if (error != USB_ERR_CANCELLED) { 4079 usbd_xfer_set_stall(xfer); 4080 counter_u64_add(ic->ic_ierrors, 1); 4081 goto setup; 4082 } 4083 break; 4084 } 4085} 4086 4087#define URTW_STATUS_TYPE_TXCLOSE 1 4088#define URTW_STATUS_TYPE_BEACON_INTR 0 4089 4090static void 4091urtw_txstatus_eof(struct usb_xfer *xfer) 4092{ 4093 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4094 struct ieee80211com *ic = &sc->sc_ic; 4095 int actlen, type, pktretry, seq; 4096 uint64_t val; 4097 4098 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 4099 4100 if (actlen != sizeof(uint64_t)) 4101 return; 4102 4103 val = le64toh(sc->sc_txstatus); 4104 type = (val >> 30) & 0x3; 4105 if (type == URTW_STATUS_TYPE_TXCLOSE) { 4106 pktretry = val & 0xff; 4107 seq = (val >> 16) & 0xff; 4108 if (pktretry == URTW_TX_MAXRETRY) 4109 counter_u64_add(ic->ic_oerrors, 1); 4110 DPRINTF(sc, URTW_DEBUG_TXSTATUS, "pktretry %d seq %#x\n", 4111 pktretry, seq); 4112 } 4113} 4114 4115static void 4116urtw_bulk_tx_status_callback(struct usb_xfer *xfer, usb_error_t error) 4117{ 4118 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4119 struct ieee80211com *ic = &sc->sc_ic; 4120 void *dma_buf = usbd_xfer_get_frame_buffer(xfer, 0); 4121 4122 URTW_ASSERT_LOCKED(sc); 4123 4124 switch (USB_GET_STATE(xfer)) { 4125 case USB_ST_TRANSFERRED: 4126 urtw_txstatus_eof(xfer); 4127 /* FALLTHROUGH */ 4128 case USB_ST_SETUP: 4129setup: 4130 memcpy(dma_buf, &sc->sc_txstatus, sizeof(uint64_t)); 4131 usbd_xfer_set_frame_len(xfer, 0, sizeof(uint64_t)); 4132 usbd_transfer_submit(xfer); 4133 break; 4134 default: 4135 if (error != USB_ERR_CANCELLED) { 4136 usbd_xfer_set_stall(xfer); 4137 counter_u64_add(ic->ic_ierrors, 1); 4138 goto setup; 4139 } 4140 break; 4141 } 4142} 4143 4144static void 4145urtw_txeof(struct usb_xfer *xfer, struct urtw_data *data) 4146{ 4147 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4148 4149 URTW_ASSERT_LOCKED(sc); 4150 4151 if (data->m) { 4152 /* XXX status? */ 4153 ieee80211_tx_complete(data->ni, data->m, 0); 4154 data->m = NULL; 4155 data->ni = NULL; 4156 } 4157 sc->sc_txtimer = 0; 4158} 4159 4160static void 4161urtw_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 4162{ 4163 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4164 struct urtw_data *data; 4165 4166 URTW_ASSERT_LOCKED(sc); 4167 4168 switch (USB_GET_STATE(xfer)) { 4169 case USB_ST_TRANSFERRED: 4170 data = STAILQ_FIRST(&sc->sc_tx_active); 4171 if (data == NULL) 4172 goto setup; 4173 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 4174 urtw_txeof(xfer, data); 4175 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 4176 /* FALLTHROUGH */ 4177 case USB_ST_SETUP: 4178setup: 4179 data = STAILQ_FIRST(&sc->sc_tx_pending); 4180 if (data == NULL) { 4181 DPRINTF(sc, URTW_DEBUG_XMIT, 4182 "%s: empty pending queue\n", __func__); 4183 return; 4184 } 4185 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 4186 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 4187 4188 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 4189 usbd_transfer_submit(xfer); 4190 4191 urtw_start(sc); 4192 break; 4193 default: 4194 data = STAILQ_FIRST(&sc->sc_tx_active); 4195 if (data == NULL) 4196 goto setup; 4197 if (data->ni != NULL) { 4198 if_inc_counter(data->ni->ni_vap->iv_ifp, 4199 IFCOUNTER_OERRORS, 1); 4200 ieee80211_free_node(data->ni); 4201 data->ni = NULL; 4202 } 4203 if (error != USB_ERR_CANCELLED) { 4204 usbd_xfer_set_stall(xfer); 4205 goto setup; 4206 } 4207 break; 4208 } 4209} 4210 4211static struct urtw_data * 4212_urtw_getbuf(struct urtw_softc *sc) 4213{ 4214 struct urtw_data *bf; 4215 4216 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 4217 if (bf != NULL) 4218 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 4219 else 4220 bf = NULL; 4221 if (bf == NULL) 4222 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: %s\n", __func__, 4223 "out of xmit buffers"); 4224 return (bf); 4225} 4226 4227static struct urtw_data * 4228urtw_getbuf(struct urtw_softc *sc) 4229{ 4230 struct urtw_data *bf; 4231 4232 URTW_ASSERT_LOCKED(sc); 4233 4234 bf = _urtw_getbuf(sc); 4235 if (bf == NULL) 4236 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: stop queue\n", __func__); 4237 return (bf); 4238} 4239 4240static int 4241urtw_isbmode(uint16_t rate) 4242{ 4243 4244 return ((rate <= 22 && rate != 12 && rate != 18) || 4245 rate == 44) ? (1) : (0); 4246} 4247 4248static uint16_t 4249urtw_rate2dbps(uint16_t rate) 4250{ 4251 4252 switch(rate) { 4253 case 12: 4254 case 18: 4255 case 24: 4256 case 36: 4257 case 48: 4258 case 72: 4259 case 96: 4260 case 108: 4261 return (rate * 2); 4262 default: 4263 break; 4264 } 4265 return (24); 4266} 4267 4268static int 4269urtw_compute_txtime(uint16_t framelen, uint16_t rate, 4270 uint8_t ismgt, uint8_t isshort) 4271{ 4272 uint16_t ceiling, frametime, n_dbps; 4273 4274 if (urtw_isbmode(rate)) { 4275 if (ismgt || !isshort || rate == 2) 4276 frametime = (uint16_t)(144 + 48 + 4277 (framelen * 8 / (rate / 2))); 4278 else 4279 frametime = (uint16_t)(72 + 24 + 4280 (framelen * 8 / (rate / 2))); 4281 if ((framelen * 8 % (rate / 2)) != 0) 4282 frametime++; 4283 } else { 4284 n_dbps = urtw_rate2dbps(rate); 4285 ceiling = (16 + 8 * framelen + 6) / n_dbps 4286 + (((16 + 8 * framelen + 6) % n_dbps) ? 1 : 0); 4287 frametime = (uint16_t)(16 + 4 + 4 * ceiling + 6); 4288 } 4289 return (frametime); 4290} 4291 4292/* 4293 * Callback from the 802.11 layer to update the 4294 * slot time based on the current setting. 4295 */ 4296static void 4297urtw_updateslot(struct ieee80211com *ic) 4298{ 4299 struct urtw_softc *sc = ic->ic_softc; 4300 4301 ieee80211_runtask(ic, &sc->sc_updateslot_task); 4302} 4303 4304static void 4305urtw_updateslottask(void *arg, int pending) 4306{ 4307 struct urtw_softc *sc = arg; 4308 struct ieee80211com *ic = &sc->sc_ic; 4309 int error; 4310 4311 URTW_LOCK(sc); 4312 if ((sc->sc_flags & URTW_RUNNING) == 0) { 4313 URTW_UNLOCK(sc); 4314 return; 4315 } 4316 if (sc->sc_flags & URTW_RTL8187B) { 4317 urtw_write8_m(sc, URTW_SIFS, 0x22); 4318 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) 4319 urtw_write8_m(sc, URTW_SLOT, IEEE80211_DUR_SHSLOT); 4320 else 4321 urtw_write8_m(sc, URTW_SLOT, IEEE80211_DUR_SLOT); 4322 urtw_write8_m(sc, URTW_8187B_EIFS, 0x5b); 4323 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 0x5b); 4324 } else { 4325 urtw_write8_m(sc, URTW_SIFS, 0x22); 4326 if (sc->sc_state == IEEE80211_S_ASSOC && 4327 ic->ic_flags & IEEE80211_F_SHSLOT) 4328 urtw_write8_m(sc, URTW_SLOT, IEEE80211_DUR_SHSLOT); 4329 else 4330 urtw_write8_m(sc, URTW_SLOT, IEEE80211_DUR_SLOT); 4331 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) { 4332 urtw_write8_m(sc, URTW_DIFS, 0x14); 4333 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14); 4334 urtw_write8_m(sc, URTW_CW_VAL, 0x73); 4335 } else { 4336 urtw_write8_m(sc, URTW_DIFS, 0x24); 4337 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24); 4338 urtw_write8_m(sc, URTW_CW_VAL, 0xa5); 4339 } 4340 } 4341fail: 4342 URTW_UNLOCK(sc); 4343} 4344 4345static void 4346urtw_sysctl_node(struct urtw_softc *sc) 4347{ 4348#define URTW_SYSCTL_STAT_ADD32(c, h, n, p, d) \ 4349 SYSCTL_ADD_UINT(c, h, OID_AUTO, n, CTLFLAG_RD, p, 0, d) 4350 struct sysctl_ctx_list *ctx; 4351 struct sysctl_oid_list *child, *parent; 4352 struct sysctl_oid *tree; 4353 struct urtw_stats *stats = &sc->sc_stats; 4354 4355 ctx = device_get_sysctl_ctx(sc->sc_dev); 4356 child = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->sc_dev)); 4357 4358 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD, 4359 NULL, "URTW statistics"); 4360 parent = SYSCTL_CHILDREN(tree); 4361 4362 /* Tx statistics. */ 4363 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "tx", CTLFLAG_RD, 4364 NULL, "Tx MAC statistics"); 4365 child = SYSCTL_CHILDREN(tree); 4366 URTW_SYSCTL_STAT_ADD32(ctx, child, "1m", &stats->txrates[0], 4367 "1 Mbit/s"); 4368 URTW_SYSCTL_STAT_ADD32(ctx, child, "2m", &stats->txrates[1], 4369 "2 Mbit/s"); 4370 URTW_SYSCTL_STAT_ADD32(ctx, child, "5.5m", &stats->txrates[2], 4371 "5.5 Mbit/s"); 4372 URTW_SYSCTL_STAT_ADD32(ctx, child, "6m", &stats->txrates[4], 4373 "6 Mbit/s"); 4374 URTW_SYSCTL_STAT_ADD32(ctx, child, "9m", &stats->txrates[5], 4375 "9 Mbit/s"); 4376 URTW_SYSCTL_STAT_ADD32(ctx, child, "11m", &stats->txrates[3], 4377 "11 Mbit/s"); 4378 URTW_SYSCTL_STAT_ADD32(ctx, child, "12m", &stats->txrates[6], 4379 "12 Mbit/s"); 4380 URTW_SYSCTL_STAT_ADD32(ctx, child, "18m", &stats->txrates[7], 4381 "18 Mbit/s"); 4382 URTW_SYSCTL_STAT_ADD32(ctx, child, "24m", &stats->txrates[8], 4383 "24 Mbit/s"); 4384 URTW_SYSCTL_STAT_ADD32(ctx, child, "36m", &stats->txrates[9], 4385 "36 Mbit/s"); 4386 URTW_SYSCTL_STAT_ADD32(ctx, child, "48m", &stats->txrates[10], 4387 "48 Mbit/s"); 4388 URTW_SYSCTL_STAT_ADD32(ctx, child, "54m", &stats->txrates[11], 4389 "54 Mbit/s"); 4390#undef URTW_SYSCTL_STAT_ADD32 4391} 4392 4393static device_method_t urtw_methods[] = { 4394 DEVMETHOD(device_probe, urtw_match), 4395 DEVMETHOD(device_attach, urtw_attach), 4396 DEVMETHOD(device_detach, urtw_detach), 4397 DEVMETHOD_END 4398}; 4399static driver_t urtw_driver = { 4400 .name = "urtw", 4401 .methods = urtw_methods, 4402 .size = sizeof(struct urtw_softc) 4403}; 4404static devclass_t urtw_devclass; 4405 4406DRIVER_MODULE(urtw, uhub, urtw_driver, urtw_devclass, NULL, 0); 4407MODULE_DEPEND(urtw, wlan, 1, 1, 1); 4408MODULE_DEPEND(urtw, usb, 1, 1, 1); 4409MODULE_VERSION(urtw, 1); 4410USB_PNP_HOST_INFO(urtw_devs); 4411