1/*- 2 * Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org> 3 * 4 * Permission to use, copy, modify, and distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#include <sys/cdefs.h> 18__FBSDID("$FreeBSD: stable/11/sys/dev/usb/wlan/if_urtw.c 347511 2019-05-12 12:30:45Z avos $"); 19#include <sys/param.h> 20#include <sys/sockio.h> 21#include <sys/sysctl.h> 22#include <sys/lock.h> 23#include <sys/mutex.h> 24#include <sys/mbuf.h> 25#include <sys/kernel.h> 26#include <sys/socket.h> 27#include <sys/systm.h> 28#include <sys/malloc.h> 29#include <sys/module.h> 30#include <sys/bus.h> 31#include <sys/endian.h> 32#include <sys/kdb.h> 33 34#include <net/if.h> 35#include <net/if_var.h> 36#include <net/if_arp.h> 37#include <net/ethernet.h> 38#include <net/if_dl.h> 39#include <net/if_media.h> 40#include <net/if_types.h> 41 42#ifdef INET 43#include <netinet/in.h> 44#include <netinet/in_systm.h> 45#include <netinet/in_var.h> 46#include <netinet/if_ether.h> 47#include <netinet/ip.h> 48#endif 49 50#include <net80211/ieee80211_var.h> 51#include <net80211/ieee80211_regdomain.h> 52#include <net80211/ieee80211_radiotap.h> 53 54#include <dev/usb/usb.h> 55#include <dev/usb/usbdi.h> 56#include "usbdevs.h" 57 58#include <dev/usb/wlan/if_urtwreg.h> 59#include <dev/usb/wlan/if_urtwvar.h> 60 61static SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW, 0, "USB Realtek 8187L"); 62#ifdef URTW_DEBUG 63int urtw_debug = 0; 64SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RWTUN, &urtw_debug, 0, 65 "control debugging printfs"); 66enum { 67 URTW_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 68 URTW_DEBUG_RECV = 0x00000002, /* basic recv operation */ 69 URTW_DEBUG_RESET = 0x00000004, /* reset processing */ 70 URTW_DEBUG_TX_PROC = 0x00000008, /* tx ISR proc */ 71 URTW_DEBUG_RX_PROC = 0x00000010, /* rx ISR proc */ 72 URTW_DEBUG_STATE = 0x00000020, /* 802.11 state transitions */ 73 URTW_DEBUG_STAT = 0x00000040, /* statistic */ 74 URTW_DEBUG_INIT = 0x00000080, /* initialization of dev */ 75 URTW_DEBUG_TXSTATUS = 0x00000100, /* tx status */ 76 URTW_DEBUG_ANY = 0xffffffff 77}; 78#define DPRINTF(sc, m, fmt, ...) do { \ 79 if (sc->sc_debug & (m)) \ 80 printf(fmt, __VA_ARGS__); \ 81} while (0) 82#else 83#define DPRINTF(sc, m, fmt, ...) do { \ 84 (void) sc; \ 85} while (0) 86#endif 87static int urtw_preamble_mode = URTW_PREAMBLE_MODE_LONG; 88SYSCTL_INT(_hw_usb_urtw, OID_AUTO, preamble_mode, CTLFLAG_RWTUN, 89 &urtw_preamble_mode, 0, "set the preable mode (long or short)"); 90 91/* recognized device vendors/products */ 92#define urtw_lookup(v, p) \ 93 ((const struct urtw_type *)usb_lookup(urtw_devs, v, p)) 94#define URTW_DEV_B(v,p) \ 95 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187B) } 96#define URTW_DEV_L(v,p) \ 97 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187L) } 98#define URTW_REV_RTL8187B 0 99#define URTW_REV_RTL8187L 1 100static const STRUCT_USB_HOST_ID urtw_devs[] = { 101 URTW_DEV_B(NETGEAR, WG111V3), 102 URTW_DEV_B(REALTEK, RTL8187B_0), 103 URTW_DEV_B(REALTEK, RTL8187B_1), 104 URTW_DEV_B(REALTEK, RTL8187B_2), 105 URTW_DEV_B(SITECOMEU, WL168V4), 106 URTW_DEV_L(ASUS, P5B_WIFI), 107 URTW_DEV_L(BELKIN, F5D7050E), 108 URTW_DEV_L(LINKSYS4, WUSB54GCV2), 109 URTW_DEV_L(NETGEAR, WG111V2), 110 URTW_DEV_L(REALTEK, RTL8187), 111 URTW_DEV_L(SITECOMEU, WL168V1), 112 URTW_DEV_L(SURECOM, EP9001G2A), 113 { USB_VPI(USB_VENDOR_OVISLINK, 0x8187, URTW_REV_RTL8187L) }, 114 { USB_VPI(USB_VENDOR_DICKSMITH, 0x9401, URTW_REV_RTL8187L) }, 115 { USB_VPI(USB_VENDOR_HP, 0xca02, URTW_REV_RTL8187L) }, 116 { USB_VPI(USB_VENDOR_LOGITEC, 0x010c, URTW_REV_RTL8187L) }, 117 { USB_VPI(USB_VENDOR_NETGEAR, 0x6100, URTW_REV_RTL8187L) }, 118 { USB_VPI(USB_VENDOR_SPHAIRON, 0x0150, URTW_REV_RTL8187L) }, 119 { USB_VPI(USB_VENDOR_QCOM, 0x6232, URTW_REV_RTL8187L) }, 120#undef URTW_DEV_L 121#undef URTW_DEV_B 122}; 123 124#define urtw_read8_m(sc, val, data) do { \ 125 error = urtw_read8_c(sc, val, data); \ 126 if (error != 0) \ 127 goto fail; \ 128} while (0) 129#define urtw_write8_m(sc, val, data) do { \ 130 error = urtw_write8_c(sc, val, data); \ 131 if (error != 0) \ 132 goto fail; \ 133} while (0) 134#define urtw_read16_m(sc, val, data) do { \ 135 error = urtw_read16_c(sc, val, data); \ 136 if (error != 0) \ 137 goto fail; \ 138} while (0) 139#define urtw_write16_m(sc, val, data) do { \ 140 error = urtw_write16_c(sc, val, data); \ 141 if (error != 0) \ 142 goto fail; \ 143} while (0) 144#define urtw_read32_m(sc, val, data) do { \ 145 error = urtw_read32_c(sc, val, data); \ 146 if (error != 0) \ 147 goto fail; \ 148} while (0) 149#define urtw_write32_m(sc, val, data) do { \ 150 error = urtw_write32_c(sc, val, data); \ 151 if (error != 0) \ 152 goto fail; \ 153} while (0) 154#define urtw_8187_write_phy_ofdm(sc, val, data) do { \ 155 error = urtw_8187_write_phy_ofdm_c(sc, val, data); \ 156 if (error != 0) \ 157 goto fail; \ 158} while (0) 159#define urtw_8187_write_phy_cck(sc, val, data) do { \ 160 error = urtw_8187_write_phy_cck_c(sc, val, data); \ 161 if (error != 0) \ 162 goto fail; \ 163} while (0) 164#define urtw_8225_write(sc, val, data) do { \ 165 error = urtw_8225_write_c(sc, val, data); \ 166 if (error != 0) \ 167 goto fail; \ 168} while (0) 169 170struct urtw_pair { 171 uint32_t reg; 172 uint32_t val; 173}; 174 175static uint8_t urtw_8225_agc[] = { 176 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b, 177 0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 178 0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85, 179 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a, 180 0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 181 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24, 182 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 183 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 184 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 185 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 186 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 187 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 188}; 189 190static uint8_t urtw_8225z2_agc[] = { 191 0x5e, 0x5e, 0x5e, 0x5e, 0x5d, 0x5b, 0x59, 0x57, 0x55, 0x53, 0x51, 192 0x4f, 0x4d, 0x4b, 0x49, 0x47, 0x45, 0x43, 0x41, 0x3f, 0x3d, 0x3b, 193 0x39, 0x37, 0x35, 0x33, 0x31, 0x2f, 0x2d, 0x2b, 0x29, 0x27, 0x25, 194 0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 0x15, 0x13, 0x11, 0x0f, 195 0x0d, 0x0b, 0x09, 0x07, 0x05, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 196 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x19, 0x19, 197 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x20, 0x21, 0x22, 0x23, 198 0x24, 0x25, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29, 0x2a, 0x2a, 199 0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2d, 200 0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x31, 0x31, 201 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 202 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31 203}; 204 205static uint32_t urtw_8225_channel[] = { 206 0x0000, /* dummy channel 0 */ 207 0x085c, /* 1 */ 208 0x08dc, /* 2 */ 209 0x095c, /* 3 */ 210 0x09dc, /* 4 */ 211 0x0a5c, /* 5 */ 212 0x0adc, /* 6 */ 213 0x0b5c, /* 7 */ 214 0x0bdc, /* 8 */ 215 0x0c5c, /* 9 */ 216 0x0cdc, /* 10 */ 217 0x0d5c, /* 11 */ 218 0x0ddc, /* 12 */ 219 0x0e5c, /* 13 */ 220 0x0f72, /* 14 */ 221}; 222 223static uint8_t urtw_8225_gain[] = { 224 0x23, 0x88, 0x7c, 0xa5, /* -82dbm */ 225 0x23, 0x88, 0x7c, 0xb5, /* -82dbm */ 226 0x23, 0x88, 0x7c, 0xc5, /* -82dbm */ 227 0x33, 0x80, 0x79, 0xc5, /* -78dbm */ 228 0x43, 0x78, 0x76, 0xc5, /* -74dbm */ 229 0x53, 0x60, 0x73, 0xc5, /* -70dbm */ 230 0x63, 0x58, 0x70, 0xc5, /* -66dbm */ 231}; 232 233static struct urtw_pair urtw_8225_rf_part1[] = { 234 { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 235 { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a }, 236 { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 }, 237 { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 }, 238}; 239 240static struct urtw_pair urtw_8225_rf_part2[] = { 241 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 242 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 243 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 }, 244 { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 }, 245 { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 }, 246 { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, { 0x18, 0xef }, 247 { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x76 }, { 0x1c, 0x04 }, 248 { 0x1e, 0x95 }, { 0x1f, 0x75 }, { 0x20, 0x1f }, { 0x21, 0x27 }, 249 { 0x22, 0x16 }, { 0x24, 0x46 }, { 0x25, 0x20 }, { 0x26, 0x90 }, 250 { 0x27, 0x88 } 251}; 252 253static struct urtw_pair urtw_8225_rf_part3[] = { 254 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 255 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x10, 0x9b }, 256 { 0x11, 0x88 }, { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, 257 { 0x1a, 0xa0 }, { 0x1b, 0x08 }, { 0x40, 0x86 }, { 0x41, 0x8d }, 258 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x1f }, { 0x45, 0x1e }, 259 { 0x46, 0x1a }, { 0x47, 0x15 }, { 0x48, 0x10 }, { 0x49, 0x0a }, 260 { 0x4a, 0x05 }, { 0x4b, 0x02 }, { 0x4c, 0x05 } 261}; 262 263static uint16_t urtw_8225_rxgain[] = { 264 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 265 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 266 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 267 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 268 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 269 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 270 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 271 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 272 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 273 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 274 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3, 275 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb 276}; 277 278static uint8_t urtw_8225_threshold[] = { 279 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd, 280}; 281 282static uint8_t urtw_8225_tx_gain_cck_ofdm[] = { 283 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e 284}; 285 286static uint8_t urtw_8225_txpwr_cck[] = { 287 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02, 288 0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02, 289 0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02, 290 0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02, 291 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03, 292 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03 293}; 294 295static uint8_t urtw_8225_txpwr_cck_ch14[] = { 296 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00, 297 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00, 298 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00, 299 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00, 300 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00, 301 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00 302}; 303 304static uint8_t urtw_8225_txpwr_ofdm[]={ 305 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4 306}; 307 308static uint8_t urtw_8225v2_gain_bg[]={ 309 0x23, 0x15, 0xa5, /* -82-1dbm */ 310 0x23, 0x15, 0xb5, /* -82-2dbm */ 311 0x23, 0x15, 0xc5, /* -82-3dbm */ 312 0x33, 0x15, 0xc5, /* -78dbm */ 313 0x43, 0x15, 0xc5, /* -74dbm */ 314 0x53, 0x15, 0xc5, /* -70dbm */ 315 0x63, 0x15, 0xc5, /* -66dbm */ 316}; 317 318static struct urtw_pair urtw_8225v2_rf_part1[] = { 319 { 0x00, 0x02bf }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 320 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 321 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 322 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 323}; 324 325static struct urtw_pair urtw_8225v2b_rf_part0[] = { 326 { 0x00, 0x00b7 }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 327 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 328 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 329 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 330}; 331 332static struct urtw_pair urtw_8225v2b_rf_part1[] = { 333 {0x0f0, 0x32}, {0x0f1, 0x32}, {0x0f2, 0x00}, 334 {0x0f3, 0x00}, {0x0f4, 0x32}, {0x0f5, 0x43}, 335 {0x0f6, 0x00}, {0x0f7, 0x00}, {0x0f8, 0x46}, 336 {0x0f9, 0xa4}, {0x0fa, 0x00}, {0x0fb, 0x00}, 337 {0x0fc, 0x96}, {0x0fd, 0xa4}, {0x0fe, 0x00}, 338 {0x0ff, 0x00}, {0x158, 0x4b}, {0x159, 0x00}, 339 {0x15a, 0x4b}, {0x15b, 0x00}, {0x160, 0x4b}, 340 {0x161, 0x09}, {0x162, 0x4b}, {0x163, 0x09}, 341 {0x1ce, 0x0f}, {0x1cf, 0x00}, {0x1e0, 0xff}, 342 {0x1e1, 0x0f}, {0x1e2, 0x00}, {0x1f0, 0x4e}, 343 {0x1f1, 0x01}, {0x1f2, 0x02}, {0x1f3, 0x03}, 344 {0x1f4, 0x04}, {0x1f5, 0x05}, {0x1f6, 0x06}, 345 {0x1f7, 0x07}, {0x1f8, 0x08}, {0x24e, 0x00}, 346 {0x20c, 0x04}, {0x221, 0x61}, {0x222, 0x68}, 347 {0x223, 0x6f}, {0x224, 0x76}, {0x225, 0x7d}, 348 {0x226, 0x84}, {0x227, 0x8d}, {0x24d, 0x08}, 349 {0x250, 0x05}, {0x251, 0xf5}, {0x252, 0x04}, 350 {0x253, 0xa0}, {0x254, 0x1f}, {0x255, 0x23}, 351 {0x256, 0x45}, {0x257, 0x67}, {0x258, 0x08}, 352 {0x259, 0x08}, {0x25a, 0x08}, {0x25b, 0x08}, 353 {0x260, 0x08}, {0x261, 0x08}, {0x262, 0x08}, 354 {0x263, 0x08}, {0x264, 0xcf}, {0x272, 0x56}, 355 {0x273, 0x9a}, {0x034, 0xf0}, {0x035, 0x0f}, 356 {0x05b, 0x40}, {0x084, 0x88}, {0x085, 0x24}, 357 {0x088, 0x54}, {0x08b, 0xb8}, {0x08c, 0x07}, 358 {0x08d, 0x00}, {0x094, 0x1b}, {0x095, 0x12}, 359 {0x096, 0x00}, {0x097, 0x06}, {0x09d, 0x1a}, 360 {0x09f, 0x10}, {0x0b4, 0x22}, {0x0be, 0x80}, 361 {0x0db, 0x00}, {0x0ee, 0x00}, {0x091, 0x03}, 362 {0x24c, 0x00}, {0x39f, 0x00}, {0x08c, 0x01}, 363 {0x08d, 0x10}, {0x08e, 0x08}, {0x08f, 0x00} 364}; 365 366static struct urtw_pair urtw_8225v2_rf_part2[] = { 367 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 368 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 369 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x08 }, { 0x0b, 0x80 }, 370 { 0x0c, 0x01 }, { 0x0d, 0x43 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, 371 { 0x10, 0x84 }, { 0x11, 0x07 }, { 0x12, 0x20 }, { 0x13, 0x20 }, 372 { 0x14, 0x00 }, { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, 373 { 0x18, 0xef }, { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x15 }, 374 { 0x1c, 0x04 }, { 0x1d, 0xc5 }, { 0x1e, 0x95 }, { 0x1f, 0x75 }, 375 { 0x20, 0x1f }, { 0x21, 0x17 }, { 0x22, 0x16 }, { 0x23, 0x80 }, 376 { 0x24, 0x46 }, { 0x25, 0x00 }, { 0x26, 0x90 }, { 0x27, 0x88 } 377}; 378 379static struct urtw_pair urtw_8225v2b_rf_part2[] = { 380 { 0x00, 0x10 }, { 0x01, 0x0d }, { 0x02, 0x01 }, { 0x03, 0x00 }, 381 { 0x04, 0x14 }, { 0x05, 0xfb }, { 0x06, 0xfb }, { 0x07, 0x60 }, 382 { 0x08, 0x00 }, { 0x09, 0x60 }, { 0x0a, 0x00 }, { 0x0b, 0x00 }, 383 { 0x0c, 0x00 }, { 0x0d, 0x5c }, { 0x0e, 0x00 }, { 0x0f, 0x00 }, 384 { 0x10, 0x40 }, { 0x11, 0x00 }, { 0x12, 0x40 }, { 0x13, 0x00 }, 385 { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0xa8 }, { 0x17, 0x26 }, 386 { 0x18, 0x32 }, { 0x19, 0x33 }, { 0x1a, 0x07 }, { 0x1b, 0xa5 }, 387 { 0x1c, 0x6f }, { 0x1d, 0x55 }, { 0x1e, 0xc8 }, { 0x1f, 0xb3 }, 388 { 0x20, 0x0a }, { 0x21, 0xe1 }, { 0x22, 0x2C }, { 0x23, 0x8a }, 389 { 0x24, 0x86 }, { 0x25, 0x83 }, { 0x26, 0x34 }, { 0x27, 0x0f }, 390 { 0x28, 0x4f }, { 0x29, 0x24 }, { 0x2a, 0x6f }, { 0x2b, 0xc2 }, 391 { 0x2c, 0x6b }, { 0x2d, 0x40 }, { 0x2e, 0x80 }, { 0x2f, 0x00 }, 392 { 0x30, 0xc0 }, { 0x31, 0xc1 }, { 0x32, 0x58 }, { 0x33, 0xf1 }, 393 { 0x34, 0x00 }, { 0x35, 0xe4 }, { 0x36, 0x90 }, { 0x37, 0x3e }, 394 { 0x38, 0x6d }, { 0x39, 0x3c }, { 0x3a, 0xfb }, { 0x3b, 0x07 } 395}; 396 397static struct urtw_pair urtw_8225v2_rf_part3[] = { 398 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 399 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x09, 0x11 }, 400 { 0x0a, 0x17 }, { 0x0b, 0x11 }, { 0x10, 0x9b }, { 0x11, 0x88 }, 401 { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, { 0x1a, 0xa0 }, 402 { 0x1b, 0x08 }, { 0x1d, 0x00 }, { 0x40, 0x86 }, { 0x41, 0x9d }, 403 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x36 }, { 0x45, 0x35 }, 404 { 0x46, 0x2e }, { 0x47, 0x25 }, { 0x48, 0x1c }, { 0x49, 0x12 }, 405 { 0x4a, 0x09 }, { 0x4b, 0x04 }, { 0x4c, 0x05 } 406}; 407 408static uint16_t urtw_8225v2_rxgain[] = { 409 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009, 410 0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141, 411 0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183, 412 0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244, 413 0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288, 414 0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345, 415 0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389, 416 0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393, 417 0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d, 418 0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9, 419 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 420 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 421}; 422 423static uint16_t urtw_8225v2b_rxgain[] = { 424 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 425 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 426 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 427 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 428 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 429 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 430 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 431 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 432 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 433 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 434 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 435 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 436}; 437 438static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = { 439 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 440 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 441 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 442 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 443 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 444 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, 445}; 446 447static uint8_t urtw_8225v2_txpwr_cck[] = { 448 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04 449}; 450 451static uint8_t urtw_8225v2_txpwr_cck_ch14[] = { 452 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00 453}; 454 455static uint8_t urtw_8225v2b_txpwr_cck[] = { 456 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04, 457 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03, 458 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03, 459 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03 460}; 461 462static uint8_t urtw_8225v2b_txpwr_cck_ch14[] = { 463 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00, 464 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 465 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 466 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00 467}; 468 469static struct urtw_pair urtw_ratetable[] = { 470 { 2, 0 }, { 4, 1 }, { 11, 2 }, { 12, 4 }, { 18, 5 }, 471 { 22, 3 }, { 24, 6 }, { 36, 7 }, { 48, 8 }, { 72, 9 }, 472 { 96, 10 }, { 108, 11 } 473}; 474 475#if 0 476static const uint8_t urtw_8187b_reg_table[][3] = { 477 { 0xf0, 0x32, 0 }, { 0xf1, 0x32, 0 }, { 0xf2, 0x00, 0 }, 478 { 0xf3, 0x00, 0 }, { 0xf4, 0x32, 0 }, { 0xf5, 0x43, 0 }, 479 { 0xf6, 0x00, 0 }, { 0xf7, 0x00, 0 }, { 0xf8, 0x46, 0 }, 480 { 0xf9, 0xa4, 0 }, { 0xfa, 0x00, 0 }, { 0xfb, 0x00, 0 }, 481 { 0xfc, 0x96, 0 }, { 0xfd, 0xa4, 0 }, { 0xfe, 0x00, 0 }, 482 { 0xff, 0x00, 0 }, { 0x58, 0x4b, 1 }, { 0x59, 0x00, 1 }, 483 { 0x5a, 0x4b, 1 }, { 0x5b, 0x00, 1 }, { 0x60, 0x4b, 1 }, 484 { 0x61, 0x09, 1 }, { 0x62, 0x4b, 1 }, { 0x63, 0x09, 1 }, 485 { 0xce, 0x0f, 1 }, { 0xcf, 0x00, 1 }, { 0xe0, 0xff, 1 }, 486 { 0xe1, 0x0f, 1 }, { 0xe2, 0x00, 1 }, { 0xf0, 0x4e, 1 }, 487 { 0xf1, 0x01, 1 }, { 0xf2, 0x02, 1 }, { 0xf3, 0x03, 1 }, 488 { 0xf4, 0x04, 1 }, { 0xf5, 0x05, 1 }, { 0xf6, 0x06, 1 }, 489 { 0xf7, 0x07, 1 }, { 0xf8, 0x08, 1 }, { 0x4e, 0x00, 2 }, 490 { 0x0c, 0x04, 2 }, { 0x21, 0x61, 2 }, { 0x22, 0x68, 2 }, 491 { 0x23, 0x6f, 2 }, { 0x24, 0x76, 2 }, { 0x25, 0x7d, 2 }, 492 { 0x26, 0x84, 2 }, { 0x27, 0x8d, 2 }, { 0x4d, 0x08, 2 }, 493 { 0x50, 0x05, 2 }, { 0x51, 0xf5, 2 }, { 0x52, 0x04, 2 }, 494 { 0x53, 0xa0, 2 }, { 0x54, 0x1f, 2 }, { 0x55, 0x23, 2 }, 495 { 0x56, 0x45, 2 }, { 0x57, 0x67, 2 }, { 0x58, 0x08, 2 }, 496 { 0x59, 0x08, 2 }, { 0x5a, 0x08, 2 }, { 0x5b, 0x08, 2 }, 497 { 0x60, 0x08, 2 }, { 0x61, 0x08, 2 }, { 0x62, 0x08, 2 }, 498 { 0x63, 0x08, 2 }, { 0x64, 0xcf, 2 }, { 0x72, 0x56, 2 }, 499 { 0x73, 0x9a, 2 }, { 0x34, 0xf0, 0 }, { 0x35, 0x0f, 0 }, 500 { 0x5b, 0x40, 0 }, { 0x84, 0x88, 0 }, { 0x85, 0x24, 0 }, 501 { 0x88, 0x54, 0 }, { 0x8b, 0xb8, 0 }, { 0x8c, 0x07, 0 }, 502 { 0x8d, 0x00, 0 }, { 0x94, 0x1b, 0 }, { 0x95, 0x12, 0 }, 503 { 0x96, 0x00, 0 }, { 0x97, 0x06, 0 }, { 0x9d, 0x1a, 0 }, 504 { 0x9f, 0x10, 0 }, { 0xb4, 0x22, 0 }, { 0xbe, 0x80, 0 }, 505 { 0xdb, 0x00, 0 }, { 0xee, 0x00, 0 }, { 0x91, 0x03, 0 }, 506 { 0x4c, 0x00, 2 }, { 0x9f, 0x00, 3 }, { 0x8c, 0x01, 0 }, 507 { 0x8d, 0x10, 0 }, { 0x8e, 0x08, 0 }, { 0x8f, 0x00, 0 } 508}; 509#endif 510 511static usb_callback_t urtw_bulk_rx_callback; 512static usb_callback_t urtw_bulk_tx_callback; 513static usb_callback_t urtw_bulk_tx_status_callback; 514 515static const struct usb_config urtw_8187b_usbconfig[URTW_8187B_N_XFERS] = { 516 [URTW_8187B_BULK_RX] = { 517 .type = UE_BULK, 518 .endpoint = 0x83, 519 .direction = UE_DIR_IN, 520 .bufsize = MCLBYTES, 521 .flags = { 522 .ext_buffer = 1, 523 .pipe_bof = 1, 524 .short_xfer_ok = 1 525 }, 526 .callback = urtw_bulk_rx_callback 527 }, 528 [URTW_8187B_BULK_TX_STATUS] = { 529 .type = UE_BULK, 530 .endpoint = 0x89, 531 .direction = UE_DIR_IN, 532 .bufsize = sizeof(uint64_t), 533 .flags = { 534 .pipe_bof = 1, 535 .short_xfer_ok = 1 536 }, 537 .callback = urtw_bulk_tx_status_callback 538 }, 539 [URTW_8187B_BULK_TX_BE] = { 540 .type = UE_BULK, 541 .endpoint = URTW_8187B_TXPIPE_BE, 542 .direction = UE_DIR_OUT, 543 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT, 544 .flags = { 545 .force_short_xfer = 1, 546 .pipe_bof = 1, 547 }, 548 .callback = urtw_bulk_tx_callback, 549 .timeout = URTW_DATA_TIMEOUT 550 }, 551 [URTW_8187B_BULK_TX_BK] = { 552 .type = UE_BULK, 553 .endpoint = URTW_8187B_TXPIPE_BK, 554 .direction = UE_DIR_OUT, 555 .bufsize = URTW_TX_MAXSIZE, 556 .flags = { 557 .ext_buffer = 1, 558 .force_short_xfer = 1, 559 .pipe_bof = 1, 560 }, 561 .callback = urtw_bulk_tx_callback, 562 .timeout = URTW_DATA_TIMEOUT 563 }, 564 [URTW_8187B_BULK_TX_VI] = { 565 .type = UE_BULK, 566 .endpoint = URTW_8187B_TXPIPE_VI, 567 .direction = UE_DIR_OUT, 568 .bufsize = URTW_TX_MAXSIZE, 569 .flags = { 570 .ext_buffer = 1, 571 .force_short_xfer = 1, 572 .pipe_bof = 1, 573 }, 574 .callback = urtw_bulk_tx_callback, 575 .timeout = URTW_DATA_TIMEOUT 576 }, 577 [URTW_8187B_BULK_TX_VO] = { 578 .type = UE_BULK, 579 .endpoint = URTW_8187B_TXPIPE_VO, 580 .direction = UE_DIR_OUT, 581 .bufsize = URTW_TX_MAXSIZE, 582 .flags = { 583 .ext_buffer = 1, 584 .force_short_xfer = 1, 585 .pipe_bof = 1, 586 }, 587 .callback = urtw_bulk_tx_callback, 588 .timeout = URTW_DATA_TIMEOUT 589 }, 590 [URTW_8187B_BULK_TX_EP12] = { 591 .type = UE_BULK, 592 .endpoint = 0xc, 593 .direction = UE_DIR_OUT, 594 .bufsize = URTW_TX_MAXSIZE, 595 .flags = { 596 .ext_buffer = 1, 597 .force_short_xfer = 1, 598 .pipe_bof = 1, 599 }, 600 .callback = urtw_bulk_tx_callback, 601 .timeout = URTW_DATA_TIMEOUT 602 } 603}; 604 605static const struct usb_config urtw_8187l_usbconfig[URTW_8187L_N_XFERS] = { 606 [URTW_8187L_BULK_RX] = { 607 .type = UE_BULK, 608 .endpoint = 0x81, 609 .direction = UE_DIR_IN, 610 .bufsize = MCLBYTES, 611 .flags = { 612 .ext_buffer = 1, 613 .pipe_bof = 1, 614 .short_xfer_ok = 1 615 }, 616 .callback = urtw_bulk_rx_callback 617 }, 618 [URTW_8187L_BULK_TX_LOW] = { 619 .type = UE_BULK, 620 .endpoint = 0x2, 621 .direction = UE_DIR_OUT, 622 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT, 623 .flags = { 624 .force_short_xfer = 1, 625 .pipe_bof = 1, 626 }, 627 .callback = urtw_bulk_tx_callback, 628 .timeout = URTW_DATA_TIMEOUT 629 }, 630 [URTW_8187L_BULK_TX_NORMAL] = { 631 .type = UE_BULK, 632 .endpoint = 0x3, 633 .direction = UE_DIR_OUT, 634 .bufsize = URTW_TX_MAXSIZE, 635 .flags = { 636 .ext_buffer = 1, 637 .force_short_xfer = 1, 638 .pipe_bof = 1, 639 }, 640 .callback = urtw_bulk_tx_callback, 641 .timeout = URTW_DATA_TIMEOUT 642 }, 643}; 644 645static struct ieee80211vap *urtw_vap_create(struct ieee80211com *, 646 const char [IFNAMSIZ], int, enum ieee80211_opmode, 647 int, const uint8_t [IEEE80211_ADDR_LEN], 648 const uint8_t [IEEE80211_ADDR_LEN]); 649static void urtw_vap_delete(struct ieee80211vap *); 650static void urtw_init(struct urtw_softc *); 651static void urtw_stop(struct urtw_softc *); 652static void urtw_parent(struct ieee80211com *); 653static int urtw_transmit(struct ieee80211com *, struct mbuf *); 654static void urtw_start(struct urtw_softc *); 655static int urtw_alloc_rx_data_list(struct urtw_softc *); 656static int urtw_alloc_tx_data_list(struct urtw_softc *); 657static int urtw_raw_xmit(struct ieee80211_node *, struct mbuf *, 658 const struct ieee80211_bpf_params *); 659static void urtw_scan_start(struct ieee80211com *); 660static void urtw_scan_end(struct ieee80211com *); 661static void urtw_getradiocaps(struct ieee80211com *, int, int *, 662 struct ieee80211_channel[]); 663static void urtw_set_channel(struct ieee80211com *); 664static void urtw_update_promisc(struct ieee80211com *); 665static void urtw_update_mcast(struct ieee80211com *); 666static int urtw_tx_start(struct urtw_softc *, 667 struct ieee80211_node *, struct mbuf *, 668 struct urtw_data *, int); 669static int urtw_newstate(struct ieee80211vap *, 670 enum ieee80211_state, int); 671static void urtw_led_ch(void *); 672static void urtw_ledtask(void *, int); 673static void urtw_watchdog(void *); 674static void urtw_set_multi(void *); 675static int urtw_isbmode(uint16_t); 676static uint16_t urtw_rate2rtl(uint32_t); 677static uint16_t urtw_rtl2rate(uint32_t); 678static usb_error_t urtw_set_rate(struct urtw_softc *); 679static usb_error_t urtw_update_msr(struct urtw_softc *); 680static usb_error_t urtw_read8_c(struct urtw_softc *, int, uint8_t *); 681static usb_error_t urtw_read16_c(struct urtw_softc *, int, uint16_t *); 682static usb_error_t urtw_read32_c(struct urtw_softc *, int, uint32_t *); 683static usb_error_t urtw_write8_c(struct urtw_softc *, int, uint8_t); 684static usb_error_t urtw_write16_c(struct urtw_softc *, int, uint16_t); 685static usb_error_t urtw_write32_c(struct urtw_softc *, int, uint32_t); 686static usb_error_t urtw_eprom_cs(struct urtw_softc *, int); 687static usb_error_t urtw_eprom_ck(struct urtw_softc *); 688static usb_error_t urtw_eprom_sendbits(struct urtw_softc *, int16_t *, 689 int); 690static usb_error_t urtw_eprom_read32(struct urtw_softc *, uint32_t, 691 uint32_t *); 692static usb_error_t urtw_eprom_readbit(struct urtw_softc *, int16_t *); 693static usb_error_t urtw_eprom_writebit(struct urtw_softc *, int16_t); 694static usb_error_t urtw_get_macaddr(struct urtw_softc *); 695static usb_error_t urtw_get_txpwr(struct urtw_softc *); 696static usb_error_t urtw_get_rfchip(struct urtw_softc *); 697static usb_error_t urtw_led_init(struct urtw_softc *); 698static usb_error_t urtw_8185_rf_pins_enable(struct urtw_softc *); 699static usb_error_t urtw_8185_tx_antenna(struct urtw_softc *, uint8_t); 700static usb_error_t urtw_8187_write_phy(struct urtw_softc *, uint8_t, 701 uint32_t); 702static usb_error_t urtw_8187_write_phy_ofdm_c(struct urtw_softc *, 703 uint8_t, uint32_t); 704static usb_error_t urtw_8187_write_phy_cck_c(struct urtw_softc *, uint8_t, 705 uint32_t); 706static usb_error_t urtw_8225_setgain(struct urtw_softc *, int16_t); 707static usb_error_t urtw_8225_usb_init(struct urtw_softc *); 708static usb_error_t urtw_8225_write_c(struct urtw_softc *, uint8_t, 709 uint16_t); 710static usb_error_t urtw_8225_write_s16(struct urtw_softc *, uint8_t, int, 711 uint16_t *); 712static usb_error_t urtw_8225_read(struct urtw_softc *, uint8_t, 713 uint32_t *); 714static usb_error_t urtw_8225_rf_init(struct urtw_softc *); 715static usb_error_t urtw_8225_rf_set_chan(struct urtw_softc *, int); 716static usb_error_t urtw_8225_rf_set_sens(struct urtw_softc *, int); 717static usb_error_t urtw_8225_set_txpwrlvl(struct urtw_softc *, int); 718static usb_error_t urtw_8225_rf_stop(struct urtw_softc *); 719static usb_error_t urtw_8225v2_rf_init(struct urtw_softc *); 720static usb_error_t urtw_8225v2_rf_set_chan(struct urtw_softc *, int); 721static usb_error_t urtw_8225v2_set_txpwrlvl(struct urtw_softc *, int); 722static usb_error_t urtw_8225v2_setgain(struct urtw_softc *, int16_t); 723static usb_error_t urtw_8225_isv2(struct urtw_softc *, int *); 724static usb_error_t urtw_8225v2b_rf_init(struct urtw_softc *); 725static usb_error_t urtw_8225v2b_rf_set_chan(struct urtw_softc *, int); 726static usb_error_t urtw_read8e(struct urtw_softc *, int, uint8_t *); 727static usb_error_t urtw_write8e(struct urtw_softc *, int, uint8_t); 728static usb_error_t urtw_8180_set_anaparam(struct urtw_softc *, uint32_t); 729static usb_error_t urtw_8185_set_anaparam2(struct urtw_softc *, uint32_t); 730static usb_error_t urtw_intr_enable(struct urtw_softc *); 731static usb_error_t urtw_intr_disable(struct urtw_softc *); 732static usb_error_t urtw_reset(struct urtw_softc *); 733static usb_error_t urtw_led_on(struct urtw_softc *, int); 734static usb_error_t urtw_led_ctl(struct urtw_softc *, int); 735static usb_error_t urtw_led_blink(struct urtw_softc *); 736static usb_error_t urtw_led_mode0(struct urtw_softc *, int); 737static usb_error_t urtw_led_mode1(struct urtw_softc *, int); 738static usb_error_t urtw_led_mode2(struct urtw_softc *, int); 739static usb_error_t urtw_led_mode3(struct urtw_softc *, int); 740static usb_error_t urtw_rx_setconf(struct urtw_softc *); 741static usb_error_t urtw_rx_enable(struct urtw_softc *); 742static usb_error_t urtw_tx_enable(struct urtw_softc *sc); 743static void urtw_free_tx_data_list(struct urtw_softc *); 744static void urtw_free_rx_data_list(struct urtw_softc *); 745static void urtw_free_data_list(struct urtw_softc *, 746 struct urtw_data data[], int, int); 747static usb_error_t urtw_set_macaddr(struct urtw_softc *, const uint8_t *); 748static usb_error_t urtw_adapter_start(struct urtw_softc *); 749static usb_error_t urtw_adapter_start_b(struct urtw_softc *); 750static usb_error_t urtw_set_mode(struct urtw_softc *, uint32_t); 751static usb_error_t urtw_8187b_cmd_reset(struct urtw_softc *); 752static usb_error_t urtw_do_request(struct urtw_softc *, 753 struct usb_device_request *, void *); 754static usb_error_t urtw_8225v2b_set_txpwrlvl(struct urtw_softc *, int); 755static usb_error_t urtw_led_off(struct urtw_softc *, int); 756static void urtw_abort_xfers(struct urtw_softc *); 757static struct urtw_data * 758 urtw_getbuf(struct urtw_softc *sc); 759static int urtw_compute_txtime(uint16_t, uint16_t, uint8_t, 760 uint8_t); 761static void urtw_updateslot(struct ieee80211com *); 762static void urtw_updateslottask(void *, int); 763static void urtw_sysctl_node(struct urtw_softc *); 764 765static int 766urtw_match(device_t dev) 767{ 768 struct usb_attach_arg *uaa = device_get_ivars(dev); 769 770 if (uaa->usb_mode != USB_MODE_HOST) 771 return (ENXIO); 772 if (uaa->info.bConfigIndex != URTW_CONFIG_INDEX) 773 return (ENXIO); 774 if (uaa->info.bIfaceIndex != URTW_IFACE_INDEX) 775 return (ENXIO); 776 777 return (usbd_lookup_id_by_uaa(urtw_devs, sizeof(urtw_devs), uaa)); 778} 779 780static int 781urtw_attach(device_t dev) 782{ 783 const struct usb_config *setup_start; 784 int ret = ENXIO; 785 struct urtw_softc *sc = device_get_softc(dev); 786 struct usb_attach_arg *uaa = device_get_ivars(dev); 787 struct ieee80211com *ic = &sc->sc_ic; 788 uint8_t iface_index = URTW_IFACE_INDEX; /* XXX */ 789 uint16_t n_setup; 790 uint32_t data; 791 usb_error_t error; 792 793 device_set_usb_desc(dev); 794 795 sc->sc_dev = dev; 796 sc->sc_udev = uaa->device; 797 if (USB_GET_DRIVER_INFO(uaa) == URTW_REV_RTL8187B) 798 sc->sc_flags |= URTW_RTL8187B; 799#ifdef URTW_DEBUG 800 sc->sc_debug = urtw_debug; 801#endif 802 803 mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), MTX_NETWORK_LOCK, 804 MTX_DEF); 805 usb_callout_init_mtx(&sc->sc_led_ch, &sc->sc_mtx, 0); 806 TASK_INIT(&sc->sc_led_task, 0, urtw_ledtask, sc); 807 TASK_INIT(&sc->sc_updateslot_task, 0, urtw_updateslottask, sc); 808 callout_init(&sc->sc_watchdog_ch, 0); 809 mbufq_init(&sc->sc_snd, ifqmaxlen); 810 811 if (sc->sc_flags & URTW_RTL8187B) { 812 setup_start = urtw_8187b_usbconfig; 813 n_setup = URTW_8187B_N_XFERS; 814 } else { 815 setup_start = urtw_8187l_usbconfig; 816 n_setup = URTW_8187L_N_XFERS; 817 } 818 819 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 820 setup_start, n_setup, sc, &sc->sc_mtx); 821 if (error) { 822 device_printf(dev, "could not allocate USB transfers, " 823 "err=%s\n", usbd_errstr(error)); 824 ret = ENXIO; 825 goto fail0; 826 } 827 828 if (sc->sc_flags & URTW_RTL8187B) { 829 sc->sc_tx_dma_buf = 830 usbd_xfer_get_frame_buffer(sc->sc_xfer[ 831 URTW_8187B_BULK_TX_BE], 0); 832 } else { 833 sc->sc_tx_dma_buf = 834 usbd_xfer_get_frame_buffer(sc->sc_xfer[ 835 URTW_8187L_BULK_TX_LOW], 0); 836 } 837 838 URTW_LOCK(sc); 839 840 urtw_read32_m(sc, URTW_RX, &data); 841 sc->sc_epromtype = (data & URTW_RX_9356SEL) ? URTW_EEPROM_93C56 : 842 URTW_EEPROM_93C46; 843 844 error = urtw_get_rfchip(sc); 845 if (error != 0) 846 goto fail; 847 error = urtw_get_macaddr(sc); 848 if (error != 0) 849 goto fail; 850 error = urtw_get_txpwr(sc); 851 if (error != 0) 852 goto fail; 853 error = urtw_led_init(sc); 854 if (error != 0) 855 goto fail; 856 857 URTW_UNLOCK(sc); 858 859 sc->sc_rts_retry = URTW_DEFAULT_RTS_RETRY; 860 sc->sc_tx_retry = URTW_DEFAULT_TX_RETRY; 861 sc->sc_currate = 3; 862 sc->sc_preamble_mode = urtw_preamble_mode; 863 864 ic->ic_softc = sc; 865 ic->ic_name = device_get_nameunit(dev); 866 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 867 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 868 869 /* set device capabilities */ 870 ic->ic_caps = 871 IEEE80211_C_STA | /* station mode */ 872 IEEE80211_C_MONITOR | /* monitor mode supported */ 873 IEEE80211_C_TXPMGT | /* tx power management */ 874 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 875 IEEE80211_C_SHSLOT | /* short slot time supported */ 876 IEEE80211_C_BGSCAN | /* capable of bg scanning */ 877 IEEE80211_C_WPA; /* 802.11i */ 878 879 /* XXX TODO: setup regdomain if URTW_EPROM_CHANPLAN_BY_HW bit is set.*/ 880 881 urtw_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans, 882 ic->ic_channels); 883 884 ieee80211_ifattach(ic); 885 ic->ic_raw_xmit = urtw_raw_xmit; 886 ic->ic_scan_start = urtw_scan_start; 887 ic->ic_scan_end = urtw_scan_end; 888 ic->ic_getradiocaps = urtw_getradiocaps; 889 ic->ic_set_channel = urtw_set_channel; 890 ic->ic_updateslot = urtw_updateslot; 891 ic->ic_vap_create = urtw_vap_create; 892 ic->ic_vap_delete = urtw_vap_delete; 893 ic->ic_update_promisc = urtw_update_promisc; 894 ic->ic_update_mcast = urtw_update_mcast; 895 ic->ic_parent = urtw_parent; 896 ic->ic_transmit = urtw_transmit; 897 898 ieee80211_radiotap_attach(ic, 899 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 900 URTW_TX_RADIOTAP_PRESENT, 901 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 902 URTW_RX_RADIOTAP_PRESENT); 903 904 urtw_sysctl_node(sc); 905 906 if (bootverbose) 907 ieee80211_announce(ic); 908 return (0); 909 910fail: 911 URTW_UNLOCK(sc); 912 usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ? 913 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS); 914fail0: 915 return (ret); 916} 917 918static int 919urtw_detach(device_t dev) 920{ 921 struct urtw_softc *sc = device_get_softc(dev); 922 struct ieee80211com *ic = &sc->sc_ic; 923 unsigned int x; 924 unsigned int n_xfers; 925 926 /* Prevent further ioctls */ 927 URTW_LOCK(sc); 928 sc->sc_flags |= URTW_DETACHED; 929 urtw_stop(sc); 930 URTW_UNLOCK(sc); 931 932 ieee80211_draintask(ic, &sc->sc_updateslot_task); 933 ieee80211_draintask(ic, &sc->sc_led_task); 934 935 usb_callout_drain(&sc->sc_led_ch); 936 callout_drain(&sc->sc_watchdog_ch); 937 938 n_xfers = (sc->sc_flags & URTW_RTL8187B) ? 939 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS; 940 941 /* prevent further allocations from RX/TX data lists */ 942 URTW_LOCK(sc); 943 STAILQ_INIT(&sc->sc_tx_active); 944 STAILQ_INIT(&sc->sc_tx_inactive); 945 STAILQ_INIT(&sc->sc_tx_pending); 946 947 STAILQ_INIT(&sc->sc_rx_active); 948 STAILQ_INIT(&sc->sc_rx_inactive); 949 URTW_UNLOCK(sc); 950 951 /* drain USB transfers */ 952 for (x = 0; x != n_xfers; x++) 953 usbd_transfer_drain(sc->sc_xfer[x]); 954 955 /* free data buffers */ 956 URTW_LOCK(sc); 957 urtw_free_tx_data_list(sc); 958 urtw_free_rx_data_list(sc); 959 URTW_UNLOCK(sc); 960 961 /* free USB transfers and some data buffers */ 962 usbd_transfer_unsetup(sc->sc_xfer, n_xfers); 963 964 ieee80211_ifdetach(ic); 965 mbufq_drain(&sc->sc_snd); 966 mtx_destroy(&sc->sc_mtx); 967 return (0); 968} 969 970static void 971urtw_free_tx_data_list(struct urtw_softc *sc) 972{ 973 urtw_free_data_list(sc, sc->sc_tx, URTW_TX_DATA_LIST_COUNT, 0); 974} 975 976static void 977urtw_free_rx_data_list(struct urtw_softc *sc) 978{ 979 urtw_free_data_list(sc, sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1); 980} 981 982static void 983urtw_free_data_list(struct urtw_softc *sc, struct urtw_data data[], int ndata, 984 int fillmbuf) 985{ 986 int i; 987 988 for (i = 0; i < ndata; i++) { 989 struct urtw_data *dp = &data[i]; 990 991 if (fillmbuf == 1) { 992 if (dp->m != NULL) { 993 m_freem(dp->m); 994 dp->m = NULL; 995 dp->buf = NULL; 996 } 997 } else { 998 dp->buf = NULL; 999 } 1000 if (dp->ni != NULL) { 1001 ieee80211_free_node(dp->ni); 1002 dp->ni = NULL; 1003 } 1004 } 1005} 1006 1007static struct ieee80211vap * 1008urtw_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 1009 enum ieee80211_opmode opmode, int flags, 1010 const uint8_t bssid[IEEE80211_ADDR_LEN], 1011 const uint8_t mac[IEEE80211_ADDR_LEN]) 1012{ 1013 struct urtw_vap *uvp; 1014 struct ieee80211vap *vap; 1015 1016 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 1017 return (NULL); 1018 uvp = malloc(sizeof(struct urtw_vap), M_80211_VAP, M_WAITOK | M_ZERO); 1019 vap = &uvp->vap; 1020 /* enable s/w bmiss handling for sta mode */ 1021 1022 if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 1023 flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) { 1024 /* out of memory */ 1025 free(uvp, M_80211_VAP); 1026 return (NULL); 1027 } 1028 1029 /* override state transition machine */ 1030 uvp->newstate = vap->iv_newstate; 1031 vap->iv_newstate = urtw_newstate; 1032 1033 /* complete setup */ 1034 ieee80211_vap_attach(vap, ieee80211_media_change, 1035 ieee80211_media_status, mac); 1036 ic->ic_opmode = opmode; 1037 return (vap); 1038} 1039 1040static void 1041urtw_vap_delete(struct ieee80211vap *vap) 1042{ 1043 struct urtw_vap *uvp = URTW_VAP(vap); 1044 1045 ieee80211_vap_detach(vap); 1046 free(uvp, M_80211_VAP); 1047} 1048 1049static void 1050urtw_init(struct urtw_softc *sc) 1051{ 1052 usb_error_t error; 1053 int ret; 1054 1055 URTW_ASSERT_LOCKED(sc); 1056 1057 if (sc->sc_flags & URTW_RUNNING) 1058 urtw_stop(sc); 1059 1060 error = (sc->sc_flags & URTW_RTL8187B) ? urtw_adapter_start_b(sc) : 1061 urtw_adapter_start(sc); 1062 if (error != 0) 1063 goto fail; 1064 1065 /* reset softc variables */ 1066 sc->sc_txtimer = 0; 1067 1068 if (!(sc->sc_flags & URTW_INIT_ONCE)) { 1069 ret = urtw_alloc_rx_data_list(sc); 1070 if (ret != 0) 1071 goto fail; 1072 ret = urtw_alloc_tx_data_list(sc); 1073 if (ret != 0) 1074 goto fail; 1075 sc->sc_flags |= URTW_INIT_ONCE; 1076 } 1077 1078 error = urtw_rx_enable(sc); 1079 if (error != 0) 1080 goto fail; 1081 error = urtw_tx_enable(sc); 1082 if (error != 0) 1083 goto fail; 1084 1085 if (sc->sc_flags & URTW_RTL8187B) 1086 usbd_transfer_start(sc->sc_xfer[URTW_8187B_BULK_TX_STATUS]); 1087 1088 sc->sc_flags |= URTW_RUNNING; 1089 1090 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1091fail: 1092 return; 1093} 1094 1095static usb_error_t 1096urtw_adapter_start_b(struct urtw_softc *sc) 1097{ 1098 uint8_t data8; 1099 usb_error_t error; 1100 1101 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1102 if (error) 1103 goto fail; 1104 1105 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1106 urtw_write8_m(sc, URTW_CONFIG3, 1107 data8 | URTW_CONFIG3_ANAPARAM_WRITE | URTW_CONFIG3_GNT_SELECT); 1108 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8187B_8225_ANAPARAM2_ON); 1109 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_ON); 1110 urtw_write8_m(sc, URTW_ANAPARAM3, URTW_8187B_8225_ANAPARAM3_ON); 1111 1112 urtw_write8_m(sc, 0x61, 0x10); 1113 urtw_read8_m(sc, 0x62, &data8); 1114 urtw_write8_m(sc, 0x62, data8 & ~(1 << 5)); 1115 urtw_write8_m(sc, 0x62, data8 | (1 << 5)); 1116 1117 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1118 data8 &= ~URTW_CONFIG3_ANAPARAM_WRITE; 1119 urtw_write8_m(sc, URTW_CONFIG3, data8); 1120 1121 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1122 if (error) 1123 goto fail; 1124 1125 error = urtw_8187b_cmd_reset(sc); 1126 if (error) 1127 goto fail; 1128 1129 error = sc->sc_rf_init(sc); 1130 if (error != 0) 1131 goto fail; 1132 urtw_write8_m(sc, URTW_CMD, URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1133 1134 /* fix RTL8187B RX stall */ 1135 error = urtw_intr_enable(sc); 1136 if (error) 1137 goto fail; 1138 1139 error = urtw_write8e(sc, 0x41, 0xf4); 1140 if (error) 1141 goto fail; 1142 error = urtw_write8e(sc, 0x40, 0x00); 1143 if (error) 1144 goto fail; 1145 error = urtw_write8e(sc, 0x42, 0x00); 1146 if (error) 1147 goto fail; 1148 error = urtw_write8e(sc, 0x42, 0x01); 1149 if (error) 1150 goto fail; 1151 error = urtw_write8e(sc, 0x40, 0x0f); 1152 if (error) 1153 goto fail; 1154 error = urtw_write8e(sc, 0x42, 0x00); 1155 if (error) 1156 goto fail; 1157 error = urtw_write8e(sc, 0x42, 0x01); 1158 if (error) 1159 goto fail; 1160 1161 urtw_read8_m(sc, 0xdb, &data8); 1162 urtw_write8_m(sc, 0xdb, data8 | (1 << 2)); 1163 urtw_write16_m(sc, 0x372, 0x59fa); 1164 urtw_write16_m(sc, 0x374, 0x59d2); 1165 urtw_write16_m(sc, 0x376, 0x59d2); 1166 urtw_write16_m(sc, 0x378, 0x19fa); 1167 urtw_write16_m(sc, 0x37a, 0x19fa); 1168 urtw_write16_m(sc, 0x37c, 0x00d0); 1169 urtw_write8_m(sc, 0x61, 0); 1170 1171 urtw_write8_m(sc, 0x180, 0x0f); 1172 urtw_write8_m(sc, 0x183, 0x03); 1173 urtw_write8_m(sc, 0xda, 0x10); 1174 urtw_write8_m(sc, 0x24d, 0x08); 1175 urtw_write32_m(sc, URTW_HSSI_PARA, 0x0600321b); 1176 1177 urtw_write16_m(sc, 0x1ec, 0x800); /* RX MAX SIZE */ 1178fail: 1179 return (error); 1180} 1181 1182static usb_error_t 1183urtw_set_macaddr(struct urtw_softc *sc, const uint8_t *macaddr) 1184{ 1185 usb_error_t error; 1186 1187 urtw_write32_m(sc, URTW_MAC0, ((const uint32_t *)macaddr)[0]); 1188 urtw_write16_m(sc, URTW_MAC4, ((const uint32_t *)macaddr)[1] & 0xffff); 1189 1190fail: 1191 return (error); 1192} 1193 1194static usb_error_t 1195urtw_adapter_start(struct urtw_softc *sc) 1196{ 1197 struct ieee80211com *ic = &sc->sc_ic; 1198 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1199 const uint8_t *macaddr; 1200 usb_error_t error; 1201 1202 error = urtw_reset(sc); 1203 if (error) 1204 goto fail; 1205 1206 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 0); 1207 urtw_write8_m(sc, URTW_GPIO, 0); 1208 1209 /* for led */ 1210 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1211 error = urtw_led_ctl(sc, URTW_LED_CTL_POWER_ON); 1212 if (error != 0) 1213 goto fail; 1214 1215 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1216 if (error) 1217 goto fail; 1218 /* applying MAC address again. */ 1219 macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr; 1220 urtw_set_macaddr(sc, macaddr); 1221 if (error) 1222 goto fail; 1223 1224 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1225 if (error) 1226 goto fail; 1227 1228 error = urtw_update_msr(sc); 1229 if (error) 1230 goto fail; 1231 1232 urtw_write32_m(sc, URTW_INT_TIMEOUT, 0); 1233 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 1234 urtw_write8_m(sc, URTW_RATE_FALLBACK, URTW_RATE_FALLBACK_ENABLE | 0x1); 1235 error = urtw_set_rate(sc); 1236 if (error != 0) 1237 goto fail; 1238 1239 error = sc->sc_rf_init(sc); 1240 if (error != 0) 1241 goto fail; 1242 if (sc->sc_rf_set_sens != NULL) 1243 sc->sc_rf_set_sens(sc, sc->sc_sens); 1244 1245 /* XXX correct? to call write16 */ 1246 urtw_write16_m(sc, URTW_PSR, 1); 1247 urtw_write16_m(sc, URTW_ADDR_MAGIC2, 0x10); 1248 urtw_write8_m(sc, URTW_TALLY_SEL, 0x80); 1249 urtw_write8_m(sc, URTW_ADDR_MAGIC3, 0x60); 1250 /* XXX correct? to call write16 */ 1251 urtw_write16_m(sc, URTW_PSR, 0); 1252 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1253 1254 error = urtw_intr_enable(sc); 1255 if (error != 0) 1256 goto fail; 1257 1258fail: 1259 return (error); 1260} 1261 1262static usb_error_t 1263urtw_set_mode(struct urtw_softc *sc, uint32_t mode) 1264{ 1265 uint8_t data; 1266 usb_error_t error; 1267 1268 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 1269 data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT); 1270 data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK); 1271 urtw_write8_m(sc, URTW_EPROM_CMD, data); 1272fail: 1273 return (error); 1274} 1275 1276static usb_error_t 1277urtw_8187b_cmd_reset(struct urtw_softc *sc) 1278{ 1279 int i; 1280 uint8_t data8; 1281 usb_error_t error; 1282 1283 /* XXX the code can be duplicate with urtw_reset(). */ 1284 urtw_read8_m(sc, URTW_CMD, &data8); 1285 data8 = (data8 & 0x2) | URTW_CMD_RST; 1286 urtw_write8_m(sc, URTW_CMD, data8); 1287 1288 for (i = 0; i < 20; i++) { 1289 usb_pause_mtx(&sc->sc_mtx, 2); 1290 urtw_read8_m(sc, URTW_CMD, &data8); 1291 if (!(data8 & URTW_CMD_RST)) 1292 break; 1293 } 1294 if (i >= 20) { 1295 device_printf(sc->sc_dev, "reset timeout\n"); 1296 goto fail; 1297 } 1298fail: 1299 return (error); 1300} 1301 1302static usb_error_t 1303urtw_do_request(struct urtw_softc *sc, 1304 struct usb_device_request *req, void *data) 1305{ 1306 usb_error_t err; 1307 int ntries = 10; 1308 1309 URTW_ASSERT_LOCKED(sc); 1310 1311 while (ntries--) { 1312 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 1313 req, data, 0, NULL, 250 /* ms */); 1314 if (err == 0) 1315 break; 1316 1317 DPRINTF(sc, URTW_DEBUG_INIT, 1318 "Control request failed, %s (retrying)\n", 1319 usbd_errstr(err)); 1320 usb_pause_mtx(&sc->sc_mtx, hz / 100); 1321 } 1322 return (err); 1323} 1324 1325static void 1326urtw_stop(struct urtw_softc *sc) 1327{ 1328 uint8_t data8; 1329 usb_error_t error; 1330 1331 URTW_ASSERT_LOCKED(sc); 1332 1333 sc->sc_flags &= ~URTW_RUNNING; 1334 1335 error = urtw_intr_disable(sc); 1336 if (error) 1337 goto fail; 1338 urtw_read8_m(sc, URTW_CMD, &data8); 1339 data8 &= ~(URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1340 urtw_write8_m(sc, URTW_CMD, data8); 1341 1342 error = sc->sc_rf_stop(sc); 1343 if (error != 0) 1344 goto fail; 1345 1346 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1347 if (error) 1348 goto fail; 1349 urtw_read8_m(sc, URTW_CONFIG4, &data8); 1350 urtw_write8_m(sc, URTW_CONFIG4, data8 | URTW_CONFIG4_VCOOFF); 1351 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1352 if (error) 1353 goto fail; 1354fail: 1355 if (error) 1356 device_printf(sc->sc_dev, "failed to stop (%s)\n", 1357 usbd_errstr(error)); 1358 1359 usb_callout_stop(&sc->sc_led_ch); 1360 callout_stop(&sc->sc_watchdog_ch); 1361 1362 urtw_abort_xfers(sc); 1363} 1364 1365static void 1366urtw_abort_xfers(struct urtw_softc *sc) 1367{ 1368 int i, max; 1369 1370 URTW_ASSERT_LOCKED(sc); 1371 1372 max = (sc->sc_flags & URTW_RTL8187B) ? URTW_8187B_N_XFERS : 1373 URTW_8187L_N_XFERS; 1374 1375 /* abort any pending transfers */ 1376 for (i = 0; i < max; i++) 1377 usbd_transfer_stop(sc->sc_xfer[i]); 1378} 1379 1380static void 1381urtw_parent(struct ieee80211com *ic) 1382{ 1383 struct urtw_softc *sc = ic->ic_softc; 1384 int startall = 0; 1385 1386 URTW_LOCK(sc); 1387 if (sc->sc_flags & URTW_DETACHED) { 1388 URTW_UNLOCK(sc); 1389 return; 1390 } 1391 1392 if (ic->ic_nrunning > 0) { 1393 if (sc->sc_flags & URTW_RUNNING) { 1394 if (ic->ic_promisc > 0 || ic->ic_allmulti > 0) 1395 urtw_set_multi(sc); 1396 } else { 1397 urtw_init(sc); 1398 startall = 1; 1399 } 1400 } else if (sc->sc_flags & URTW_RUNNING) 1401 urtw_stop(sc); 1402 URTW_UNLOCK(sc); 1403 if (startall) 1404 ieee80211_start_all(ic); 1405} 1406 1407static int 1408urtw_transmit(struct ieee80211com *ic, struct mbuf *m) 1409{ 1410 struct urtw_softc *sc = ic->ic_softc; 1411 int error; 1412 1413 URTW_LOCK(sc); 1414 if ((sc->sc_flags & URTW_RUNNING) == 0) { 1415 URTW_UNLOCK(sc); 1416 return (ENXIO); 1417 } 1418 error = mbufq_enqueue(&sc->sc_snd, m); 1419 if (error) { 1420 URTW_UNLOCK(sc); 1421 return (error); 1422 } 1423 urtw_start(sc); 1424 URTW_UNLOCK(sc); 1425 1426 return (0); 1427} 1428 1429static void 1430urtw_start(struct urtw_softc *sc) 1431{ 1432 struct urtw_data *bf; 1433 struct ieee80211_node *ni; 1434 struct mbuf *m; 1435 1436 URTW_ASSERT_LOCKED(sc); 1437 1438 if ((sc->sc_flags & URTW_RUNNING) == 0) 1439 return; 1440 1441 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 1442 bf = urtw_getbuf(sc); 1443 if (bf == NULL) { 1444 mbufq_prepend(&sc->sc_snd, m); 1445 break; 1446 } 1447 1448 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 1449 m->m_pkthdr.rcvif = NULL; 1450 1451 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_NORMAL) != 0) { 1452 if_inc_counter(ni->ni_vap->iv_ifp, 1453 IFCOUNTER_OERRORS, 1); 1454 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1455 ieee80211_free_node(ni); 1456 break; 1457 } 1458 1459 sc->sc_txtimer = 5; 1460 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1461 } 1462} 1463 1464static int 1465urtw_alloc_data_list(struct urtw_softc *sc, struct urtw_data data[], 1466 int ndata, int maxsz, void *dma_buf) 1467{ 1468 int i, error; 1469 1470 for (i = 0; i < ndata; i++) { 1471 struct urtw_data *dp = &data[i]; 1472 1473 dp->sc = sc; 1474 if (dma_buf == NULL) { 1475 dp->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1476 if (dp->m == NULL) { 1477 device_printf(sc->sc_dev, 1478 "could not allocate rx mbuf\n"); 1479 error = ENOMEM; 1480 goto fail; 1481 } 1482 dp->buf = mtod(dp->m, uint8_t *); 1483 } else { 1484 dp->m = NULL; 1485 dp->buf = ((uint8_t *)dma_buf) + 1486 (i * maxsz); 1487 } 1488 dp->ni = NULL; 1489 } 1490 return (0); 1491 1492fail: urtw_free_data_list(sc, data, ndata, 1); 1493 return (error); 1494} 1495 1496static int 1497urtw_alloc_rx_data_list(struct urtw_softc *sc) 1498{ 1499 int error, i; 1500 1501 error = urtw_alloc_data_list(sc, 1502 sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1503 MCLBYTES, NULL /* mbufs */); 1504 if (error != 0) 1505 return (error); 1506 1507 STAILQ_INIT(&sc->sc_rx_active); 1508 STAILQ_INIT(&sc->sc_rx_inactive); 1509 1510 for (i = 0; i < URTW_RX_DATA_LIST_COUNT; i++) 1511 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1512 1513 return (0); 1514} 1515 1516static int 1517urtw_alloc_tx_data_list(struct urtw_softc *sc) 1518{ 1519 int error, i; 1520 1521 error = urtw_alloc_data_list(sc, 1522 sc->sc_tx, URTW_TX_DATA_LIST_COUNT, URTW_TX_MAXSIZE, 1523 sc->sc_tx_dma_buf /* no mbufs */); 1524 if (error != 0) 1525 return (error); 1526 1527 STAILQ_INIT(&sc->sc_tx_active); 1528 STAILQ_INIT(&sc->sc_tx_inactive); 1529 STAILQ_INIT(&sc->sc_tx_pending); 1530 1531 for (i = 0; i < URTW_TX_DATA_LIST_COUNT; i++) 1532 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], 1533 next); 1534 1535 return (0); 1536} 1537 1538static int 1539urtw_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1540 const struct ieee80211_bpf_params *params) 1541{ 1542 struct ieee80211com *ic = ni->ni_ic; 1543 struct urtw_softc *sc = ic->ic_softc; 1544 struct urtw_data *bf; 1545 1546 /* prevent management frames from being sent if we're not ready */ 1547 if (!(sc->sc_flags & URTW_RUNNING)) { 1548 m_freem(m); 1549 return ENETDOWN; 1550 } 1551 URTW_LOCK(sc); 1552 bf = urtw_getbuf(sc); 1553 if (bf == NULL) { 1554 m_freem(m); 1555 URTW_UNLOCK(sc); 1556 return (ENOBUFS); /* XXX */ 1557 } 1558 1559 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_LOW) != 0) { 1560 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1561 URTW_UNLOCK(sc); 1562 return (EIO); 1563 } 1564 URTW_UNLOCK(sc); 1565 1566 sc->sc_txtimer = 5; 1567 return (0); 1568} 1569 1570static void 1571urtw_scan_start(struct ieee80211com *ic) 1572{ 1573 1574 /* XXX do nothing? */ 1575} 1576 1577static void 1578urtw_scan_end(struct ieee80211com *ic) 1579{ 1580 1581 /* XXX do nothing? */ 1582} 1583 1584static void 1585urtw_getradiocaps(struct ieee80211com *ic, 1586 int maxchans, int *nchans, struct ieee80211_channel chans[]) 1587{ 1588 uint8_t bands[IEEE80211_MODE_BYTES]; 1589 1590 memset(bands, 0, sizeof(bands)); 1591 setbit(bands, IEEE80211_MODE_11B); 1592 setbit(bands, IEEE80211_MODE_11G); 1593 ieee80211_add_channels_default_2ghz(chans, maxchans, nchans, bands, 0); 1594} 1595 1596static void 1597urtw_set_channel(struct ieee80211com *ic) 1598{ 1599 struct urtw_softc *sc = ic->ic_softc; 1600 uint32_t data, orig; 1601 usb_error_t error; 1602 1603 /* 1604 * if the user set a channel explicitly using ifconfig(8) this function 1605 * can be called earlier than we're expected that in some cases the 1606 * initialization would be failed if setting a channel is called before 1607 * the init have done. 1608 */ 1609 if (!(sc->sc_flags & URTW_RUNNING)) 1610 return; 1611 1612 if (sc->sc_curchan != NULL && sc->sc_curchan == ic->ic_curchan) 1613 return; 1614 1615 URTW_LOCK(sc); 1616 1617 /* 1618 * during changing th channel we need to temporarily be disable 1619 * TX. 1620 */ 1621 urtw_read32_m(sc, URTW_TX_CONF, &orig); 1622 data = orig & ~URTW_TX_LOOPBACK_MASK; 1623 urtw_write32_m(sc, URTW_TX_CONF, data | URTW_TX_LOOPBACK_MAC); 1624 1625 error = sc->sc_rf_set_chan(sc, ieee80211_chan2ieee(ic, ic->ic_curchan)); 1626 if (error != 0) 1627 goto fail; 1628 usb_pause_mtx(&sc->sc_mtx, 10); 1629 urtw_write32_m(sc, URTW_TX_CONF, orig); 1630 1631 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1632 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1633 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 1634 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1635 1636fail: 1637 URTW_UNLOCK(sc); 1638 1639 sc->sc_curchan = ic->ic_curchan; 1640 1641 if (error != 0) 1642 device_printf(sc->sc_dev, "could not change the channel\n"); 1643} 1644 1645static void 1646urtw_update_promisc(struct ieee80211com *ic) 1647{ 1648 struct urtw_softc *sc = ic->ic_softc; 1649 1650 URTW_LOCK(sc); 1651 if (sc->sc_flags & URTW_RUNNING) 1652 urtw_rx_setconf(sc); 1653 URTW_UNLOCK(sc); 1654} 1655 1656static void 1657urtw_update_mcast(struct ieee80211com *ic) 1658{ 1659 1660 /* XXX do nothing? */ 1661} 1662 1663static int 1664urtw_tx_start(struct urtw_softc *sc, struct ieee80211_node *ni, struct mbuf *m0, 1665 struct urtw_data *data, int prior) 1666{ 1667 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 1668 struct ieee80211_key *k; 1669 const struct ieee80211_txparam *tp; 1670 struct ieee80211com *ic = &sc->sc_ic; 1671 struct ieee80211vap *vap = ni->ni_vap; 1672 struct usb_xfer *rtl8187b_pipes[URTW_8187B_TXPIPE_MAX] = { 1673 sc->sc_xfer[URTW_8187B_BULK_TX_BE], 1674 sc->sc_xfer[URTW_8187B_BULK_TX_BK], 1675 sc->sc_xfer[URTW_8187B_BULK_TX_VI], 1676 sc->sc_xfer[URTW_8187B_BULK_TX_VO] 1677 }; 1678 struct usb_xfer *xfer; 1679 int dur = 0, rtsdur = 0, rtsenable = 0, ctsenable = 0, rate, 1680 pkttime = 0, txdur = 0, isshort = 0, xferlen; 1681 uint16_t acktime, rtstime, ctstime; 1682 uint32_t flags; 1683 usb_error_t error; 1684 1685 URTW_ASSERT_LOCKED(sc); 1686 1687 /* 1688 * Software crypto. 1689 */ 1690 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1691 k = ieee80211_crypto_encap(ni, m0); 1692 if (k == NULL) { 1693 device_printf(sc->sc_dev, 1694 "ieee80211_crypto_encap returns NULL.\n"); 1695 /* XXX we don't expect the fragmented frames */ 1696 m_freem(m0); 1697 return (ENOBUFS); 1698 } 1699 1700 /* in case packet header moved, reset pointer */ 1701 wh = mtod(m0, struct ieee80211_frame *); 1702 } 1703 1704 if (ieee80211_radiotap_active_vap(vap)) { 1705 struct urtw_tx_radiotap_header *tap = &sc->sc_txtap; 1706 1707 tap->wt_flags = 0; 1708 ieee80211_radiotap_tx(vap, m0); 1709 } 1710 1711 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_MGT || 1712 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_CTL) { 1713 tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)]; 1714 rate = tp->mgmtrate; 1715 } else { 1716 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1717 /* for data frames */ 1718 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1719 rate = tp->mcastrate; 1720 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 1721 rate = tp->ucastrate; 1722 else 1723 rate = urtw_rtl2rate(sc->sc_currate); 1724 } 1725 1726 sc->sc_stats.txrates[sc->sc_currate]++; 1727 1728 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1729 txdur = pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1730 IEEE80211_CRC_LEN, rate, 0, 0); 1731 else { 1732 acktime = urtw_compute_txtime(14, 2,0, 0); 1733 if ((m0->m_pkthdr.len + 4) > vap->iv_rtsthreshold) { 1734 rtsenable = 1; 1735 ctsenable = 0; 1736 rtstime = urtw_compute_txtime(URTW_ACKCTS_LEN, 2, 0, 0); 1737 ctstime = urtw_compute_txtime(14, 2, 0, 0); 1738 pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1739 IEEE80211_CRC_LEN, rate, 0, isshort); 1740 rtsdur = ctstime + pkttime + acktime + 1741 3 * URTW_ASIFS_TIME; 1742 txdur = rtstime + rtsdur; 1743 } else { 1744 rtsenable = ctsenable = rtsdur = 0; 1745 pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1746 IEEE80211_CRC_LEN, rate, 0, isshort); 1747 txdur = pkttime + URTW_ASIFS_TIME + acktime; 1748 } 1749 1750 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1751 dur = urtw_compute_txtime(m0->m_pkthdr.len + 1752 IEEE80211_CRC_LEN, rate, 0, isshort) + 1753 3 * URTW_ASIFS_TIME + 1754 2 * acktime; 1755 else 1756 dur = URTW_ASIFS_TIME + acktime; 1757 } 1758 USETW(wh->i_dur, dur); 1759 1760 xferlen = m0->m_pkthdr.len; 1761 xferlen += (sc->sc_flags & URTW_RTL8187B) ? (4 * 8) : (4 * 3); 1762 if ((0 == xferlen % 64) || (0 == xferlen % 512)) 1763 xferlen += 1; 1764 1765 memset(data->buf, 0, URTW_TX_MAXSIZE); 1766 flags = m0->m_pkthdr.len & 0xfff; 1767 flags |= URTW_TX_FLAG_NO_ENC; 1768 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1769 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE) && 1770 (sc->sc_preamble_mode == URTW_PREAMBLE_MODE_SHORT) && 1771 (sc->sc_currate != 0)) 1772 flags |= URTW_TX_FLAG_SPLCP; 1773 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1774 flags |= URTW_TX_FLAG_MOREFRAG; 1775 1776 flags |= (sc->sc_currate & 0xf) << URTW_TX_FLAG_TXRATE_SHIFT; 1777 1778 if (sc->sc_flags & URTW_RTL8187B) { 1779 struct urtw_8187b_txhdr *tx; 1780 1781 tx = (struct urtw_8187b_txhdr *)data->buf; 1782 if (ctsenable) 1783 flags |= URTW_TX_FLAG_CTS; 1784 if (rtsenable) { 1785 flags |= URTW_TX_FLAG_RTS; 1786 flags |= (urtw_rate2rtl(11) & 0xf) << 1787 URTW_TX_FLAG_RTSRATE_SHIFT; 1788 tx->rtsdur = rtsdur; 1789 } 1790 tx->flag = htole32(flags); 1791 tx->txdur = txdur; 1792 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1793 IEEE80211_FC0_TYPE_MGT && 1794 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1795 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1796 tx->retry = 1; 1797 else 1798 tx->retry = URTW_TX_MAXRETRY; 1799 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1)); 1800 } else { 1801 struct urtw_8187l_txhdr *tx; 1802 1803 tx = (struct urtw_8187l_txhdr *)data->buf; 1804 if (rtsenable) { 1805 flags |= URTW_TX_FLAG_RTS; 1806 tx->rtsdur = rtsdur; 1807 } 1808 flags |= (urtw_rate2rtl(11) & 0xf) << URTW_TX_FLAG_RTSRATE_SHIFT; 1809 tx->flag = htole32(flags); 1810 tx->retry = 3; /* CW minimum */ 1811 tx->retry |= 7 << 4; /* CW maximum */ 1812 tx->retry |= URTW_TX_MAXRETRY << 8; /* retry limitation */ 1813 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1)); 1814 } 1815 1816 data->buflen = xferlen; 1817 data->ni = ni; 1818 data->m = m0; 1819 1820 if (sc->sc_flags & URTW_RTL8187B) { 1821 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1822 case IEEE80211_FC0_TYPE_CTL: 1823 case IEEE80211_FC0_TYPE_MGT: 1824 xfer = sc->sc_xfer[URTW_8187B_BULK_TX_EP12]; 1825 break; 1826 default: 1827 KASSERT(M_WME_GETAC(m0) < URTW_8187B_TXPIPE_MAX, 1828 ("unsupported WME pipe %d", M_WME_GETAC(m0))); 1829 xfer = rtl8187b_pipes[M_WME_GETAC(m0)]; 1830 break; 1831 } 1832 } else 1833 xfer = (prior == URTW_PRIORITY_LOW) ? 1834 sc->sc_xfer[URTW_8187L_BULK_TX_LOW] : 1835 sc->sc_xfer[URTW_8187L_BULK_TX_NORMAL]; 1836 1837 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 1838 usbd_transfer_start(xfer); 1839 1840 error = urtw_led_ctl(sc, URTW_LED_CTL_TX); 1841 if (error != 0) 1842 device_printf(sc->sc_dev, "could not control LED (%d)\n", 1843 error); 1844 return (0); 1845} 1846 1847static int 1848urtw_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1849{ 1850 struct ieee80211com *ic = vap->iv_ic; 1851 struct urtw_softc *sc = ic->ic_softc; 1852 struct urtw_vap *uvp = URTW_VAP(vap); 1853 struct ieee80211_node *ni; 1854 usb_error_t error = 0; 1855 1856 DPRINTF(sc, URTW_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1857 ieee80211_state_name[vap->iv_state], 1858 ieee80211_state_name[nstate]); 1859 1860 sc->sc_state = nstate; 1861 1862 IEEE80211_UNLOCK(ic); 1863 URTW_LOCK(sc); 1864 usb_callout_stop(&sc->sc_led_ch); 1865 callout_stop(&sc->sc_watchdog_ch); 1866 1867 switch (nstate) { 1868 case IEEE80211_S_INIT: 1869 case IEEE80211_S_SCAN: 1870 case IEEE80211_S_AUTH: 1871 case IEEE80211_S_ASSOC: 1872 break; 1873 case IEEE80211_S_RUN: 1874 ni = ieee80211_ref_node(vap->iv_bss); 1875 /* setting bssid. */ 1876 urtw_write32_m(sc, URTW_BSSID, ((uint32_t *)ni->ni_bssid)[0]); 1877 urtw_write16_m(sc, URTW_BSSID + 4, 1878 ((uint16_t *)ni->ni_bssid)[2]); 1879 urtw_update_msr(sc); 1880 /* XXX maybe the below would be incorrect. */ 1881 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1882 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1883 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 0x64); 1884 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1885 error = urtw_led_ctl(sc, URTW_LED_CTL_LINK); 1886 if (error != 0) 1887 device_printf(sc->sc_dev, 1888 "could not control LED (%d)\n", error); 1889 ieee80211_free_node(ni); 1890 break; 1891 default: 1892 break; 1893 } 1894fail: 1895 URTW_UNLOCK(sc); 1896 IEEE80211_LOCK(ic); 1897 return (uvp->newstate(vap, nstate, arg)); 1898} 1899 1900static void 1901urtw_watchdog(void *arg) 1902{ 1903 struct urtw_softc *sc = arg; 1904 struct ieee80211com *ic = &sc->sc_ic; 1905 1906 if (sc->sc_txtimer > 0) { 1907 if (--sc->sc_txtimer == 0) { 1908 device_printf(sc->sc_dev, "device timeout\n"); 1909 counter_u64_add(ic->ic_oerrors, 1); 1910 ieee80211_restart_all(ic); 1911 return; 1912 } 1913 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1914 } 1915} 1916 1917static void 1918urtw_set_multi(void *arg) 1919{ 1920 /* XXX don't know how to set a device. Lack of docs. */ 1921} 1922 1923static usb_error_t 1924urtw_set_rate(struct urtw_softc *sc) 1925{ 1926 int i, basic_rate, min_rr_rate, max_rr_rate; 1927 uint16_t data; 1928 usb_error_t error; 1929 1930 basic_rate = urtw_rate2rtl(48); 1931 min_rr_rate = urtw_rate2rtl(12); 1932 max_rr_rate = urtw_rate2rtl(48); 1933 1934 urtw_write8_m(sc, URTW_RESP_RATE, 1935 max_rr_rate << URTW_RESP_MAX_RATE_SHIFT | 1936 min_rr_rate << URTW_RESP_MIN_RATE_SHIFT); 1937 1938 urtw_read16_m(sc, URTW_BRSR, &data); 1939 data &= ~URTW_BRSR_MBR_8185; 1940 1941 for (i = 0; i <= basic_rate; i++) 1942 data |= (1 << i); 1943 1944 urtw_write16_m(sc, URTW_BRSR, data); 1945fail: 1946 return (error); 1947} 1948 1949static uint16_t 1950urtw_rate2rtl(uint32_t rate) 1951{ 1952 unsigned int i; 1953 1954 for (i = 0; i < nitems(urtw_ratetable); i++) { 1955 if (rate == urtw_ratetable[i].reg) 1956 return urtw_ratetable[i].val; 1957 } 1958 1959 return (3); 1960} 1961 1962static uint16_t 1963urtw_rtl2rate(uint32_t rate) 1964{ 1965 unsigned int i; 1966 1967 for (i = 0; i < nitems(urtw_ratetable); i++) { 1968 if (rate == urtw_ratetable[i].val) 1969 return urtw_ratetable[i].reg; 1970 } 1971 1972 return (0); 1973} 1974 1975static usb_error_t 1976urtw_update_msr(struct urtw_softc *sc) 1977{ 1978 struct ieee80211com *ic = &sc->sc_ic; 1979 uint8_t data; 1980 usb_error_t error; 1981 1982 urtw_read8_m(sc, URTW_MSR, &data); 1983 data &= ~URTW_MSR_LINK_MASK; 1984 1985 if (sc->sc_state == IEEE80211_S_RUN) { 1986 switch (ic->ic_opmode) { 1987 case IEEE80211_M_STA: 1988 case IEEE80211_M_MONITOR: 1989 data |= URTW_MSR_LINK_STA; 1990 if (sc->sc_flags & URTW_RTL8187B) 1991 data |= URTW_MSR_LINK_ENEDCA; 1992 break; 1993 case IEEE80211_M_IBSS: 1994 data |= URTW_MSR_LINK_ADHOC; 1995 break; 1996 case IEEE80211_M_HOSTAP: 1997 data |= URTW_MSR_LINK_HOSTAP; 1998 break; 1999 default: 2000 DPRINTF(sc, URTW_DEBUG_STATE, 2001 "unsupported operation mode 0x%x\n", 2002 ic->ic_opmode); 2003 error = USB_ERR_INVAL; 2004 goto fail; 2005 } 2006 } else 2007 data |= URTW_MSR_LINK_NONE; 2008 2009 urtw_write8_m(sc, URTW_MSR, data); 2010fail: 2011 return (error); 2012} 2013 2014static usb_error_t 2015urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data) 2016{ 2017 struct usb_device_request req; 2018 usb_error_t error; 2019 2020 URTW_ASSERT_LOCKED(sc); 2021 2022 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2023 req.bRequest = URTW_8187_GETREGS_REQ; 2024 USETW(req.wValue, (val & 0xff) | 0xff00); 2025 USETW(req.wIndex, (val >> 8) & 0x3); 2026 USETW(req.wLength, sizeof(uint8_t)); 2027 2028 error = urtw_do_request(sc, &req, data); 2029 return (error); 2030} 2031 2032static usb_error_t 2033urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data) 2034{ 2035 struct usb_device_request req; 2036 usb_error_t error; 2037 2038 URTW_ASSERT_LOCKED(sc); 2039 2040 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2041 req.bRequest = URTW_8187_GETREGS_REQ; 2042 USETW(req.wValue, (val & 0xff) | 0xff00); 2043 USETW(req.wIndex, (val >> 8) & 0x3); 2044 USETW(req.wLength, sizeof(uint16_t)); 2045 2046 error = urtw_do_request(sc, &req, data); 2047 return (error); 2048} 2049 2050static usb_error_t 2051urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data) 2052{ 2053 struct usb_device_request req; 2054 usb_error_t error; 2055 2056 URTW_ASSERT_LOCKED(sc); 2057 2058 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2059 req.bRequest = URTW_8187_GETREGS_REQ; 2060 USETW(req.wValue, (val & 0xff) | 0xff00); 2061 USETW(req.wIndex, (val >> 8) & 0x3); 2062 USETW(req.wLength, sizeof(uint32_t)); 2063 2064 error = urtw_do_request(sc, &req, data); 2065 return (error); 2066} 2067 2068static usb_error_t 2069urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data) 2070{ 2071 struct usb_device_request req; 2072 2073 URTW_ASSERT_LOCKED(sc); 2074 2075 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2076 req.bRequest = URTW_8187_SETREGS_REQ; 2077 USETW(req.wValue, (val & 0xff) | 0xff00); 2078 USETW(req.wIndex, (val >> 8) & 0x3); 2079 USETW(req.wLength, sizeof(uint8_t)); 2080 2081 return (urtw_do_request(sc, &req, &data)); 2082} 2083 2084static usb_error_t 2085urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data) 2086{ 2087 struct usb_device_request req; 2088 2089 URTW_ASSERT_LOCKED(sc); 2090 2091 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2092 req.bRequest = URTW_8187_SETREGS_REQ; 2093 USETW(req.wValue, (val & 0xff) | 0xff00); 2094 USETW(req.wIndex, (val >> 8) & 0x3); 2095 USETW(req.wLength, sizeof(uint16_t)); 2096 2097 return (urtw_do_request(sc, &req, &data)); 2098} 2099 2100static usb_error_t 2101urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data) 2102{ 2103 struct usb_device_request req; 2104 2105 URTW_ASSERT_LOCKED(sc); 2106 2107 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2108 req.bRequest = URTW_8187_SETREGS_REQ; 2109 USETW(req.wValue, (val & 0xff) | 0xff00); 2110 USETW(req.wIndex, (val >> 8) & 0x3); 2111 USETW(req.wLength, sizeof(uint32_t)); 2112 2113 return (urtw_do_request(sc, &req, &data)); 2114} 2115 2116static usb_error_t 2117urtw_get_macaddr(struct urtw_softc *sc) 2118{ 2119 struct ieee80211com *ic = &sc->sc_ic; 2120 uint32_t data; 2121 usb_error_t error; 2122 2123 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data); 2124 if (error != 0) 2125 goto fail; 2126 ic->ic_macaddr[0] = data & 0xff; 2127 ic->ic_macaddr[1] = (data & 0xff00) >> 8; 2128 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data); 2129 if (error != 0) 2130 goto fail; 2131 ic->ic_macaddr[2] = data & 0xff; 2132 ic->ic_macaddr[3] = (data & 0xff00) >> 8; 2133 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data); 2134 if (error != 0) 2135 goto fail; 2136 ic->ic_macaddr[4] = data & 0xff; 2137 ic->ic_macaddr[5] = (data & 0xff00) >> 8; 2138fail: 2139 return (error); 2140} 2141 2142static usb_error_t 2143urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data) 2144{ 2145#define URTW_READCMD_LEN 3 2146 int addrlen, i; 2147 int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 }; 2148 usb_error_t error; 2149 2150 /* NB: make sure the buffer is initialized */ 2151 *data = 0; 2152 2153 /* enable EPROM programming */ 2154 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_PROGRAM_MODE); 2155 DELAY(URTW_EPROM_DELAY); 2156 2157 error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE); 2158 if (error != 0) 2159 goto fail; 2160 error = urtw_eprom_ck(sc); 2161 if (error != 0) 2162 goto fail; 2163 error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN); 2164 if (error != 0) 2165 goto fail; 2166 if (sc->sc_epromtype == URTW_EEPROM_93C56) { 2167 addrlen = 8; 2168 addrstr[0] = addr & (1 << 7); 2169 addrstr[1] = addr & (1 << 6); 2170 addrstr[2] = addr & (1 << 5); 2171 addrstr[3] = addr & (1 << 4); 2172 addrstr[4] = addr & (1 << 3); 2173 addrstr[5] = addr & (1 << 2); 2174 addrstr[6] = addr & (1 << 1); 2175 addrstr[7] = addr & (1 << 0); 2176 } else { 2177 addrlen=6; 2178 addrstr[0] = addr & (1 << 5); 2179 addrstr[1] = addr & (1 << 4); 2180 addrstr[2] = addr & (1 << 3); 2181 addrstr[3] = addr & (1 << 2); 2182 addrstr[4] = addr & (1 << 1); 2183 addrstr[5] = addr & (1 << 0); 2184 } 2185 error = urtw_eprom_sendbits(sc, addrstr, addrlen); 2186 if (error != 0) 2187 goto fail; 2188 2189 error = urtw_eprom_writebit(sc, 0); 2190 if (error != 0) 2191 goto fail; 2192 2193 for (i = 0; i < 16; i++) { 2194 error = urtw_eprom_ck(sc); 2195 if (error != 0) 2196 goto fail; 2197 error = urtw_eprom_readbit(sc, &data16); 2198 if (error != 0) 2199 goto fail; 2200 2201 (*data) |= (data16 << (15 - i)); 2202 } 2203 2204 error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE); 2205 if (error != 0) 2206 goto fail; 2207 error = urtw_eprom_ck(sc); 2208 if (error != 0) 2209 goto fail; 2210 2211 /* now disable EPROM programming */ 2212 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE); 2213fail: 2214 return (error); 2215#undef URTW_READCMD_LEN 2216} 2217 2218static usb_error_t 2219urtw_eprom_cs(struct urtw_softc *sc, int able) 2220{ 2221 uint8_t data; 2222 usb_error_t error; 2223 2224 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2225 if (able == URTW_EPROM_ENABLE) 2226 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CS); 2227 else 2228 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CS); 2229 DELAY(URTW_EPROM_DELAY); 2230fail: 2231 return (error); 2232} 2233 2234static usb_error_t 2235urtw_eprom_ck(struct urtw_softc *sc) 2236{ 2237 uint8_t data; 2238 usb_error_t error; 2239 2240 /* masking */ 2241 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2242 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK); 2243 DELAY(URTW_EPROM_DELAY); 2244 /* unmasking */ 2245 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2246 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK); 2247 DELAY(URTW_EPROM_DELAY); 2248fail: 2249 return (error); 2250} 2251 2252static usb_error_t 2253urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data) 2254{ 2255 uint8_t data8; 2256 usb_error_t error; 2257 2258 urtw_read8_m(sc, URTW_EPROM_CMD, &data8); 2259 *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0; 2260 DELAY(URTW_EPROM_DELAY); 2261 2262fail: 2263 return (error); 2264} 2265 2266static usb_error_t 2267urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit) 2268{ 2269 uint8_t data; 2270 usb_error_t error; 2271 2272 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2273 if (bit != 0) 2274 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_WRITEBIT); 2275 else 2276 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_WRITEBIT); 2277 DELAY(URTW_EPROM_DELAY); 2278fail: 2279 return (error); 2280} 2281 2282static usb_error_t 2283urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen) 2284{ 2285 int i = 0; 2286 usb_error_t error = 0; 2287 2288 for (i = 0; i < buflen; i++) { 2289 error = urtw_eprom_writebit(sc, buf[i]); 2290 if (error != 0) 2291 goto fail; 2292 error = urtw_eprom_ck(sc); 2293 if (error != 0) 2294 goto fail; 2295 } 2296fail: 2297 return (error); 2298} 2299 2300 2301static usb_error_t 2302urtw_get_txpwr(struct urtw_softc *sc) 2303{ 2304 int i, j; 2305 uint32_t data; 2306 usb_error_t error; 2307 2308 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW_BASE, &data); 2309 if (error != 0) 2310 goto fail; 2311 sc->sc_txpwr_cck_base = data & 0xf; 2312 sc->sc_txpwr_ofdm_base = (data >> 4) & 0xf; 2313 2314 for (i = 1, j = 0; i < 6; i += 2, j++) { 2315 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW0 + j, &data); 2316 if (error != 0) 2317 goto fail; 2318 sc->sc_txpwr_cck[i] = data & 0xf; 2319 sc->sc_txpwr_cck[i + 1] = (data & 0xf00) >> 8; 2320 sc->sc_txpwr_ofdm[i] = (data & 0xf0) >> 4; 2321 sc->sc_txpwr_ofdm[i + 1] = (data & 0xf000) >> 12; 2322 } 2323 for (i = 1, j = 0; i < 4; i += 2, j++) { 2324 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW1 + j, &data); 2325 if (error != 0) 2326 goto fail; 2327 sc->sc_txpwr_cck[i + 6] = data & 0xf; 2328 sc->sc_txpwr_cck[i + 6 + 1] = (data & 0xf00) >> 8; 2329 sc->sc_txpwr_ofdm[i + 6] = (data & 0xf0) >> 4; 2330 sc->sc_txpwr_ofdm[i + 6 + 1] = (data & 0xf000) >> 12; 2331 } 2332 if (sc->sc_flags & URTW_RTL8187B) { 2333 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2, &data); 2334 if (error != 0) 2335 goto fail; 2336 sc->sc_txpwr_cck[1 + 6 + 4] = data & 0xf; 2337 sc->sc_txpwr_ofdm[1 + 6 + 4] = (data & 0xf0) >> 4; 2338 error = urtw_eprom_read32(sc, 0x0a, &data); 2339 if (error != 0) 2340 goto fail; 2341 sc->sc_txpwr_cck[2 + 6 + 4] = data & 0xf; 2342 sc->sc_txpwr_ofdm[2 + 6 + 4] = (data & 0xf0) >> 4; 2343 error = urtw_eprom_read32(sc, 0x1c, &data); 2344 if (error != 0) 2345 goto fail; 2346 sc->sc_txpwr_cck[3 + 6 + 4] = data & 0xf; 2347 sc->sc_txpwr_cck[3 + 6 + 4 + 1] = (data & 0xf00) >> 8; 2348 sc->sc_txpwr_ofdm[3 + 6 + 4] = (data & 0xf0) >> 4; 2349 sc->sc_txpwr_ofdm[3 + 6 + 4 + 1] = (data & 0xf000) >> 12; 2350 } else { 2351 for (i = 1, j = 0; i < 4; i += 2, j++) { 2352 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2 + j, 2353 &data); 2354 if (error != 0) 2355 goto fail; 2356 sc->sc_txpwr_cck[i + 6 + 4] = data & 0xf; 2357 sc->sc_txpwr_cck[i + 6 + 4 + 1] = (data & 0xf00) >> 8; 2358 sc->sc_txpwr_ofdm[i + 6 + 4] = (data & 0xf0) >> 4; 2359 sc->sc_txpwr_ofdm[i + 6 + 4 + 1] = (data & 0xf000) >> 12; 2360 } 2361 } 2362fail: 2363 return (error); 2364} 2365 2366 2367static usb_error_t 2368urtw_get_rfchip(struct urtw_softc *sc) 2369{ 2370 int ret; 2371 uint8_t data8; 2372 uint32_t data; 2373 usb_error_t error; 2374 2375 if (sc->sc_flags & URTW_RTL8187B) { 2376 urtw_read8_m(sc, 0xe1, &data8); 2377 switch (data8) { 2378 case 0: 2379 sc->sc_flags |= URTW_RTL8187B_REV_B; 2380 break; 2381 case 1: 2382 sc->sc_flags |= URTW_RTL8187B_REV_D; 2383 break; 2384 case 2: 2385 sc->sc_flags |= URTW_RTL8187B_REV_E; 2386 break; 2387 default: 2388 device_printf(sc->sc_dev, "unknown type: %#x\n", data8); 2389 sc->sc_flags |= URTW_RTL8187B_REV_B; 2390 break; 2391 } 2392 } else { 2393 urtw_read32_m(sc, URTW_TX_CONF, &data); 2394 switch (data & URTW_TX_HWMASK) { 2395 case URTW_TX_R8187vD_B: 2396 sc->sc_flags |= URTW_RTL8187B; 2397 break; 2398 case URTW_TX_R8187vD: 2399 break; 2400 default: 2401 device_printf(sc->sc_dev, "unknown RTL8187L type: %#x\n", 2402 data & URTW_TX_HWMASK); 2403 break; 2404 } 2405 } 2406 2407 error = urtw_eprom_read32(sc, URTW_EPROM_RFCHIPID, &data); 2408 if (error != 0) 2409 goto fail; 2410 switch (data & 0xff) { 2411 case URTW_EPROM_RFCHIPID_RTL8225U: 2412 error = urtw_8225_isv2(sc, &ret); 2413 if (error != 0) 2414 goto fail; 2415 if (ret == 0) { 2416 sc->sc_rf_init = urtw_8225_rf_init; 2417 sc->sc_rf_set_sens = urtw_8225_rf_set_sens; 2418 sc->sc_rf_set_chan = urtw_8225_rf_set_chan; 2419 sc->sc_rf_stop = urtw_8225_rf_stop; 2420 } else { 2421 sc->sc_rf_init = urtw_8225v2_rf_init; 2422 sc->sc_rf_set_chan = urtw_8225v2_rf_set_chan; 2423 sc->sc_rf_stop = urtw_8225_rf_stop; 2424 } 2425 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2426 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2427 break; 2428 case URTW_EPROM_RFCHIPID_RTL8225Z2: 2429 sc->sc_rf_init = urtw_8225v2b_rf_init; 2430 sc->sc_rf_set_chan = urtw_8225v2b_rf_set_chan; 2431 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2432 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2433 sc->sc_rf_stop = urtw_8225_rf_stop; 2434 break; 2435 default: 2436 DPRINTF(sc, URTW_DEBUG_STATE, 2437 "unsupported RF chip %d\n", data & 0xff); 2438 error = USB_ERR_INVAL; 2439 goto fail; 2440 } 2441 2442 device_printf(sc->sc_dev, "%s rf %s hwrev %s\n", 2443 (sc->sc_flags & URTW_RTL8187B) ? "rtl8187b" : "rtl8187l", 2444 ((data & 0xff) == URTW_EPROM_RFCHIPID_RTL8225U) ? "rtl8225u" : 2445 "rtl8225z2", 2446 (sc->sc_flags & URTW_RTL8187B) ? ((data8 == 0) ? "b" : 2447 (data8 == 1) ? "d" : "e") : "none"); 2448 2449fail: 2450 return (error); 2451} 2452 2453 2454static usb_error_t 2455urtw_led_init(struct urtw_softc *sc) 2456{ 2457 uint32_t rev; 2458 usb_error_t error; 2459 2460 urtw_read8_m(sc, URTW_PSR, &sc->sc_psr); 2461 error = urtw_eprom_read32(sc, URTW_EPROM_SWREV, &rev); 2462 if (error != 0) 2463 goto fail; 2464 2465 switch (rev & URTW_EPROM_CID_MASK) { 2466 case URTW_EPROM_CID_ALPHA0: 2467 sc->sc_strategy = URTW_SW_LED_MODE1; 2468 break; 2469 case URTW_EPROM_CID_SERCOMM_PS: 2470 sc->sc_strategy = URTW_SW_LED_MODE3; 2471 break; 2472 case URTW_EPROM_CID_HW_LED: 2473 sc->sc_strategy = URTW_HW_LED; 2474 break; 2475 case URTW_EPROM_CID_RSVD0: 2476 case URTW_EPROM_CID_RSVD1: 2477 default: 2478 sc->sc_strategy = URTW_SW_LED_MODE0; 2479 break; 2480 } 2481 2482 sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0; 2483 2484fail: 2485 return (error); 2486} 2487 2488 2489static usb_error_t 2490urtw_8225_rf_init(struct urtw_softc *sc) 2491{ 2492 unsigned int i; 2493 uint16_t data; 2494 usb_error_t error; 2495 2496 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2497 if (error) 2498 goto fail; 2499 2500 error = urtw_8225_usb_init(sc); 2501 if (error) 2502 goto fail; 2503 2504 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2505 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2506 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2507 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2508 2509 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2510 if (error) 2511 goto fail; 2512 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2513 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2514 if (error) 2515 goto fail; 2516 2517 error = urtw_8185_rf_pins_enable(sc); 2518 if (error) 2519 goto fail; 2520 usb_pause_mtx(&sc->sc_mtx, 1000); 2521 2522 for (i = 0; i < nitems(urtw_8225_rf_part1); i++) { 2523 urtw_8225_write(sc, urtw_8225_rf_part1[i].reg, 2524 urtw_8225_rf_part1[i].val); 2525 usb_pause_mtx(&sc->sc_mtx, 1); 2526 } 2527 usb_pause_mtx(&sc->sc_mtx, 100); 2528 urtw_8225_write(sc, 2529 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2530 usb_pause_mtx(&sc->sc_mtx, 200); 2531 urtw_8225_write(sc, 2532 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2533 usb_pause_mtx(&sc->sc_mtx, 200); 2534 urtw_8225_write(sc, 2535 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC3); 2536 2537 for (i = 0; i < 95; i++) { 2538 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2539 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, urtw_8225_rxgain[i]); 2540 } 2541 2542 urtw_8225_write(sc, 2543 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC4); 2544 urtw_8225_write(sc, 2545 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC5); 2546 2547 for (i = 0; i < 128; i++) { 2548 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2549 usb_pause_mtx(&sc->sc_mtx, 1); 2550 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2551 usb_pause_mtx(&sc->sc_mtx, 1); 2552 } 2553 2554 for (i = 0; i < nitems(urtw_8225_rf_part2); i++) { 2555 urtw_8187_write_phy_ofdm(sc, urtw_8225_rf_part2[i].reg, 2556 urtw_8225_rf_part2[i].val); 2557 usb_pause_mtx(&sc->sc_mtx, 1); 2558 } 2559 2560 error = urtw_8225_setgain(sc, 4); 2561 if (error) 2562 goto fail; 2563 2564 for (i = 0; i < nitems(urtw_8225_rf_part3); i++) { 2565 urtw_8187_write_phy_cck(sc, urtw_8225_rf_part3[i].reg, 2566 urtw_8225_rf_part3[i].val); 2567 usb_pause_mtx(&sc->sc_mtx, 1); 2568 } 2569 2570 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2571 2572 error = urtw_8225_set_txpwrlvl(sc, 1); 2573 if (error) 2574 goto fail; 2575 2576 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2577 usb_pause_mtx(&sc->sc_mtx, 1); 2578 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2579 usb_pause_mtx(&sc->sc_mtx, 1); 2580 2581 /* TX ant A, 0x0 for B */ 2582 error = urtw_8185_tx_antenna(sc, 0x3); 2583 if (error) 2584 goto fail; 2585 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2586 2587 error = urtw_8225_rf_set_chan(sc, 1); 2588fail: 2589 return (error); 2590} 2591 2592static usb_error_t 2593urtw_8185_rf_pins_enable(struct urtw_softc *sc) 2594{ 2595 usb_error_t error = 0; 2596 2597 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1ff7); 2598fail: 2599 return (error); 2600} 2601 2602static usb_error_t 2603urtw_8185_tx_antenna(struct urtw_softc *sc, uint8_t ant) 2604{ 2605 usb_error_t error; 2606 2607 urtw_write8_m(sc, URTW_TX_ANTENNA, ant); 2608 usb_pause_mtx(&sc->sc_mtx, 1); 2609fail: 2610 return (error); 2611} 2612 2613static usb_error_t 2614urtw_8187_write_phy_ofdm_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2615{ 2616 2617 data = data & 0xff; 2618 return urtw_8187_write_phy(sc, addr, data); 2619} 2620 2621static usb_error_t 2622urtw_8187_write_phy_cck_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2623{ 2624 2625 data = data & 0xff; 2626 return urtw_8187_write_phy(sc, addr, data | 0x10000); 2627} 2628 2629static usb_error_t 2630urtw_8187_write_phy(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2631{ 2632 uint32_t phyw; 2633 usb_error_t error; 2634 2635 phyw = ((data << 8) | (addr | 0x80)); 2636 urtw_write8_m(sc, URTW_PHY_MAGIC4, ((phyw & 0xff000000) >> 24)); 2637 urtw_write8_m(sc, URTW_PHY_MAGIC3, ((phyw & 0x00ff0000) >> 16)); 2638 urtw_write8_m(sc, URTW_PHY_MAGIC2, ((phyw & 0x0000ff00) >> 8)); 2639 urtw_write8_m(sc, URTW_PHY_MAGIC1, ((phyw & 0x000000ff))); 2640 usb_pause_mtx(&sc->sc_mtx, 1); 2641fail: 2642 return (error); 2643} 2644 2645static usb_error_t 2646urtw_8225_setgain(struct urtw_softc *sc, int16_t gain) 2647{ 2648 usb_error_t error; 2649 2650 urtw_8187_write_phy_ofdm(sc, 0x0d, urtw_8225_gain[gain * 4]); 2651 urtw_8187_write_phy_ofdm(sc, 0x1b, urtw_8225_gain[gain * 4 + 2]); 2652 urtw_8187_write_phy_ofdm(sc, 0x1d, urtw_8225_gain[gain * 4 + 3]); 2653 urtw_8187_write_phy_ofdm(sc, 0x23, urtw_8225_gain[gain * 4 + 1]); 2654fail: 2655 return (error); 2656} 2657 2658static usb_error_t 2659urtw_8225_usb_init(struct urtw_softc *sc) 2660{ 2661 uint8_t data; 2662 usb_error_t error; 2663 2664 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 0); 2665 urtw_write8_m(sc, URTW_GPIO, 0); 2666 error = urtw_read8e(sc, 0x53, &data); 2667 if (error) 2668 goto fail; 2669 error = urtw_write8e(sc, 0x53, data | (1 << 7)); 2670 if (error) 2671 goto fail; 2672 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 4); 2673 urtw_write8_m(sc, URTW_GPIO, 0x20); 2674 urtw_write8_m(sc, URTW_GP_ENABLE, 0); 2675 2676 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x80); 2677 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x80); 2678 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x80); 2679 2680 usb_pause_mtx(&sc->sc_mtx, 500); 2681fail: 2682 return (error); 2683} 2684 2685static usb_error_t 2686urtw_8225_write_c(struct urtw_softc *sc, uint8_t addr, uint16_t data) 2687{ 2688 uint16_t d80, d82, d84; 2689 usb_error_t error; 2690 2691 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &d80); 2692 d80 &= URTW_RF_PINS_MAGIC1; 2693 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &d82); 2694 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &d84); 2695 d84 &= URTW_RF_PINS_MAGIC2; 2696 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, d82 | URTW_RF_PINS_MAGIC3); 2697 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84 | URTW_RF_PINS_MAGIC3); 2698 DELAY(10); 2699 2700 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2701 DELAY(2); 2702 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80); 2703 DELAY(10); 2704 2705 error = urtw_8225_write_s16(sc, addr, 0x8225, &data); 2706 if (error != 0) 2707 goto fail; 2708 2709 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2710 DELAY(10); 2711 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2712 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84); 2713 usb_pause_mtx(&sc->sc_mtx, 2); 2714fail: 2715 return (error); 2716} 2717 2718static usb_error_t 2719urtw_8225_write_s16(struct urtw_softc *sc, uint8_t addr, int index, 2720 uint16_t *data) 2721{ 2722 uint8_t buf[2]; 2723 uint16_t data16; 2724 struct usb_device_request req; 2725 usb_error_t error = 0; 2726 2727 data16 = *data; 2728 2729 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2730 req.bRequest = URTW_8187_SETREGS_REQ; 2731 USETW(req.wValue, addr); 2732 USETW(req.wIndex, index); 2733 USETW(req.wLength, sizeof(uint16_t)); 2734 buf[0] = (data16 & 0x00ff); 2735 buf[1] = (data16 & 0xff00) >> 8; 2736 2737 error = urtw_do_request(sc, &req, buf); 2738 2739 return (error); 2740} 2741 2742static usb_error_t 2743urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan) 2744{ 2745 usb_error_t error; 2746 2747 error = urtw_8225_set_txpwrlvl(sc, chan); 2748 if (error) 2749 goto fail; 2750 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 2751 usb_pause_mtx(&sc->sc_mtx, 10); 2752fail: 2753 return (error); 2754} 2755 2756static usb_error_t 2757urtw_8225_rf_set_sens(struct urtw_softc *sc, int sens) 2758{ 2759 usb_error_t error; 2760 2761 if (sens < 0 || sens > 6) 2762 return -1; 2763 2764 if (sens > 4) 2765 urtw_8225_write(sc, 2766 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC1); 2767 else 2768 urtw_8225_write(sc, 2769 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC2); 2770 2771 sens = 6 - sens; 2772 error = urtw_8225_setgain(sc, sens); 2773 if (error) 2774 goto fail; 2775 2776 urtw_8187_write_phy_cck(sc, 0x41, urtw_8225_threshold[sens]); 2777 2778fail: 2779 return (error); 2780} 2781 2782static usb_error_t 2783urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan) 2784{ 2785 int i, idx, set; 2786 uint8_t *cck_pwltable; 2787 uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max; 2788 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 2789 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 2790 usb_error_t error; 2791 2792 cck_pwrlvl_max = 11; 2793 ofdm_pwrlvl_max = 25; /* 12 -> 25 */ 2794 ofdm_pwrlvl_min = 10; 2795 2796 /* CCK power setting */ 2797 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 2798 idx = cck_pwrlvl % 6; 2799 set = cck_pwrlvl / 6; 2800 cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 : 2801 urtw_8225_txpwr_cck; 2802 2803 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 2804 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2805 for (i = 0; i < 8; i++) { 2806 urtw_8187_write_phy_cck(sc, 0x44 + i, 2807 cck_pwltable[idx * 8 + i]); 2808 } 2809 usb_pause_mtx(&sc->sc_mtx, 1); 2810 2811 /* OFDM power setting */ 2812 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 2813 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 2814 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 2815 2816 idx = ofdm_pwrlvl % 6; 2817 set = ofdm_pwrlvl / 6; 2818 2819 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 2820 if (error) 2821 goto fail; 2822 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 2823 urtw_8187_write_phy_ofdm(sc, 6, 0); 2824 urtw_8187_write_phy_ofdm(sc, 8, 0); 2825 2826 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 2827 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2828 urtw_8187_write_phy_ofdm(sc, 0x5, urtw_8225_txpwr_ofdm[idx]); 2829 urtw_8187_write_phy_ofdm(sc, 0x7, urtw_8225_txpwr_ofdm[idx]); 2830 usb_pause_mtx(&sc->sc_mtx, 1); 2831fail: 2832 return (error); 2833} 2834 2835 2836static usb_error_t 2837urtw_8225_rf_stop(struct urtw_softc *sc) 2838{ 2839 uint8_t data; 2840 usb_error_t error; 2841 2842 urtw_8225_write(sc, 0x4, 0x1f); 2843 2844 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2845 if (error) 2846 goto fail; 2847 2848 urtw_read8_m(sc, URTW_CONFIG3, &data); 2849 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 2850 if (sc->sc_flags & URTW_RTL8187B) { 2851 urtw_write32_m(sc, URTW_ANAPARAM2, 2852 URTW_8187B_8225_ANAPARAM2_OFF); 2853 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_OFF); 2854 urtw_write32_m(sc, URTW_ANAPARAM3, 2855 URTW_8187B_8225_ANAPARAM3_OFF); 2856 } else { 2857 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8225_ANAPARAM2_OFF); 2858 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8225_ANAPARAM_OFF); 2859 } 2860 2861 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 2862 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2863 if (error) 2864 goto fail; 2865 2866fail: 2867 return (error); 2868} 2869 2870static usb_error_t 2871urtw_8225v2_rf_init(struct urtw_softc *sc) 2872{ 2873 unsigned int i; 2874 uint16_t data; 2875 uint32_t data32; 2876 usb_error_t error; 2877 2878 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2879 if (error) 2880 goto fail; 2881 2882 error = urtw_8225_usb_init(sc); 2883 if (error) 2884 goto fail; 2885 2886 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2887 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2888 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2889 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2890 2891 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2892 if (error) 2893 goto fail; 2894 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2895 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2896 if (error) 2897 goto fail; 2898 2899 error = urtw_8185_rf_pins_enable(sc); 2900 if (error) 2901 goto fail; 2902 2903 usb_pause_mtx(&sc->sc_mtx, 500); 2904 2905 for (i = 0; i < nitems(urtw_8225v2_rf_part1); i++) { 2906 urtw_8225_write(sc, urtw_8225v2_rf_part1[i].reg, 2907 urtw_8225v2_rf_part1[i].val); 2908 } 2909 usb_pause_mtx(&sc->sc_mtx, 50); 2910 2911 urtw_8225_write(sc, 2912 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 2913 2914 for (i = 0; i < 95; i++) { 2915 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2916 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 2917 urtw_8225v2_rxgain[i]); 2918 } 2919 2920 urtw_8225_write(sc, 2921 URTW_8225_ADDR_3_MAGIC, URTW_8225_ADDR_3_DATA_MAGIC1); 2922 urtw_8225_write(sc, 2923 URTW_8225_ADDR_5_MAGIC, URTW_8225_ADDR_5_DATA_MAGIC1); 2924 urtw_8225_write(sc, 2925 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC2); 2926 urtw_8225_write(sc, 2927 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2928 usb_pause_mtx(&sc->sc_mtx, 100); 2929 urtw_8225_write(sc, 2930 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2931 usb_pause_mtx(&sc->sc_mtx, 100); 2932 2933 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2934 if (error != 0) 2935 goto fail; 2936 if (data32 != URTW_8225_ADDR_6_DATA_MAGIC1) 2937 device_printf(sc->sc_dev, "expect 0xe6!! (0x%x)\n", data32); 2938 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) { 2939 urtw_8225_write(sc, 2940 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2941 usb_pause_mtx(&sc->sc_mtx, 100); 2942 urtw_8225_write(sc, 2943 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2944 usb_pause_mtx(&sc->sc_mtx, 50); 2945 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2946 if (error != 0) 2947 goto fail; 2948 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) 2949 device_printf(sc->sc_dev, "RF calibration failed\n"); 2950 } 2951 usb_pause_mtx(&sc->sc_mtx, 100); 2952 2953 urtw_8225_write(sc, 2954 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC6); 2955 for (i = 0; i < 128; i++) { 2956 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2957 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2958 } 2959 2960 for (i = 0; i < nitems(urtw_8225v2_rf_part2); i++) { 2961 urtw_8187_write_phy_ofdm(sc, urtw_8225v2_rf_part2[i].reg, 2962 urtw_8225v2_rf_part2[i].val); 2963 } 2964 2965 error = urtw_8225v2_setgain(sc, 4); 2966 if (error) 2967 goto fail; 2968 2969 for (i = 0; i < nitems(urtw_8225v2_rf_part3); i++) { 2970 urtw_8187_write_phy_cck(sc, urtw_8225v2_rf_part3[i].reg, 2971 urtw_8225v2_rf_part3[i].val); 2972 } 2973 2974 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2975 2976 error = urtw_8225v2_set_txpwrlvl(sc, 1); 2977 if (error) 2978 goto fail; 2979 2980 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2981 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2982 2983 /* TX ant A, 0x0 for B */ 2984 error = urtw_8185_tx_antenna(sc, 0x3); 2985 if (error) 2986 goto fail; 2987 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2988 2989 error = urtw_8225_rf_set_chan(sc, 1); 2990fail: 2991 return (error); 2992} 2993 2994static usb_error_t 2995urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan) 2996{ 2997 usb_error_t error; 2998 2999 error = urtw_8225v2_set_txpwrlvl(sc, chan); 3000 if (error) 3001 goto fail; 3002 3003 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3004 usb_pause_mtx(&sc->sc_mtx, 10); 3005fail: 3006 return (error); 3007} 3008 3009static usb_error_t 3010urtw_8225_read(struct urtw_softc *sc, uint8_t addr, uint32_t *data) 3011{ 3012 int i; 3013 int16_t bit; 3014 uint8_t rlen = 12, wlen = 6; 3015 uint16_t o1, o2, o3, tmp; 3016 uint32_t d2w = ((uint32_t)(addr & 0x1f)) << 27; 3017 uint32_t mask = 0x80000000, value = 0; 3018 usb_error_t error; 3019 3020 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &o1); 3021 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &o2); 3022 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &o3); 3023 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2 | URTW_RF_PINS_MAGIC4); 3024 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3 | URTW_RF_PINS_MAGIC4); 3025 o1 &= ~URTW_RF_PINS_MAGIC4; 3026 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN); 3027 DELAY(5); 3028 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1); 3029 DELAY(5); 3030 3031 for (i = 0; i < (wlen / 2); i++, mask = mask >> 1) { 3032 bit = ((d2w & mask) != 0) ? 1 : 0; 3033 3034 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3035 DELAY(2); 3036 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3037 URTW_BB_HOST_BANG_CLK); 3038 DELAY(2); 3039 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3040 URTW_BB_HOST_BANG_CLK); 3041 DELAY(2); 3042 mask = mask >> 1; 3043 if (i == 2) 3044 break; 3045 bit = ((d2w & mask) != 0) ? 1 : 0; 3046 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3047 URTW_BB_HOST_BANG_CLK); 3048 DELAY(2); 3049 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3050 URTW_BB_HOST_BANG_CLK); 3051 DELAY(2); 3052 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3053 DELAY(1); 3054 } 3055 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW | 3056 URTW_BB_HOST_BANG_CLK); 3057 DELAY(2); 3058 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW); 3059 DELAY(2); 3060 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_RW); 3061 DELAY(2); 3062 3063 mask = 0x800; 3064 for (i = 0; i < rlen; i++, mask = mask >> 1) { 3065 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3066 o1 | URTW_BB_HOST_BANG_RW); 3067 DELAY(2); 3068 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3069 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3070 DELAY(2); 3071 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3072 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3073 DELAY(2); 3074 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3075 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3076 DELAY(2); 3077 3078 urtw_read16_m(sc, URTW_RF_PINS_INPUT, &tmp); 3079 value |= ((tmp & URTW_BB_HOST_BANG_CLK) ? mask : 0); 3080 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3081 o1 | URTW_BB_HOST_BANG_RW); 3082 DELAY(2); 3083 } 3084 3085 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN | 3086 URTW_BB_HOST_BANG_RW); 3087 DELAY(2); 3088 3089 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2); 3090 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3); 3091 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_OUTPUT_MAGIC1); 3092 3093 if (data != NULL) 3094 *data = value; 3095fail: 3096 return (error); 3097} 3098 3099 3100static usb_error_t 3101urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan) 3102{ 3103 int i; 3104 uint8_t *cck_pwrtable; 3105 uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10; 3106 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3107 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3108 usb_error_t error; 3109 3110 /* CCK power setting */ 3111 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 3112 cck_pwrlvl += sc->sc_txpwr_cck_base; 3113 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3114 cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 : 3115 urtw_8225v2_txpwr_cck; 3116 3117 for (i = 0; i < 8; i++) 3118 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3119 3120 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3121 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl]); 3122 usb_pause_mtx(&sc->sc_mtx, 1); 3123 3124 /* OFDM power setting */ 3125 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 3126 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 3127 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3128 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3129 3130 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3131 if (error) 3132 goto fail; 3133 3134 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 3135 urtw_8187_write_phy_ofdm(sc, 5, 0x0); 3136 urtw_8187_write_phy_ofdm(sc, 6, 0x40); 3137 urtw_8187_write_phy_ofdm(sc, 7, 0x0); 3138 urtw_8187_write_phy_ofdm(sc, 8, 0x40); 3139 3140 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3141 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]); 3142 usb_pause_mtx(&sc->sc_mtx, 1); 3143fail: 3144 return (error); 3145} 3146 3147static usb_error_t 3148urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain) 3149{ 3150 uint8_t *gainp; 3151 usb_error_t error; 3152 3153 /* XXX for A? */ 3154 gainp = urtw_8225v2_gain_bg; 3155 urtw_8187_write_phy_ofdm(sc, 0x0d, gainp[gain * 3]); 3156 usb_pause_mtx(&sc->sc_mtx, 1); 3157 urtw_8187_write_phy_ofdm(sc, 0x1b, gainp[gain * 3 + 1]); 3158 usb_pause_mtx(&sc->sc_mtx, 1); 3159 urtw_8187_write_phy_ofdm(sc, 0x1d, gainp[gain * 3 + 2]); 3160 usb_pause_mtx(&sc->sc_mtx, 1); 3161 urtw_8187_write_phy_ofdm(sc, 0x21, 0x17); 3162 usb_pause_mtx(&sc->sc_mtx, 1); 3163fail: 3164 return (error); 3165} 3166 3167static usb_error_t 3168urtw_8225_isv2(struct urtw_softc *sc, int *ret) 3169{ 3170 uint32_t data; 3171 usb_error_t error; 3172 3173 *ret = 1; 3174 3175 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_MAGIC5); 3176 urtw_write16_m(sc, URTW_RF_PINS_SELECT, URTW_RF_PINS_MAGIC5); 3177 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, URTW_RF_PINS_MAGIC5); 3178 usb_pause_mtx(&sc->sc_mtx, 500); 3179 3180 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3181 URTW_8225_ADDR_0_DATA_MAGIC1); 3182 3183 error = urtw_8225_read(sc, URTW_8225_ADDR_8_MAGIC, &data); 3184 if (error != 0) 3185 goto fail; 3186 if (data != URTW_8225_ADDR_8_DATA_MAGIC1) 3187 *ret = 0; 3188 else { 3189 error = urtw_8225_read(sc, URTW_8225_ADDR_9_MAGIC, &data); 3190 if (error != 0) 3191 goto fail; 3192 if (data != URTW_8225_ADDR_9_DATA_MAGIC1) 3193 *ret = 0; 3194 } 3195 3196 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3197 URTW_8225_ADDR_0_DATA_MAGIC2); 3198fail: 3199 return (error); 3200} 3201 3202static usb_error_t 3203urtw_8225v2b_rf_init(struct urtw_softc *sc) 3204{ 3205 struct ieee80211com *ic = &sc->sc_ic; 3206 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3207 const uint8_t *macaddr; 3208 unsigned int i; 3209 uint8_t data8; 3210 usb_error_t error; 3211 3212 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3213 if (error) 3214 goto fail; 3215 3216 /* 3217 * initialize extra registers on 8187 3218 */ 3219 urtw_write16_m(sc, URTW_BRSR_8187B, 0xfff); 3220 3221 /* retry limit */ 3222 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3223 data8 |= URTW_CW_CONF_PERPACKET_RETRY; 3224 urtw_write8_m(sc, URTW_CW_CONF, data8); 3225 3226 /* TX AGC */ 3227 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3228 data8 |= URTW_TX_AGC_CTL_PERPACKET_GAIN; 3229 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3230 3231 /* Auto Rate Fallback Control */ 3232#define URTW_ARFR 0x1e0 3233 urtw_write16_m(sc, URTW_ARFR, 0xfff); 3234 urtw_read8_m(sc, URTW_RATE_FALLBACK, &data8); 3235 urtw_write8_m(sc, URTW_RATE_FALLBACK, 3236 data8 | URTW_RATE_FALLBACK_ENABLE); 3237 3238 urtw_read8_m(sc, URTW_MSR, &data8); 3239 urtw_write8_m(sc, URTW_MSR, data8 & 0xf3); 3240 urtw_read8_m(sc, URTW_MSR, &data8); 3241 urtw_write8_m(sc, URTW_MSR, data8 | URTW_MSR_LINK_ENEDCA); 3242 urtw_write8_m(sc, URTW_ACM_CONTROL, sc->sc_acmctl); 3243 3244 urtw_write16_m(sc, URTW_ATIM_WND, 2); 3245 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 3246#define URTW_FEMR_FOR_8187B 0x1d4 3247 urtw_write16_m(sc, URTW_FEMR_FOR_8187B, 0xffff); 3248 3249 /* led type */ 3250 urtw_read8_m(sc, URTW_CONFIG1, &data8); 3251 data8 = (data8 & 0x3f) | 0x80; 3252 urtw_write8_m(sc, URTW_CONFIG1, data8); 3253 3254 /* applying MAC address again. */ 3255 macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr; 3256 error = urtw_set_macaddr(sc, macaddr); 3257 if (error) 3258 goto fail; 3259 3260 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3261 if (error) 3262 goto fail; 3263 3264 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 3265 3266 /* 3267 * MAC configuration 3268 */ 3269 for (i = 0; i < nitems(urtw_8225v2b_rf_part1); i++) 3270 urtw_write8_m(sc, urtw_8225v2b_rf_part1[i].reg, 3271 urtw_8225v2b_rf_part1[i].val); 3272 urtw_write16_m(sc, URTW_TID_AC_MAP, 0xfa50); 3273 urtw_write16_m(sc, URTW_INT_MIG, 0x0000); 3274 urtw_write32_m(sc, 0x1f0, 0); 3275 urtw_write32_m(sc, 0x1f4, 0); 3276 urtw_write8_m(sc, 0x1f8, 0); 3277 urtw_write32_m(sc, URTW_RF_TIMING, 0x4001); 3278 3279#define URTW_RFSW_CTRL 0x272 3280 urtw_write16_m(sc, URTW_RFSW_CTRL, 0x569a); 3281 3282 /* 3283 * initialize PHY 3284 */ 3285 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3286 if (error) 3287 goto fail; 3288 urtw_read8_m(sc, URTW_CONFIG3, &data8); 3289 urtw_write8_m(sc, URTW_CONFIG3, 3290 data8 | URTW_CONFIG3_ANAPARAM_WRITE); 3291 3292 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3293 if (error) 3294 goto fail; 3295 3296 /* setup RFE initial timing */ 3297 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x0480); 3298 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x2488); 3299 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1fff); 3300 usb_pause_mtx(&sc->sc_mtx, 1100); 3301 3302 for (i = 0; i < nitems(urtw_8225v2b_rf_part0); i++) { 3303 urtw_8225_write(sc, urtw_8225v2b_rf_part0[i].reg, 3304 urtw_8225v2b_rf_part0[i].val); 3305 usb_pause_mtx(&sc->sc_mtx, 1); 3306 } 3307 urtw_8225_write(sc, 0x00, 0x01b7); 3308 3309 for (i = 0; i < 95; i++) { 3310 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 3311 usb_pause_mtx(&sc->sc_mtx, 1); 3312 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 3313 urtw_8225v2b_rxgain[i]); 3314 usb_pause_mtx(&sc->sc_mtx, 1); 3315 } 3316 3317 urtw_8225_write(sc, URTW_8225_ADDR_3_MAGIC, 0x080); 3318 usb_pause_mtx(&sc->sc_mtx, 1); 3319 urtw_8225_write(sc, URTW_8225_ADDR_5_MAGIC, 0x004); 3320 usb_pause_mtx(&sc->sc_mtx, 1); 3321 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x0b7); 3322 usb_pause_mtx(&sc->sc_mtx, 1); 3323 usb_pause_mtx(&sc->sc_mtx, 3000); 3324 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0xc4d); 3325 usb_pause_mtx(&sc->sc_mtx, 2000); 3326 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0x44d); 3327 usb_pause_mtx(&sc->sc_mtx, 1); 3328 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x2bf); 3329 usb_pause_mtx(&sc->sc_mtx, 1); 3330 3331 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 0x03); 3332 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 0x07); 3333 urtw_write8_m(sc, URTW_TX_ANTENNA, 0x03); 3334 3335 urtw_8187_write_phy_ofdm(sc, 0x80, 0x12); 3336 for (i = 0; i < 128; i++) { 3337 uint32_t addr, data; 3338 3339 data = (urtw_8225z2_agc[i] << 8) | 0x0000008f; 3340 addr = ((i + 0x80) << 8) | 0x0000008e; 3341 3342 urtw_8187_write_phy_ofdm(sc, data & 0x7f, (data >> 8) & 0xff); 3343 urtw_8187_write_phy_ofdm(sc, addr & 0x7f, (addr >> 8) & 0xff); 3344 urtw_8187_write_phy_ofdm(sc, 0x0e, 0x00); 3345 } 3346 urtw_8187_write_phy_ofdm(sc, 0x80, 0x10); 3347 3348 for (i = 0; i < nitems(urtw_8225v2b_rf_part2); i++) 3349 urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val); 3350 3351 urtw_write32_m(sc, URTW_8187B_AC_VO, (7 << 12) | (3 << 8) | 0x1c); 3352 urtw_write32_m(sc, URTW_8187B_AC_VI, (7 << 12) | (3 << 8) | 0x1c); 3353 urtw_write32_m(sc, URTW_8187B_AC_BE, (7 << 12) | (3 << 8) | 0x1c); 3354 urtw_write32_m(sc, URTW_8187B_AC_BK, (7 << 12) | (3 << 8) | 0x1c); 3355 3356 urtw_8187_write_phy_ofdm(sc, 0x97, 0x46); 3357 urtw_8187_write_phy_ofdm(sc, 0xa4, 0xb6); 3358 urtw_8187_write_phy_ofdm(sc, 0x85, 0xfc); 3359 urtw_8187_write_phy_cck(sc, 0xc1, 0x88); 3360 3361fail: 3362 return (error); 3363} 3364 3365static usb_error_t 3366urtw_8225v2b_rf_set_chan(struct urtw_softc *sc, int chan) 3367{ 3368 usb_error_t error; 3369 3370 error = urtw_8225v2b_set_txpwrlvl(sc, chan); 3371 if (error) 3372 goto fail; 3373 3374 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3375 usb_pause_mtx(&sc->sc_mtx, 10); 3376fail: 3377 return (error); 3378} 3379 3380static usb_error_t 3381urtw_8225v2b_set_txpwrlvl(struct urtw_softc *sc, int chan) 3382{ 3383 int i; 3384 uint8_t *cck_pwrtable; 3385 uint8_t cck_pwrlvl_max = 15; 3386 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3387 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3388 usb_error_t error; 3389 3390 /* CCK power setting */ 3391 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? 3392 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? cck_pwrlvl_max : 22) : 3393 (cck_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 0 : 7)); 3394 cck_pwrlvl += sc->sc_txpwr_cck_base; 3395 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3396 cck_pwrtable = (chan == 14) ? urtw_8225v2b_txpwr_cck_ch14 : 3397 urtw_8225v2b_txpwr_cck; 3398 3399 if (sc->sc_flags & URTW_RTL8187B_REV_B) 3400 cck_pwrtable += (cck_pwrlvl <= 6) ? 0 : 3401 ((cck_pwrlvl <= 11) ? 8 : 16); 3402 else 3403 cck_pwrtable += (cck_pwrlvl <= 5) ? 0 : 3404 ((cck_pwrlvl <= 11) ? 8 : ((cck_pwrlvl <= 17) ? 16 : 24)); 3405 3406 for (i = 0; i < 8; i++) 3407 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3408 3409 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3410 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl] << 1); 3411 usb_pause_mtx(&sc->sc_mtx, 1); 3412 3413 /* OFDM power setting */ 3414 ofdm_pwrlvl = (ofdm_pwrlvl > 15) ? 3415 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 17 : 25) : 3416 (ofdm_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 2 : 10)); 3417 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3418 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3419 3420 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3421 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl] << 1); 3422 3423 if (sc->sc_flags & URTW_RTL8187B_REV_B) { 3424 if (ofdm_pwrlvl <= 11) { 3425 urtw_8187_write_phy_ofdm(sc, 0x87, 0x60); 3426 urtw_8187_write_phy_ofdm(sc, 0x89, 0x60); 3427 } else { 3428 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3429 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3430 } 3431 } else { 3432 if (ofdm_pwrlvl <= 11) { 3433 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3434 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3435 } else if (ofdm_pwrlvl <= 17) { 3436 urtw_8187_write_phy_ofdm(sc, 0x87, 0x54); 3437 urtw_8187_write_phy_ofdm(sc, 0x89, 0x54); 3438 } else { 3439 urtw_8187_write_phy_ofdm(sc, 0x87, 0x50); 3440 urtw_8187_write_phy_ofdm(sc, 0x89, 0x50); 3441 } 3442 } 3443 usb_pause_mtx(&sc->sc_mtx, 1); 3444fail: 3445 return (error); 3446} 3447 3448static usb_error_t 3449urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data) 3450{ 3451 struct usb_device_request req; 3452 usb_error_t error; 3453 3454 req.bmRequestType = UT_READ_VENDOR_DEVICE; 3455 req.bRequest = URTW_8187_GETREGS_REQ; 3456 USETW(req.wValue, val | 0xfe00); 3457 USETW(req.wIndex, 0); 3458 USETW(req.wLength, sizeof(uint8_t)); 3459 3460 error = urtw_do_request(sc, &req, data); 3461 return (error); 3462} 3463 3464static usb_error_t 3465urtw_write8e(struct urtw_softc *sc, int val, uint8_t data) 3466{ 3467 struct usb_device_request req; 3468 3469 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 3470 req.bRequest = URTW_8187_SETREGS_REQ; 3471 USETW(req.wValue, val | 0xfe00); 3472 USETW(req.wIndex, 0); 3473 USETW(req.wLength, sizeof(uint8_t)); 3474 3475 return (urtw_do_request(sc, &req, &data)); 3476} 3477 3478static usb_error_t 3479urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val) 3480{ 3481 uint8_t data; 3482 usb_error_t error; 3483 3484 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3485 if (error) 3486 goto fail; 3487 3488 urtw_read8_m(sc, URTW_CONFIG3, &data); 3489 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3490 urtw_write32_m(sc, URTW_ANAPARAM, val); 3491 urtw_read8_m(sc, URTW_CONFIG3, &data); 3492 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3493 3494 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3495 if (error) 3496 goto fail; 3497fail: 3498 return (error); 3499} 3500 3501static usb_error_t 3502urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val) 3503{ 3504 uint8_t data; 3505 usb_error_t error; 3506 3507 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3508 if (error) 3509 goto fail; 3510 3511 urtw_read8_m(sc, URTW_CONFIG3, &data); 3512 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3513 urtw_write32_m(sc, URTW_ANAPARAM2, val); 3514 urtw_read8_m(sc, URTW_CONFIG3, &data); 3515 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3516 3517 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3518 if (error) 3519 goto fail; 3520fail: 3521 return (error); 3522} 3523 3524static usb_error_t 3525urtw_intr_enable(struct urtw_softc *sc) 3526{ 3527 usb_error_t error; 3528 3529 urtw_write16_m(sc, URTW_INTR_MASK, 0xffff); 3530fail: 3531 return (error); 3532} 3533 3534static usb_error_t 3535urtw_intr_disable(struct urtw_softc *sc) 3536{ 3537 usb_error_t error; 3538 3539 urtw_write16_m(sc, URTW_INTR_MASK, 0); 3540fail: 3541 return (error); 3542} 3543 3544static usb_error_t 3545urtw_reset(struct urtw_softc *sc) 3546{ 3547 uint8_t data; 3548 usb_error_t error; 3549 3550 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3551 if (error) 3552 goto fail; 3553 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3554 if (error) 3555 goto fail; 3556 3557 error = urtw_intr_disable(sc); 3558 if (error) 3559 goto fail; 3560 usb_pause_mtx(&sc->sc_mtx, 100); 3561 3562 error = urtw_write8e(sc, 0x18, 0x10); 3563 if (error != 0) 3564 goto fail; 3565 error = urtw_write8e(sc, 0x18, 0x11); 3566 if (error != 0) 3567 goto fail; 3568 error = urtw_write8e(sc, 0x18, 0x00); 3569 if (error != 0) 3570 goto fail; 3571 usb_pause_mtx(&sc->sc_mtx, 100); 3572 3573 urtw_read8_m(sc, URTW_CMD, &data); 3574 data = (data & 0x2) | URTW_CMD_RST; 3575 urtw_write8_m(sc, URTW_CMD, data); 3576 usb_pause_mtx(&sc->sc_mtx, 100); 3577 3578 urtw_read8_m(sc, URTW_CMD, &data); 3579 if (data & URTW_CMD_RST) { 3580 device_printf(sc->sc_dev, "reset timeout\n"); 3581 goto fail; 3582 } 3583 3584 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 3585 if (error) 3586 goto fail; 3587 usb_pause_mtx(&sc->sc_mtx, 100); 3588 3589 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3590 if (error) 3591 goto fail; 3592 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3593 if (error) 3594 goto fail; 3595fail: 3596 return (error); 3597} 3598 3599static usb_error_t 3600urtw_led_ctl(struct urtw_softc *sc, int mode) 3601{ 3602 usb_error_t error = 0; 3603 3604 switch (sc->sc_strategy) { 3605 case URTW_SW_LED_MODE0: 3606 error = urtw_led_mode0(sc, mode); 3607 break; 3608 case URTW_SW_LED_MODE1: 3609 error = urtw_led_mode1(sc, mode); 3610 break; 3611 case URTW_SW_LED_MODE2: 3612 error = urtw_led_mode2(sc, mode); 3613 break; 3614 case URTW_SW_LED_MODE3: 3615 error = urtw_led_mode3(sc, mode); 3616 break; 3617 default: 3618 DPRINTF(sc, URTW_DEBUG_STATE, 3619 "unsupported LED mode %d\n", sc->sc_strategy); 3620 error = USB_ERR_INVAL; 3621 break; 3622 } 3623 3624 return (error); 3625} 3626 3627static usb_error_t 3628urtw_led_mode0(struct urtw_softc *sc, int mode) 3629{ 3630 3631 switch (mode) { 3632 case URTW_LED_CTL_POWER_ON: 3633 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK; 3634 break; 3635 case URTW_LED_CTL_TX: 3636 if (sc->sc_gpio_ledinprogress == 1) 3637 return (0); 3638 3639 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL; 3640 sc->sc_gpio_blinktime = 2; 3641 break; 3642 case URTW_LED_CTL_LINK: 3643 sc->sc_gpio_ledstate = URTW_LED_ON; 3644 break; 3645 default: 3646 DPRINTF(sc, URTW_DEBUG_STATE, 3647 "unsupported LED mode 0x%x", mode); 3648 return (USB_ERR_INVAL); 3649 } 3650 3651 switch (sc->sc_gpio_ledstate) { 3652 case URTW_LED_ON: 3653 if (sc->sc_gpio_ledinprogress != 0) 3654 break; 3655 urtw_led_on(sc, URTW_LED_GPIO); 3656 break; 3657 case URTW_LED_BLINK_NORMAL: 3658 if (sc->sc_gpio_ledinprogress != 0) 3659 break; 3660 sc->sc_gpio_ledinprogress = 1; 3661 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ? 3662 URTW_LED_OFF : URTW_LED_ON; 3663 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3664 break; 3665 case URTW_LED_POWER_ON_BLINK: 3666 urtw_led_on(sc, URTW_LED_GPIO); 3667 usb_pause_mtx(&sc->sc_mtx, 100); 3668 urtw_led_off(sc, URTW_LED_GPIO); 3669 break; 3670 default: 3671 DPRINTF(sc, URTW_DEBUG_STATE, 3672 "unknown LED status 0x%x", sc->sc_gpio_ledstate); 3673 return (USB_ERR_INVAL); 3674 } 3675 return (0); 3676} 3677 3678static usb_error_t 3679urtw_led_mode1(struct urtw_softc *sc, int mode) 3680{ 3681 return (USB_ERR_INVAL); 3682} 3683 3684static usb_error_t 3685urtw_led_mode2(struct urtw_softc *sc, int mode) 3686{ 3687 return (USB_ERR_INVAL); 3688} 3689 3690static usb_error_t 3691urtw_led_mode3(struct urtw_softc *sc, int mode) 3692{ 3693 return (USB_ERR_INVAL); 3694} 3695 3696static usb_error_t 3697urtw_led_on(struct urtw_softc *sc, int type) 3698{ 3699 usb_error_t error; 3700 3701 if (type == URTW_LED_GPIO) { 3702 switch (sc->sc_gpio_ledpin) { 3703 case URTW_LED_PIN_GPIO0: 3704 urtw_write8_m(sc, URTW_GPIO, 0x01); 3705 urtw_write8_m(sc, URTW_GP_ENABLE, 0x00); 3706 break; 3707 default: 3708 DPRINTF(sc, URTW_DEBUG_STATE, 3709 "unsupported LED PIN type 0x%x", 3710 sc->sc_gpio_ledpin); 3711 error = USB_ERR_INVAL; 3712 goto fail; 3713 } 3714 } else { 3715 DPRINTF(sc, URTW_DEBUG_STATE, 3716 "unsupported LED type 0x%x", type); 3717 error = USB_ERR_INVAL; 3718 goto fail; 3719 } 3720 3721 sc->sc_gpio_ledon = 1; 3722fail: 3723 return (error); 3724} 3725 3726static usb_error_t 3727urtw_led_off(struct urtw_softc *sc, int type) 3728{ 3729 usb_error_t error; 3730 3731 if (type == URTW_LED_GPIO) { 3732 switch (sc->sc_gpio_ledpin) { 3733 case URTW_LED_PIN_GPIO0: 3734 urtw_write8_m(sc, URTW_GPIO, URTW_GPIO_DATA_MAGIC1); 3735 urtw_write8_m(sc, 3736 URTW_GP_ENABLE, URTW_GP_ENABLE_DATA_MAGIC1); 3737 break; 3738 default: 3739 DPRINTF(sc, URTW_DEBUG_STATE, 3740 "unsupported LED PIN type 0x%x", 3741 sc->sc_gpio_ledpin); 3742 error = USB_ERR_INVAL; 3743 goto fail; 3744 } 3745 } else { 3746 DPRINTF(sc, URTW_DEBUG_STATE, 3747 "unsupported LED type 0x%x", type); 3748 error = USB_ERR_INVAL; 3749 goto fail; 3750 } 3751 3752 sc->sc_gpio_ledon = 0; 3753 3754fail: 3755 return (error); 3756} 3757 3758static void 3759urtw_led_ch(void *arg) 3760{ 3761 struct urtw_softc *sc = arg; 3762 struct ieee80211com *ic = &sc->sc_ic; 3763 3764 ieee80211_runtask(ic, &sc->sc_led_task); 3765} 3766 3767static void 3768urtw_ledtask(void *arg, int pending) 3769{ 3770 struct urtw_softc *sc = arg; 3771 3772 if (sc->sc_strategy != URTW_SW_LED_MODE0) { 3773 DPRINTF(sc, URTW_DEBUG_STATE, 3774 "could not process a LED strategy 0x%x", 3775 sc->sc_strategy); 3776 return; 3777 } 3778 3779 URTW_LOCK(sc); 3780 urtw_led_blink(sc); 3781 URTW_UNLOCK(sc); 3782} 3783 3784static usb_error_t 3785urtw_led_blink(struct urtw_softc *sc) 3786{ 3787 uint8_t ing = 0; 3788 usb_error_t error; 3789 3790 if (sc->sc_gpio_blinkstate == URTW_LED_ON) 3791 error = urtw_led_on(sc, URTW_LED_GPIO); 3792 else 3793 error = urtw_led_off(sc, URTW_LED_GPIO); 3794 sc->sc_gpio_blinktime--; 3795 if (sc->sc_gpio_blinktime == 0) 3796 ing = 1; 3797 else { 3798 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL && 3799 sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY && 3800 sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3) 3801 ing = 1; 3802 } 3803 if (ing == 1) { 3804 if (sc->sc_gpio_ledstate == URTW_LED_ON && 3805 sc->sc_gpio_ledon == 0) 3806 error = urtw_led_on(sc, URTW_LED_GPIO); 3807 else if (sc->sc_gpio_ledstate == URTW_LED_OFF && 3808 sc->sc_gpio_ledon == 1) 3809 error = urtw_led_off(sc, URTW_LED_GPIO); 3810 3811 sc->sc_gpio_blinktime = 0; 3812 sc->sc_gpio_ledinprogress = 0; 3813 return (0); 3814 } 3815 3816 sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ? 3817 URTW_LED_ON : URTW_LED_OFF; 3818 3819 switch (sc->sc_gpio_ledstate) { 3820 case URTW_LED_BLINK_NORMAL: 3821 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3822 break; 3823 default: 3824 DPRINTF(sc, URTW_DEBUG_STATE, 3825 "unknown LED status 0x%x", 3826 sc->sc_gpio_ledstate); 3827 return (USB_ERR_INVAL); 3828 } 3829 return (0); 3830} 3831 3832static usb_error_t 3833urtw_rx_enable(struct urtw_softc *sc) 3834{ 3835 uint8_t data; 3836 usb_error_t error; 3837 3838 usbd_transfer_start((sc->sc_flags & URTW_RTL8187B) ? 3839 sc->sc_xfer[URTW_8187B_BULK_RX] : sc->sc_xfer[URTW_8187L_BULK_RX]); 3840 3841 error = urtw_rx_setconf(sc); 3842 if (error != 0) 3843 goto fail; 3844 3845 if ((sc->sc_flags & URTW_RTL8187B) == 0) { 3846 urtw_read8_m(sc, URTW_CMD, &data); 3847 urtw_write8_m(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE); 3848 } 3849fail: 3850 return (error); 3851} 3852 3853static usb_error_t 3854urtw_tx_enable(struct urtw_softc *sc) 3855{ 3856 uint8_t data8; 3857 uint32_t data; 3858 usb_error_t error; 3859 3860 if (sc->sc_flags & URTW_RTL8187B) { 3861 urtw_read32_m(sc, URTW_TX_CONF, &data); 3862 data &= ~URTW_TX_LOOPBACK_MASK; 3863 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3864 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3865 data &= ~URTW_TX_SWPLCPLEN; 3866 data |= URTW_TX_HW_SEQNUM | URTW_TX_DISREQQSIZE | 3867 (7 << 8) | /* short retry limit */ 3868 (7 << 0) | /* long retry limit */ 3869 (7 << 21); /* MAX TX DMA */ 3870 urtw_write32_m(sc, URTW_TX_CONF, data); 3871 3872 urtw_read8_m(sc, URTW_MSR, &data8); 3873 data8 |= URTW_MSR_LINK_ENEDCA; 3874 urtw_write8_m(sc, URTW_MSR, data8); 3875 return (error); 3876 } 3877 3878 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3879 data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY); 3880 urtw_write8_m(sc, URTW_CW_CONF, data8); 3881 3882 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3883 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN; 3884 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 3885 data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT; 3886 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3887 3888 urtw_read32_m(sc, URTW_TX_CONF, &data); 3889 data &= ~URTW_TX_LOOPBACK_MASK; 3890 data |= URTW_TX_LOOPBACK_NONE; 3891 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3892 data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT; 3893 data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT; 3894 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3895 data |= URTW_TX_MXDMA_2048 | URTW_TX_CWMIN | URTW_TX_DISCW; 3896 data &= ~URTW_TX_SWPLCPLEN; 3897 data |= URTW_TX_NOICV; 3898 urtw_write32_m(sc, URTW_TX_CONF, data); 3899 3900 urtw_read8_m(sc, URTW_CMD, &data8); 3901 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 3902fail: 3903 return (error); 3904} 3905 3906static usb_error_t 3907urtw_rx_setconf(struct urtw_softc *sc) 3908{ 3909 struct ieee80211com *ic = &sc->sc_ic; 3910 uint32_t data; 3911 usb_error_t error; 3912 3913 urtw_read32_m(sc, URTW_RX, &data); 3914 data = data &~ URTW_RX_FILTER_MASK; 3915 if (sc->sc_flags & URTW_RTL8187B) { 3916 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA | 3917 URTW_RX_FILTER_MCAST | URTW_RX_FILTER_BCAST | 3918 URTW_RX_FIFO_THRESHOLD_NONE | 3919 URTW_MAX_RX_DMA_2048 | 3920 URTW_RX_AUTORESETPHY | URTW_RCR_ONLYERLPKT; 3921 } else { 3922 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA; 3923 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST; 3924 3925 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 3926 data = data | URTW_RX_FILTER_ICVERR; 3927 data = data | URTW_RX_FILTER_PWR; 3928 } 3929 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR) 3930 data = data | URTW_RX_FILTER_CRCERR; 3931 3932 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK; 3933 data = data | URTW_RX_FIFO_THRESHOLD_NONE | 3934 URTW_RX_AUTORESETPHY; 3935 data = data &~ URTW_MAX_RX_DMA_MASK; 3936 data = data | URTW_MAX_RX_DMA_2048 | URTW_RCR_ONLYERLPKT; 3937 } 3938 3939 /* XXX allmulti should not be checked here... */ 3940 if (ic->ic_opmode == IEEE80211_M_MONITOR || 3941 ic->ic_promisc > 0 || ic->ic_allmulti > 0) { 3942 data = data | URTW_RX_FILTER_CTL; 3943 data = data | URTW_RX_FILTER_ALLMAC; 3944 } else { 3945 data = data | URTW_RX_FILTER_NICMAC; 3946 data = data | URTW_RX_CHECK_BSSID; 3947 } 3948 3949 urtw_write32_m(sc, URTW_RX, data); 3950fail: 3951 return (error); 3952} 3953 3954static struct mbuf * 3955urtw_rxeof(struct usb_xfer *xfer, struct urtw_data *data, int *rssi_p, 3956 int8_t *nf_p) 3957{ 3958 int actlen, flen, rssi; 3959 struct ieee80211_frame *wh; 3960 struct mbuf *m, *mnew; 3961 struct urtw_softc *sc = data->sc; 3962 struct ieee80211com *ic = &sc->sc_ic; 3963 uint8_t noise = 0, rate; 3964 uint64_t mactime; 3965 3966 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 3967 3968 if (sc->sc_flags & URTW_RTL8187B) { 3969 struct urtw_8187b_rxhdr *rx; 3970 3971 if (actlen < sizeof(*rx) + IEEE80211_ACK_LEN) 3972 goto fail; 3973 3974 rx = (struct urtw_8187b_rxhdr *)(data->buf + 3975 (actlen - (sizeof(struct urtw_8187b_rxhdr)))); 3976 flen = le32toh(rx->flag) & 0xfff; 3977 if (flen > actlen - sizeof(*rx)) 3978 goto fail; 3979 3980 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf; 3981 /* XXX correct? */ 3982 rssi = rx->rssi & URTW_RX_RSSI_MASK; 3983 noise = rx->noise; 3984 3985 if (ieee80211_radiotap_active(ic)) 3986 mactime = rx->mactime; 3987 } else { 3988 struct urtw_8187l_rxhdr *rx; 3989 3990 if (actlen < sizeof(*rx) + IEEE80211_ACK_LEN) 3991 goto fail; 3992 3993 rx = (struct urtw_8187l_rxhdr *)(data->buf + 3994 (actlen - (sizeof(struct urtw_8187l_rxhdr)))); 3995 flen = le32toh(rx->flag) & 0xfff; 3996 if (flen > actlen - sizeof(*rx)) 3997 goto fail; 3998 3999 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf; 4000 /* XXX correct? */ 4001 rssi = rx->rssi & URTW_RX_8187L_RSSI_MASK; 4002 noise = rx->noise; 4003 4004 if (ieee80211_radiotap_active(ic)) 4005 mactime = rx->mactime; 4006 } 4007 4008 if (flen < IEEE80211_ACK_LEN) 4009 goto fail; 4010 4011 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 4012 if (mnew == NULL) 4013 goto fail; 4014 4015 m = data->m; 4016 data->m = mnew; 4017 data->buf = mtod(mnew, uint8_t *); 4018 4019 /* finalize mbuf */ 4020 m->m_pkthdr.len = m->m_len = flen - IEEE80211_CRC_LEN; 4021 4022 if (ieee80211_radiotap_active(ic)) { 4023 struct urtw_rx_radiotap_header *tap = &sc->sc_rxtap; 4024 4025 tap->wr_tsf = mactime; 4026 tap->wr_flags = 0; 4027 tap->wr_dbm_antsignal = (int8_t)rssi; 4028 } 4029 4030 wh = mtod(m, struct ieee80211_frame *); 4031 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_DATA) 4032 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate; 4033 4034 *rssi_p = rssi; 4035 *nf_p = noise; /* XXX correct? */ 4036 4037 return (m); 4038 4039fail: 4040 counter_u64_add(ic->ic_ierrors, 1); 4041 return (NULL); 4042} 4043 4044static void 4045urtw_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 4046{ 4047 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4048 struct ieee80211com *ic = &sc->sc_ic; 4049 struct ieee80211_node *ni; 4050 struct mbuf *m = NULL; 4051 struct urtw_data *data; 4052 int8_t nf = -95; 4053 int rssi = 1; 4054 4055 URTW_ASSERT_LOCKED(sc); 4056 4057 switch (USB_GET_STATE(xfer)) { 4058 case USB_ST_TRANSFERRED: 4059 data = STAILQ_FIRST(&sc->sc_rx_active); 4060 if (data == NULL) 4061 goto setup; 4062 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4063 m = urtw_rxeof(xfer, data, &rssi, &nf); 4064 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4065 /* FALLTHROUGH */ 4066 case USB_ST_SETUP: 4067setup: 4068 data = STAILQ_FIRST(&sc->sc_rx_inactive); 4069 if (data == NULL) { 4070 KASSERT(m == NULL, ("mbuf isn't NULL")); 4071 return; 4072 } 4073 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 4074 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 4075 usbd_xfer_set_frame_data(xfer, 0, data->buf, 4076 usbd_xfer_max_len(xfer)); 4077 usbd_transfer_submit(xfer); 4078 4079 /* 4080 * To avoid LOR we should unlock our private mutex here to call 4081 * ieee80211_input() because here is at the end of a USB 4082 * callback and safe to unlock. 4083 */ 4084 URTW_UNLOCK(sc); 4085 if (m != NULL) { 4086 if (m->m_pkthdr.len >= 4087 sizeof(struct ieee80211_frame_min)) { 4088 ni = ieee80211_find_rxnode(ic, 4089 mtod(m, struct ieee80211_frame_min *)); 4090 } else 4091 ni = NULL; 4092 4093 if (ni != NULL) { 4094 (void) ieee80211_input(ni, m, rssi, nf); 4095 /* node is no longer needed */ 4096 ieee80211_free_node(ni); 4097 } else 4098 (void) ieee80211_input_all(ic, m, rssi, nf); 4099 m = NULL; 4100 } 4101 URTW_LOCK(sc); 4102 break; 4103 default: 4104 /* needs it to the inactive queue due to a error. */ 4105 data = STAILQ_FIRST(&sc->sc_rx_active); 4106 if (data != NULL) { 4107 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4108 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4109 } 4110 if (error != USB_ERR_CANCELLED) { 4111 usbd_xfer_set_stall(xfer); 4112 counter_u64_add(ic->ic_ierrors, 1); 4113 goto setup; 4114 } 4115 break; 4116 } 4117} 4118 4119#define URTW_STATUS_TYPE_TXCLOSE 1 4120#define URTW_STATUS_TYPE_BEACON_INTR 0 4121 4122static void 4123urtw_txstatus_eof(struct usb_xfer *xfer) 4124{ 4125 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4126 struct ieee80211com *ic = &sc->sc_ic; 4127 int actlen, type, pktretry, seq; 4128 uint64_t val; 4129 4130 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 4131 4132 if (actlen != sizeof(uint64_t)) 4133 return; 4134 4135 val = le64toh(sc->sc_txstatus); 4136 type = (val >> 30) & 0x3; 4137 if (type == URTW_STATUS_TYPE_TXCLOSE) { 4138 pktretry = val & 0xff; 4139 seq = (val >> 16) & 0xff; 4140 if (pktretry == URTW_TX_MAXRETRY) 4141 counter_u64_add(ic->ic_oerrors, 1); 4142 DPRINTF(sc, URTW_DEBUG_TXSTATUS, "pktretry %d seq %#x\n", 4143 pktretry, seq); 4144 } 4145} 4146 4147static void 4148urtw_bulk_tx_status_callback(struct usb_xfer *xfer, usb_error_t error) 4149{ 4150 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4151 struct ieee80211com *ic = &sc->sc_ic; 4152 void *dma_buf = usbd_xfer_get_frame_buffer(xfer, 0); 4153 4154 URTW_ASSERT_LOCKED(sc); 4155 4156 switch (USB_GET_STATE(xfer)) { 4157 case USB_ST_TRANSFERRED: 4158 urtw_txstatus_eof(xfer); 4159 /* FALLTHROUGH */ 4160 case USB_ST_SETUP: 4161setup: 4162 memcpy(dma_buf, &sc->sc_txstatus, sizeof(uint64_t)); 4163 usbd_xfer_set_frame_len(xfer, 0, sizeof(uint64_t)); 4164 usbd_transfer_submit(xfer); 4165 break; 4166 default: 4167 if (error != USB_ERR_CANCELLED) { 4168 usbd_xfer_set_stall(xfer); 4169 counter_u64_add(ic->ic_ierrors, 1); 4170 goto setup; 4171 } 4172 break; 4173 } 4174} 4175 4176static void 4177urtw_txeof(struct usb_xfer *xfer, struct urtw_data *data) 4178{ 4179 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4180 4181 URTW_ASSERT_LOCKED(sc); 4182 4183 if (data->m) { 4184 /* XXX status? */ 4185 ieee80211_tx_complete(data->ni, data->m, 0); 4186 data->m = NULL; 4187 data->ni = NULL; 4188 } 4189 sc->sc_txtimer = 0; 4190} 4191 4192static void 4193urtw_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 4194{ 4195 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4196 struct urtw_data *data; 4197 4198 URTW_ASSERT_LOCKED(sc); 4199 4200 switch (USB_GET_STATE(xfer)) { 4201 case USB_ST_TRANSFERRED: 4202 data = STAILQ_FIRST(&sc->sc_tx_active); 4203 if (data == NULL) 4204 goto setup; 4205 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 4206 urtw_txeof(xfer, data); 4207 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 4208 /* FALLTHROUGH */ 4209 case USB_ST_SETUP: 4210setup: 4211 data = STAILQ_FIRST(&sc->sc_tx_pending); 4212 if (data == NULL) { 4213 DPRINTF(sc, URTW_DEBUG_XMIT, 4214 "%s: empty pending queue\n", __func__); 4215 return; 4216 } 4217 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 4218 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 4219 4220 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 4221 usbd_transfer_submit(xfer); 4222 4223 urtw_start(sc); 4224 break; 4225 default: 4226 data = STAILQ_FIRST(&sc->sc_tx_active); 4227 if (data == NULL) 4228 goto setup; 4229 if (data->ni != NULL) { 4230 if_inc_counter(data->ni->ni_vap->iv_ifp, 4231 IFCOUNTER_OERRORS, 1); 4232 ieee80211_free_node(data->ni); 4233 data->ni = NULL; 4234 } 4235 if (error != USB_ERR_CANCELLED) { 4236 usbd_xfer_set_stall(xfer); 4237 goto setup; 4238 } 4239 break; 4240 } 4241} 4242 4243static struct urtw_data * 4244_urtw_getbuf(struct urtw_softc *sc) 4245{ 4246 struct urtw_data *bf; 4247 4248 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 4249 if (bf != NULL) 4250 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 4251 else 4252 bf = NULL; 4253 if (bf == NULL) 4254 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: %s\n", __func__, 4255 "out of xmit buffers"); 4256 return (bf); 4257} 4258 4259static struct urtw_data * 4260urtw_getbuf(struct urtw_softc *sc) 4261{ 4262 struct urtw_data *bf; 4263 4264 URTW_ASSERT_LOCKED(sc); 4265 4266 bf = _urtw_getbuf(sc); 4267 if (bf == NULL) 4268 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: stop queue\n", __func__); 4269 return (bf); 4270} 4271 4272static int 4273urtw_isbmode(uint16_t rate) 4274{ 4275 4276 return ((rate <= 22 && rate != 12 && rate != 18) || 4277 rate == 44) ? (1) : (0); 4278} 4279 4280static uint16_t 4281urtw_rate2dbps(uint16_t rate) 4282{ 4283 4284 switch(rate) { 4285 case 12: 4286 case 18: 4287 case 24: 4288 case 36: 4289 case 48: 4290 case 72: 4291 case 96: 4292 case 108: 4293 return (rate * 2); 4294 default: 4295 break; 4296 } 4297 return (24); 4298} 4299 4300static int 4301urtw_compute_txtime(uint16_t framelen, uint16_t rate, 4302 uint8_t ismgt, uint8_t isshort) 4303{ 4304 uint16_t ceiling, frametime, n_dbps; 4305 4306 if (urtw_isbmode(rate)) { 4307 if (ismgt || !isshort || rate == 2) 4308 frametime = (uint16_t)(144 + 48 + 4309 (framelen * 8 / (rate / 2))); 4310 else 4311 frametime = (uint16_t)(72 + 24 + 4312 (framelen * 8 / (rate / 2))); 4313 if ((framelen * 8 % (rate / 2)) != 0) 4314 frametime++; 4315 } else { 4316 n_dbps = urtw_rate2dbps(rate); 4317 ceiling = (16 + 8 * framelen + 6) / n_dbps 4318 + (((16 + 8 * framelen + 6) % n_dbps) ? 1 : 0); 4319 frametime = (uint16_t)(16 + 4 + 4 * ceiling + 6); 4320 } 4321 return (frametime); 4322} 4323 4324/* 4325 * Callback from the 802.11 layer to update the 4326 * slot time based on the current setting. 4327 */ 4328static void 4329urtw_updateslot(struct ieee80211com *ic) 4330{ 4331 struct urtw_softc *sc = ic->ic_softc; 4332 4333 ieee80211_runtask(ic, &sc->sc_updateslot_task); 4334} 4335 4336static void 4337urtw_updateslottask(void *arg, int pending) 4338{ 4339 struct urtw_softc *sc = arg; 4340 struct ieee80211com *ic = &sc->sc_ic; 4341 int error; 4342 4343 URTW_LOCK(sc); 4344 if ((sc->sc_flags & URTW_RUNNING) == 0) { 4345 URTW_UNLOCK(sc); 4346 return; 4347 } 4348 if (sc->sc_flags & URTW_RTL8187B) { 4349 urtw_write8_m(sc, URTW_SIFS, 0x22); 4350 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) 4351 urtw_write8_m(sc, URTW_SLOT, IEEE80211_DUR_SHSLOT); 4352 else 4353 urtw_write8_m(sc, URTW_SLOT, IEEE80211_DUR_SLOT); 4354 urtw_write8_m(sc, URTW_8187B_EIFS, 0x5b); 4355 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 0x5b); 4356 } else { 4357 urtw_write8_m(sc, URTW_SIFS, 0x22); 4358 if (sc->sc_state == IEEE80211_S_ASSOC && 4359 ic->ic_flags & IEEE80211_F_SHSLOT) 4360 urtw_write8_m(sc, URTW_SLOT, IEEE80211_DUR_SHSLOT); 4361 else 4362 urtw_write8_m(sc, URTW_SLOT, IEEE80211_DUR_SLOT); 4363 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) { 4364 urtw_write8_m(sc, URTW_DIFS, 0x14); 4365 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14); 4366 urtw_write8_m(sc, URTW_CW_VAL, 0x73); 4367 } else { 4368 urtw_write8_m(sc, URTW_DIFS, 0x24); 4369 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24); 4370 urtw_write8_m(sc, URTW_CW_VAL, 0xa5); 4371 } 4372 } 4373fail: 4374 URTW_UNLOCK(sc); 4375} 4376 4377static void 4378urtw_sysctl_node(struct urtw_softc *sc) 4379{ 4380#define URTW_SYSCTL_STAT_ADD32(c, h, n, p, d) \ 4381 SYSCTL_ADD_UINT(c, h, OID_AUTO, n, CTLFLAG_RD, p, 0, d) 4382 struct sysctl_ctx_list *ctx; 4383 struct sysctl_oid_list *child, *parent; 4384 struct sysctl_oid *tree; 4385 struct urtw_stats *stats = &sc->sc_stats; 4386 4387 ctx = device_get_sysctl_ctx(sc->sc_dev); 4388 child = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->sc_dev)); 4389 4390 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD, 4391 NULL, "URTW statistics"); 4392 parent = SYSCTL_CHILDREN(tree); 4393 4394 /* Tx statistics. */ 4395 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "tx", CTLFLAG_RD, 4396 NULL, "Tx MAC statistics"); 4397 child = SYSCTL_CHILDREN(tree); 4398 URTW_SYSCTL_STAT_ADD32(ctx, child, "1m", &stats->txrates[0], 4399 "1 Mbit/s"); 4400 URTW_SYSCTL_STAT_ADD32(ctx, child, "2m", &stats->txrates[1], 4401 "2 Mbit/s"); 4402 URTW_SYSCTL_STAT_ADD32(ctx, child, "5.5m", &stats->txrates[2], 4403 "5.5 Mbit/s"); 4404 URTW_SYSCTL_STAT_ADD32(ctx, child, "6m", &stats->txrates[4], 4405 "6 Mbit/s"); 4406 URTW_SYSCTL_STAT_ADD32(ctx, child, "9m", &stats->txrates[5], 4407 "9 Mbit/s"); 4408 URTW_SYSCTL_STAT_ADD32(ctx, child, "11m", &stats->txrates[3], 4409 "11 Mbit/s"); 4410 URTW_SYSCTL_STAT_ADD32(ctx, child, "12m", &stats->txrates[6], 4411 "12 Mbit/s"); 4412 URTW_SYSCTL_STAT_ADD32(ctx, child, "18m", &stats->txrates[7], 4413 "18 Mbit/s"); 4414 URTW_SYSCTL_STAT_ADD32(ctx, child, "24m", &stats->txrates[8], 4415 "24 Mbit/s"); 4416 URTW_SYSCTL_STAT_ADD32(ctx, child, "36m", &stats->txrates[9], 4417 "36 Mbit/s"); 4418 URTW_SYSCTL_STAT_ADD32(ctx, child, "48m", &stats->txrates[10], 4419 "48 Mbit/s"); 4420 URTW_SYSCTL_STAT_ADD32(ctx, child, "54m", &stats->txrates[11], 4421 "54 Mbit/s"); 4422#undef URTW_SYSCTL_STAT_ADD32 4423} 4424 4425static device_method_t urtw_methods[] = { 4426 DEVMETHOD(device_probe, urtw_match), 4427 DEVMETHOD(device_attach, urtw_attach), 4428 DEVMETHOD(device_detach, urtw_detach), 4429 DEVMETHOD_END 4430}; 4431static driver_t urtw_driver = { 4432 .name = "urtw", 4433 .methods = urtw_methods, 4434 .size = sizeof(struct urtw_softc) 4435}; 4436static devclass_t urtw_devclass; 4437 4438DRIVER_MODULE(urtw, uhub, urtw_driver, urtw_devclass, NULL, 0); 4439MODULE_DEPEND(urtw, wlan, 1, 1, 1); 4440MODULE_DEPEND(urtw, usb, 1, 1, 1); 4441MODULE_VERSION(urtw, 1); 4442USB_PNP_HOST_INFO(urtw_devs); 4443