if_urtw.c revision 292080
1/*- 2 * Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org> 3 * 4 * Permission to use, copy, modify, and distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#include <sys/cdefs.h> 18__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_urtw.c 292080 2015-12-11 05:28:00Z imp $"); 19#include <sys/param.h> 20#include <sys/sockio.h> 21#include <sys/sysctl.h> 22#include <sys/lock.h> 23#include <sys/mutex.h> 24#include <sys/mbuf.h> 25#include <sys/kernel.h> 26#include <sys/socket.h> 27#include <sys/systm.h> 28#include <sys/malloc.h> 29#include <sys/module.h> 30#include <sys/bus.h> 31#include <sys/endian.h> 32#include <sys/kdb.h> 33 34#include <machine/bus.h> 35#include <machine/resource.h> 36#include <sys/rman.h> 37 38#include <net/if.h> 39#include <net/if_var.h> 40#include <net/if_arp.h> 41#include <net/ethernet.h> 42#include <net/if_dl.h> 43#include <net/if_media.h> 44#include <net/if_types.h> 45 46#ifdef INET 47#include <netinet/in.h> 48#include <netinet/in_systm.h> 49#include <netinet/in_var.h> 50#include <netinet/if_ether.h> 51#include <netinet/ip.h> 52#endif 53 54#include <net80211/ieee80211_var.h> 55#include <net80211/ieee80211_regdomain.h> 56#include <net80211/ieee80211_radiotap.h> 57 58#include <dev/usb/usb.h> 59#include <dev/usb/usbdi.h> 60#include "usbdevs.h" 61 62#include <dev/usb/wlan/if_urtwreg.h> 63#include <dev/usb/wlan/if_urtwvar.h> 64 65static SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW, 0, "USB Realtek 8187L"); 66#ifdef URTW_DEBUG 67int urtw_debug = 0; 68SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RWTUN, &urtw_debug, 0, 69 "control debugging printfs"); 70enum { 71 URTW_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 72 URTW_DEBUG_RECV = 0x00000002, /* basic recv operation */ 73 URTW_DEBUG_RESET = 0x00000004, /* reset processing */ 74 URTW_DEBUG_TX_PROC = 0x00000008, /* tx ISR proc */ 75 URTW_DEBUG_RX_PROC = 0x00000010, /* rx ISR proc */ 76 URTW_DEBUG_STATE = 0x00000020, /* 802.11 state transitions */ 77 URTW_DEBUG_STAT = 0x00000040, /* statistic */ 78 URTW_DEBUG_INIT = 0x00000080, /* initialization of dev */ 79 URTW_DEBUG_TXSTATUS = 0x00000100, /* tx status */ 80 URTW_DEBUG_ANY = 0xffffffff 81}; 82#define DPRINTF(sc, m, fmt, ...) do { \ 83 if (sc->sc_debug & (m)) \ 84 printf(fmt, __VA_ARGS__); \ 85} while (0) 86#else 87#define DPRINTF(sc, m, fmt, ...) do { \ 88 (void) sc; \ 89} while (0) 90#endif 91static int urtw_preamble_mode = URTW_PREAMBLE_MODE_LONG; 92SYSCTL_INT(_hw_usb_urtw, OID_AUTO, preamble_mode, CTLFLAG_RWTUN, 93 &urtw_preamble_mode, 0, "set the preable mode (long or short)"); 94 95/* recognized device vendors/products */ 96#define urtw_lookup(v, p) \ 97 ((const struct urtw_type *)usb_lookup(urtw_devs, v, p)) 98#define URTW_DEV_B(v,p) \ 99 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187B) } 100#define URTW_DEV_L(v,p) \ 101 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187L) } 102#define URTW_REV_RTL8187B 0 103#define URTW_REV_RTL8187L 1 104static const STRUCT_USB_HOST_ID urtw_devs[] = { 105 URTW_DEV_B(NETGEAR, WG111V3), 106 URTW_DEV_B(REALTEK, RTL8187B_0), 107 URTW_DEV_B(REALTEK, RTL8187B_1), 108 URTW_DEV_B(REALTEK, RTL8187B_2), 109 URTW_DEV_B(SITECOMEU, WL168V4), 110 URTW_DEV_L(ASUS, P5B_WIFI), 111 URTW_DEV_L(BELKIN, F5D7050E), 112 URTW_DEV_L(LINKSYS4, WUSB54GCV2), 113 URTW_DEV_L(NETGEAR, WG111V2), 114 URTW_DEV_L(REALTEK, RTL8187), 115 URTW_DEV_L(SITECOMEU, WL168V1), 116 URTW_DEV_L(SURECOM, EP9001G2A), 117 { USB_VPI(USB_VENDOR_OVISLINK, 0x8187, URTW_REV_RTL8187L) }, 118 { USB_VPI(USB_VENDOR_DICKSMITH, 0x9401, URTW_REV_RTL8187L) }, 119 { USB_VPI(USB_VENDOR_HP, 0xca02, URTW_REV_RTL8187L) }, 120 { USB_VPI(USB_VENDOR_LOGITEC, 0x010c, URTW_REV_RTL8187L) }, 121 { USB_VPI(USB_VENDOR_NETGEAR, 0x6100, URTW_REV_RTL8187L) }, 122 { USB_VPI(USB_VENDOR_SPHAIRON, 0x0150, URTW_REV_RTL8187L) }, 123 { USB_VPI(USB_VENDOR_QCOM, 0x6232, URTW_REV_RTL8187L) }, 124#undef URTW_DEV_L 125#undef URTW_DEV_B 126}; 127 128#define urtw_read8_m(sc, val, data) do { \ 129 error = urtw_read8_c(sc, val, data); \ 130 if (error != 0) \ 131 goto fail; \ 132} while (0) 133#define urtw_write8_m(sc, val, data) do { \ 134 error = urtw_write8_c(sc, val, data); \ 135 if (error != 0) \ 136 goto fail; \ 137} while (0) 138#define urtw_read16_m(sc, val, data) do { \ 139 error = urtw_read16_c(sc, val, data); \ 140 if (error != 0) \ 141 goto fail; \ 142} while (0) 143#define urtw_write16_m(sc, val, data) do { \ 144 error = urtw_write16_c(sc, val, data); \ 145 if (error != 0) \ 146 goto fail; \ 147} while (0) 148#define urtw_read32_m(sc, val, data) do { \ 149 error = urtw_read32_c(sc, val, data); \ 150 if (error != 0) \ 151 goto fail; \ 152} while (0) 153#define urtw_write32_m(sc, val, data) do { \ 154 error = urtw_write32_c(sc, val, data); \ 155 if (error != 0) \ 156 goto fail; \ 157} while (0) 158#define urtw_8187_write_phy_ofdm(sc, val, data) do { \ 159 error = urtw_8187_write_phy_ofdm_c(sc, val, data); \ 160 if (error != 0) \ 161 goto fail; \ 162} while (0) 163#define urtw_8187_write_phy_cck(sc, val, data) do { \ 164 error = urtw_8187_write_phy_cck_c(sc, val, data); \ 165 if (error != 0) \ 166 goto fail; \ 167} while (0) 168#define urtw_8225_write(sc, val, data) do { \ 169 error = urtw_8225_write_c(sc, val, data); \ 170 if (error != 0) \ 171 goto fail; \ 172} while (0) 173 174struct urtw_pair { 175 uint32_t reg; 176 uint32_t val; 177}; 178 179static uint8_t urtw_8225_agc[] = { 180 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b, 181 0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 182 0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85, 183 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a, 184 0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 185 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24, 186 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 187 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 188 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 189 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 190 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 191 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 192}; 193 194static uint8_t urtw_8225z2_agc[] = { 195 0x5e, 0x5e, 0x5e, 0x5e, 0x5d, 0x5b, 0x59, 0x57, 0x55, 0x53, 0x51, 196 0x4f, 0x4d, 0x4b, 0x49, 0x47, 0x45, 0x43, 0x41, 0x3f, 0x3d, 0x3b, 197 0x39, 0x37, 0x35, 0x33, 0x31, 0x2f, 0x2d, 0x2b, 0x29, 0x27, 0x25, 198 0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 0x15, 0x13, 0x11, 0x0f, 199 0x0d, 0x0b, 0x09, 0x07, 0x05, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 200 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x19, 0x19, 201 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x20, 0x21, 0x22, 0x23, 202 0x24, 0x25, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29, 0x2a, 0x2a, 203 0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2d, 204 0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x31, 0x31, 205 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 206 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31 207}; 208 209static uint32_t urtw_8225_channel[] = { 210 0x0000, /* dummy channel 0 */ 211 0x085c, /* 1 */ 212 0x08dc, /* 2 */ 213 0x095c, /* 3 */ 214 0x09dc, /* 4 */ 215 0x0a5c, /* 5 */ 216 0x0adc, /* 6 */ 217 0x0b5c, /* 7 */ 218 0x0bdc, /* 8 */ 219 0x0c5c, /* 9 */ 220 0x0cdc, /* 10 */ 221 0x0d5c, /* 11 */ 222 0x0ddc, /* 12 */ 223 0x0e5c, /* 13 */ 224 0x0f72, /* 14 */ 225}; 226 227static uint8_t urtw_8225_gain[] = { 228 0x23, 0x88, 0x7c, 0xa5, /* -82dbm */ 229 0x23, 0x88, 0x7c, 0xb5, /* -82dbm */ 230 0x23, 0x88, 0x7c, 0xc5, /* -82dbm */ 231 0x33, 0x80, 0x79, 0xc5, /* -78dbm */ 232 0x43, 0x78, 0x76, 0xc5, /* -74dbm */ 233 0x53, 0x60, 0x73, 0xc5, /* -70dbm */ 234 0x63, 0x58, 0x70, 0xc5, /* -66dbm */ 235}; 236 237static struct urtw_pair urtw_8225_rf_part1[] = { 238 { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 239 { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a }, 240 { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 }, 241 { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 }, 242}; 243 244static struct urtw_pair urtw_8225_rf_part2[] = { 245 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 246 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 247 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 }, 248 { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 }, 249 { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 }, 250 { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, { 0x18, 0xef }, 251 { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x76 }, { 0x1c, 0x04 }, 252 { 0x1e, 0x95 }, { 0x1f, 0x75 }, { 0x20, 0x1f }, { 0x21, 0x27 }, 253 { 0x22, 0x16 }, { 0x24, 0x46 }, { 0x25, 0x20 }, { 0x26, 0x90 }, 254 { 0x27, 0x88 } 255}; 256 257static struct urtw_pair urtw_8225_rf_part3[] = { 258 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 259 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x10, 0x9b }, 260 { 0x11, 0x88 }, { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, 261 { 0x1a, 0xa0 }, { 0x1b, 0x08 }, { 0x40, 0x86 }, { 0x41, 0x8d }, 262 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x1f }, { 0x45, 0x1e }, 263 { 0x46, 0x1a }, { 0x47, 0x15 }, { 0x48, 0x10 }, { 0x49, 0x0a }, 264 { 0x4a, 0x05 }, { 0x4b, 0x02 }, { 0x4c, 0x05 } 265}; 266 267static uint16_t urtw_8225_rxgain[] = { 268 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 269 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 270 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 271 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 272 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 273 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 274 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 275 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 276 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 277 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 278 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3, 279 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb 280}; 281 282static uint8_t urtw_8225_threshold[] = { 283 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd, 284}; 285 286static uint8_t urtw_8225_tx_gain_cck_ofdm[] = { 287 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e 288}; 289 290static uint8_t urtw_8225_txpwr_cck[] = { 291 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02, 292 0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02, 293 0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02, 294 0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02, 295 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03, 296 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03 297}; 298 299static uint8_t urtw_8225_txpwr_cck_ch14[] = { 300 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00, 301 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00, 302 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00, 303 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00, 304 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00, 305 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00 306}; 307 308static uint8_t urtw_8225_txpwr_ofdm[]={ 309 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4 310}; 311 312static uint8_t urtw_8225v2_gain_bg[]={ 313 0x23, 0x15, 0xa5, /* -82-1dbm */ 314 0x23, 0x15, 0xb5, /* -82-2dbm */ 315 0x23, 0x15, 0xc5, /* -82-3dbm */ 316 0x33, 0x15, 0xc5, /* -78dbm */ 317 0x43, 0x15, 0xc5, /* -74dbm */ 318 0x53, 0x15, 0xc5, /* -70dbm */ 319 0x63, 0x15, 0xc5, /* -66dbm */ 320}; 321 322static struct urtw_pair urtw_8225v2_rf_part1[] = { 323 { 0x00, 0x02bf }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 324 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 325 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 326 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 327}; 328 329static struct urtw_pair urtw_8225v2b_rf_part0[] = { 330 { 0x00, 0x00b7 }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 331 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 332 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 333 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 334}; 335 336static struct urtw_pair urtw_8225v2b_rf_part1[] = { 337 {0x0f0, 0x32}, {0x0f1, 0x32}, {0x0f2, 0x00}, 338 {0x0f3, 0x00}, {0x0f4, 0x32}, {0x0f5, 0x43}, 339 {0x0f6, 0x00}, {0x0f7, 0x00}, {0x0f8, 0x46}, 340 {0x0f9, 0xa4}, {0x0fa, 0x00}, {0x0fb, 0x00}, 341 {0x0fc, 0x96}, {0x0fd, 0xa4}, {0x0fe, 0x00}, 342 {0x0ff, 0x00}, {0x158, 0x4b}, {0x159, 0x00}, 343 {0x15a, 0x4b}, {0x15b, 0x00}, {0x160, 0x4b}, 344 {0x161, 0x09}, {0x162, 0x4b}, {0x163, 0x09}, 345 {0x1ce, 0x0f}, {0x1cf, 0x00}, {0x1e0, 0xff}, 346 {0x1e1, 0x0f}, {0x1e2, 0x00}, {0x1f0, 0x4e}, 347 {0x1f1, 0x01}, {0x1f2, 0x02}, {0x1f3, 0x03}, 348 {0x1f4, 0x04}, {0x1f5, 0x05}, {0x1f6, 0x06}, 349 {0x1f7, 0x07}, {0x1f8, 0x08}, {0x24e, 0x00}, 350 {0x20c, 0x04}, {0x221, 0x61}, {0x222, 0x68}, 351 {0x223, 0x6f}, {0x224, 0x76}, {0x225, 0x7d}, 352 {0x226, 0x84}, {0x227, 0x8d}, {0x24d, 0x08}, 353 {0x250, 0x05}, {0x251, 0xf5}, {0x252, 0x04}, 354 {0x253, 0xa0}, {0x254, 0x1f}, {0x255, 0x23}, 355 {0x256, 0x45}, {0x257, 0x67}, {0x258, 0x08}, 356 {0x259, 0x08}, {0x25a, 0x08}, {0x25b, 0x08}, 357 {0x260, 0x08}, {0x261, 0x08}, {0x262, 0x08}, 358 {0x263, 0x08}, {0x264, 0xcf}, {0x272, 0x56}, 359 {0x273, 0x9a}, {0x034, 0xf0}, {0x035, 0x0f}, 360 {0x05b, 0x40}, {0x084, 0x88}, {0x085, 0x24}, 361 {0x088, 0x54}, {0x08b, 0xb8}, {0x08c, 0x07}, 362 {0x08d, 0x00}, {0x094, 0x1b}, {0x095, 0x12}, 363 {0x096, 0x00}, {0x097, 0x06}, {0x09d, 0x1a}, 364 {0x09f, 0x10}, {0x0b4, 0x22}, {0x0be, 0x80}, 365 {0x0db, 0x00}, {0x0ee, 0x00}, {0x091, 0x03}, 366 {0x24c, 0x00}, {0x39f, 0x00}, {0x08c, 0x01}, 367 {0x08d, 0x10}, {0x08e, 0x08}, {0x08f, 0x00} 368}; 369 370static struct urtw_pair urtw_8225v2_rf_part2[] = { 371 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 372 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 373 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x08 }, { 0x0b, 0x80 }, 374 { 0x0c, 0x01 }, { 0x0d, 0x43 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, 375 { 0x10, 0x84 }, { 0x11, 0x07 }, { 0x12, 0x20 }, { 0x13, 0x20 }, 376 { 0x14, 0x00 }, { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, 377 { 0x18, 0xef }, { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x15 }, 378 { 0x1c, 0x04 }, { 0x1d, 0xc5 }, { 0x1e, 0x95 }, { 0x1f, 0x75 }, 379 { 0x20, 0x1f }, { 0x21, 0x17 }, { 0x22, 0x16 }, { 0x23, 0x80 }, 380 { 0x24, 0x46 }, { 0x25, 0x00 }, { 0x26, 0x90 }, { 0x27, 0x88 } 381}; 382 383static struct urtw_pair urtw_8225v2b_rf_part2[] = { 384 { 0x00, 0x10 }, { 0x01, 0x0d }, { 0x02, 0x01 }, { 0x03, 0x00 }, 385 { 0x04, 0x14 }, { 0x05, 0xfb }, { 0x06, 0xfb }, { 0x07, 0x60 }, 386 { 0x08, 0x00 }, { 0x09, 0x60 }, { 0x0a, 0x00 }, { 0x0b, 0x00 }, 387 { 0x0c, 0x00 }, { 0x0d, 0x5c }, { 0x0e, 0x00 }, { 0x0f, 0x00 }, 388 { 0x10, 0x40 }, { 0x11, 0x00 }, { 0x12, 0x40 }, { 0x13, 0x00 }, 389 { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0xa8 }, { 0x17, 0x26 }, 390 { 0x18, 0x32 }, { 0x19, 0x33 }, { 0x1a, 0x07 }, { 0x1b, 0xa5 }, 391 { 0x1c, 0x6f }, { 0x1d, 0x55 }, { 0x1e, 0xc8 }, { 0x1f, 0xb3 }, 392 { 0x20, 0x0a }, { 0x21, 0xe1 }, { 0x22, 0x2C }, { 0x23, 0x8a }, 393 { 0x24, 0x86 }, { 0x25, 0x83 }, { 0x26, 0x34 }, { 0x27, 0x0f }, 394 { 0x28, 0x4f }, { 0x29, 0x24 }, { 0x2a, 0x6f }, { 0x2b, 0xc2 }, 395 { 0x2c, 0x6b }, { 0x2d, 0x40 }, { 0x2e, 0x80 }, { 0x2f, 0x00 }, 396 { 0x30, 0xc0 }, { 0x31, 0xc1 }, { 0x32, 0x58 }, { 0x33, 0xf1 }, 397 { 0x34, 0x00 }, { 0x35, 0xe4 }, { 0x36, 0x90 }, { 0x37, 0x3e }, 398 { 0x38, 0x6d }, { 0x39, 0x3c }, { 0x3a, 0xfb }, { 0x3b, 0x07 } 399}; 400 401static struct urtw_pair urtw_8225v2_rf_part3[] = { 402 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 403 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x09, 0x11 }, 404 { 0x0a, 0x17 }, { 0x0b, 0x11 }, { 0x10, 0x9b }, { 0x11, 0x88 }, 405 { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, { 0x1a, 0xa0 }, 406 { 0x1b, 0x08 }, { 0x1d, 0x00 }, { 0x40, 0x86 }, { 0x41, 0x9d }, 407 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x36 }, { 0x45, 0x35 }, 408 { 0x46, 0x2e }, { 0x47, 0x25 }, { 0x48, 0x1c }, { 0x49, 0x12 }, 409 { 0x4a, 0x09 }, { 0x4b, 0x04 }, { 0x4c, 0x05 } 410}; 411 412static uint16_t urtw_8225v2_rxgain[] = { 413 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009, 414 0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141, 415 0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183, 416 0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244, 417 0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288, 418 0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345, 419 0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389, 420 0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393, 421 0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d, 422 0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9, 423 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 424 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 425}; 426 427static uint16_t urtw_8225v2b_rxgain[] = { 428 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 429 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 430 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 431 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 432 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 433 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 434 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 435 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 436 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 437 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 438 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 439 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 440}; 441 442static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = { 443 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 444 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 445 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 446 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 447 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 448 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, 449}; 450 451static uint8_t urtw_8225v2_txpwr_cck[] = { 452 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04 453}; 454 455static uint8_t urtw_8225v2_txpwr_cck_ch14[] = { 456 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00 457}; 458 459static uint8_t urtw_8225v2b_txpwr_cck[] = { 460 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04, 461 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03, 462 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03, 463 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03 464}; 465 466static uint8_t urtw_8225v2b_txpwr_cck_ch14[] = { 467 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00, 468 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 469 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 470 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00 471}; 472 473static struct urtw_pair urtw_ratetable[] = { 474 { 2, 0 }, { 4, 1 }, { 11, 2 }, { 12, 4 }, { 18, 5 }, 475 { 22, 3 }, { 24, 6 }, { 36, 7 }, { 48, 8 }, { 72, 9 }, 476 { 96, 10 }, { 108, 11 } 477}; 478 479#if 0 480static const uint8_t urtw_8187b_reg_table[][3] = { 481 { 0xf0, 0x32, 0 }, { 0xf1, 0x32, 0 }, { 0xf2, 0x00, 0 }, 482 { 0xf3, 0x00, 0 }, { 0xf4, 0x32, 0 }, { 0xf5, 0x43, 0 }, 483 { 0xf6, 0x00, 0 }, { 0xf7, 0x00, 0 }, { 0xf8, 0x46, 0 }, 484 { 0xf9, 0xa4, 0 }, { 0xfa, 0x00, 0 }, { 0xfb, 0x00, 0 }, 485 { 0xfc, 0x96, 0 }, { 0xfd, 0xa4, 0 }, { 0xfe, 0x00, 0 }, 486 { 0xff, 0x00, 0 }, { 0x58, 0x4b, 1 }, { 0x59, 0x00, 1 }, 487 { 0x5a, 0x4b, 1 }, { 0x5b, 0x00, 1 }, { 0x60, 0x4b, 1 }, 488 { 0x61, 0x09, 1 }, { 0x62, 0x4b, 1 }, { 0x63, 0x09, 1 }, 489 { 0xce, 0x0f, 1 }, { 0xcf, 0x00, 1 }, { 0xe0, 0xff, 1 }, 490 { 0xe1, 0x0f, 1 }, { 0xe2, 0x00, 1 }, { 0xf0, 0x4e, 1 }, 491 { 0xf1, 0x01, 1 }, { 0xf2, 0x02, 1 }, { 0xf3, 0x03, 1 }, 492 { 0xf4, 0x04, 1 }, { 0xf5, 0x05, 1 }, { 0xf6, 0x06, 1 }, 493 { 0xf7, 0x07, 1 }, { 0xf8, 0x08, 1 }, { 0x4e, 0x00, 2 }, 494 { 0x0c, 0x04, 2 }, { 0x21, 0x61, 2 }, { 0x22, 0x68, 2 }, 495 { 0x23, 0x6f, 2 }, { 0x24, 0x76, 2 }, { 0x25, 0x7d, 2 }, 496 { 0x26, 0x84, 2 }, { 0x27, 0x8d, 2 }, { 0x4d, 0x08, 2 }, 497 { 0x50, 0x05, 2 }, { 0x51, 0xf5, 2 }, { 0x52, 0x04, 2 }, 498 { 0x53, 0xa0, 2 }, { 0x54, 0x1f, 2 }, { 0x55, 0x23, 2 }, 499 { 0x56, 0x45, 2 }, { 0x57, 0x67, 2 }, { 0x58, 0x08, 2 }, 500 { 0x59, 0x08, 2 }, { 0x5a, 0x08, 2 }, { 0x5b, 0x08, 2 }, 501 { 0x60, 0x08, 2 }, { 0x61, 0x08, 2 }, { 0x62, 0x08, 2 }, 502 { 0x63, 0x08, 2 }, { 0x64, 0xcf, 2 }, { 0x72, 0x56, 2 }, 503 { 0x73, 0x9a, 2 }, { 0x34, 0xf0, 0 }, { 0x35, 0x0f, 0 }, 504 { 0x5b, 0x40, 0 }, { 0x84, 0x88, 0 }, { 0x85, 0x24, 0 }, 505 { 0x88, 0x54, 0 }, { 0x8b, 0xb8, 0 }, { 0x8c, 0x07, 0 }, 506 { 0x8d, 0x00, 0 }, { 0x94, 0x1b, 0 }, { 0x95, 0x12, 0 }, 507 { 0x96, 0x00, 0 }, { 0x97, 0x06, 0 }, { 0x9d, 0x1a, 0 }, 508 { 0x9f, 0x10, 0 }, { 0xb4, 0x22, 0 }, { 0xbe, 0x80, 0 }, 509 { 0xdb, 0x00, 0 }, { 0xee, 0x00, 0 }, { 0x91, 0x03, 0 }, 510 { 0x4c, 0x00, 2 }, { 0x9f, 0x00, 3 }, { 0x8c, 0x01, 0 }, 511 { 0x8d, 0x10, 0 }, { 0x8e, 0x08, 0 }, { 0x8f, 0x00, 0 } 512}; 513#endif 514 515static usb_callback_t urtw_bulk_rx_callback; 516static usb_callback_t urtw_bulk_tx_callback; 517static usb_callback_t urtw_bulk_tx_status_callback; 518 519static const struct usb_config urtw_8187b_usbconfig[URTW_8187B_N_XFERS] = { 520 [URTW_8187B_BULK_RX] = { 521 .type = UE_BULK, 522 .endpoint = 0x83, 523 .direction = UE_DIR_IN, 524 .bufsize = MCLBYTES, 525 .flags = { 526 .ext_buffer = 1, 527 .pipe_bof = 1, 528 .short_xfer_ok = 1 529 }, 530 .callback = urtw_bulk_rx_callback 531 }, 532 [URTW_8187B_BULK_TX_STATUS] = { 533 .type = UE_BULK, 534 .endpoint = 0x89, 535 .direction = UE_DIR_IN, 536 .bufsize = sizeof(uint64_t), 537 .flags = { 538 .pipe_bof = 1, 539 .short_xfer_ok = 1 540 }, 541 .callback = urtw_bulk_tx_status_callback 542 }, 543 [URTW_8187B_BULK_TX_BE] = { 544 .type = UE_BULK, 545 .endpoint = URTW_8187B_TXPIPE_BE, 546 .direction = UE_DIR_OUT, 547 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT, 548 .flags = { 549 .force_short_xfer = 1, 550 .pipe_bof = 1, 551 }, 552 .callback = urtw_bulk_tx_callback, 553 .timeout = URTW_DATA_TIMEOUT 554 }, 555 [URTW_8187B_BULK_TX_BK] = { 556 .type = UE_BULK, 557 .endpoint = URTW_8187B_TXPIPE_BK, 558 .direction = UE_DIR_OUT, 559 .bufsize = URTW_TX_MAXSIZE, 560 .flags = { 561 .ext_buffer = 1, 562 .force_short_xfer = 1, 563 .pipe_bof = 1, 564 }, 565 .callback = urtw_bulk_tx_callback, 566 .timeout = URTW_DATA_TIMEOUT 567 }, 568 [URTW_8187B_BULK_TX_VI] = { 569 .type = UE_BULK, 570 .endpoint = URTW_8187B_TXPIPE_VI, 571 .direction = UE_DIR_OUT, 572 .bufsize = URTW_TX_MAXSIZE, 573 .flags = { 574 .ext_buffer = 1, 575 .force_short_xfer = 1, 576 .pipe_bof = 1, 577 }, 578 .callback = urtw_bulk_tx_callback, 579 .timeout = URTW_DATA_TIMEOUT 580 }, 581 [URTW_8187B_BULK_TX_VO] = { 582 .type = UE_BULK, 583 .endpoint = URTW_8187B_TXPIPE_VO, 584 .direction = UE_DIR_OUT, 585 .bufsize = URTW_TX_MAXSIZE, 586 .flags = { 587 .ext_buffer = 1, 588 .force_short_xfer = 1, 589 .pipe_bof = 1, 590 }, 591 .callback = urtw_bulk_tx_callback, 592 .timeout = URTW_DATA_TIMEOUT 593 }, 594 [URTW_8187B_BULK_TX_EP12] = { 595 .type = UE_BULK, 596 .endpoint = 0xc, 597 .direction = UE_DIR_OUT, 598 .bufsize = URTW_TX_MAXSIZE, 599 .flags = { 600 .ext_buffer = 1, 601 .force_short_xfer = 1, 602 .pipe_bof = 1, 603 }, 604 .callback = urtw_bulk_tx_callback, 605 .timeout = URTW_DATA_TIMEOUT 606 } 607}; 608 609static const struct usb_config urtw_8187l_usbconfig[URTW_8187L_N_XFERS] = { 610 [URTW_8187L_BULK_RX] = { 611 .type = UE_BULK, 612 .endpoint = 0x81, 613 .direction = UE_DIR_IN, 614 .bufsize = MCLBYTES, 615 .flags = { 616 .ext_buffer = 1, 617 .pipe_bof = 1, 618 .short_xfer_ok = 1 619 }, 620 .callback = urtw_bulk_rx_callback 621 }, 622 [URTW_8187L_BULK_TX_LOW] = { 623 .type = UE_BULK, 624 .endpoint = 0x2, 625 .direction = UE_DIR_OUT, 626 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT, 627 .flags = { 628 .force_short_xfer = 1, 629 .pipe_bof = 1, 630 }, 631 .callback = urtw_bulk_tx_callback, 632 .timeout = URTW_DATA_TIMEOUT 633 }, 634 [URTW_8187L_BULK_TX_NORMAL] = { 635 .type = UE_BULK, 636 .endpoint = 0x3, 637 .direction = UE_DIR_OUT, 638 .bufsize = URTW_TX_MAXSIZE, 639 .flags = { 640 .ext_buffer = 1, 641 .force_short_xfer = 1, 642 .pipe_bof = 1, 643 }, 644 .callback = urtw_bulk_tx_callback, 645 .timeout = URTW_DATA_TIMEOUT 646 }, 647}; 648 649static struct ieee80211vap *urtw_vap_create(struct ieee80211com *, 650 const char [IFNAMSIZ], int, enum ieee80211_opmode, 651 int, const uint8_t [IEEE80211_ADDR_LEN], 652 const uint8_t [IEEE80211_ADDR_LEN]); 653static void urtw_vap_delete(struct ieee80211vap *); 654static void urtw_init(struct urtw_softc *); 655static void urtw_stop(struct urtw_softc *); 656static void urtw_parent(struct ieee80211com *); 657static int urtw_transmit(struct ieee80211com *, struct mbuf *); 658static void urtw_start(struct urtw_softc *); 659static int urtw_alloc_rx_data_list(struct urtw_softc *); 660static int urtw_alloc_tx_data_list(struct urtw_softc *); 661static int urtw_raw_xmit(struct ieee80211_node *, struct mbuf *, 662 const struct ieee80211_bpf_params *); 663static void urtw_scan_start(struct ieee80211com *); 664static void urtw_scan_end(struct ieee80211com *); 665static void urtw_set_channel(struct ieee80211com *); 666static void urtw_update_mcast(struct ieee80211com *); 667static int urtw_tx_start(struct urtw_softc *, 668 struct ieee80211_node *, struct mbuf *, 669 struct urtw_data *, int); 670static int urtw_newstate(struct ieee80211vap *, 671 enum ieee80211_state, int); 672static void urtw_led_ch(void *); 673static void urtw_ledtask(void *, int); 674static void urtw_watchdog(void *); 675static void urtw_set_multi(void *); 676static int urtw_isbmode(uint16_t); 677static uint16_t urtw_rate2rtl(uint32_t); 678static uint16_t urtw_rtl2rate(uint32_t); 679static usb_error_t urtw_set_rate(struct urtw_softc *); 680static usb_error_t urtw_update_msr(struct urtw_softc *); 681static usb_error_t urtw_read8_c(struct urtw_softc *, int, uint8_t *); 682static usb_error_t urtw_read16_c(struct urtw_softc *, int, uint16_t *); 683static usb_error_t urtw_read32_c(struct urtw_softc *, int, uint32_t *); 684static usb_error_t urtw_write8_c(struct urtw_softc *, int, uint8_t); 685static usb_error_t urtw_write16_c(struct urtw_softc *, int, uint16_t); 686static usb_error_t urtw_write32_c(struct urtw_softc *, int, uint32_t); 687static usb_error_t urtw_eprom_cs(struct urtw_softc *, int); 688static usb_error_t urtw_eprom_ck(struct urtw_softc *); 689static usb_error_t urtw_eprom_sendbits(struct urtw_softc *, int16_t *, 690 int); 691static usb_error_t urtw_eprom_read32(struct urtw_softc *, uint32_t, 692 uint32_t *); 693static usb_error_t urtw_eprom_readbit(struct urtw_softc *, int16_t *); 694static usb_error_t urtw_eprom_writebit(struct urtw_softc *, int16_t); 695static usb_error_t urtw_get_macaddr(struct urtw_softc *); 696static usb_error_t urtw_get_txpwr(struct urtw_softc *); 697static usb_error_t urtw_get_rfchip(struct urtw_softc *); 698static usb_error_t urtw_led_init(struct urtw_softc *); 699static usb_error_t urtw_8185_rf_pins_enable(struct urtw_softc *); 700static usb_error_t urtw_8185_tx_antenna(struct urtw_softc *, uint8_t); 701static usb_error_t urtw_8187_write_phy(struct urtw_softc *, uint8_t, 702 uint32_t); 703static usb_error_t urtw_8187_write_phy_ofdm_c(struct urtw_softc *, 704 uint8_t, uint32_t); 705static usb_error_t urtw_8187_write_phy_cck_c(struct urtw_softc *, uint8_t, 706 uint32_t); 707static usb_error_t urtw_8225_setgain(struct urtw_softc *, int16_t); 708static usb_error_t urtw_8225_usb_init(struct urtw_softc *); 709static usb_error_t urtw_8225_write_c(struct urtw_softc *, uint8_t, 710 uint16_t); 711static usb_error_t urtw_8225_write_s16(struct urtw_softc *, uint8_t, int, 712 uint16_t *); 713static usb_error_t urtw_8225_read(struct urtw_softc *, uint8_t, 714 uint32_t *); 715static usb_error_t urtw_8225_rf_init(struct urtw_softc *); 716static usb_error_t urtw_8225_rf_set_chan(struct urtw_softc *, int); 717static usb_error_t urtw_8225_rf_set_sens(struct urtw_softc *, int); 718static usb_error_t urtw_8225_set_txpwrlvl(struct urtw_softc *, int); 719static usb_error_t urtw_8225_rf_stop(struct urtw_softc *); 720static usb_error_t urtw_8225v2_rf_init(struct urtw_softc *); 721static usb_error_t urtw_8225v2_rf_set_chan(struct urtw_softc *, int); 722static usb_error_t urtw_8225v2_set_txpwrlvl(struct urtw_softc *, int); 723static usb_error_t urtw_8225v2_setgain(struct urtw_softc *, int16_t); 724static usb_error_t urtw_8225_isv2(struct urtw_softc *, int *); 725static usb_error_t urtw_8225v2b_rf_init(struct urtw_softc *); 726static usb_error_t urtw_8225v2b_rf_set_chan(struct urtw_softc *, int); 727static usb_error_t urtw_read8e(struct urtw_softc *, int, uint8_t *); 728static usb_error_t urtw_write8e(struct urtw_softc *, int, uint8_t); 729static usb_error_t urtw_8180_set_anaparam(struct urtw_softc *, uint32_t); 730static usb_error_t urtw_8185_set_anaparam2(struct urtw_softc *, uint32_t); 731static usb_error_t urtw_intr_enable(struct urtw_softc *); 732static usb_error_t urtw_intr_disable(struct urtw_softc *); 733static usb_error_t urtw_reset(struct urtw_softc *); 734static usb_error_t urtw_led_on(struct urtw_softc *, int); 735static usb_error_t urtw_led_ctl(struct urtw_softc *, int); 736static usb_error_t urtw_led_blink(struct urtw_softc *); 737static usb_error_t urtw_led_mode0(struct urtw_softc *, int); 738static usb_error_t urtw_led_mode1(struct urtw_softc *, int); 739static usb_error_t urtw_led_mode2(struct urtw_softc *, int); 740static usb_error_t urtw_led_mode3(struct urtw_softc *, int); 741static usb_error_t urtw_rx_setconf(struct urtw_softc *); 742static usb_error_t urtw_rx_enable(struct urtw_softc *); 743static usb_error_t urtw_tx_enable(struct urtw_softc *sc); 744static void urtw_free_tx_data_list(struct urtw_softc *); 745static void urtw_free_rx_data_list(struct urtw_softc *); 746static void urtw_free_data_list(struct urtw_softc *, 747 struct urtw_data data[], int, int); 748static usb_error_t urtw_adapter_start(struct urtw_softc *); 749static usb_error_t urtw_adapter_start_b(struct urtw_softc *); 750static usb_error_t urtw_set_mode(struct urtw_softc *, uint32_t); 751static usb_error_t urtw_8187b_cmd_reset(struct urtw_softc *); 752static usb_error_t urtw_do_request(struct urtw_softc *, 753 struct usb_device_request *, void *); 754static usb_error_t urtw_8225v2b_set_txpwrlvl(struct urtw_softc *, int); 755static usb_error_t urtw_led_off(struct urtw_softc *, int); 756static void urtw_abort_xfers(struct urtw_softc *); 757static struct urtw_data * 758 urtw_getbuf(struct urtw_softc *sc); 759static int urtw_compute_txtime(uint16_t, uint16_t, uint8_t, 760 uint8_t); 761static void urtw_updateslot(struct ieee80211com *); 762static void urtw_updateslottask(void *, int); 763static void urtw_sysctl_node(struct urtw_softc *); 764 765static int 766urtw_match(device_t dev) 767{ 768 struct usb_attach_arg *uaa = device_get_ivars(dev); 769 770 if (uaa->usb_mode != USB_MODE_HOST) 771 return (ENXIO); 772 if (uaa->info.bConfigIndex != URTW_CONFIG_INDEX) 773 return (ENXIO); 774 if (uaa->info.bIfaceIndex != URTW_IFACE_INDEX) 775 return (ENXIO); 776 777 return (usbd_lookup_id_by_uaa(urtw_devs, sizeof(urtw_devs), uaa)); 778} 779 780static int 781urtw_attach(device_t dev) 782{ 783 const struct usb_config *setup_start; 784 int ret = ENXIO; 785 struct urtw_softc *sc = device_get_softc(dev); 786 struct usb_attach_arg *uaa = device_get_ivars(dev); 787 struct ieee80211com *ic = &sc->sc_ic; 788 uint8_t bands, iface_index = URTW_IFACE_INDEX; /* XXX */ 789 uint16_t n_setup; 790 uint32_t data; 791 usb_error_t error; 792 793 device_set_usb_desc(dev); 794 795 sc->sc_dev = dev; 796 sc->sc_udev = uaa->device; 797 if (USB_GET_DRIVER_INFO(uaa) == URTW_REV_RTL8187B) 798 sc->sc_flags |= URTW_RTL8187B; 799#ifdef URTW_DEBUG 800 sc->sc_debug = urtw_debug; 801#endif 802 803 mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), MTX_NETWORK_LOCK, 804 MTX_DEF); 805 usb_callout_init_mtx(&sc->sc_led_ch, &sc->sc_mtx, 0); 806 TASK_INIT(&sc->sc_led_task, 0, urtw_ledtask, sc); 807 TASK_INIT(&sc->sc_updateslot_task, 0, urtw_updateslottask, sc); 808 callout_init(&sc->sc_watchdog_ch, 0); 809 mbufq_init(&sc->sc_snd, ifqmaxlen); 810 811 if (sc->sc_flags & URTW_RTL8187B) { 812 setup_start = urtw_8187b_usbconfig; 813 n_setup = URTW_8187B_N_XFERS; 814 } else { 815 setup_start = urtw_8187l_usbconfig; 816 n_setup = URTW_8187L_N_XFERS; 817 } 818 819 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 820 setup_start, n_setup, sc, &sc->sc_mtx); 821 if (error) { 822 device_printf(dev, "could not allocate USB transfers, " 823 "err=%s\n", usbd_errstr(error)); 824 ret = ENXIO; 825 goto fail0; 826 } 827 828 if (sc->sc_flags & URTW_RTL8187B) { 829 sc->sc_tx_dma_buf = 830 usbd_xfer_get_frame_buffer(sc->sc_xfer[ 831 URTW_8187B_BULK_TX_BE], 0); 832 } else { 833 sc->sc_tx_dma_buf = 834 usbd_xfer_get_frame_buffer(sc->sc_xfer[ 835 URTW_8187L_BULK_TX_LOW], 0); 836 } 837 838 URTW_LOCK(sc); 839 840 urtw_read32_m(sc, URTW_RX, &data); 841 sc->sc_epromtype = (data & URTW_RX_9356SEL) ? URTW_EEPROM_93C56 : 842 URTW_EEPROM_93C46; 843 844 error = urtw_get_rfchip(sc); 845 if (error != 0) 846 goto fail; 847 error = urtw_get_macaddr(sc); 848 if (error != 0) 849 goto fail; 850 error = urtw_get_txpwr(sc); 851 if (error != 0) 852 goto fail; 853 error = urtw_led_init(sc); 854 if (error != 0) 855 goto fail; 856 857 URTW_UNLOCK(sc); 858 859 sc->sc_rts_retry = URTW_DEFAULT_RTS_RETRY; 860 sc->sc_tx_retry = URTW_DEFAULT_TX_RETRY; 861 sc->sc_currate = 3; 862 sc->sc_preamble_mode = urtw_preamble_mode; 863 864 ic->ic_softc = sc; 865 ic->ic_name = device_get_nameunit(dev); 866 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 867 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 868 869 /* set device capabilities */ 870 ic->ic_caps = 871 IEEE80211_C_STA | /* station mode */ 872 IEEE80211_C_MONITOR | /* monitor mode supported */ 873 IEEE80211_C_TXPMGT | /* tx power management */ 874 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 875 IEEE80211_C_SHSLOT | /* short slot time supported */ 876 IEEE80211_C_BGSCAN | /* capable of bg scanning */ 877 IEEE80211_C_WPA; /* 802.11i */ 878 879 bands = 0; 880 setbit(&bands, IEEE80211_MODE_11B); 881 setbit(&bands, IEEE80211_MODE_11G); 882 ieee80211_init_channels(ic, NULL, &bands); 883 884 ieee80211_ifattach(ic); 885 ic->ic_raw_xmit = urtw_raw_xmit; 886 ic->ic_scan_start = urtw_scan_start; 887 ic->ic_scan_end = urtw_scan_end; 888 ic->ic_set_channel = urtw_set_channel; 889 ic->ic_updateslot = urtw_updateslot; 890 ic->ic_vap_create = urtw_vap_create; 891 ic->ic_vap_delete = urtw_vap_delete; 892 ic->ic_update_mcast = urtw_update_mcast; 893 ic->ic_parent = urtw_parent; 894 ic->ic_transmit = urtw_transmit; 895 896 ieee80211_radiotap_attach(ic, 897 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 898 URTW_TX_RADIOTAP_PRESENT, 899 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 900 URTW_RX_RADIOTAP_PRESENT); 901 902 urtw_sysctl_node(sc); 903 904 if (bootverbose) 905 ieee80211_announce(ic); 906 return (0); 907 908fail: 909 URTW_UNLOCK(sc); 910 usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ? 911 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS); 912fail0: 913 return (ret); 914} 915 916static int 917urtw_detach(device_t dev) 918{ 919 struct urtw_softc *sc = device_get_softc(dev); 920 struct ieee80211com *ic = &sc->sc_ic; 921 unsigned int x; 922 unsigned int n_xfers; 923 924 /* Prevent further ioctls */ 925 URTW_LOCK(sc); 926 sc->sc_flags |= URTW_DETACHED; 927 urtw_stop(sc); 928 URTW_UNLOCK(sc); 929 930 ieee80211_draintask(ic, &sc->sc_updateslot_task); 931 ieee80211_draintask(ic, &sc->sc_led_task); 932 933 usb_callout_drain(&sc->sc_led_ch); 934 callout_drain(&sc->sc_watchdog_ch); 935 936 n_xfers = (sc->sc_flags & URTW_RTL8187B) ? 937 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS; 938 939 /* prevent further allocations from RX/TX data lists */ 940 URTW_LOCK(sc); 941 STAILQ_INIT(&sc->sc_tx_active); 942 STAILQ_INIT(&sc->sc_tx_inactive); 943 STAILQ_INIT(&sc->sc_tx_pending); 944 945 STAILQ_INIT(&sc->sc_rx_active); 946 STAILQ_INIT(&sc->sc_rx_inactive); 947 URTW_UNLOCK(sc); 948 949 /* drain USB transfers */ 950 for (x = 0; x != n_xfers; x++) 951 usbd_transfer_drain(sc->sc_xfer[x]); 952 953 /* free data buffers */ 954 URTW_LOCK(sc); 955 urtw_free_tx_data_list(sc); 956 urtw_free_rx_data_list(sc); 957 URTW_UNLOCK(sc); 958 959 /* free USB transfers and some data buffers */ 960 usbd_transfer_unsetup(sc->sc_xfer, n_xfers); 961 962 ieee80211_ifdetach(ic); 963 mbufq_drain(&sc->sc_snd); 964 mtx_destroy(&sc->sc_mtx); 965 return (0); 966} 967 968static void 969urtw_free_tx_data_list(struct urtw_softc *sc) 970{ 971 urtw_free_data_list(sc, sc->sc_tx, URTW_TX_DATA_LIST_COUNT, 0); 972} 973 974static void 975urtw_free_rx_data_list(struct urtw_softc *sc) 976{ 977 urtw_free_data_list(sc, sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1); 978} 979 980static void 981urtw_free_data_list(struct urtw_softc *sc, struct urtw_data data[], int ndata, 982 int fillmbuf) 983{ 984 int i; 985 986 for (i = 0; i < ndata; i++) { 987 struct urtw_data *dp = &data[i]; 988 989 if (fillmbuf == 1) { 990 if (dp->m != NULL) { 991 m_freem(dp->m); 992 dp->m = NULL; 993 dp->buf = NULL; 994 } 995 } else { 996 dp->buf = NULL; 997 } 998 if (dp->ni != NULL) { 999 ieee80211_free_node(dp->ni); 1000 dp->ni = NULL; 1001 } 1002 } 1003} 1004 1005static struct ieee80211vap * 1006urtw_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 1007 enum ieee80211_opmode opmode, int flags, 1008 const uint8_t bssid[IEEE80211_ADDR_LEN], 1009 const uint8_t mac[IEEE80211_ADDR_LEN]) 1010{ 1011 struct urtw_vap *uvp; 1012 struct ieee80211vap *vap; 1013 1014 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 1015 return (NULL); 1016 uvp = malloc(sizeof(struct urtw_vap), M_80211_VAP, M_WAITOK | M_ZERO); 1017 vap = &uvp->vap; 1018 /* enable s/w bmiss handling for sta mode */ 1019 1020 if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 1021 flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) { 1022 /* out of memory */ 1023 free(uvp, M_80211_VAP); 1024 return (NULL); 1025 } 1026 1027 /* override state transition machine */ 1028 uvp->newstate = vap->iv_newstate; 1029 vap->iv_newstate = urtw_newstate; 1030 1031 /* complete setup */ 1032 ieee80211_vap_attach(vap, ieee80211_media_change, 1033 ieee80211_media_status, mac); 1034 ic->ic_opmode = opmode; 1035 return (vap); 1036} 1037 1038static void 1039urtw_vap_delete(struct ieee80211vap *vap) 1040{ 1041 struct urtw_vap *uvp = URTW_VAP(vap); 1042 1043 ieee80211_vap_detach(vap); 1044 free(uvp, M_80211_VAP); 1045} 1046 1047static void 1048urtw_init(struct urtw_softc *sc) 1049{ 1050 usb_error_t error; 1051 int ret; 1052 1053 URTW_ASSERT_LOCKED(sc); 1054 1055 if (sc->sc_flags & URTW_RUNNING) 1056 urtw_stop(sc); 1057 1058 error = (sc->sc_flags & URTW_RTL8187B) ? urtw_adapter_start_b(sc) : 1059 urtw_adapter_start(sc); 1060 if (error != 0) 1061 goto fail; 1062 1063 /* reset softc variables */ 1064 sc->sc_txtimer = 0; 1065 1066 if (!(sc->sc_flags & URTW_INIT_ONCE)) { 1067 ret = urtw_alloc_rx_data_list(sc); 1068 if (ret != 0) 1069 goto fail; 1070 ret = urtw_alloc_tx_data_list(sc); 1071 if (ret != 0) 1072 goto fail; 1073 sc->sc_flags |= URTW_INIT_ONCE; 1074 } 1075 1076 error = urtw_rx_enable(sc); 1077 if (error != 0) 1078 goto fail; 1079 error = urtw_tx_enable(sc); 1080 if (error != 0) 1081 goto fail; 1082 1083 if (sc->sc_flags & URTW_RTL8187B) 1084 usbd_transfer_start(sc->sc_xfer[URTW_8187B_BULK_TX_STATUS]); 1085 1086 sc->sc_flags |= URTW_RUNNING; 1087 1088 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1089fail: 1090 return; 1091} 1092 1093static usb_error_t 1094urtw_adapter_start_b(struct urtw_softc *sc) 1095{ 1096 uint8_t data8; 1097 usb_error_t error; 1098 1099 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1100 if (error) 1101 goto fail; 1102 1103 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1104 urtw_write8_m(sc, URTW_CONFIG3, 1105 data8 | URTW_CONFIG3_ANAPARAM_WRITE | URTW_CONFIG3_GNT_SELECT); 1106 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8187B_8225_ANAPARAM2_ON); 1107 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_ON); 1108 urtw_write8_m(sc, URTW_ANAPARAM3, URTW_8187B_8225_ANAPARAM3_ON); 1109 1110 urtw_write8_m(sc, 0x61, 0x10); 1111 urtw_read8_m(sc, 0x62, &data8); 1112 urtw_write8_m(sc, 0x62, data8 & ~(1 << 5)); 1113 urtw_write8_m(sc, 0x62, data8 | (1 << 5)); 1114 1115 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1116 data8 &= ~URTW_CONFIG3_ANAPARAM_WRITE; 1117 urtw_write8_m(sc, URTW_CONFIG3, data8); 1118 1119 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1120 if (error) 1121 goto fail; 1122 1123 error = urtw_8187b_cmd_reset(sc); 1124 if (error) 1125 goto fail; 1126 1127 error = sc->sc_rf_init(sc); 1128 if (error != 0) 1129 goto fail; 1130 urtw_write8_m(sc, URTW_CMD, URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1131 1132 /* fix RTL8187B RX stall */ 1133 error = urtw_intr_enable(sc); 1134 if (error) 1135 goto fail; 1136 1137 error = urtw_write8e(sc, 0x41, 0xf4); 1138 if (error) 1139 goto fail; 1140 error = urtw_write8e(sc, 0x40, 0x00); 1141 if (error) 1142 goto fail; 1143 error = urtw_write8e(sc, 0x42, 0x00); 1144 if (error) 1145 goto fail; 1146 error = urtw_write8e(sc, 0x42, 0x01); 1147 if (error) 1148 goto fail; 1149 error = urtw_write8e(sc, 0x40, 0x0f); 1150 if (error) 1151 goto fail; 1152 error = urtw_write8e(sc, 0x42, 0x00); 1153 if (error) 1154 goto fail; 1155 error = urtw_write8e(sc, 0x42, 0x01); 1156 if (error) 1157 goto fail; 1158 1159 urtw_read8_m(sc, 0xdb, &data8); 1160 urtw_write8_m(sc, 0xdb, data8 | (1 << 2)); 1161 urtw_write16_m(sc, 0x372, 0x59fa); 1162 urtw_write16_m(sc, 0x374, 0x59d2); 1163 urtw_write16_m(sc, 0x376, 0x59d2); 1164 urtw_write16_m(sc, 0x378, 0x19fa); 1165 urtw_write16_m(sc, 0x37a, 0x19fa); 1166 urtw_write16_m(sc, 0x37c, 0x00d0); 1167 urtw_write8_m(sc, 0x61, 0); 1168 1169 urtw_write8_m(sc, 0x180, 0x0f); 1170 urtw_write8_m(sc, 0x183, 0x03); 1171 urtw_write8_m(sc, 0xda, 0x10); 1172 urtw_write8_m(sc, 0x24d, 0x08); 1173 urtw_write32_m(sc, URTW_HSSI_PARA, 0x0600321b); 1174 1175 urtw_write16_m(sc, 0x1ec, 0x800); /* RX MAX SIZE */ 1176fail: 1177 return (error); 1178} 1179 1180static usb_error_t 1181urtw_adapter_start(struct urtw_softc *sc) 1182{ 1183 struct ieee80211com *ic = &sc->sc_ic; 1184 usb_error_t error; 1185 1186 error = urtw_reset(sc); 1187 if (error) 1188 goto fail; 1189 1190 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 0); 1191 urtw_write8_m(sc, URTW_GPIO, 0); 1192 1193 /* for led */ 1194 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1195 error = urtw_led_ctl(sc, URTW_LED_CTL_POWER_ON); 1196 if (error != 0) 1197 goto fail; 1198 1199 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1200 if (error) 1201 goto fail; 1202 /* applying MAC address again. */ 1203 urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)ic->ic_macaddr)[0]); 1204 urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)ic->ic_macaddr)[1] & 0xffff); 1205 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1206 if (error) 1207 goto fail; 1208 1209 error = urtw_update_msr(sc); 1210 if (error) 1211 goto fail; 1212 1213 urtw_write32_m(sc, URTW_INT_TIMEOUT, 0); 1214 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 1215 urtw_write8_m(sc, URTW_RATE_FALLBACK, URTW_RATE_FALLBACK_ENABLE | 0x1); 1216 error = urtw_set_rate(sc); 1217 if (error != 0) 1218 goto fail; 1219 1220 error = sc->sc_rf_init(sc); 1221 if (error != 0) 1222 goto fail; 1223 if (sc->sc_rf_set_sens != NULL) 1224 sc->sc_rf_set_sens(sc, sc->sc_sens); 1225 1226 /* XXX correct? to call write16 */ 1227 urtw_write16_m(sc, URTW_PSR, 1); 1228 urtw_write16_m(sc, URTW_ADDR_MAGIC2, 0x10); 1229 urtw_write8_m(sc, URTW_TALLY_SEL, 0x80); 1230 urtw_write8_m(sc, URTW_ADDR_MAGIC3, 0x60); 1231 /* XXX correct? to call write16 */ 1232 urtw_write16_m(sc, URTW_PSR, 0); 1233 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1234 1235 error = urtw_intr_enable(sc); 1236 if (error != 0) 1237 goto fail; 1238 1239fail: 1240 return (error); 1241} 1242 1243static usb_error_t 1244urtw_set_mode(struct urtw_softc *sc, uint32_t mode) 1245{ 1246 uint8_t data; 1247 usb_error_t error; 1248 1249 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 1250 data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT); 1251 data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK); 1252 urtw_write8_m(sc, URTW_EPROM_CMD, data); 1253fail: 1254 return (error); 1255} 1256 1257static usb_error_t 1258urtw_8187b_cmd_reset(struct urtw_softc *sc) 1259{ 1260 int i; 1261 uint8_t data8; 1262 usb_error_t error; 1263 1264 /* XXX the code can be duplicate with urtw_reset(). */ 1265 urtw_read8_m(sc, URTW_CMD, &data8); 1266 data8 = (data8 & 0x2) | URTW_CMD_RST; 1267 urtw_write8_m(sc, URTW_CMD, data8); 1268 1269 for (i = 0; i < 20; i++) { 1270 usb_pause_mtx(&sc->sc_mtx, 2); 1271 urtw_read8_m(sc, URTW_CMD, &data8); 1272 if (!(data8 & URTW_CMD_RST)) 1273 break; 1274 } 1275 if (i >= 20) { 1276 device_printf(sc->sc_dev, "reset timeout\n"); 1277 goto fail; 1278 } 1279fail: 1280 return (error); 1281} 1282 1283static usb_error_t 1284urtw_do_request(struct urtw_softc *sc, 1285 struct usb_device_request *req, void *data) 1286{ 1287 usb_error_t err; 1288 int ntries = 10; 1289 1290 URTW_ASSERT_LOCKED(sc); 1291 1292 while (ntries--) { 1293 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 1294 req, data, 0, NULL, 250 /* ms */); 1295 if (err == 0) 1296 break; 1297 1298 DPRINTF(sc, URTW_DEBUG_INIT, 1299 "Control request failed, %s (retrying)\n", 1300 usbd_errstr(err)); 1301 usb_pause_mtx(&sc->sc_mtx, hz / 100); 1302 } 1303 return (err); 1304} 1305 1306static void 1307urtw_stop(struct urtw_softc *sc) 1308{ 1309 uint8_t data8; 1310 usb_error_t error; 1311 1312 URTW_ASSERT_LOCKED(sc); 1313 1314 sc->sc_flags &= ~URTW_RUNNING; 1315 1316 error = urtw_intr_disable(sc); 1317 if (error) 1318 goto fail; 1319 urtw_read8_m(sc, URTW_CMD, &data8); 1320 data8 &= ~(URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1321 urtw_write8_m(sc, URTW_CMD, data8); 1322 1323 error = sc->sc_rf_stop(sc); 1324 if (error != 0) 1325 goto fail; 1326 1327 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1328 if (error) 1329 goto fail; 1330 urtw_read8_m(sc, URTW_CONFIG4, &data8); 1331 urtw_write8_m(sc, URTW_CONFIG4, data8 | URTW_CONFIG4_VCOOFF); 1332 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1333 if (error) 1334 goto fail; 1335fail: 1336 if (error) 1337 device_printf(sc->sc_dev, "failed to stop (%s)\n", 1338 usbd_errstr(error)); 1339 1340 usb_callout_stop(&sc->sc_led_ch); 1341 callout_stop(&sc->sc_watchdog_ch); 1342 1343 urtw_abort_xfers(sc); 1344} 1345 1346static void 1347urtw_abort_xfers(struct urtw_softc *sc) 1348{ 1349 int i, max; 1350 1351 URTW_ASSERT_LOCKED(sc); 1352 1353 max = (sc->sc_flags & URTW_RTL8187B) ? URTW_8187B_N_XFERS : 1354 URTW_8187L_N_XFERS; 1355 1356 /* abort any pending transfers */ 1357 for (i = 0; i < max; i++) 1358 usbd_transfer_stop(sc->sc_xfer[i]); 1359} 1360 1361static void 1362urtw_parent(struct ieee80211com *ic) 1363{ 1364 struct urtw_softc *sc = ic->ic_softc; 1365 int startall = 0; 1366 1367 URTW_LOCK(sc); 1368 if (sc->sc_flags & URTW_DETACHED) { 1369 URTW_UNLOCK(sc); 1370 return; 1371 } 1372 1373 if (ic->ic_nrunning > 0) { 1374 if (sc->sc_flags & URTW_RUNNING) { 1375 if (ic->ic_promisc > 0 || ic->ic_allmulti > 0) 1376 urtw_set_multi(sc); 1377 } else { 1378 urtw_init(sc); 1379 startall = 1; 1380 } 1381 } else if (sc->sc_flags & URTW_RUNNING) 1382 urtw_stop(sc); 1383 URTW_UNLOCK(sc); 1384 if (startall) 1385 ieee80211_start_all(ic); 1386} 1387 1388static int 1389urtw_transmit(struct ieee80211com *ic, struct mbuf *m) 1390{ 1391 struct urtw_softc *sc = ic->ic_softc; 1392 int error; 1393 1394 URTW_LOCK(sc); 1395 if ((sc->sc_flags & URTW_RUNNING) == 0) { 1396 URTW_UNLOCK(sc); 1397 return (ENXIO); 1398 } 1399 error = mbufq_enqueue(&sc->sc_snd, m); 1400 if (error) { 1401 URTW_UNLOCK(sc); 1402 return (error); 1403 } 1404 urtw_start(sc); 1405 URTW_UNLOCK(sc); 1406 1407 return (0); 1408} 1409 1410static void 1411urtw_start(struct urtw_softc *sc) 1412{ 1413 struct urtw_data *bf; 1414 struct ieee80211_node *ni; 1415 struct mbuf *m; 1416 1417 URTW_ASSERT_LOCKED(sc); 1418 1419 if ((sc->sc_flags & URTW_RUNNING) == 0) 1420 return; 1421 1422 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 1423 bf = urtw_getbuf(sc); 1424 if (bf == NULL) { 1425 mbufq_prepend(&sc->sc_snd, m); 1426 break; 1427 } 1428 1429 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 1430 m->m_pkthdr.rcvif = NULL; 1431 1432 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_NORMAL) != 0) { 1433 if_inc_counter(ni->ni_vap->iv_ifp, 1434 IFCOUNTER_OERRORS, 1); 1435 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1436 ieee80211_free_node(ni); 1437 break; 1438 } 1439 1440 sc->sc_txtimer = 5; 1441 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1442 } 1443} 1444 1445static int 1446urtw_alloc_data_list(struct urtw_softc *sc, struct urtw_data data[], 1447 int ndata, int maxsz, void *dma_buf) 1448{ 1449 int i, error; 1450 1451 for (i = 0; i < ndata; i++) { 1452 struct urtw_data *dp = &data[i]; 1453 1454 dp->sc = sc; 1455 if (dma_buf == NULL) { 1456 dp->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1457 if (dp->m == NULL) { 1458 device_printf(sc->sc_dev, 1459 "could not allocate rx mbuf\n"); 1460 error = ENOMEM; 1461 goto fail; 1462 } 1463 dp->buf = mtod(dp->m, uint8_t *); 1464 } else { 1465 dp->m = NULL; 1466 dp->buf = ((uint8_t *)dma_buf) + 1467 (i * maxsz); 1468 } 1469 dp->ni = NULL; 1470 } 1471 return (0); 1472 1473fail: urtw_free_data_list(sc, data, ndata, 1); 1474 return (error); 1475} 1476 1477static int 1478urtw_alloc_rx_data_list(struct urtw_softc *sc) 1479{ 1480 int error, i; 1481 1482 error = urtw_alloc_data_list(sc, 1483 sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1484 MCLBYTES, NULL /* mbufs */); 1485 if (error != 0) 1486 return (error); 1487 1488 STAILQ_INIT(&sc->sc_rx_active); 1489 STAILQ_INIT(&sc->sc_rx_inactive); 1490 1491 for (i = 0; i < URTW_RX_DATA_LIST_COUNT; i++) 1492 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1493 1494 return (0); 1495} 1496 1497static int 1498urtw_alloc_tx_data_list(struct urtw_softc *sc) 1499{ 1500 int error, i; 1501 1502 error = urtw_alloc_data_list(sc, 1503 sc->sc_tx, URTW_TX_DATA_LIST_COUNT, URTW_TX_MAXSIZE, 1504 sc->sc_tx_dma_buf /* no mbufs */); 1505 if (error != 0) 1506 return (error); 1507 1508 STAILQ_INIT(&sc->sc_tx_active); 1509 STAILQ_INIT(&sc->sc_tx_inactive); 1510 STAILQ_INIT(&sc->sc_tx_pending); 1511 1512 for (i = 0; i < URTW_TX_DATA_LIST_COUNT; i++) 1513 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], 1514 next); 1515 1516 return (0); 1517} 1518 1519static int 1520urtw_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1521 const struct ieee80211_bpf_params *params) 1522{ 1523 struct ieee80211com *ic = ni->ni_ic; 1524 struct urtw_softc *sc = ic->ic_softc; 1525 struct urtw_data *bf; 1526 1527 /* prevent management frames from being sent if we're not ready */ 1528 if (!(sc->sc_flags & URTW_RUNNING)) { 1529 m_freem(m); 1530 return ENETDOWN; 1531 } 1532 URTW_LOCK(sc); 1533 bf = urtw_getbuf(sc); 1534 if (bf == NULL) { 1535 m_freem(m); 1536 URTW_UNLOCK(sc); 1537 return (ENOBUFS); /* XXX */ 1538 } 1539 1540 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_LOW) != 0) { 1541 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1542 URTW_UNLOCK(sc); 1543 return (EIO); 1544 } 1545 URTW_UNLOCK(sc); 1546 1547 sc->sc_txtimer = 5; 1548 return (0); 1549} 1550 1551static void 1552urtw_scan_start(struct ieee80211com *ic) 1553{ 1554 1555 /* XXX do nothing? */ 1556} 1557 1558static void 1559urtw_scan_end(struct ieee80211com *ic) 1560{ 1561 1562 /* XXX do nothing? */ 1563} 1564 1565static void 1566urtw_set_channel(struct ieee80211com *ic) 1567{ 1568 struct urtw_softc *sc = ic->ic_softc; 1569 uint32_t data, orig; 1570 usb_error_t error; 1571 1572 /* 1573 * if the user set a channel explicitly using ifconfig(8) this function 1574 * can be called earlier than we're expected that in some cases the 1575 * initialization would be failed if setting a channel is called before 1576 * the init have done. 1577 */ 1578 if (!(sc->sc_flags & URTW_RUNNING)) 1579 return; 1580 1581 if (sc->sc_curchan != NULL && sc->sc_curchan == ic->ic_curchan) 1582 return; 1583 1584 URTW_LOCK(sc); 1585 1586 /* 1587 * during changing th channel we need to temporarily be disable 1588 * TX. 1589 */ 1590 urtw_read32_m(sc, URTW_TX_CONF, &orig); 1591 data = orig & ~URTW_TX_LOOPBACK_MASK; 1592 urtw_write32_m(sc, URTW_TX_CONF, data | URTW_TX_LOOPBACK_MAC); 1593 1594 error = sc->sc_rf_set_chan(sc, ieee80211_chan2ieee(ic, ic->ic_curchan)); 1595 if (error != 0) 1596 goto fail; 1597 usb_pause_mtx(&sc->sc_mtx, 10); 1598 urtw_write32_m(sc, URTW_TX_CONF, orig); 1599 1600 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1601 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1602 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 1603 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1604 1605fail: 1606 URTW_UNLOCK(sc); 1607 1608 sc->sc_curchan = ic->ic_curchan; 1609 1610 if (error != 0) 1611 device_printf(sc->sc_dev, "could not change the channel\n"); 1612} 1613 1614static void 1615urtw_update_mcast(struct ieee80211com *ic) 1616{ 1617 1618 /* XXX do nothing? */ 1619} 1620 1621static int 1622urtw_tx_start(struct urtw_softc *sc, struct ieee80211_node *ni, struct mbuf *m0, 1623 struct urtw_data *data, int prior) 1624{ 1625 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 1626 struct ieee80211_key *k; 1627 const struct ieee80211_txparam *tp; 1628 struct ieee80211com *ic = &sc->sc_ic; 1629 struct ieee80211vap *vap = ni->ni_vap; 1630 struct usb_xfer *rtl8187b_pipes[URTW_8187B_TXPIPE_MAX] = { 1631 sc->sc_xfer[URTW_8187B_BULK_TX_BE], 1632 sc->sc_xfer[URTW_8187B_BULK_TX_BK], 1633 sc->sc_xfer[URTW_8187B_BULK_TX_VI], 1634 sc->sc_xfer[URTW_8187B_BULK_TX_VO] 1635 }; 1636 struct usb_xfer *xfer; 1637 int dur = 0, rtsdur = 0, rtsenable = 0, ctsenable = 0, rate, 1638 pkttime = 0, txdur = 0, isshort = 0, xferlen; 1639 uint16_t acktime, rtstime, ctstime; 1640 uint32_t flags; 1641 usb_error_t error; 1642 1643 URTW_ASSERT_LOCKED(sc); 1644 1645 /* 1646 * Software crypto. 1647 */ 1648 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1649 k = ieee80211_crypto_encap(ni, m0); 1650 if (k == NULL) { 1651 device_printf(sc->sc_dev, 1652 "ieee80211_crypto_encap returns NULL.\n"); 1653 /* XXX we don't expect the fragmented frames */ 1654 m_freem(m0); 1655 return (ENOBUFS); 1656 } 1657 1658 /* in case packet header moved, reset pointer */ 1659 wh = mtod(m0, struct ieee80211_frame *); 1660 } 1661 1662 if (ieee80211_radiotap_active_vap(vap)) { 1663 struct urtw_tx_radiotap_header *tap = &sc->sc_txtap; 1664 1665 /* XXX Are variables correct? */ 1666 tap->wt_flags = 0; 1667 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1668 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1669 1670 ieee80211_radiotap_tx(vap, m0); 1671 } 1672 1673 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_MGT || 1674 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_CTL) { 1675 tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)]; 1676 rate = tp->mgmtrate; 1677 } else { 1678 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1679 /* for data frames */ 1680 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1681 rate = tp->mcastrate; 1682 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 1683 rate = tp->ucastrate; 1684 else 1685 rate = urtw_rtl2rate(sc->sc_currate); 1686 } 1687 1688 sc->sc_stats.txrates[sc->sc_currate]++; 1689 1690 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1691 txdur = pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1692 IEEE80211_CRC_LEN, rate, 0, 0); 1693 else { 1694 acktime = urtw_compute_txtime(14, 2,0, 0); 1695 if ((m0->m_pkthdr.len + 4) > vap->iv_rtsthreshold) { 1696 rtsenable = 1; 1697 ctsenable = 0; 1698 rtstime = urtw_compute_txtime(URTW_ACKCTS_LEN, 2, 0, 0); 1699 ctstime = urtw_compute_txtime(14, 2, 0, 0); 1700 pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1701 IEEE80211_CRC_LEN, rate, 0, isshort); 1702 rtsdur = ctstime + pkttime + acktime + 1703 3 * URTW_ASIFS_TIME; 1704 txdur = rtstime + rtsdur; 1705 } else { 1706 rtsenable = ctsenable = rtsdur = 0; 1707 pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1708 IEEE80211_CRC_LEN, rate, 0, isshort); 1709 txdur = pkttime + URTW_ASIFS_TIME + acktime; 1710 } 1711 1712 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1713 dur = urtw_compute_txtime(m0->m_pkthdr.len + 1714 IEEE80211_CRC_LEN, rate, 0, isshort) + 1715 3 * URTW_ASIFS_TIME + 1716 2 * acktime; 1717 else 1718 dur = URTW_ASIFS_TIME + acktime; 1719 } 1720 USETW(wh->i_dur, dur); 1721 1722 xferlen = m0->m_pkthdr.len; 1723 xferlen += (sc->sc_flags & URTW_RTL8187B) ? (4 * 8) : (4 * 3); 1724 if ((0 == xferlen % 64) || (0 == xferlen % 512)) 1725 xferlen += 1; 1726 1727 memset(data->buf, 0, URTW_TX_MAXSIZE); 1728 flags = m0->m_pkthdr.len & 0xfff; 1729 flags |= URTW_TX_FLAG_NO_ENC; 1730 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1731 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE) && 1732 (sc->sc_preamble_mode == URTW_PREAMBLE_MODE_SHORT) && 1733 (sc->sc_currate != 0)) 1734 flags |= URTW_TX_FLAG_SPLCP; 1735 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1736 flags |= URTW_TX_FLAG_MOREFRAG; 1737 1738 flags |= (sc->sc_currate & 0xf) << URTW_TX_FLAG_TXRATE_SHIFT; 1739 1740 if (sc->sc_flags & URTW_RTL8187B) { 1741 struct urtw_8187b_txhdr *tx; 1742 1743 tx = (struct urtw_8187b_txhdr *)data->buf; 1744 if (ctsenable) 1745 flags |= URTW_TX_FLAG_CTS; 1746 if (rtsenable) { 1747 flags |= URTW_TX_FLAG_RTS; 1748 flags |= (urtw_rate2rtl(11) & 0xf) << 1749 URTW_TX_FLAG_RTSRATE_SHIFT; 1750 tx->rtsdur = rtsdur; 1751 } 1752 tx->flag = htole32(flags); 1753 tx->txdur = txdur; 1754 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1755 IEEE80211_FC0_TYPE_MGT && 1756 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1757 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1758 tx->retry = 1; 1759 else 1760 tx->retry = URTW_TX_MAXRETRY; 1761 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1)); 1762 } else { 1763 struct urtw_8187l_txhdr *tx; 1764 1765 tx = (struct urtw_8187l_txhdr *)data->buf; 1766 if (rtsenable) { 1767 flags |= URTW_TX_FLAG_RTS; 1768 tx->rtsdur = rtsdur; 1769 } 1770 flags |= (urtw_rate2rtl(11) & 0xf) << URTW_TX_FLAG_RTSRATE_SHIFT; 1771 tx->flag = htole32(flags); 1772 tx->retry = 3; /* CW minimum */ 1773 tx->retry = 7 << 4; /* CW maximum */ 1774 tx->retry = URTW_TX_MAXRETRY << 8; /* retry limitation */ 1775 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1)); 1776 } 1777 1778 data->buflen = xferlen; 1779 data->ni = ni; 1780 data->m = m0; 1781 1782 if (sc->sc_flags & URTW_RTL8187B) { 1783 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1784 case IEEE80211_FC0_TYPE_CTL: 1785 case IEEE80211_FC0_TYPE_MGT: 1786 xfer = sc->sc_xfer[URTW_8187B_BULK_TX_EP12]; 1787 break; 1788 default: 1789 KASSERT(M_WME_GETAC(m0) < URTW_8187B_TXPIPE_MAX, 1790 ("unsupported WME pipe %d", M_WME_GETAC(m0))); 1791 xfer = rtl8187b_pipes[M_WME_GETAC(m0)]; 1792 break; 1793 } 1794 } else 1795 xfer = (prior == URTW_PRIORITY_LOW) ? 1796 sc->sc_xfer[URTW_8187L_BULK_TX_LOW] : 1797 sc->sc_xfer[URTW_8187L_BULK_TX_NORMAL]; 1798 1799 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 1800 usbd_transfer_start(xfer); 1801 1802 error = urtw_led_ctl(sc, URTW_LED_CTL_TX); 1803 if (error != 0) 1804 device_printf(sc->sc_dev, "could not control LED (%d)\n", 1805 error); 1806 return (0); 1807} 1808 1809static int 1810urtw_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1811{ 1812 struct ieee80211com *ic = vap->iv_ic; 1813 struct urtw_softc *sc = ic->ic_softc; 1814 struct urtw_vap *uvp = URTW_VAP(vap); 1815 struct ieee80211_node *ni; 1816 usb_error_t error = 0; 1817 1818 DPRINTF(sc, URTW_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1819 ieee80211_state_name[vap->iv_state], 1820 ieee80211_state_name[nstate]); 1821 1822 sc->sc_state = nstate; 1823 1824 IEEE80211_UNLOCK(ic); 1825 URTW_LOCK(sc); 1826 usb_callout_stop(&sc->sc_led_ch); 1827 callout_stop(&sc->sc_watchdog_ch); 1828 1829 switch (nstate) { 1830 case IEEE80211_S_INIT: 1831 case IEEE80211_S_SCAN: 1832 case IEEE80211_S_AUTH: 1833 case IEEE80211_S_ASSOC: 1834 break; 1835 case IEEE80211_S_RUN: 1836 ni = ieee80211_ref_node(vap->iv_bss); 1837 /* setting bssid. */ 1838 urtw_write32_m(sc, URTW_BSSID, ((uint32_t *)ni->ni_bssid)[0]); 1839 urtw_write16_m(sc, URTW_BSSID + 4, 1840 ((uint16_t *)ni->ni_bssid)[2]); 1841 urtw_update_msr(sc); 1842 /* XXX maybe the below would be incorrect. */ 1843 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1844 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1845 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 0x64); 1846 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1847 error = urtw_led_ctl(sc, URTW_LED_CTL_LINK); 1848 if (error != 0) 1849 device_printf(sc->sc_dev, 1850 "could not control LED (%d)\n", error); 1851 ieee80211_free_node(ni); 1852 break; 1853 default: 1854 break; 1855 } 1856fail: 1857 URTW_UNLOCK(sc); 1858 IEEE80211_LOCK(ic); 1859 return (uvp->newstate(vap, nstate, arg)); 1860} 1861 1862static void 1863urtw_watchdog(void *arg) 1864{ 1865 struct urtw_softc *sc = arg; 1866 1867 if (sc->sc_txtimer > 0) { 1868 if (--sc->sc_txtimer == 0) { 1869 device_printf(sc->sc_dev, "device timeout\n"); 1870 counter_u64_add(sc->sc_ic.ic_oerrors, 1); 1871 return; 1872 } 1873 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1874 } 1875} 1876 1877static void 1878urtw_set_multi(void *arg) 1879{ 1880 /* XXX don't know how to set a device. Lack of docs. */ 1881} 1882 1883static usb_error_t 1884urtw_set_rate(struct urtw_softc *sc) 1885{ 1886 int i, basic_rate, min_rr_rate, max_rr_rate; 1887 uint16_t data; 1888 usb_error_t error; 1889 1890 basic_rate = urtw_rate2rtl(48); 1891 min_rr_rate = urtw_rate2rtl(12); 1892 max_rr_rate = urtw_rate2rtl(48); 1893 1894 urtw_write8_m(sc, URTW_RESP_RATE, 1895 max_rr_rate << URTW_RESP_MAX_RATE_SHIFT | 1896 min_rr_rate << URTW_RESP_MIN_RATE_SHIFT); 1897 1898 urtw_read16_m(sc, URTW_BRSR, &data); 1899 data &= ~URTW_BRSR_MBR_8185; 1900 1901 for (i = 0; i <= basic_rate; i++) 1902 data |= (1 << i); 1903 1904 urtw_write16_m(sc, URTW_BRSR, data); 1905fail: 1906 return (error); 1907} 1908 1909static uint16_t 1910urtw_rate2rtl(uint32_t rate) 1911{ 1912 int i; 1913 1914 for (i = 0; i < nitems(urtw_ratetable); i++) { 1915 if (rate == urtw_ratetable[i].reg) 1916 return urtw_ratetable[i].val; 1917 } 1918 1919 return (3); 1920} 1921 1922static uint16_t 1923urtw_rtl2rate(uint32_t rate) 1924{ 1925 int i; 1926 1927 for (i = 0; i < nitems(urtw_ratetable); i++) { 1928 if (rate == urtw_ratetable[i].val) 1929 return urtw_ratetable[i].reg; 1930 } 1931 1932 return (0); 1933} 1934 1935static usb_error_t 1936urtw_update_msr(struct urtw_softc *sc) 1937{ 1938 struct ieee80211com *ic = &sc->sc_ic; 1939 uint8_t data; 1940 usb_error_t error; 1941 1942 urtw_read8_m(sc, URTW_MSR, &data); 1943 data &= ~URTW_MSR_LINK_MASK; 1944 1945 if (sc->sc_state == IEEE80211_S_RUN) { 1946 switch (ic->ic_opmode) { 1947 case IEEE80211_M_STA: 1948 case IEEE80211_M_MONITOR: 1949 data |= URTW_MSR_LINK_STA; 1950 if (sc->sc_flags & URTW_RTL8187B) 1951 data |= URTW_MSR_LINK_ENEDCA; 1952 break; 1953 case IEEE80211_M_IBSS: 1954 data |= URTW_MSR_LINK_ADHOC; 1955 break; 1956 case IEEE80211_M_HOSTAP: 1957 data |= URTW_MSR_LINK_HOSTAP; 1958 break; 1959 default: 1960 DPRINTF(sc, URTW_DEBUG_STATE, 1961 "unsupported operation mode 0x%x\n", 1962 ic->ic_opmode); 1963 error = USB_ERR_INVAL; 1964 goto fail; 1965 } 1966 } else 1967 data |= URTW_MSR_LINK_NONE; 1968 1969 urtw_write8_m(sc, URTW_MSR, data); 1970fail: 1971 return (error); 1972} 1973 1974static usb_error_t 1975urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data) 1976{ 1977 struct usb_device_request req; 1978 usb_error_t error; 1979 1980 URTW_ASSERT_LOCKED(sc); 1981 1982 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1983 req.bRequest = URTW_8187_GETREGS_REQ; 1984 USETW(req.wValue, (val & 0xff) | 0xff00); 1985 USETW(req.wIndex, (val >> 8) & 0x3); 1986 USETW(req.wLength, sizeof(uint8_t)); 1987 1988 error = urtw_do_request(sc, &req, data); 1989 return (error); 1990} 1991 1992static usb_error_t 1993urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data) 1994{ 1995 struct usb_device_request req; 1996 usb_error_t error; 1997 1998 URTW_ASSERT_LOCKED(sc); 1999 2000 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2001 req.bRequest = URTW_8187_GETREGS_REQ; 2002 USETW(req.wValue, (val & 0xff) | 0xff00); 2003 USETW(req.wIndex, (val >> 8) & 0x3); 2004 USETW(req.wLength, sizeof(uint16_t)); 2005 2006 error = urtw_do_request(sc, &req, data); 2007 return (error); 2008} 2009 2010static usb_error_t 2011urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data) 2012{ 2013 struct usb_device_request req; 2014 usb_error_t error; 2015 2016 URTW_ASSERT_LOCKED(sc); 2017 2018 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2019 req.bRequest = URTW_8187_GETREGS_REQ; 2020 USETW(req.wValue, (val & 0xff) | 0xff00); 2021 USETW(req.wIndex, (val >> 8) & 0x3); 2022 USETW(req.wLength, sizeof(uint32_t)); 2023 2024 error = urtw_do_request(sc, &req, data); 2025 return (error); 2026} 2027 2028static usb_error_t 2029urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data) 2030{ 2031 struct usb_device_request req; 2032 2033 URTW_ASSERT_LOCKED(sc); 2034 2035 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2036 req.bRequest = URTW_8187_SETREGS_REQ; 2037 USETW(req.wValue, (val & 0xff) | 0xff00); 2038 USETW(req.wIndex, (val >> 8) & 0x3); 2039 USETW(req.wLength, sizeof(uint8_t)); 2040 2041 return (urtw_do_request(sc, &req, &data)); 2042} 2043 2044static usb_error_t 2045urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data) 2046{ 2047 struct usb_device_request req; 2048 2049 URTW_ASSERT_LOCKED(sc); 2050 2051 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2052 req.bRequest = URTW_8187_SETREGS_REQ; 2053 USETW(req.wValue, (val & 0xff) | 0xff00); 2054 USETW(req.wIndex, (val >> 8) & 0x3); 2055 USETW(req.wLength, sizeof(uint16_t)); 2056 2057 return (urtw_do_request(sc, &req, &data)); 2058} 2059 2060static usb_error_t 2061urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data) 2062{ 2063 struct usb_device_request req; 2064 2065 URTW_ASSERT_LOCKED(sc); 2066 2067 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2068 req.bRequest = URTW_8187_SETREGS_REQ; 2069 USETW(req.wValue, (val & 0xff) | 0xff00); 2070 USETW(req.wIndex, (val >> 8) & 0x3); 2071 USETW(req.wLength, sizeof(uint32_t)); 2072 2073 return (urtw_do_request(sc, &req, &data)); 2074} 2075 2076static usb_error_t 2077urtw_get_macaddr(struct urtw_softc *sc) 2078{ 2079 struct ieee80211com *ic = &sc->sc_ic; 2080 uint32_t data; 2081 usb_error_t error; 2082 2083 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data); 2084 if (error != 0) 2085 goto fail; 2086 ic->ic_macaddr[0] = data & 0xff; 2087 ic->ic_macaddr[1] = (data & 0xff00) >> 8; 2088 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data); 2089 if (error != 0) 2090 goto fail; 2091 ic->ic_macaddr[2] = data & 0xff; 2092 ic->ic_macaddr[3] = (data & 0xff00) >> 8; 2093 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data); 2094 if (error != 0) 2095 goto fail; 2096 ic->ic_macaddr[4] = data & 0xff; 2097 ic->ic_macaddr[5] = (data & 0xff00) >> 8; 2098fail: 2099 return (error); 2100} 2101 2102static usb_error_t 2103urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data) 2104{ 2105#define URTW_READCMD_LEN 3 2106 int addrlen, i; 2107 int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 }; 2108 usb_error_t error; 2109 2110 /* NB: make sure the buffer is initialized */ 2111 *data = 0; 2112 2113 /* enable EPROM programming */ 2114 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_PROGRAM_MODE); 2115 DELAY(URTW_EPROM_DELAY); 2116 2117 error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE); 2118 if (error != 0) 2119 goto fail; 2120 error = urtw_eprom_ck(sc); 2121 if (error != 0) 2122 goto fail; 2123 error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN); 2124 if (error != 0) 2125 goto fail; 2126 if (sc->sc_epromtype == URTW_EEPROM_93C56) { 2127 addrlen = 8; 2128 addrstr[0] = addr & (1 << 7); 2129 addrstr[1] = addr & (1 << 6); 2130 addrstr[2] = addr & (1 << 5); 2131 addrstr[3] = addr & (1 << 4); 2132 addrstr[4] = addr & (1 << 3); 2133 addrstr[5] = addr & (1 << 2); 2134 addrstr[6] = addr & (1 << 1); 2135 addrstr[7] = addr & (1 << 0); 2136 } else { 2137 addrlen=6; 2138 addrstr[0] = addr & (1 << 5); 2139 addrstr[1] = addr & (1 << 4); 2140 addrstr[2] = addr & (1 << 3); 2141 addrstr[3] = addr & (1 << 2); 2142 addrstr[4] = addr & (1 << 1); 2143 addrstr[5] = addr & (1 << 0); 2144 } 2145 error = urtw_eprom_sendbits(sc, addrstr, addrlen); 2146 if (error != 0) 2147 goto fail; 2148 2149 error = urtw_eprom_writebit(sc, 0); 2150 if (error != 0) 2151 goto fail; 2152 2153 for (i = 0; i < 16; i++) { 2154 error = urtw_eprom_ck(sc); 2155 if (error != 0) 2156 goto fail; 2157 error = urtw_eprom_readbit(sc, &data16); 2158 if (error != 0) 2159 goto fail; 2160 2161 (*data) |= (data16 << (15 - i)); 2162 } 2163 2164 error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE); 2165 if (error != 0) 2166 goto fail; 2167 error = urtw_eprom_ck(sc); 2168 if (error != 0) 2169 goto fail; 2170 2171 /* now disable EPROM programming */ 2172 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE); 2173fail: 2174 return (error); 2175#undef URTW_READCMD_LEN 2176} 2177 2178static usb_error_t 2179urtw_eprom_cs(struct urtw_softc *sc, int able) 2180{ 2181 uint8_t data; 2182 usb_error_t error; 2183 2184 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2185 if (able == URTW_EPROM_ENABLE) 2186 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CS); 2187 else 2188 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CS); 2189 DELAY(URTW_EPROM_DELAY); 2190fail: 2191 return (error); 2192} 2193 2194static usb_error_t 2195urtw_eprom_ck(struct urtw_softc *sc) 2196{ 2197 uint8_t data; 2198 usb_error_t error; 2199 2200 /* masking */ 2201 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2202 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK); 2203 DELAY(URTW_EPROM_DELAY); 2204 /* unmasking */ 2205 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2206 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK); 2207 DELAY(URTW_EPROM_DELAY); 2208fail: 2209 return (error); 2210} 2211 2212static usb_error_t 2213urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data) 2214{ 2215 uint8_t data8; 2216 usb_error_t error; 2217 2218 urtw_read8_m(sc, URTW_EPROM_CMD, &data8); 2219 *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0; 2220 DELAY(URTW_EPROM_DELAY); 2221 2222fail: 2223 return (error); 2224} 2225 2226static usb_error_t 2227urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit) 2228{ 2229 uint8_t data; 2230 usb_error_t error; 2231 2232 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2233 if (bit != 0) 2234 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_WRITEBIT); 2235 else 2236 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_WRITEBIT); 2237 DELAY(URTW_EPROM_DELAY); 2238fail: 2239 return (error); 2240} 2241 2242static usb_error_t 2243urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen) 2244{ 2245 int i = 0; 2246 usb_error_t error = 0; 2247 2248 for (i = 0; i < buflen; i++) { 2249 error = urtw_eprom_writebit(sc, buf[i]); 2250 if (error != 0) 2251 goto fail; 2252 error = urtw_eprom_ck(sc); 2253 if (error != 0) 2254 goto fail; 2255 } 2256fail: 2257 return (error); 2258} 2259 2260 2261static usb_error_t 2262urtw_get_txpwr(struct urtw_softc *sc) 2263{ 2264 int i, j; 2265 uint32_t data; 2266 usb_error_t error; 2267 2268 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW_BASE, &data); 2269 if (error != 0) 2270 goto fail; 2271 sc->sc_txpwr_cck_base = data & 0xf; 2272 sc->sc_txpwr_ofdm_base = (data >> 4) & 0xf; 2273 2274 for (i = 1, j = 0; i < 6; i += 2, j++) { 2275 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW0 + j, &data); 2276 if (error != 0) 2277 goto fail; 2278 sc->sc_txpwr_cck[i] = data & 0xf; 2279 sc->sc_txpwr_cck[i + 1] = (data & 0xf00) >> 8; 2280 sc->sc_txpwr_ofdm[i] = (data & 0xf0) >> 4; 2281 sc->sc_txpwr_ofdm[i + 1] = (data & 0xf000) >> 12; 2282 } 2283 for (i = 1, j = 0; i < 4; i += 2, j++) { 2284 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW1 + j, &data); 2285 if (error != 0) 2286 goto fail; 2287 sc->sc_txpwr_cck[i + 6] = data & 0xf; 2288 sc->sc_txpwr_cck[i + 6 + 1] = (data & 0xf00) >> 8; 2289 sc->sc_txpwr_ofdm[i + 6] = (data & 0xf0) >> 4; 2290 sc->sc_txpwr_ofdm[i + 6 + 1] = (data & 0xf000) >> 12; 2291 } 2292 if (sc->sc_flags & URTW_RTL8187B) { 2293 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2, &data); 2294 if (error != 0) 2295 goto fail; 2296 sc->sc_txpwr_cck[1 + 6 + 4] = data & 0xf; 2297 sc->sc_txpwr_ofdm[1 + 6 + 4] = (data & 0xf0) >> 4; 2298 error = urtw_eprom_read32(sc, 0x0a, &data); 2299 if (error != 0) 2300 goto fail; 2301 sc->sc_txpwr_cck[2 + 6 + 4] = data & 0xf; 2302 sc->sc_txpwr_ofdm[2 + 6 + 4] = (data & 0xf0) >> 4; 2303 error = urtw_eprom_read32(sc, 0x1c, &data); 2304 if (error != 0) 2305 goto fail; 2306 sc->sc_txpwr_cck[3 + 6 + 4] = data & 0xf; 2307 sc->sc_txpwr_cck[3 + 6 + 4 + 1] = (data & 0xf00) >> 8; 2308 sc->sc_txpwr_ofdm[3 + 6 + 4] = (data & 0xf0) >> 4; 2309 sc->sc_txpwr_ofdm[3 + 6 + 4 + 1] = (data & 0xf000) >> 12; 2310 } else { 2311 for (i = 1, j = 0; i < 4; i += 2, j++) { 2312 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2 + j, 2313 &data); 2314 if (error != 0) 2315 goto fail; 2316 sc->sc_txpwr_cck[i + 6 + 4] = data & 0xf; 2317 sc->sc_txpwr_cck[i + 6 + 4 + 1] = (data & 0xf00) >> 8; 2318 sc->sc_txpwr_ofdm[i + 6 + 4] = (data & 0xf0) >> 4; 2319 sc->sc_txpwr_ofdm[i + 6 + 4 + 1] = (data & 0xf000) >> 12; 2320 } 2321 } 2322fail: 2323 return (error); 2324} 2325 2326 2327static usb_error_t 2328urtw_get_rfchip(struct urtw_softc *sc) 2329{ 2330 int ret; 2331 uint8_t data8; 2332 uint32_t data; 2333 usb_error_t error; 2334 2335 if (sc->sc_flags & URTW_RTL8187B) { 2336 urtw_read8_m(sc, 0xe1, &data8); 2337 switch (data8) { 2338 case 0: 2339 sc->sc_flags |= URTW_RTL8187B_REV_B; 2340 break; 2341 case 1: 2342 sc->sc_flags |= URTW_RTL8187B_REV_D; 2343 break; 2344 case 2: 2345 sc->sc_flags |= URTW_RTL8187B_REV_E; 2346 break; 2347 default: 2348 device_printf(sc->sc_dev, "unknown type: %#x\n", data8); 2349 sc->sc_flags |= URTW_RTL8187B_REV_B; 2350 break; 2351 } 2352 } else { 2353 urtw_read32_m(sc, URTW_TX_CONF, &data); 2354 switch (data & URTW_TX_HWMASK) { 2355 case URTW_TX_R8187vD_B: 2356 sc->sc_flags |= URTW_RTL8187B; 2357 break; 2358 case URTW_TX_R8187vD: 2359 break; 2360 default: 2361 device_printf(sc->sc_dev, "unknown RTL8187L type: %#x\n", 2362 data & URTW_TX_HWMASK); 2363 break; 2364 } 2365 } 2366 2367 error = urtw_eprom_read32(sc, URTW_EPROM_RFCHIPID, &data); 2368 if (error != 0) 2369 goto fail; 2370 switch (data & 0xff) { 2371 case URTW_EPROM_RFCHIPID_RTL8225U: 2372 error = urtw_8225_isv2(sc, &ret); 2373 if (error != 0) 2374 goto fail; 2375 if (ret == 0) { 2376 sc->sc_rf_init = urtw_8225_rf_init; 2377 sc->sc_rf_set_sens = urtw_8225_rf_set_sens; 2378 sc->sc_rf_set_chan = urtw_8225_rf_set_chan; 2379 sc->sc_rf_stop = urtw_8225_rf_stop; 2380 } else { 2381 sc->sc_rf_init = urtw_8225v2_rf_init; 2382 sc->sc_rf_set_chan = urtw_8225v2_rf_set_chan; 2383 sc->sc_rf_stop = urtw_8225_rf_stop; 2384 } 2385 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2386 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2387 break; 2388 case URTW_EPROM_RFCHIPID_RTL8225Z2: 2389 sc->sc_rf_init = urtw_8225v2b_rf_init; 2390 sc->sc_rf_set_chan = urtw_8225v2b_rf_set_chan; 2391 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2392 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2393 sc->sc_rf_stop = urtw_8225_rf_stop; 2394 break; 2395 default: 2396 DPRINTF(sc, URTW_DEBUG_STATE, 2397 "unsupported RF chip %d\n", data & 0xff); 2398 error = USB_ERR_INVAL; 2399 goto fail; 2400 } 2401 2402 device_printf(sc->sc_dev, "%s rf %s hwrev %s\n", 2403 (sc->sc_flags & URTW_RTL8187B) ? "rtl8187b" : "rtl8187l", 2404 ((data & 0xff) == URTW_EPROM_RFCHIPID_RTL8225U) ? "rtl8225u" : 2405 "rtl8225z2", 2406 (sc->sc_flags & URTW_RTL8187B) ? ((data8 == 0) ? "b" : 2407 (data8 == 1) ? "d" : "e") : "none"); 2408 2409fail: 2410 return (error); 2411} 2412 2413 2414static usb_error_t 2415urtw_led_init(struct urtw_softc *sc) 2416{ 2417 uint32_t rev; 2418 usb_error_t error; 2419 2420 urtw_read8_m(sc, URTW_PSR, &sc->sc_psr); 2421 error = urtw_eprom_read32(sc, URTW_EPROM_SWREV, &rev); 2422 if (error != 0) 2423 goto fail; 2424 2425 switch (rev & URTW_EPROM_CID_MASK) { 2426 case URTW_EPROM_CID_ALPHA0: 2427 sc->sc_strategy = URTW_SW_LED_MODE1; 2428 break; 2429 case URTW_EPROM_CID_SERCOMM_PS: 2430 sc->sc_strategy = URTW_SW_LED_MODE3; 2431 break; 2432 case URTW_EPROM_CID_HW_LED: 2433 sc->sc_strategy = URTW_HW_LED; 2434 break; 2435 case URTW_EPROM_CID_RSVD0: 2436 case URTW_EPROM_CID_RSVD1: 2437 default: 2438 sc->sc_strategy = URTW_SW_LED_MODE0; 2439 break; 2440 } 2441 2442 sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0; 2443 2444fail: 2445 return (error); 2446} 2447 2448 2449static usb_error_t 2450urtw_8225_rf_init(struct urtw_softc *sc) 2451{ 2452 int i; 2453 uint16_t data; 2454 usb_error_t error; 2455 2456 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2457 if (error) 2458 goto fail; 2459 2460 error = urtw_8225_usb_init(sc); 2461 if (error) 2462 goto fail; 2463 2464 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2465 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2466 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2467 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2468 2469 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2470 if (error) 2471 goto fail; 2472 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2473 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2474 if (error) 2475 goto fail; 2476 2477 error = urtw_8185_rf_pins_enable(sc); 2478 if (error) 2479 goto fail; 2480 usb_pause_mtx(&sc->sc_mtx, 1000); 2481 2482 for (i = 0; i < nitems(urtw_8225_rf_part1); i++) { 2483 urtw_8225_write(sc, urtw_8225_rf_part1[i].reg, 2484 urtw_8225_rf_part1[i].val); 2485 usb_pause_mtx(&sc->sc_mtx, 1); 2486 } 2487 usb_pause_mtx(&sc->sc_mtx, 100); 2488 urtw_8225_write(sc, 2489 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2490 usb_pause_mtx(&sc->sc_mtx, 200); 2491 urtw_8225_write(sc, 2492 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2493 usb_pause_mtx(&sc->sc_mtx, 200); 2494 urtw_8225_write(sc, 2495 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC3); 2496 2497 for (i = 0; i < 95; i++) { 2498 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2499 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, urtw_8225_rxgain[i]); 2500 } 2501 2502 urtw_8225_write(sc, 2503 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC4); 2504 urtw_8225_write(sc, 2505 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC5); 2506 2507 for (i = 0; i < 128; i++) { 2508 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2509 usb_pause_mtx(&sc->sc_mtx, 1); 2510 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2511 usb_pause_mtx(&sc->sc_mtx, 1); 2512 } 2513 2514 for (i = 0; i < nitems(urtw_8225_rf_part2); i++) { 2515 urtw_8187_write_phy_ofdm(sc, urtw_8225_rf_part2[i].reg, 2516 urtw_8225_rf_part2[i].val); 2517 usb_pause_mtx(&sc->sc_mtx, 1); 2518 } 2519 2520 error = urtw_8225_setgain(sc, 4); 2521 if (error) 2522 goto fail; 2523 2524 for (i = 0; i < nitems(urtw_8225_rf_part3); i++) { 2525 urtw_8187_write_phy_cck(sc, urtw_8225_rf_part3[i].reg, 2526 urtw_8225_rf_part3[i].val); 2527 usb_pause_mtx(&sc->sc_mtx, 1); 2528 } 2529 2530 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2531 2532 error = urtw_8225_set_txpwrlvl(sc, 1); 2533 if (error) 2534 goto fail; 2535 2536 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2537 usb_pause_mtx(&sc->sc_mtx, 1); 2538 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2539 usb_pause_mtx(&sc->sc_mtx, 1); 2540 2541 /* TX ant A, 0x0 for B */ 2542 error = urtw_8185_tx_antenna(sc, 0x3); 2543 if (error) 2544 goto fail; 2545 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2546 2547 error = urtw_8225_rf_set_chan(sc, 1); 2548fail: 2549 return (error); 2550} 2551 2552static usb_error_t 2553urtw_8185_rf_pins_enable(struct urtw_softc *sc) 2554{ 2555 usb_error_t error = 0; 2556 2557 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1ff7); 2558fail: 2559 return (error); 2560} 2561 2562static usb_error_t 2563urtw_8185_tx_antenna(struct urtw_softc *sc, uint8_t ant) 2564{ 2565 usb_error_t error; 2566 2567 urtw_write8_m(sc, URTW_TX_ANTENNA, ant); 2568 usb_pause_mtx(&sc->sc_mtx, 1); 2569fail: 2570 return (error); 2571} 2572 2573static usb_error_t 2574urtw_8187_write_phy_ofdm_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2575{ 2576 2577 data = data & 0xff; 2578 return urtw_8187_write_phy(sc, addr, data); 2579} 2580 2581static usb_error_t 2582urtw_8187_write_phy_cck_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2583{ 2584 2585 data = data & 0xff; 2586 return urtw_8187_write_phy(sc, addr, data | 0x10000); 2587} 2588 2589static usb_error_t 2590urtw_8187_write_phy(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2591{ 2592 uint32_t phyw; 2593 usb_error_t error; 2594 2595 phyw = ((data << 8) | (addr | 0x80)); 2596 urtw_write8_m(sc, URTW_PHY_MAGIC4, ((phyw & 0xff000000) >> 24)); 2597 urtw_write8_m(sc, URTW_PHY_MAGIC3, ((phyw & 0x00ff0000) >> 16)); 2598 urtw_write8_m(sc, URTW_PHY_MAGIC2, ((phyw & 0x0000ff00) >> 8)); 2599 urtw_write8_m(sc, URTW_PHY_MAGIC1, ((phyw & 0x000000ff))); 2600 usb_pause_mtx(&sc->sc_mtx, 1); 2601fail: 2602 return (error); 2603} 2604 2605static usb_error_t 2606urtw_8225_setgain(struct urtw_softc *sc, int16_t gain) 2607{ 2608 usb_error_t error; 2609 2610 urtw_8187_write_phy_ofdm(sc, 0x0d, urtw_8225_gain[gain * 4]); 2611 urtw_8187_write_phy_ofdm(sc, 0x1b, urtw_8225_gain[gain * 4 + 2]); 2612 urtw_8187_write_phy_ofdm(sc, 0x1d, urtw_8225_gain[gain * 4 + 3]); 2613 urtw_8187_write_phy_ofdm(sc, 0x23, urtw_8225_gain[gain * 4 + 1]); 2614fail: 2615 return (error); 2616} 2617 2618static usb_error_t 2619urtw_8225_usb_init(struct urtw_softc *sc) 2620{ 2621 uint8_t data; 2622 usb_error_t error; 2623 2624 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 0); 2625 urtw_write8_m(sc, URTW_GPIO, 0); 2626 error = urtw_read8e(sc, 0x53, &data); 2627 if (error) 2628 goto fail; 2629 error = urtw_write8e(sc, 0x53, data | (1 << 7)); 2630 if (error) 2631 goto fail; 2632 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 4); 2633 urtw_write8_m(sc, URTW_GPIO, 0x20); 2634 urtw_write8_m(sc, URTW_GP_ENABLE, 0); 2635 2636 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x80); 2637 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x80); 2638 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x80); 2639 2640 usb_pause_mtx(&sc->sc_mtx, 500); 2641fail: 2642 return (error); 2643} 2644 2645static usb_error_t 2646urtw_8225_write_c(struct urtw_softc *sc, uint8_t addr, uint16_t data) 2647{ 2648 uint16_t d80, d82, d84; 2649 usb_error_t error; 2650 2651 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &d80); 2652 d80 &= URTW_RF_PINS_MAGIC1; 2653 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &d82); 2654 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &d84); 2655 d84 &= URTW_RF_PINS_MAGIC2; 2656 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, d82 | URTW_RF_PINS_MAGIC3); 2657 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84 | URTW_RF_PINS_MAGIC3); 2658 DELAY(10); 2659 2660 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2661 DELAY(2); 2662 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80); 2663 DELAY(10); 2664 2665 error = urtw_8225_write_s16(sc, addr, 0x8225, &data); 2666 if (error != 0) 2667 goto fail; 2668 2669 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2670 DELAY(10); 2671 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2672 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84); 2673 usb_pause_mtx(&sc->sc_mtx, 2); 2674fail: 2675 return (error); 2676} 2677 2678static usb_error_t 2679urtw_8225_write_s16(struct urtw_softc *sc, uint8_t addr, int index, 2680 uint16_t *data) 2681{ 2682 uint8_t buf[2]; 2683 uint16_t data16; 2684 struct usb_device_request req; 2685 usb_error_t error = 0; 2686 2687 data16 = *data; 2688 2689 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2690 req.bRequest = URTW_8187_SETREGS_REQ; 2691 USETW(req.wValue, addr); 2692 USETW(req.wIndex, index); 2693 USETW(req.wLength, sizeof(uint16_t)); 2694 buf[0] = (data16 & 0x00ff); 2695 buf[1] = (data16 & 0xff00) >> 8; 2696 2697 error = urtw_do_request(sc, &req, buf); 2698 2699 return (error); 2700} 2701 2702static usb_error_t 2703urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan) 2704{ 2705 usb_error_t error; 2706 2707 error = urtw_8225_set_txpwrlvl(sc, chan); 2708 if (error) 2709 goto fail; 2710 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 2711 usb_pause_mtx(&sc->sc_mtx, 10); 2712fail: 2713 return (error); 2714} 2715 2716static usb_error_t 2717urtw_8225_rf_set_sens(struct urtw_softc *sc, int sens) 2718{ 2719 usb_error_t error; 2720 2721 if (sens < 0 || sens > 6) 2722 return -1; 2723 2724 if (sens > 4) 2725 urtw_8225_write(sc, 2726 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC1); 2727 else 2728 urtw_8225_write(sc, 2729 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC2); 2730 2731 sens = 6 - sens; 2732 error = urtw_8225_setgain(sc, sens); 2733 if (error) 2734 goto fail; 2735 2736 urtw_8187_write_phy_cck(sc, 0x41, urtw_8225_threshold[sens]); 2737 2738fail: 2739 return (error); 2740} 2741 2742static usb_error_t 2743urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan) 2744{ 2745 int i, idx, set; 2746 uint8_t *cck_pwltable; 2747 uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max; 2748 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 2749 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 2750 usb_error_t error; 2751 2752 cck_pwrlvl_max = 11; 2753 ofdm_pwrlvl_max = 25; /* 12 -> 25 */ 2754 ofdm_pwrlvl_min = 10; 2755 2756 /* CCK power setting */ 2757 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 2758 idx = cck_pwrlvl % 6; 2759 set = cck_pwrlvl / 6; 2760 cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 : 2761 urtw_8225_txpwr_cck; 2762 2763 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 2764 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2765 for (i = 0; i < 8; i++) { 2766 urtw_8187_write_phy_cck(sc, 0x44 + i, 2767 cck_pwltable[idx * 8 + i]); 2768 } 2769 usb_pause_mtx(&sc->sc_mtx, 1); 2770 2771 /* OFDM power setting */ 2772 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 2773 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 2774 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 2775 2776 idx = ofdm_pwrlvl % 6; 2777 set = ofdm_pwrlvl / 6; 2778 2779 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 2780 if (error) 2781 goto fail; 2782 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 2783 urtw_8187_write_phy_ofdm(sc, 6, 0); 2784 urtw_8187_write_phy_ofdm(sc, 8, 0); 2785 2786 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 2787 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2788 urtw_8187_write_phy_ofdm(sc, 0x5, urtw_8225_txpwr_ofdm[idx]); 2789 urtw_8187_write_phy_ofdm(sc, 0x7, urtw_8225_txpwr_ofdm[idx]); 2790 usb_pause_mtx(&sc->sc_mtx, 1); 2791fail: 2792 return (error); 2793} 2794 2795 2796static usb_error_t 2797urtw_8225_rf_stop(struct urtw_softc *sc) 2798{ 2799 uint8_t data; 2800 usb_error_t error; 2801 2802 urtw_8225_write(sc, 0x4, 0x1f); 2803 2804 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2805 if (error) 2806 goto fail; 2807 2808 urtw_read8_m(sc, URTW_CONFIG3, &data); 2809 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 2810 if (sc->sc_flags & URTW_RTL8187B) { 2811 urtw_write32_m(sc, URTW_ANAPARAM2, 2812 URTW_8187B_8225_ANAPARAM2_OFF); 2813 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_OFF); 2814 urtw_write32_m(sc, URTW_ANAPARAM3, 2815 URTW_8187B_8225_ANAPARAM3_OFF); 2816 } else { 2817 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8225_ANAPARAM2_OFF); 2818 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8225_ANAPARAM_OFF); 2819 } 2820 2821 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 2822 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2823 if (error) 2824 goto fail; 2825 2826fail: 2827 return (error); 2828} 2829 2830static usb_error_t 2831urtw_8225v2_rf_init(struct urtw_softc *sc) 2832{ 2833 int i; 2834 uint16_t data; 2835 uint32_t data32; 2836 usb_error_t error; 2837 2838 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2839 if (error) 2840 goto fail; 2841 2842 error = urtw_8225_usb_init(sc); 2843 if (error) 2844 goto fail; 2845 2846 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2847 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2848 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2849 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2850 2851 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2852 if (error) 2853 goto fail; 2854 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2855 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2856 if (error) 2857 goto fail; 2858 2859 error = urtw_8185_rf_pins_enable(sc); 2860 if (error) 2861 goto fail; 2862 2863 usb_pause_mtx(&sc->sc_mtx, 500); 2864 2865 for (i = 0; i < nitems(urtw_8225v2_rf_part1); i++) { 2866 urtw_8225_write(sc, urtw_8225v2_rf_part1[i].reg, 2867 urtw_8225v2_rf_part1[i].val); 2868 } 2869 usb_pause_mtx(&sc->sc_mtx, 50); 2870 2871 urtw_8225_write(sc, 2872 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 2873 2874 for (i = 0; i < 95; i++) { 2875 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2876 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 2877 urtw_8225v2_rxgain[i]); 2878 } 2879 2880 urtw_8225_write(sc, 2881 URTW_8225_ADDR_3_MAGIC, URTW_8225_ADDR_3_DATA_MAGIC1); 2882 urtw_8225_write(sc, 2883 URTW_8225_ADDR_5_MAGIC, URTW_8225_ADDR_5_DATA_MAGIC1); 2884 urtw_8225_write(sc, 2885 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC2); 2886 urtw_8225_write(sc, 2887 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2888 usb_pause_mtx(&sc->sc_mtx, 100); 2889 urtw_8225_write(sc, 2890 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2891 usb_pause_mtx(&sc->sc_mtx, 100); 2892 2893 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2894 if (error != 0) 2895 goto fail; 2896 if (data32 != URTW_8225_ADDR_6_DATA_MAGIC1) 2897 device_printf(sc->sc_dev, "expect 0xe6!! (0x%x)\n", data32); 2898 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) { 2899 urtw_8225_write(sc, 2900 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2901 usb_pause_mtx(&sc->sc_mtx, 100); 2902 urtw_8225_write(sc, 2903 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2904 usb_pause_mtx(&sc->sc_mtx, 50); 2905 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2906 if (error != 0) 2907 goto fail; 2908 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) 2909 device_printf(sc->sc_dev, "RF calibration failed\n"); 2910 } 2911 usb_pause_mtx(&sc->sc_mtx, 100); 2912 2913 urtw_8225_write(sc, 2914 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC6); 2915 for (i = 0; i < 128; i++) { 2916 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2917 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2918 } 2919 2920 for (i = 0; i < nitems(urtw_8225v2_rf_part2); i++) { 2921 urtw_8187_write_phy_ofdm(sc, urtw_8225v2_rf_part2[i].reg, 2922 urtw_8225v2_rf_part2[i].val); 2923 } 2924 2925 error = urtw_8225v2_setgain(sc, 4); 2926 if (error) 2927 goto fail; 2928 2929 for (i = 0; i < nitems(urtw_8225v2_rf_part3); i++) { 2930 urtw_8187_write_phy_cck(sc, urtw_8225v2_rf_part3[i].reg, 2931 urtw_8225v2_rf_part3[i].val); 2932 } 2933 2934 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2935 2936 error = urtw_8225v2_set_txpwrlvl(sc, 1); 2937 if (error) 2938 goto fail; 2939 2940 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2941 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2942 2943 /* TX ant A, 0x0 for B */ 2944 error = urtw_8185_tx_antenna(sc, 0x3); 2945 if (error) 2946 goto fail; 2947 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2948 2949 error = urtw_8225_rf_set_chan(sc, 1); 2950fail: 2951 return (error); 2952} 2953 2954static usb_error_t 2955urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan) 2956{ 2957 usb_error_t error; 2958 2959 error = urtw_8225v2_set_txpwrlvl(sc, chan); 2960 if (error) 2961 goto fail; 2962 2963 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 2964 usb_pause_mtx(&sc->sc_mtx, 10); 2965fail: 2966 return (error); 2967} 2968 2969static usb_error_t 2970urtw_8225_read(struct urtw_softc *sc, uint8_t addr, uint32_t *data) 2971{ 2972 int i; 2973 int16_t bit; 2974 uint8_t rlen = 12, wlen = 6; 2975 uint16_t o1, o2, o3, tmp; 2976 uint32_t d2w = ((uint32_t)(addr & 0x1f)) << 27; 2977 uint32_t mask = 0x80000000, value = 0; 2978 usb_error_t error; 2979 2980 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &o1); 2981 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &o2); 2982 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &o3); 2983 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2 | URTW_RF_PINS_MAGIC4); 2984 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3 | URTW_RF_PINS_MAGIC4); 2985 o1 &= ~URTW_RF_PINS_MAGIC4; 2986 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN); 2987 DELAY(5); 2988 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1); 2989 DELAY(5); 2990 2991 for (i = 0; i < (wlen / 2); i++, mask = mask >> 1) { 2992 bit = ((d2w & mask) != 0) ? 1 : 0; 2993 2994 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 2995 DELAY(2); 2996 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 2997 URTW_BB_HOST_BANG_CLK); 2998 DELAY(2); 2999 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3000 URTW_BB_HOST_BANG_CLK); 3001 DELAY(2); 3002 mask = mask >> 1; 3003 if (i == 2) 3004 break; 3005 bit = ((d2w & mask) != 0) ? 1 : 0; 3006 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3007 URTW_BB_HOST_BANG_CLK); 3008 DELAY(2); 3009 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3010 URTW_BB_HOST_BANG_CLK); 3011 DELAY(2); 3012 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3013 DELAY(1); 3014 } 3015 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW | 3016 URTW_BB_HOST_BANG_CLK); 3017 DELAY(2); 3018 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW); 3019 DELAY(2); 3020 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_RW); 3021 DELAY(2); 3022 3023 mask = 0x800; 3024 for (i = 0; i < rlen; i++, mask = mask >> 1) { 3025 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3026 o1 | URTW_BB_HOST_BANG_RW); 3027 DELAY(2); 3028 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3029 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3030 DELAY(2); 3031 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3032 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3033 DELAY(2); 3034 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3035 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3036 DELAY(2); 3037 3038 urtw_read16_m(sc, URTW_RF_PINS_INPUT, &tmp); 3039 value |= ((tmp & URTW_BB_HOST_BANG_CLK) ? mask : 0); 3040 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3041 o1 | URTW_BB_HOST_BANG_RW); 3042 DELAY(2); 3043 } 3044 3045 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN | 3046 URTW_BB_HOST_BANG_RW); 3047 DELAY(2); 3048 3049 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2); 3050 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3); 3051 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_OUTPUT_MAGIC1); 3052 3053 if (data != NULL) 3054 *data = value; 3055fail: 3056 return (error); 3057} 3058 3059 3060static usb_error_t 3061urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan) 3062{ 3063 int i; 3064 uint8_t *cck_pwrtable; 3065 uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10; 3066 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3067 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3068 usb_error_t error; 3069 3070 /* CCK power setting */ 3071 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 3072 cck_pwrlvl += sc->sc_txpwr_cck_base; 3073 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3074 cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 : 3075 urtw_8225v2_txpwr_cck; 3076 3077 for (i = 0; i < 8; i++) 3078 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3079 3080 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3081 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl]); 3082 usb_pause_mtx(&sc->sc_mtx, 1); 3083 3084 /* OFDM power setting */ 3085 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 3086 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 3087 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3088 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3089 3090 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3091 if (error) 3092 goto fail; 3093 3094 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 3095 urtw_8187_write_phy_ofdm(sc, 5, 0x0); 3096 urtw_8187_write_phy_ofdm(sc, 6, 0x40); 3097 urtw_8187_write_phy_ofdm(sc, 7, 0x0); 3098 urtw_8187_write_phy_ofdm(sc, 8, 0x40); 3099 3100 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3101 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]); 3102 usb_pause_mtx(&sc->sc_mtx, 1); 3103fail: 3104 return (error); 3105} 3106 3107static usb_error_t 3108urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain) 3109{ 3110 uint8_t *gainp; 3111 usb_error_t error; 3112 3113 /* XXX for A? */ 3114 gainp = urtw_8225v2_gain_bg; 3115 urtw_8187_write_phy_ofdm(sc, 0x0d, gainp[gain * 3]); 3116 usb_pause_mtx(&sc->sc_mtx, 1); 3117 urtw_8187_write_phy_ofdm(sc, 0x1b, gainp[gain * 3 + 1]); 3118 usb_pause_mtx(&sc->sc_mtx, 1); 3119 urtw_8187_write_phy_ofdm(sc, 0x1d, gainp[gain * 3 + 2]); 3120 usb_pause_mtx(&sc->sc_mtx, 1); 3121 urtw_8187_write_phy_ofdm(sc, 0x21, 0x17); 3122 usb_pause_mtx(&sc->sc_mtx, 1); 3123fail: 3124 return (error); 3125} 3126 3127static usb_error_t 3128urtw_8225_isv2(struct urtw_softc *sc, int *ret) 3129{ 3130 uint32_t data; 3131 usb_error_t error; 3132 3133 *ret = 1; 3134 3135 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_MAGIC5); 3136 urtw_write16_m(sc, URTW_RF_PINS_SELECT, URTW_RF_PINS_MAGIC5); 3137 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, URTW_RF_PINS_MAGIC5); 3138 usb_pause_mtx(&sc->sc_mtx, 500); 3139 3140 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3141 URTW_8225_ADDR_0_DATA_MAGIC1); 3142 3143 error = urtw_8225_read(sc, URTW_8225_ADDR_8_MAGIC, &data); 3144 if (error != 0) 3145 goto fail; 3146 if (data != URTW_8225_ADDR_8_DATA_MAGIC1) 3147 *ret = 0; 3148 else { 3149 error = urtw_8225_read(sc, URTW_8225_ADDR_9_MAGIC, &data); 3150 if (error != 0) 3151 goto fail; 3152 if (data != URTW_8225_ADDR_9_DATA_MAGIC1) 3153 *ret = 0; 3154 } 3155 3156 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3157 URTW_8225_ADDR_0_DATA_MAGIC2); 3158fail: 3159 return (error); 3160} 3161 3162static usb_error_t 3163urtw_8225v2b_rf_init(struct urtw_softc *sc) 3164{ 3165 struct ieee80211com *ic = &sc->sc_ic; 3166 int i; 3167 uint8_t data8; 3168 usb_error_t error; 3169 3170 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3171 if (error) 3172 goto fail; 3173 3174 /* 3175 * initialize extra registers on 8187 3176 */ 3177 urtw_write16_m(sc, URTW_BRSR_8187B, 0xfff); 3178 3179 /* retry limit */ 3180 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3181 data8 |= URTW_CW_CONF_PERPACKET_RETRY; 3182 urtw_write8_m(sc, URTW_CW_CONF, data8); 3183 3184 /* TX AGC */ 3185 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3186 data8 |= URTW_TX_AGC_CTL_PERPACKET_GAIN; 3187 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3188 3189 /* Auto Rate Fallback Control */ 3190#define URTW_ARFR 0x1e0 3191 urtw_write16_m(sc, URTW_ARFR, 0xfff); 3192 urtw_read8_m(sc, URTW_RATE_FALLBACK, &data8); 3193 urtw_write8_m(sc, URTW_RATE_FALLBACK, 3194 data8 | URTW_RATE_FALLBACK_ENABLE); 3195 3196 urtw_read8_m(sc, URTW_MSR, &data8); 3197 urtw_write8_m(sc, URTW_MSR, data8 & 0xf3); 3198 urtw_read8_m(sc, URTW_MSR, &data8); 3199 urtw_write8_m(sc, URTW_MSR, data8 | URTW_MSR_LINK_ENEDCA); 3200 urtw_write8_m(sc, URTW_ACM_CONTROL, sc->sc_acmctl); 3201 3202 urtw_write16_m(sc, URTW_ATIM_WND, 2); 3203 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 3204#define URTW_FEMR_FOR_8187B 0x1d4 3205 urtw_write16_m(sc, URTW_FEMR_FOR_8187B, 0xffff); 3206 3207 /* led type */ 3208 urtw_read8_m(sc, URTW_CONFIG1, &data8); 3209 data8 = (data8 & 0x3f) | 0x80; 3210 urtw_write8_m(sc, URTW_CONFIG1, data8); 3211 3212 /* applying MAC address again. */ 3213 urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)ic->ic_macaddr)[0]); 3214 urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)ic->ic_macaddr)[1] & 0xffff); 3215 3216 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3217 if (error) 3218 goto fail; 3219 3220 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 3221 3222 /* 3223 * MAC configuration 3224 */ 3225 for (i = 0; i < nitems(urtw_8225v2b_rf_part1); i++) 3226 urtw_write8_m(sc, urtw_8225v2b_rf_part1[i].reg, 3227 urtw_8225v2b_rf_part1[i].val); 3228 urtw_write16_m(sc, URTW_TID_AC_MAP, 0xfa50); 3229 urtw_write16_m(sc, URTW_INT_MIG, 0x0000); 3230 urtw_write32_m(sc, 0x1f0, 0); 3231 urtw_write32_m(sc, 0x1f4, 0); 3232 urtw_write8_m(sc, 0x1f8, 0); 3233 urtw_write32_m(sc, URTW_RF_TIMING, 0x4001); 3234 3235#define URTW_RFSW_CTRL 0x272 3236 urtw_write16_m(sc, URTW_RFSW_CTRL, 0x569a); 3237 3238 /* 3239 * initialize PHY 3240 */ 3241 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3242 if (error) 3243 goto fail; 3244 urtw_read8_m(sc, URTW_CONFIG3, &data8); 3245 urtw_write8_m(sc, URTW_CONFIG3, 3246 data8 | URTW_CONFIG3_ANAPARAM_WRITE); 3247 3248 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3249 if (error) 3250 goto fail; 3251 3252 /* setup RFE initial timing */ 3253 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x0480); 3254 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x2488); 3255 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1fff); 3256 usb_pause_mtx(&sc->sc_mtx, 1100); 3257 3258 for (i = 0; i < nitems(urtw_8225v2b_rf_part0); i++) { 3259 urtw_8225_write(sc, urtw_8225v2b_rf_part0[i].reg, 3260 urtw_8225v2b_rf_part0[i].val); 3261 usb_pause_mtx(&sc->sc_mtx, 1); 3262 } 3263 urtw_8225_write(sc, 0x00, 0x01b7); 3264 3265 for (i = 0; i < 95; i++) { 3266 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 3267 usb_pause_mtx(&sc->sc_mtx, 1); 3268 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 3269 urtw_8225v2b_rxgain[i]); 3270 usb_pause_mtx(&sc->sc_mtx, 1); 3271 } 3272 3273 urtw_8225_write(sc, URTW_8225_ADDR_3_MAGIC, 0x080); 3274 usb_pause_mtx(&sc->sc_mtx, 1); 3275 urtw_8225_write(sc, URTW_8225_ADDR_5_MAGIC, 0x004); 3276 usb_pause_mtx(&sc->sc_mtx, 1); 3277 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x0b7); 3278 usb_pause_mtx(&sc->sc_mtx, 1); 3279 usb_pause_mtx(&sc->sc_mtx, 3000); 3280 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0xc4d); 3281 usb_pause_mtx(&sc->sc_mtx, 2000); 3282 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0x44d); 3283 usb_pause_mtx(&sc->sc_mtx, 1); 3284 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x2bf); 3285 usb_pause_mtx(&sc->sc_mtx, 1); 3286 3287 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 0x03); 3288 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 0x07); 3289 urtw_write8_m(sc, URTW_TX_ANTENNA, 0x03); 3290 3291 urtw_8187_write_phy_ofdm(sc, 0x80, 0x12); 3292 for (i = 0; i < 128; i++) { 3293 uint32_t addr, data; 3294 3295 data = (urtw_8225z2_agc[i] << 8) | 0x0000008f; 3296 addr = ((i + 0x80) << 8) | 0x0000008e; 3297 3298 urtw_8187_write_phy_ofdm(sc, data & 0x7f, (data >> 8) & 0xff); 3299 urtw_8187_write_phy_ofdm(sc, addr & 0x7f, (addr >> 8) & 0xff); 3300 urtw_8187_write_phy_ofdm(sc, 0x0e, 0x00); 3301 } 3302 urtw_8187_write_phy_ofdm(sc, 0x80, 0x10); 3303 3304 for (i = 0; i < nitems(urtw_8225v2b_rf_part2); i++) 3305 urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val); 3306 3307 urtw_write32_m(sc, URTW_8187B_AC_VO, (7 << 12) | (3 << 8) | 0x1c); 3308 urtw_write32_m(sc, URTW_8187B_AC_VI, (7 << 12) | (3 << 8) | 0x1c); 3309 urtw_write32_m(sc, URTW_8187B_AC_BE, (7 << 12) | (3 << 8) | 0x1c); 3310 urtw_write32_m(sc, URTW_8187B_AC_BK, (7 << 12) | (3 << 8) | 0x1c); 3311 3312 urtw_8187_write_phy_ofdm(sc, 0x97, 0x46); 3313 urtw_8187_write_phy_ofdm(sc, 0xa4, 0xb6); 3314 urtw_8187_write_phy_ofdm(sc, 0x85, 0xfc); 3315 urtw_8187_write_phy_cck(sc, 0xc1, 0x88); 3316 3317fail: 3318 return (error); 3319} 3320 3321static usb_error_t 3322urtw_8225v2b_rf_set_chan(struct urtw_softc *sc, int chan) 3323{ 3324 usb_error_t error; 3325 3326 error = urtw_8225v2b_set_txpwrlvl(sc, chan); 3327 if (error) 3328 goto fail; 3329 3330 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3331 usb_pause_mtx(&sc->sc_mtx, 10); 3332fail: 3333 return (error); 3334} 3335 3336static usb_error_t 3337urtw_8225v2b_set_txpwrlvl(struct urtw_softc *sc, int chan) 3338{ 3339 int i; 3340 uint8_t *cck_pwrtable; 3341 uint8_t cck_pwrlvl_max = 15; 3342 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3343 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3344 usb_error_t error; 3345 3346 /* CCK power setting */ 3347 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? 3348 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? cck_pwrlvl_max : 22) : 3349 (cck_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 0 : 7)); 3350 cck_pwrlvl += sc->sc_txpwr_cck_base; 3351 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3352 cck_pwrtable = (chan == 14) ? urtw_8225v2b_txpwr_cck_ch14 : 3353 urtw_8225v2b_txpwr_cck; 3354 3355 if (sc->sc_flags & URTW_RTL8187B_REV_B) 3356 cck_pwrtable += (cck_pwrlvl <= 6) ? 0 : 3357 ((cck_pwrlvl <= 11) ? 8 : 16); 3358 else 3359 cck_pwrtable += (cck_pwrlvl <= 5) ? 0 : 3360 ((cck_pwrlvl <= 11) ? 8 : ((cck_pwrlvl <= 17) ? 16 : 24)); 3361 3362 for (i = 0; i < 8; i++) 3363 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3364 3365 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3366 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl] << 1); 3367 usb_pause_mtx(&sc->sc_mtx, 1); 3368 3369 /* OFDM power setting */ 3370 ofdm_pwrlvl = (ofdm_pwrlvl > 15) ? 3371 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 17 : 25) : 3372 (ofdm_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 2 : 10)); 3373 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3374 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3375 3376 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3377 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl] << 1); 3378 3379 if (sc->sc_flags & URTW_RTL8187B_REV_B) { 3380 if (ofdm_pwrlvl <= 11) { 3381 urtw_8187_write_phy_ofdm(sc, 0x87, 0x60); 3382 urtw_8187_write_phy_ofdm(sc, 0x89, 0x60); 3383 } else { 3384 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3385 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3386 } 3387 } else { 3388 if (ofdm_pwrlvl <= 11) { 3389 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3390 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3391 } else if (ofdm_pwrlvl <= 17) { 3392 urtw_8187_write_phy_ofdm(sc, 0x87, 0x54); 3393 urtw_8187_write_phy_ofdm(sc, 0x89, 0x54); 3394 } else { 3395 urtw_8187_write_phy_ofdm(sc, 0x87, 0x50); 3396 urtw_8187_write_phy_ofdm(sc, 0x89, 0x50); 3397 } 3398 } 3399 usb_pause_mtx(&sc->sc_mtx, 1); 3400fail: 3401 return (error); 3402} 3403 3404static usb_error_t 3405urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data) 3406{ 3407 struct usb_device_request req; 3408 usb_error_t error; 3409 3410 req.bmRequestType = UT_READ_VENDOR_DEVICE; 3411 req.bRequest = URTW_8187_GETREGS_REQ; 3412 USETW(req.wValue, val | 0xfe00); 3413 USETW(req.wIndex, 0); 3414 USETW(req.wLength, sizeof(uint8_t)); 3415 3416 error = urtw_do_request(sc, &req, data); 3417 return (error); 3418} 3419 3420static usb_error_t 3421urtw_write8e(struct urtw_softc *sc, int val, uint8_t data) 3422{ 3423 struct usb_device_request req; 3424 3425 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 3426 req.bRequest = URTW_8187_SETREGS_REQ; 3427 USETW(req.wValue, val | 0xfe00); 3428 USETW(req.wIndex, 0); 3429 USETW(req.wLength, sizeof(uint8_t)); 3430 3431 return (urtw_do_request(sc, &req, &data)); 3432} 3433 3434static usb_error_t 3435urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val) 3436{ 3437 uint8_t data; 3438 usb_error_t error; 3439 3440 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3441 if (error) 3442 goto fail; 3443 3444 urtw_read8_m(sc, URTW_CONFIG3, &data); 3445 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3446 urtw_write32_m(sc, URTW_ANAPARAM, val); 3447 urtw_read8_m(sc, URTW_CONFIG3, &data); 3448 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3449 3450 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3451 if (error) 3452 goto fail; 3453fail: 3454 return (error); 3455} 3456 3457static usb_error_t 3458urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val) 3459{ 3460 uint8_t data; 3461 usb_error_t error; 3462 3463 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3464 if (error) 3465 goto fail; 3466 3467 urtw_read8_m(sc, URTW_CONFIG3, &data); 3468 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3469 urtw_write32_m(sc, URTW_ANAPARAM2, val); 3470 urtw_read8_m(sc, URTW_CONFIG3, &data); 3471 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3472 3473 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3474 if (error) 3475 goto fail; 3476fail: 3477 return (error); 3478} 3479 3480static usb_error_t 3481urtw_intr_enable(struct urtw_softc *sc) 3482{ 3483 usb_error_t error; 3484 3485 urtw_write16_m(sc, URTW_INTR_MASK, 0xffff); 3486fail: 3487 return (error); 3488} 3489 3490static usb_error_t 3491urtw_intr_disable(struct urtw_softc *sc) 3492{ 3493 usb_error_t error; 3494 3495 urtw_write16_m(sc, URTW_INTR_MASK, 0); 3496fail: 3497 return (error); 3498} 3499 3500static usb_error_t 3501urtw_reset(struct urtw_softc *sc) 3502{ 3503 uint8_t data; 3504 usb_error_t error; 3505 3506 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3507 if (error) 3508 goto fail; 3509 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3510 if (error) 3511 goto fail; 3512 3513 error = urtw_intr_disable(sc); 3514 if (error) 3515 goto fail; 3516 usb_pause_mtx(&sc->sc_mtx, 100); 3517 3518 error = urtw_write8e(sc, 0x18, 0x10); 3519 if (error != 0) 3520 goto fail; 3521 error = urtw_write8e(sc, 0x18, 0x11); 3522 if (error != 0) 3523 goto fail; 3524 error = urtw_write8e(sc, 0x18, 0x00); 3525 if (error != 0) 3526 goto fail; 3527 usb_pause_mtx(&sc->sc_mtx, 100); 3528 3529 urtw_read8_m(sc, URTW_CMD, &data); 3530 data = (data & 0x2) | URTW_CMD_RST; 3531 urtw_write8_m(sc, URTW_CMD, data); 3532 usb_pause_mtx(&sc->sc_mtx, 100); 3533 3534 urtw_read8_m(sc, URTW_CMD, &data); 3535 if (data & URTW_CMD_RST) { 3536 device_printf(sc->sc_dev, "reset timeout\n"); 3537 goto fail; 3538 } 3539 3540 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 3541 if (error) 3542 goto fail; 3543 usb_pause_mtx(&sc->sc_mtx, 100); 3544 3545 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3546 if (error) 3547 goto fail; 3548 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3549 if (error) 3550 goto fail; 3551fail: 3552 return (error); 3553} 3554 3555static usb_error_t 3556urtw_led_ctl(struct urtw_softc *sc, int mode) 3557{ 3558 usb_error_t error = 0; 3559 3560 switch (sc->sc_strategy) { 3561 case URTW_SW_LED_MODE0: 3562 error = urtw_led_mode0(sc, mode); 3563 break; 3564 case URTW_SW_LED_MODE1: 3565 error = urtw_led_mode1(sc, mode); 3566 break; 3567 case URTW_SW_LED_MODE2: 3568 error = urtw_led_mode2(sc, mode); 3569 break; 3570 case URTW_SW_LED_MODE3: 3571 error = urtw_led_mode3(sc, mode); 3572 break; 3573 default: 3574 DPRINTF(sc, URTW_DEBUG_STATE, 3575 "unsupported LED mode %d\n", sc->sc_strategy); 3576 error = USB_ERR_INVAL; 3577 break; 3578 } 3579 3580 return (error); 3581} 3582 3583static usb_error_t 3584urtw_led_mode0(struct urtw_softc *sc, int mode) 3585{ 3586 3587 switch (mode) { 3588 case URTW_LED_CTL_POWER_ON: 3589 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK; 3590 break; 3591 case URTW_LED_CTL_TX: 3592 if (sc->sc_gpio_ledinprogress == 1) 3593 return (0); 3594 3595 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL; 3596 sc->sc_gpio_blinktime = 2; 3597 break; 3598 case URTW_LED_CTL_LINK: 3599 sc->sc_gpio_ledstate = URTW_LED_ON; 3600 break; 3601 default: 3602 DPRINTF(sc, URTW_DEBUG_STATE, 3603 "unsupported LED mode 0x%x", mode); 3604 return (USB_ERR_INVAL); 3605 } 3606 3607 switch (sc->sc_gpio_ledstate) { 3608 case URTW_LED_ON: 3609 if (sc->sc_gpio_ledinprogress != 0) 3610 break; 3611 urtw_led_on(sc, URTW_LED_GPIO); 3612 break; 3613 case URTW_LED_BLINK_NORMAL: 3614 if (sc->sc_gpio_ledinprogress != 0) 3615 break; 3616 sc->sc_gpio_ledinprogress = 1; 3617 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ? 3618 URTW_LED_OFF : URTW_LED_ON; 3619 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3620 break; 3621 case URTW_LED_POWER_ON_BLINK: 3622 urtw_led_on(sc, URTW_LED_GPIO); 3623 usb_pause_mtx(&sc->sc_mtx, 100); 3624 urtw_led_off(sc, URTW_LED_GPIO); 3625 break; 3626 default: 3627 DPRINTF(sc, URTW_DEBUG_STATE, 3628 "unknown LED status 0x%x", sc->sc_gpio_ledstate); 3629 return (USB_ERR_INVAL); 3630 } 3631 return (0); 3632} 3633 3634static usb_error_t 3635urtw_led_mode1(struct urtw_softc *sc, int mode) 3636{ 3637 return (USB_ERR_INVAL); 3638} 3639 3640static usb_error_t 3641urtw_led_mode2(struct urtw_softc *sc, int mode) 3642{ 3643 return (USB_ERR_INVAL); 3644} 3645 3646static usb_error_t 3647urtw_led_mode3(struct urtw_softc *sc, int mode) 3648{ 3649 return (USB_ERR_INVAL); 3650} 3651 3652static usb_error_t 3653urtw_led_on(struct urtw_softc *sc, int type) 3654{ 3655 usb_error_t error; 3656 3657 if (type == URTW_LED_GPIO) { 3658 switch (sc->sc_gpio_ledpin) { 3659 case URTW_LED_PIN_GPIO0: 3660 urtw_write8_m(sc, URTW_GPIO, 0x01); 3661 urtw_write8_m(sc, URTW_GP_ENABLE, 0x00); 3662 break; 3663 default: 3664 DPRINTF(sc, URTW_DEBUG_STATE, 3665 "unsupported LED PIN type 0x%x", 3666 sc->sc_gpio_ledpin); 3667 error = USB_ERR_INVAL; 3668 goto fail; 3669 } 3670 } else { 3671 DPRINTF(sc, URTW_DEBUG_STATE, 3672 "unsupported LED type 0x%x", type); 3673 error = USB_ERR_INVAL; 3674 goto fail; 3675 } 3676 3677 sc->sc_gpio_ledon = 1; 3678fail: 3679 return (error); 3680} 3681 3682static usb_error_t 3683urtw_led_off(struct urtw_softc *sc, int type) 3684{ 3685 usb_error_t error; 3686 3687 if (type == URTW_LED_GPIO) { 3688 switch (sc->sc_gpio_ledpin) { 3689 case URTW_LED_PIN_GPIO0: 3690 urtw_write8_m(sc, URTW_GPIO, URTW_GPIO_DATA_MAGIC1); 3691 urtw_write8_m(sc, 3692 URTW_GP_ENABLE, URTW_GP_ENABLE_DATA_MAGIC1); 3693 break; 3694 default: 3695 DPRINTF(sc, URTW_DEBUG_STATE, 3696 "unsupported LED PIN type 0x%x", 3697 sc->sc_gpio_ledpin); 3698 error = USB_ERR_INVAL; 3699 goto fail; 3700 } 3701 } else { 3702 DPRINTF(sc, URTW_DEBUG_STATE, 3703 "unsupported LED type 0x%x", type); 3704 error = USB_ERR_INVAL; 3705 goto fail; 3706 } 3707 3708 sc->sc_gpio_ledon = 0; 3709 3710fail: 3711 return (error); 3712} 3713 3714static void 3715urtw_led_ch(void *arg) 3716{ 3717 struct urtw_softc *sc = arg; 3718 struct ieee80211com *ic = &sc->sc_ic; 3719 3720 ieee80211_runtask(ic, &sc->sc_led_task); 3721} 3722 3723static void 3724urtw_ledtask(void *arg, int pending) 3725{ 3726 struct urtw_softc *sc = arg; 3727 3728 if (sc->sc_strategy != URTW_SW_LED_MODE0) { 3729 DPRINTF(sc, URTW_DEBUG_STATE, 3730 "could not process a LED strategy 0x%x", 3731 sc->sc_strategy); 3732 return; 3733 } 3734 3735 URTW_LOCK(sc); 3736 urtw_led_blink(sc); 3737 URTW_UNLOCK(sc); 3738} 3739 3740static usb_error_t 3741urtw_led_blink(struct urtw_softc *sc) 3742{ 3743 uint8_t ing = 0; 3744 usb_error_t error; 3745 3746 if (sc->sc_gpio_blinkstate == URTW_LED_ON) 3747 error = urtw_led_on(sc, URTW_LED_GPIO); 3748 else 3749 error = urtw_led_off(sc, URTW_LED_GPIO); 3750 sc->sc_gpio_blinktime--; 3751 if (sc->sc_gpio_blinktime == 0) 3752 ing = 1; 3753 else { 3754 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL && 3755 sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY && 3756 sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3) 3757 ing = 1; 3758 } 3759 if (ing == 1) { 3760 if (sc->sc_gpio_ledstate == URTW_LED_ON && 3761 sc->sc_gpio_ledon == 0) 3762 error = urtw_led_on(sc, URTW_LED_GPIO); 3763 else if (sc->sc_gpio_ledstate == URTW_LED_OFF && 3764 sc->sc_gpio_ledon == 1) 3765 error = urtw_led_off(sc, URTW_LED_GPIO); 3766 3767 sc->sc_gpio_blinktime = 0; 3768 sc->sc_gpio_ledinprogress = 0; 3769 return (0); 3770 } 3771 3772 sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ? 3773 URTW_LED_ON : URTW_LED_OFF; 3774 3775 switch (sc->sc_gpio_ledstate) { 3776 case URTW_LED_BLINK_NORMAL: 3777 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3778 break; 3779 default: 3780 DPRINTF(sc, URTW_DEBUG_STATE, 3781 "unknown LED status 0x%x", 3782 sc->sc_gpio_ledstate); 3783 return (USB_ERR_INVAL); 3784 } 3785 return (0); 3786} 3787 3788static usb_error_t 3789urtw_rx_enable(struct urtw_softc *sc) 3790{ 3791 uint8_t data; 3792 usb_error_t error; 3793 3794 usbd_transfer_start((sc->sc_flags & URTW_RTL8187B) ? 3795 sc->sc_xfer[URTW_8187B_BULK_RX] : sc->sc_xfer[URTW_8187L_BULK_RX]); 3796 3797 error = urtw_rx_setconf(sc); 3798 if (error != 0) 3799 goto fail; 3800 3801 if ((sc->sc_flags & URTW_RTL8187B) == 0) { 3802 urtw_read8_m(sc, URTW_CMD, &data); 3803 urtw_write8_m(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE); 3804 } 3805fail: 3806 return (error); 3807} 3808 3809static usb_error_t 3810urtw_tx_enable(struct urtw_softc *sc) 3811{ 3812 uint8_t data8; 3813 uint32_t data; 3814 usb_error_t error; 3815 3816 if (sc->sc_flags & URTW_RTL8187B) { 3817 urtw_read32_m(sc, URTW_TX_CONF, &data); 3818 data &= ~URTW_TX_LOOPBACK_MASK; 3819 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3820 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3821 data &= ~URTW_TX_SWPLCPLEN; 3822 data |= URTW_TX_HW_SEQNUM | URTW_TX_DISREQQSIZE | 3823 (7 << 8) | /* short retry limit */ 3824 (7 << 0) | /* long retry limit */ 3825 (7 << 21); /* MAX TX DMA */ 3826 urtw_write32_m(sc, URTW_TX_CONF, data); 3827 3828 urtw_read8_m(sc, URTW_MSR, &data8); 3829 data8 |= URTW_MSR_LINK_ENEDCA; 3830 urtw_write8_m(sc, URTW_MSR, data8); 3831 return (error); 3832 } 3833 3834 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3835 data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY); 3836 urtw_write8_m(sc, URTW_CW_CONF, data8); 3837 3838 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3839 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN; 3840 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 3841 data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT; 3842 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3843 3844 urtw_read32_m(sc, URTW_TX_CONF, &data); 3845 data &= ~URTW_TX_LOOPBACK_MASK; 3846 data |= URTW_TX_LOOPBACK_NONE; 3847 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3848 data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT; 3849 data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT; 3850 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3851 data |= URTW_TX_MXDMA_2048 | URTW_TX_CWMIN | URTW_TX_DISCW; 3852 data &= ~URTW_TX_SWPLCPLEN; 3853 data |= URTW_TX_NOICV; 3854 urtw_write32_m(sc, URTW_TX_CONF, data); 3855 3856 urtw_read8_m(sc, URTW_CMD, &data8); 3857 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 3858fail: 3859 return (error); 3860} 3861 3862static usb_error_t 3863urtw_rx_setconf(struct urtw_softc *sc) 3864{ 3865 struct ieee80211com *ic = &sc->sc_ic; 3866 uint32_t data; 3867 usb_error_t error; 3868 3869 urtw_read32_m(sc, URTW_RX, &data); 3870 data = data &~ URTW_RX_FILTER_MASK; 3871 if (sc->sc_flags & URTW_RTL8187B) { 3872 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA | 3873 URTW_RX_FILTER_MCAST | URTW_RX_FILTER_BCAST | 3874 URTW_RX_FILTER_NICMAC | URTW_RX_CHECK_BSSID | 3875 URTW_RX_FIFO_THRESHOLD_NONE | 3876 URTW_MAX_RX_DMA_2048 | 3877 URTW_RX_AUTORESETPHY | URTW_RCR_ONLYERLPKT; 3878 } else { 3879 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA; 3880 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST; 3881 3882 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 3883 data = data | URTW_RX_FILTER_ICVERR; 3884 data = data | URTW_RX_FILTER_PWR; 3885 } 3886 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR) 3887 data = data | URTW_RX_FILTER_CRCERR; 3888 3889 if (ic->ic_opmode == IEEE80211_M_MONITOR || 3890 ic->ic_promisc > 0 || ic->ic_allmulti > 0) { 3891 data = data | URTW_RX_FILTER_ALLMAC; 3892 } else { 3893 data = data | URTW_RX_FILTER_NICMAC; 3894 data = data | URTW_RX_CHECK_BSSID; 3895 } 3896 3897 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK; 3898 data = data | URTW_RX_FIFO_THRESHOLD_NONE | 3899 URTW_RX_AUTORESETPHY; 3900 data = data &~ URTW_MAX_RX_DMA_MASK; 3901 data = data | URTW_MAX_RX_DMA_2048 | URTW_RCR_ONLYERLPKT; 3902 } 3903 3904 urtw_write32_m(sc, URTW_RX, data); 3905fail: 3906 return (error); 3907} 3908 3909static struct mbuf * 3910urtw_rxeof(struct usb_xfer *xfer, struct urtw_data *data, int *rssi_p, 3911 int8_t *nf_p) 3912{ 3913 int actlen, flen, rssi; 3914 struct ieee80211_frame *wh; 3915 struct mbuf *m, *mnew; 3916 struct urtw_softc *sc = data->sc; 3917 struct ieee80211com *ic = &sc->sc_ic; 3918 uint8_t noise = 0, rate; 3919 3920 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 3921 3922 if (actlen < (int)URTW_MIN_RXBUFSZ) { 3923 counter_u64_add(ic->ic_ierrors, 1); 3924 return (NULL); 3925 } 3926 3927 if (sc->sc_flags & URTW_RTL8187B) { 3928 struct urtw_8187b_rxhdr *rx; 3929 3930 rx = (struct urtw_8187b_rxhdr *)(data->buf + 3931 (actlen - (sizeof(struct urtw_8187b_rxhdr)))); 3932 flen = le32toh(rx->flag) & 0xfff; 3933 if (flen > actlen) { 3934 counter_u64_add(ic->ic_ierrors, 1); 3935 return (NULL); 3936 } 3937 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf; 3938 /* XXX correct? */ 3939 rssi = rx->rssi & URTW_RX_RSSI_MASK; 3940 noise = rx->noise; 3941 } else { 3942 struct urtw_8187l_rxhdr *rx; 3943 3944 rx = (struct urtw_8187l_rxhdr *)(data->buf + 3945 (actlen - (sizeof(struct urtw_8187l_rxhdr)))); 3946 flen = le32toh(rx->flag) & 0xfff; 3947 if (flen > actlen) { 3948 counter_u64_add(ic->ic_ierrors, 1); 3949 return (NULL); 3950 } 3951 3952 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf; 3953 /* XXX correct? */ 3954 rssi = rx->rssi & URTW_RX_8187L_RSSI_MASK; 3955 noise = rx->noise; 3956 } 3957 3958 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 3959 if (mnew == NULL) { 3960 counter_u64_add(ic->ic_ierrors, 1); 3961 return (NULL); 3962 } 3963 3964 m = data->m; 3965 data->m = mnew; 3966 data->buf = mtod(mnew, uint8_t *); 3967 3968 /* finalize mbuf */ 3969 m->m_pkthdr.len = m->m_len = flen - IEEE80211_CRC_LEN; 3970 3971 if (ieee80211_radiotap_active(ic)) { 3972 struct urtw_rx_radiotap_header *tap = &sc->sc_rxtap; 3973 3974 /* XXX Are variables correct? */ 3975 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 3976 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 3977 tap->wr_dbm_antsignal = (int8_t)rssi; 3978 } 3979 3980 wh = mtod(m, struct ieee80211_frame *); 3981 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_DATA) 3982 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate; 3983 3984 *rssi_p = rssi; 3985 *nf_p = noise; /* XXX correct? */ 3986 3987 return (m); 3988} 3989 3990static void 3991urtw_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 3992{ 3993 struct urtw_softc *sc = usbd_xfer_softc(xfer); 3994 struct ieee80211com *ic = &sc->sc_ic; 3995 struct ieee80211_frame *wh; 3996 struct ieee80211_node *ni; 3997 struct mbuf *m = NULL; 3998 struct urtw_data *data; 3999 int8_t nf = -95; 4000 int rssi = 1; 4001 4002 URTW_ASSERT_LOCKED(sc); 4003 4004 switch (USB_GET_STATE(xfer)) { 4005 case USB_ST_TRANSFERRED: 4006 data = STAILQ_FIRST(&sc->sc_rx_active); 4007 if (data == NULL) 4008 goto setup; 4009 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4010 m = urtw_rxeof(xfer, data, &rssi, &nf); 4011 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4012 /* FALLTHROUGH */ 4013 case USB_ST_SETUP: 4014setup: 4015 data = STAILQ_FIRST(&sc->sc_rx_inactive); 4016 if (data == NULL) { 4017 KASSERT(m == NULL, ("mbuf isn't NULL")); 4018 return; 4019 } 4020 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 4021 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 4022 usbd_xfer_set_frame_data(xfer, 0, data->buf, 4023 usbd_xfer_max_len(xfer)); 4024 usbd_transfer_submit(xfer); 4025 4026 /* 4027 * To avoid LOR we should unlock our private mutex here to call 4028 * ieee80211_input() because here is at the end of a USB 4029 * callback and safe to unlock. 4030 */ 4031 URTW_UNLOCK(sc); 4032 if (m != NULL) { 4033 wh = mtod(m, struct ieee80211_frame *); 4034 ni = ieee80211_find_rxnode(ic, 4035 (struct ieee80211_frame_min *)wh); 4036 if (ni != NULL) { 4037 (void) ieee80211_input(ni, m, rssi, nf); 4038 /* node is no longer needed */ 4039 ieee80211_free_node(ni); 4040 } else 4041 (void) ieee80211_input_all(ic, m, rssi, nf); 4042 m = NULL; 4043 } 4044 URTW_LOCK(sc); 4045 break; 4046 default: 4047 /* needs it to the inactive queue due to a error. */ 4048 data = STAILQ_FIRST(&sc->sc_rx_active); 4049 if (data != NULL) { 4050 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4051 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4052 } 4053 if (error != USB_ERR_CANCELLED) { 4054 usbd_xfer_set_stall(xfer); 4055 counter_u64_add(ic->ic_ierrors, 1); 4056 goto setup; 4057 } 4058 break; 4059 } 4060} 4061 4062#define URTW_STATUS_TYPE_TXCLOSE 1 4063#define URTW_STATUS_TYPE_BEACON_INTR 0 4064 4065static void 4066urtw_txstatus_eof(struct usb_xfer *xfer) 4067{ 4068 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4069 struct ieee80211com *ic = &sc->sc_ic; 4070 int actlen, type, pktretry, seq; 4071 uint64_t val; 4072 4073 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 4074 4075 if (actlen != sizeof(uint64_t)) 4076 return; 4077 4078 val = le64toh(sc->sc_txstatus); 4079 type = (val >> 30) & 0x3; 4080 if (type == URTW_STATUS_TYPE_TXCLOSE) { 4081 pktretry = val & 0xff; 4082 seq = (val >> 16) & 0xff; 4083 if (pktretry == URTW_TX_MAXRETRY) 4084 counter_u64_add(ic->ic_oerrors, 1); 4085 DPRINTF(sc, URTW_DEBUG_TXSTATUS, "pktretry %d seq %#x\n", 4086 pktretry, seq); 4087 } 4088} 4089 4090static void 4091urtw_bulk_tx_status_callback(struct usb_xfer *xfer, usb_error_t error) 4092{ 4093 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4094 struct ieee80211com *ic = &sc->sc_ic; 4095 void *dma_buf = usbd_xfer_get_frame_buffer(xfer, 0); 4096 4097 URTW_ASSERT_LOCKED(sc); 4098 4099 switch (USB_GET_STATE(xfer)) { 4100 case USB_ST_TRANSFERRED: 4101 urtw_txstatus_eof(xfer); 4102 /* FALLTHROUGH */ 4103 case USB_ST_SETUP: 4104setup: 4105 memcpy(dma_buf, &sc->sc_txstatus, sizeof(uint64_t)); 4106 usbd_xfer_set_frame_len(xfer, 0, sizeof(uint64_t)); 4107 usbd_transfer_submit(xfer); 4108 break; 4109 default: 4110 if (error != USB_ERR_CANCELLED) { 4111 usbd_xfer_set_stall(xfer); 4112 counter_u64_add(ic->ic_ierrors, 1); 4113 goto setup; 4114 } 4115 break; 4116 } 4117} 4118 4119static void 4120urtw_txeof(struct usb_xfer *xfer, struct urtw_data *data) 4121{ 4122 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4123 4124 URTW_ASSERT_LOCKED(sc); 4125 4126 if (data->m) { 4127 /* XXX status? */ 4128 ieee80211_tx_complete(data->ni, data->m, 0); 4129 data->m = NULL; 4130 data->ni = NULL; 4131 } 4132 sc->sc_txtimer = 0; 4133} 4134 4135static void 4136urtw_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 4137{ 4138 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4139 struct urtw_data *data; 4140 4141 URTW_ASSERT_LOCKED(sc); 4142 4143 switch (USB_GET_STATE(xfer)) { 4144 case USB_ST_TRANSFERRED: 4145 data = STAILQ_FIRST(&sc->sc_tx_active); 4146 if (data == NULL) 4147 goto setup; 4148 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 4149 urtw_txeof(xfer, data); 4150 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 4151 /* FALLTHROUGH */ 4152 case USB_ST_SETUP: 4153setup: 4154 data = STAILQ_FIRST(&sc->sc_tx_pending); 4155 if (data == NULL) { 4156 DPRINTF(sc, URTW_DEBUG_XMIT, 4157 "%s: empty pending queue\n", __func__); 4158 return; 4159 } 4160 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 4161 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 4162 4163 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 4164 usbd_transfer_submit(xfer); 4165 4166 urtw_start(sc); 4167 break; 4168 default: 4169 data = STAILQ_FIRST(&sc->sc_tx_active); 4170 if (data == NULL) 4171 goto setup; 4172 if (data->ni != NULL) { 4173 if_inc_counter(data->ni->ni_vap->iv_ifp, 4174 IFCOUNTER_OERRORS, 1); 4175 ieee80211_free_node(data->ni); 4176 data->ni = NULL; 4177 } 4178 if (error != USB_ERR_CANCELLED) { 4179 usbd_xfer_set_stall(xfer); 4180 goto setup; 4181 } 4182 break; 4183 } 4184} 4185 4186static struct urtw_data * 4187_urtw_getbuf(struct urtw_softc *sc) 4188{ 4189 struct urtw_data *bf; 4190 4191 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 4192 if (bf != NULL) 4193 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 4194 else 4195 bf = NULL; 4196 if (bf == NULL) 4197 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: %s\n", __func__, 4198 "out of xmit buffers"); 4199 return (bf); 4200} 4201 4202static struct urtw_data * 4203urtw_getbuf(struct urtw_softc *sc) 4204{ 4205 struct urtw_data *bf; 4206 4207 URTW_ASSERT_LOCKED(sc); 4208 4209 bf = _urtw_getbuf(sc); 4210 if (bf == NULL) 4211 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: stop queue\n", __func__); 4212 return (bf); 4213} 4214 4215static int 4216urtw_isbmode(uint16_t rate) 4217{ 4218 4219 return ((rate <= 22 && rate != 12 && rate != 18) || 4220 rate == 44) ? (1) : (0); 4221} 4222 4223static uint16_t 4224urtw_rate2dbps(uint16_t rate) 4225{ 4226 4227 switch(rate) { 4228 case 12: 4229 case 18: 4230 case 24: 4231 case 36: 4232 case 48: 4233 case 72: 4234 case 96: 4235 case 108: 4236 return (rate * 2); 4237 default: 4238 break; 4239 } 4240 return (24); 4241} 4242 4243static int 4244urtw_compute_txtime(uint16_t framelen, uint16_t rate, 4245 uint8_t ismgt, uint8_t isshort) 4246{ 4247 uint16_t ceiling, frametime, n_dbps; 4248 4249 if (urtw_isbmode(rate)) { 4250 if (ismgt || !isshort || rate == 2) 4251 frametime = (uint16_t)(144 + 48 + 4252 (framelen * 8 / (rate / 2))); 4253 else 4254 frametime = (uint16_t)(72 + 24 + 4255 (framelen * 8 / (rate / 2))); 4256 if ((framelen * 8 % (rate / 2)) != 0) 4257 frametime++; 4258 } else { 4259 n_dbps = urtw_rate2dbps(rate); 4260 ceiling = (16 + 8 * framelen + 6) / n_dbps 4261 + (((16 + 8 * framelen + 6) % n_dbps) ? 1 : 0); 4262 frametime = (uint16_t)(16 + 4 + 4 * ceiling + 6); 4263 } 4264 return (frametime); 4265} 4266 4267/* 4268 * Callback from the 802.11 layer to update the 4269 * slot time based on the current setting. 4270 */ 4271static void 4272urtw_updateslot(struct ieee80211com *ic) 4273{ 4274 struct urtw_softc *sc = ic->ic_softc; 4275 4276 ieee80211_runtask(ic, &sc->sc_updateslot_task); 4277} 4278 4279static void 4280urtw_updateslottask(void *arg, int pending) 4281{ 4282 struct urtw_softc *sc = arg; 4283 struct ieee80211com *ic = &sc->sc_ic; 4284 int error; 4285 4286 URTW_LOCK(sc); 4287 if ((sc->sc_flags & URTW_RUNNING) == 0) { 4288 URTW_UNLOCK(sc); 4289 return; 4290 } 4291 if (sc->sc_flags & URTW_RTL8187B) { 4292 urtw_write8_m(sc, URTW_SIFS, 0x22); 4293 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) 4294 urtw_write8_m(sc, URTW_SLOT, 0x9); 4295 else 4296 urtw_write8_m(sc, URTW_SLOT, 0x14); 4297 urtw_write8_m(sc, URTW_8187B_EIFS, 0x5b); 4298 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 0x5b); 4299 } else { 4300 urtw_write8_m(sc, URTW_SIFS, 0x22); 4301 if (sc->sc_state == IEEE80211_S_ASSOC && 4302 ic->ic_flags & IEEE80211_F_SHSLOT) 4303 urtw_write8_m(sc, URTW_SLOT, 0x9); 4304 else 4305 urtw_write8_m(sc, URTW_SLOT, 0x14); 4306 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) { 4307 urtw_write8_m(sc, URTW_DIFS, 0x14); 4308 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14); 4309 urtw_write8_m(sc, URTW_CW_VAL, 0x73); 4310 } else { 4311 urtw_write8_m(sc, URTW_DIFS, 0x24); 4312 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24); 4313 urtw_write8_m(sc, URTW_CW_VAL, 0xa5); 4314 } 4315 } 4316fail: 4317 URTW_UNLOCK(sc); 4318} 4319 4320static void 4321urtw_sysctl_node(struct urtw_softc *sc) 4322{ 4323#define URTW_SYSCTL_STAT_ADD32(c, h, n, p, d) \ 4324 SYSCTL_ADD_UINT(c, h, OID_AUTO, n, CTLFLAG_RD, p, 0, d) 4325 struct sysctl_ctx_list *ctx; 4326 struct sysctl_oid_list *child, *parent; 4327 struct sysctl_oid *tree; 4328 struct urtw_stats *stats = &sc->sc_stats; 4329 4330 ctx = device_get_sysctl_ctx(sc->sc_dev); 4331 child = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->sc_dev)); 4332 4333 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD, 4334 NULL, "URTW statistics"); 4335 parent = SYSCTL_CHILDREN(tree); 4336 4337 /* Tx statistics. */ 4338 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "tx", CTLFLAG_RD, 4339 NULL, "Tx MAC statistics"); 4340 child = SYSCTL_CHILDREN(tree); 4341 URTW_SYSCTL_STAT_ADD32(ctx, child, "1m", &stats->txrates[0], 4342 "1 Mbit/s"); 4343 URTW_SYSCTL_STAT_ADD32(ctx, child, "2m", &stats->txrates[1], 4344 "2 Mbit/s"); 4345 URTW_SYSCTL_STAT_ADD32(ctx, child, "5.5m", &stats->txrates[2], 4346 "5.5 Mbit/s"); 4347 URTW_SYSCTL_STAT_ADD32(ctx, child, "6m", &stats->txrates[4], 4348 "6 Mbit/s"); 4349 URTW_SYSCTL_STAT_ADD32(ctx, child, "9m", &stats->txrates[5], 4350 "9 Mbit/s"); 4351 URTW_SYSCTL_STAT_ADD32(ctx, child, "11m", &stats->txrates[3], 4352 "11 Mbit/s"); 4353 URTW_SYSCTL_STAT_ADD32(ctx, child, "12m", &stats->txrates[6], 4354 "12 Mbit/s"); 4355 URTW_SYSCTL_STAT_ADD32(ctx, child, "18m", &stats->txrates[7], 4356 "18 Mbit/s"); 4357 URTW_SYSCTL_STAT_ADD32(ctx, child, "24m", &stats->txrates[8], 4358 "24 Mbit/s"); 4359 URTW_SYSCTL_STAT_ADD32(ctx, child, "36m", &stats->txrates[9], 4360 "36 Mbit/s"); 4361 URTW_SYSCTL_STAT_ADD32(ctx, child, "48m", &stats->txrates[10], 4362 "48 Mbit/s"); 4363 URTW_SYSCTL_STAT_ADD32(ctx, child, "54m", &stats->txrates[11], 4364 "54 Mbit/s"); 4365#undef URTW_SYSCTL_STAT_ADD32 4366} 4367 4368static device_method_t urtw_methods[] = { 4369 DEVMETHOD(device_probe, urtw_match), 4370 DEVMETHOD(device_attach, urtw_attach), 4371 DEVMETHOD(device_detach, urtw_detach), 4372 DEVMETHOD_END 4373}; 4374static driver_t urtw_driver = { 4375 .name = "urtw", 4376 .methods = urtw_methods, 4377 .size = sizeof(struct urtw_softc) 4378}; 4379static devclass_t urtw_devclass; 4380 4381DRIVER_MODULE(urtw, uhub, urtw_driver, urtw_devclass, NULL, 0); 4382MODULE_DEPEND(urtw, wlan, 1, 1, 1); 4383MODULE_DEPEND(urtw, usb, 1, 1, 1); 4384MODULE_VERSION(urtw, 1); 4385USB_PNP_HOST_INFO(urtw_devs); 4386