if_urtw.c revision 286950
1/*- 2 * Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org> 3 * 4 * Permission to use, copy, modify, and distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#include <sys/cdefs.h> 18__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_urtw.c 286950 2015-08-20 05:13:54Z adrian $"); 19#include <sys/param.h> 20#include <sys/sockio.h> 21#include <sys/sysctl.h> 22#include <sys/lock.h> 23#include <sys/mutex.h> 24#include <sys/mbuf.h> 25#include <sys/kernel.h> 26#include <sys/socket.h> 27#include <sys/systm.h> 28#include <sys/malloc.h> 29#include <sys/module.h> 30#include <sys/bus.h> 31#include <sys/endian.h> 32#include <sys/kdb.h> 33 34#include <machine/bus.h> 35#include <machine/resource.h> 36#include <sys/rman.h> 37 38#include <net/if.h> 39#include <net/if_var.h> 40#include <net/if_arp.h> 41#include <net/ethernet.h> 42#include <net/if_dl.h> 43#include <net/if_media.h> 44#include <net/if_types.h> 45 46#ifdef INET 47#include <netinet/in.h> 48#include <netinet/in_systm.h> 49#include <netinet/in_var.h> 50#include <netinet/if_ether.h> 51#include <netinet/ip.h> 52#endif 53 54#include <net80211/ieee80211_var.h> 55#include <net80211/ieee80211_regdomain.h> 56#include <net80211/ieee80211_radiotap.h> 57 58#include <dev/usb/usb.h> 59#include <dev/usb/usbdi.h> 60#include "usbdevs.h" 61 62#include <dev/usb/wlan/if_urtwreg.h> 63#include <dev/usb/wlan/if_urtwvar.h> 64 65static SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW, 0, "USB Realtek 8187L"); 66#ifdef URTW_DEBUG 67int urtw_debug = 0; 68SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RWTUN, &urtw_debug, 0, 69 "control debugging printfs"); 70enum { 71 URTW_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 72 URTW_DEBUG_RECV = 0x00000002, /* basic recv operation */ 73 URTW_DEBUG_RESET = 0x00000004, /* reset processing */ 74 URTW_DEBUG_TX_PROC = 0x00000008, /* tx ISR proc */ 75 URTW_DEBUG_RX_PROC = 0x00000010, /* rx ISR proc */ 76 URTW_DEBUG_STATE = 0x00000020, /* 802.11 state transitions */ 77 URTW_DEBUG_STAT = 0x00000040, /* statistic */ 78 URTW_DEBUG_INIT = 0x00000080, /* initialization of dev */ 79 URTW_DEBUG_TXSTATUS = 0x00000100, /* tx status */ 80 URTW_DEBUG_ANY = 0xffffffff 81}; 82#define DPRINTF(sc, m, fmt, ...) do { \ 83 if (sc->sc_debug & (m)) \ 84 printf(fmt, __VA_ARGS__); \ 85} while (0) 86#else 87#define DPRINTF(sc, m, fmt, ...) do { \ 88 (void) sc; \ 89} while (0) 90#endif 91static int urtw_preamble_mode = URTW_PREAMBLE_MODE_LONG; 92SYSCTL_INT(_hw_usb_urtw, OID_AUTO, preamble_mode, CTLFLAG_RWTUN, 93 &urtw_preamble_mode, 0, "set the preable mode (long or short)"); 94 95/* recognized device vendors/products */ 96#define urtw_lookup(v, p) \ 97 ((const struct urtw_type *)usb_lookup(urtw_devs, v, p)) 98#define URTW_DEV_B(v,p) \ 99 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187B) } 100#define URTW_DEV_L(v,p) \ 101 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187L) } 102#define URTW_REV_RTL8187B 0 103#define URTW_REV_RTL8187L 1 104static const STRUCT_USB_HOST_ID urtw_devs[] = { 105 URTW_DEV_B(NETGEAR, WG111V3), 106 URTW_DEV_B(REALTEK, RTL8187B_0), 107 URTW_DEV_B(REALTEK, RTL8187B_1), 108 URTW_DEV_B(REALTEK, RTL8187B_2), 109 URTW_DEV_B(SITECOMEU, WL168V4), 110 URTW_DEV_L(ASUS, P5B_WIFI), 111 URTW_DEV_L(BELKIN, F5D7050E), 112 URTW_DEV_L(LINKSYS4, WUSB54GCV2), 113 URTW_DEV_L(NETGEAR, WG111V2), 114 URTW_DEV_L(REALTEK, RTL8187), 115 URTW_DEV_L(SITECOMEU, WL168V1), 116 URTW_DEV_L(SURECOM, EP9001G2A), 117 { USB_VPI(USB_VENDOR_OVISLINK, 0x8187, URTW_REV_RTL8187L) }, 118 { USB_VPI(USB_VENDOR_DICKSMITH, 0x9401, URTW_REV_RTL8187L) }, 119 { USB_VPI(USB_VENDOR_HP, 0xca02, URTW_REV_RTL8187L) }, 120 { USB_VPI(USB_VENDOR_LOGITEC, 0x010c, URTW_REV_RTL8187L) }, 121 { USB_VPI(USB_VENDOR_NETGEAR, 0x6100, URTW_REV_RTL8187L) }, 122 { USB_VPI(USB_VENDOR_SPHAIRON, 0x0150, URTW_REV_RTL8187L) }, 123 { USB_VPI(USB_VENDOR_QCOM, 0x6232, URTW_REV_RTL8187L) }, 124#undef URTW_DEV_L 125#undef URTW_DEV_B 126}; 127 128#define urtw_read8_m(sc, val, data) do { \ 129 error = urtw_read8_c(sc, val, data); \ 130 if (error != 0) \ 131 goto fail; \ 132} while (0) 133#define urtw_write8_m(sc, val, data) do { \ 134 error = urtw_write8_c(sc, val, data); \ 135 if (error != 0) \ 136 goto fail; \ 137} while (0) 138#define urtw_read16_m(sc, val, data) do { \ 139 error = urtw_read16_c(sc, val, data); \ 140 if (error != 0) \ 141 goto fail; \ 142} while (0) 143#define urtw_write16_m(sc, val, data) do { \ 144 error = urtw_write16_c(sc, val, data); \ 145 if (error != 0) \ 146 goto fail; \ 147} while (0) 148#define urtw_read32_m(sc, val, data) do { \ 149 error = urtw_read32_c(sc, val, data); \ 150 if (error != 0) \ 151 goto fail; \ 152} while (0) 153#define urtw_write32_m(sc, val, data) do { \ 154 error = urtw_write32_c(sc, val, data); \ 155 if (error != 0) \ 156 goto fail; \ 157} while (0) 158#define urtw_8187_write_phy_ofdm(sc, val, data) do { \ 159 error = urtw_8187_write_phy_ofdm_c(sc, val, data); \ 160 if (error != 0) \ 161 goto fail; \ 162} while (0) 163#define urtw_8187_write_phy_cck(sc, val, data) do { \ 164 error = urtw_8187_write_phy_cck_c(sc, val, data); \ 165 if (error != 0) \ 166 goto fail; \ 167} while (0) 168#define urtw_8225_write(sc, val, data) do { \ 169 error = urtw_8225_write_c(sc, val, data); \ 170 if (error != 0) \ 171 goto fail; \ 172} while (0) 173 174struct urtw_pair { 175 uint32_t reg; 176 uint32_t val; 177}; 178 179static uint8_t urtw_8225_agc[] = { 180 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b, 181 0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 182 0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85, 183 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a, 184 0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 185 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24, 186 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 187 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 188 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 189 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 190 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 191 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 192}; 193 194static uint8_t urtw_8225z2_agc[] = { 195 0x5e, 0x5e, 0x5e, 0x5e, 0x5d, 0x5b, 0x59, 0x57, 0x55, 0x53, 0x51, 196 0x4f, 0x4d, 0x4b, 0x49, 0x47, 0x45, 0x43, 0x41, 0x3f, 0x3d, 0x3b, 197 0x39, 0x37, 0x35, 0x33, 0x31, 0x2f, 0x2d, 0x2b, 0x29, 0x27, 0x25, 198 0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 0x15, 0x13, 0x11, 0x0f, 199 0x0d, 0x0b, 0x09, 0x07, 0x05, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 200 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x19, 0x19, 201 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x20, 0x21, 0x22, 0x23, 202 0x24, 0x25, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29, 0x2a, 0x2a, 203 0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2d, 204 0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x31, 0x31, 205 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 206 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31 207}; 208 209static uint32_t urtw_8225_channel[] = { 210 0x0000, /* dummy channel 0 */ 211 0x085c, /* 1 */ 212 0x08dc, /* 2 */ 213 0x095c, /* 3 */ 214 0x09dc, /* 4 */ 215 0x0a5c, /* 5 */ 216 0x0adc, /* 6 */ 217 0x0b5c, /* 7 */ 218 0x0bdc, /* 8 */ 219 0x0c5c, /* 9 */ 220 0x0cdc, /* 10 */ 221 0x0d5c, /* 11 */ 222 0x0ddc, /* 12 */ 223 0x0e5c, /* 13 */ 224 0x0f72, /* 14 */ 225}; 226 227static uint8_t urtw_8225_gain[] = { 228 0x23, 0x88, 0x7c, 0xa5, /* -82dbm */ 229 0x23, 0x88, 0x7c, 0xb5, /* -82dbm */ 230 0x23, 0x88, 0x7c, 0xc5, /* -82dbm */ 231 0x33, 0x80, 0x79, 0xc5, /* -78dbm */ 232 0x43, 0x78, 0x76, 0xc5, /* -74dbm */ 233 0x53, 0x60, 0x73, 0xc5, /* -70dbm */ 234 0x63, 0x58, 0x70, 0xc5, /* -66dbm */ 235}; 236 237static struct urtw_pair urtw_8225_rf_part1[] = { 238 { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 239 { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a }, 240 { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 }, 241 { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 }, 242}; 243 244static struct urtw_pair urtw_8225_rf_part2[] = { 245 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 246 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 247 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 }, 248 { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 }, 249 { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 }, 250 { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, { 0x18, 0xef }, 251 { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x76 }, { 0x1c, 0x04 }, 252 { 0x1e, 0x95 }, { 0x1f, 0x75 }, { 0x20, 0x1f }, { 0x21, 0x27 }, 253 { 0x22, 0x16 }, { 0x24, 0x46 }, { 0x25, 0x20 }, { 0x26, 0x90 }, 254 { 0x27, 0x88 } 255}; 256 257static struct urtw_pair urtw_8225_rf_part3[] = { 258 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 259 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x10, 0x9b }, 260 { 0x11, 0x88 }, { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, 261 { 0x1a, 0xa0 }, { 0x1b, 0x08 }, { 0x40, 0x86 }, { 0x41, 0x8d }, 262 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x1f }, { 0x45, 0x1e }, 263 { 0x46, 0x1a }, { 0x47, 0x15 }, { 0x48, 0x10 }, { 0x49, 0x0a }, 264 { 0x4a, 0x05 }, { 0x4b, 0x02 }, { 0x4c, 0x05 } 265}; 266 267static uint16_t urtw_8225_rxgain[] = { 268 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 269 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 270 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 271 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 272 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 273 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 274 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 275 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 276 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 277 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 278 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3, 279 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb 280}; 281 282static uint8_t urtw_8225_threshold[] = { 283 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd, 284}; 285 286static uint8_t urtw_8225_tx_gain_cck_ofdm[] = { 287 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e 288}; 289 290static uint8_t urtw_8225_txpwr_cck[] = { 291 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02, 292 0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02, 293 0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02, 294 0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02, 295 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03, 296 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03 297}; 298 299static uint8_t urtw_8225_txpwr_cck_ch14[] = { 300 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00, 301 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00, 302 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00, 303 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00, 304 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00, 305 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00 306}; 307 308static uint8_t urtw_8225_txpwr_ofdm[]={ 309 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4 310}; 311 312static uint8_t urtw_8225v2_gain_bg[]={ 313 0x23, 0x15, 0xa5, /* -82-1dbm */ 314 0x23, 0x15, 0xb5, /* -82-2dbm */ 315 0x23, 0x15, 0xc5, /* -82-3dbm */ 316 0x33, 0x15, 0xc5, /* -78dbm */ 317 0x43, 0x15, 0xc5, /* -74dbm */ 318 0x53, 0x15, 0xc5, /* -70dbm */ 319 0x63, 0x15, 0xc5, /* -66dbm */ 320}; 321 322static struct urtw_pair urtw_8225v2_rf_part1[] = { 323 { 0x00, 0x02bf }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 324 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 325 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 326 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 327}; 328 329static struct urtw_pair urtw_8225v2b_rf_part0[] = { 330 { 0x00, 0x00b7 }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 331 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 332 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 333 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 334}; 335 336static struct urtw_pair urtw_8225v2b_rf_part1[] = { 337 {0x0f0, 0x32}, {0x0f1, 0x32}, {0x0f2, 0x00}, 338 {0x0f3, 0x00}, {0x0f4, 0x32}, {0x0f5, 0x43}, 339 {0x0f6, 0x00}, {0x0f7, 0x00}, {0x0f8, 0x46}, 340 {0x0f9, 0xa4}, {0x0fa, 0x00}, {0x0fb, 0x00}, 341 {0x0fc, 0x96}, {0x0fd, 0xa4}, {0x0fe, 0x00}, 342 {0x0ff, 0x00}, {0x158, 0x4b}, {0x159, 0x00}, 343 {0x15a, 0x4b}, {0x15b, 0x00}, {0x160, 0x4b}, 344 {0x161, 0x09}, {0x162, 0x4b}, {0x163, 0x09}, 345 {0x1ce, 0x0f}, {0x1cf, 0x00}, {0x1e0, 0xff}, 346 {0x1e1, 0x0f}, {0x1e2, 0x00}, {0x1f0, 0x4e}, 347 {0x1f1, 0x01}, {0x1f2, 0x02}, {0x1f3, 0x03}, 348 {0x1f4, 0x04}, {0x1f5, 0x05}, {0x1f6, 0x06}, 349 {0x1f7, 0x07}, {0x1f8, 0x08}, {0x24e, 0x00}, 350 {0x20c, 0x04}, {0x221, 0x61}, {0x222, 0x68}, 351 {0x223, 0x6f}, {0x224, 0x76}, {0x225, 0x7d}, 352 {0x226, 0x84}, {0x227, 0x8d}, {0x24d, 0x08}, 353 {0x250, 0x05}, {0x251, 0xf5}, {0x252, 0x04}, 354 {0x253, 0xa0}, {0x254, 0x1f}, {0x255, 0x23}, 355 {0x256, 0x45}, {0x257, 0x67}, {0x258, 0x08}, 356 {0x259, 0x08}, {0x25a, 0x08}, {0x25b, 0x08}, 357 {0x260, 0x08}, {0x261, 0x08}, {0x262, 0x08}, 358 {0x263, 0x08}, {0x264, 0xcf}, {0x272, 0x56}, 359 {0x273, 0x9a}, {0x034, 0xf0}, {0x035, 0x0f}, 360 {0x05b, 0x40}, {0x084, 0x88}, {0x085, 0x24}, 361 {0x088, 0x54}, {0x08b, 0xb8}, {0x08c, 0x07}, 362 {0x08d, 0x00}, {0x094, 0x1b}, {0x095, 0x12}, 363 {0x096, 0x00}, {0x097, 0x06}, {0x09d, 0x1a}, 364 {0x09f, 0x10}, {0x0b4, 0x22}, {0x0be, 0x80}, 365 {0x0db, 0x00}, {0x0ee, 0x00}, {0x091, 0x03}, 366 {0x24c, 0x00}, {0x39f, 0x00}, {0x08c, 0x01}, 367 {0x08d, 0x10}, {0x08e, 0x08}, {0x08f, 0x00} 368}; 369 370static struct urtw_pair urtw_8225v2_rf_part2[] = { 371 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 372 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 373 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x08 }, { 0x0b, 0x80 }, 374 { 0x0c, 0x01 }, { 0x0d, 0x43 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, 375 { 0x10, 0x84 }, { 0x11, 0x07 }, { 0x12, 0x20 }, { 0x13, 0x20 }, 376 { 0x14, 0x00 }, { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, 377 { 0x18, 0xef }, { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x15 }, 378 { 0x1c, 0x04 }, { 0x1d, 0xc5 }, { 0x1e, 0x95 }, { 0x1f, 0x75 }, 379 { 0x20, 0x1f }, { 0x21, 0x17 }, { 0x22, 0x16 }, { 0x23, 0x80 }, 380 { 0x24, 0x46 }, { 0x25, 0x00 }, { 0x26, 0x90 }, { 0x27, 0x88 } 381}; 382 383static struct urtw_pair urtw_8225v2b_rf_part2[] = { 384 { 0x00, 0x10 }, { 0x01, 0x0d }, { 0x02, 0x01 }, { 0x03, 0x00 }, 385 { 0x04, 0x14 }, { 0x05, 0xfb }, { 0x06, 0xfb }, { 0x07, 0x60 }, 386 { 0x08, 0x00 }, { 0x09, 0x60 }, { 0x0a, 0x00 }, { 0x0b, 0x00 }, 387 { 0x0c, 0x00 }, { 0x0d, 0x5c }, { 0x0e, 0x00 }, { 0x0f, 0x00 }, 388 { 0x10, 0x40 }, { 0x11, 0x00 }, { 0x12, 0x40 }, { 0x13, 0x00 }, 389 { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0xa8 }, { 0x17, 0x26 }, 390 { 0x18, 0x32 }, { 0x19, 0x33 }, { 0x1a, 0x07 }, { 0x1b, 0xa5 }, 391 { 0x1c, 0x6f }, { 0x1d, 0x55 }, { 0x1e, 0xc8 }, { 0x1f, 0xb3 }, 392 { 0x20, 0x0a }, { 0x21, 0xe1 }, { 0x22, 0x2C }, { 0x23, 0x8a }, 393 { 0x24, 0x86 }, { 0x25, 0x83 }, { 0x26, 0x34 }, { 0x27, 0x0f }, 394 { 0x28, 0x4f }, { 0x29, 0x24 }, { 0x2a, 0x6f }, { 0x2b, 0xc2 }, 395 { 0x2c, 0x6b }, { 0x2d, 0x40 }, { 0x2e, 0x80 }, { 0x2f, 0x00 }, 396 { 0x30, 0xc0 }, { 0x31, 0xc1 }, { 0x32, 0x58 }, { 0x33, 0xf1 }, 397 { 0x34, 0x00 }, { 0x35, 0xe4 }, { 0x36, 0x90 }, { 0x37, 0x3e }, 398 { 0x38, 0x6d }, { 0x39, 0x3c }, { 0x3a, 0xfb }, { 0x3b, 0x07 } 399}; 400 401static struct urtw_pair urtw_8225v2_rf_part3[] = { 402 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 403 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x09, 0x11 }, 404 { 0x0a, 0x17 }, { 0x0b, 0x11 }, { 0x10, 0x9b }, { 0x11, 0x88 }, 405 { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, { 0x1a, 0xa0 }, 406 { 0x1b, 0x08 }, { 0x1d, 0x00 }, { 0x40, 0x86 }, { 0x41, 0x9d }, 407 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x36 }, { 0x45, 0x35 }, 408 { 0x46, 0x2e }, { 0x47, 0x25 }, { 0x48, 0x1c }, { 0x49, 0x12 }, 409 { 0x4a, 0x09 }, { 0x4b, 0x04 }, { 0x4c, 0x05 } 410}; 411 412static uint16_t urtw_8225v2_rxgain[] = { 413 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009, 414 0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141, 415 0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183, 416 0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244, 417 0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288, 418 0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345, 419 0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389, 420 0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393, 421 0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d, 422 0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9, 423 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 424 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 425}; 426 427static uint16_t urtw_8225v2b_rxgain[] = { 428 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 429 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 430 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 431 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 432 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 433 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 434 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 435 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 436 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 437 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 438 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 439 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 440}; 441 442static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = { 443 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 444 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 445 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 446 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 447 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 448 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, 449}; 450 451static uint8_t urtw_8225v2_txpwr_cck[] = { 452 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04 453}; 454 455static uint8_t urtw_8225v2_txpwr_cck_ch14[] = { 456 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00 457}; 458 459static uint8_t urtw_8225v2b_txpwr_cck[] = { 460 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04, 461 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03, 462 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03, 463 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03 464}; 465 466static uint8_t urtw_8225v2b_txpwr_cck_ch14[] = { 467 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00, 468 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 469 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 470 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00 471}; 472 473static struct urtw_pair urtw_ratetable[] = { 474 { 2, 0 }, { 4, 1 }, { 11, 2 }, { 12, 4 }, { 18, 5 }, 475 { 22, 3 }, { 24, 6 }, { 36, 7 }, { 48, 8 }, { 72, 9 }, 476 { 96, 10 }, { 108, 11 } 477}; 478 479#if 0 480static const uint8_t urtw_8187b_reg_table[][3] = { 481 { 0xf0, 0x32, 0 }, { 0xf1, 0x32, 0 }, { 0xf2, 0x00, 0 }, 482 { 0xf3, 0x00, 0 }, { 0xf4, 0x32, 0 }, { 0xf5, 0x43, 0 }, 483 { 0xf6, 0x00, 0 }, { 0xf7, 0x00, 0 }, { 0xf8, 0x46, 0 }, 484 { 0xf9, 0xa4, 0 }, { 0xfa, 0x00, 0 }, { 0xfb, 0x00, 0 }, 485 { 0xfc, 0x96, 0 }, { 0xfd, 0xa4, 0 }, { 0xfe, 0x00, 0 }, 486 { 0xff, 0x00, 0 }, { 0x58, 0x4b, 1 }, { 0x59, 0x00, 1 }, 487 { 0x5a, 0x4b, 1 }, { 0x5b, 0x00, 1 }, { 0x60, 0x4b, 1 }, 488 { 0x61, 0x09, 1 }, { 0x62, 0x4b, 1 }, { 0x63, 0x09, 1 }, 489 { 0xce, 0x0f, 1 }, { 0xcf, 0x00, 1 }, { 0xe0, 0xff, 1 }, 490 { 0xe1, 0x0f, 1 }, { 0xe2, 0x00, 1 }, { 0xf0, 0x4e, 1 }, 491 { 0xf1, 0x01, 1 }, { 0xf2, 0x02, 1 }, { 0xf3, 0x03, 1 }, 492 { 0xf4, 0x04, 1 }, { 0xf5, 0x05, 1 }, { 0xf6, 0x06, 1 }, 493 { 0xf7, 0x07, 1 }, { 0xf8, 0x08, 1 }, { 0x4e, 0x00, 2 }, 494 { 0x0c, 0x04, 2 }, { 0x21, 0x61, 2 }, { 0x22, 0x68, 2 }, 495 { 0x23, 0x6f, 2 }, { 0x24, 0x76, 2 }, { 0x25, 0x7d, 2 }, 496 { 0x26, 0x84, 2 }, { 0x27, 0x8d, 2 }, { 0x4d, 0x08, 2 }, 497 { 0x50, 0x05, 2 }, { 0x51, 0xf5, 2 }, { 0x52, 0x04, 2 }, 498 { 0x53, 0xa0, 2 }, { 0x54, 0x1f, 2 }, { 0x55, 0x23, 2 }, 499 { 0x56, 0x45, 2 }, { 0x57, 0x67, 2 }, { 0x58, 0x08, 2 }, 500 { 0x59, 0x08, 2 }, { 0x5a, 0x08, 2 }, { 0x5b, 0x08, 2 }, 501 { 0x60, 0x08, 2 }, { 0x61, 0x08, 2 }, { 0x62, 0x08, 2 }, 502 { 0x63, 0x08, 2 }, { 0x64, 0xcf, 2 }, { 0x72, 0x56, 2 }, 503 { 0x73, 0x9a, 2 }, { 0x34, 0xf0, 0 }, { 0x35, 0x0f, 0 }, 504 { 0x5b, 0x40, 0 }, { 0x84, 0x88, 0 }, { 0x85, 0x24, 0 }, 505 { 0x88, 0x54, 0 }, { 0x8b, 0xb8, 0 }, { 0x8c, 0x07, 0 }, 506 { 0x8d, 0x00, 0 }, { 0x94, 0x1b, 0 }, { 0x95, 0x12, 0 }, 507 { 0x96, 0x00, 0 }, { 0x97, 0x06, 0 }, { 0x9d, 0x1a, 0 }, 508 { 0x9f, 0x10, 0 }, { 0xb4, 0x22, 0 }, { 0xbe, 0x80, 0 }, 509 { 0xdb, 0x00, 0 }, { 0xee, 0x00, 0 }, { 0x91, 0x03, 0 }, 510 { 0x4c, 0x00, 2 }, { 0x9f, 0x00, 3 }, { 0x8c, 0x01, 0 }, 511 { 0x8d, 0x10, 0 }, { 0x8e, 0x08, 0 }, { 0x8f, 0x00, 0 } 512}; 513#endif 514 515static usb_callback_t urtw_bulk_rx_callback; 516static usb_callback_t urtw_bulk_tx_callback; 517static usb_callback_t urtw_bulk_tx_status_callback; 518 519static const struct usb_config urtw_8187b_usbconfig[URTW_8187B_N_XFERS] = { 520 [URTW_8187B_BULK_RX] = { 521 .type = UE_BULK, 522 .endpoint = 0x83, 523 .direction = UE_DIR_IN, 524 .bufsize = MCLBYTES, 525 .flags = { 526 .ext_buffer = 1, 527 .pipe_bof = 1, 528 .short_xfer_ok = 1 529 }, 530 .callback = urtw_bulk_rx_callback 531 }, 532 [URTW_8187B_BULK_TX_STATUS] = { 533 .type = UE_BULK, 534 .endpoint = 0x89, 535 .direction = UE_DIR_IN, 536 .bufsize = sizeof(uint64_t), 537 .flags = { 538 .pipe_bof = 1, 539 .short_xfer_ok = 1 540 }, 541 .callback = urtw_bulk_tx_status_callback 542 }, 543 [URTW_8187B_BULK_TX_BE] = { 544 .type = UE_BULK, 545 .endpoint = URTW_8187B_TXPIPE_BE, 546 .direction = UE_DIR_OUT, 547 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT, 548 .flags = { 549 .force_short_xfer = 1, 550 .pipe_bof = 1, 551 }, 552 .callback = urtw_bulk_tx_callback, 553 .timeout = URTW_DATA_TIMEOUT 554 }, 555 [URTW_8187B_BULK_TX_BK] = { 556 .type = UE_BULK, 557 .endpoint = URTW_8187B_TXPIPE_BK, 558 .direction = UE_DIR_OUT, 559 .bufsize = URTW_TX_MAXSIZE, 560 .flags = { 561 .ext_buffer = 1, 562 .force_short_xfer = 1, 563 .pipe_bof = 1, 564 }, 565 .callback = urtw_bulk_tx_callback, 566 .timeout = URTW_DATA_TIMEOUT 567 }, 568 [URTW_8187B_BULK_TX_VI] = { 569 .type = UE_BULK, 570 .endpoint = URTW_8187B_TXPIPE_VI, 571 .direction = UE_DIR_OUT, 572 .bufsize = URTW_TX_MAXSIZE, 573 .flags = { 574 .ext_buffer = 1, 575 .force_short_xfer = 1, 576 .pipe_bof = 1, 577 }, 578 .callback = urtw_bulk_tx_callback, 579 .timeout = URTW_DATA_TIMEOUT 580 }, 581 [URTW_8187B_BULK_TX_VO] = { 582 .type = UE_BULK, 583 .endpoint = URTW_8187B_TXPIPE_VO, 584 .direction = UE_DIR_OUT, 585 .bufsize = URTW_TX_MAXSIZE, 586 .flags = { 587 .ext_buffer = 1, 588 .force_short_xfer = 1, 589 .pipe_bof = 1, 590 }, 591 .callback = urtw_bulk_tx_callback, 592 .timeout = URTW_DATA_TIMEOUT 593 }, 594 [URTW_8187B_BULK_TX_EP12] = { 595 .type = UE_BULK, 596 .endpoint = 0xc, 597 .direction = UE_DIR_OUT, 598 .bufsize = URTW_TX_MAXSIZE, 599 .flags = { 600 .ext_buffer = 1, 601 .force_short_xfer = 1, 602 .pipe_bof = 1, 603 }, 604 .callback = urtw_bulk_tx_callback, 605 .timeout = URTW_DATA_TIMEOUT 606 } 607}; 608 609static const struct usb_config urtw_8187l_usbconfig[URTW_8187L_N_XFERS] = { 610 [URTW_8187L_BULK_RX] = { 611 .type = UE_BULK, 612 .endpoint = 0x81, 613 .direction = UE_DIR_IN, 614 .bufsize = MCLBYTES, 615 .flags = { 616 .ext_buffer = 1, 617 .pipe_bof = 1, 618 .short_xfer_ok = 1 619 }, 620 .callback = urtw_bulk_rx_callback 621 }, 622 [URTW_8187L_BULK_TX_LOW] = { 623 .type = UE_BULK, 624 .endpoint = 0x2, 625 .direction = UE_DIR_OUT, 626 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT, 627 .flags = { 628 .force_short_xfer = 1, 629 .pipe_bof = 1, 630 }, 631 .callback = urtw_bulk_tx_callback, 632 .timeout = URTW_DATA_TIMEOUT 633 }, 634 [URTW_8187L_BULK_TX_NORMAL] = { 635 .type = UE_BULK, 636 .endpoint = 0x3, 637 .direction = UE_DIR_OUT, 638 .bufsize = URTW_TX_MAXSIZE, 639 .flags = { 640 .ext_buffer = 1, 641 .force_short_xfer = 1, 642 .pipe_bof = 1, 643 }, 644 .callback = urtw_bulk_tx_callback, 645 .timeout = URTW_DATA_TIMEOUT 646 }, 647}; 648 649static struct ieee80211vap *urtw_vap_create(struct ieee80211com *, 650 const char [IFNAMSIZ], int, enum ieee80211_opmode, 651 int, const uint8_t [IEEE80211_ADDR_LEN], 652 const uint8_t [IEEE80211_ADDR_LEN]); 653static void urtw_vap_delete(struct ieee80211vap *); 654static void urtw_init(void *); 655static void urtw_stop(struct ifnet *); 656static void urtw_stop_locked(struct ifnet *); 657static int urtw_ioctl(struct ifnet *, u_long, caddr_t); 658static void urtw_start(struct ifnet *); 659static int urtw_alloc_rx_data_list(struct urtw_softc *); 660static int urtw_alloc_tx_data_list(struct urtw_softc *); 661static int urtw_raw_xmit(struct ieee80211_node *, struct mbuf *, 662 const struct ieee80211_bpf_params *); 663static void urtw_scan_start(struct ieee80211com *); 664static void urtw_scan_end(struct ieee80211com *); 665static void urtw_set_channel(struct ieee80211com *); 666static void urtw_update_mcast(struct ieee80211com *); 667static int urtw_tx_start(struct urtw_softc *, 668 struct ieee80211_node *, struct mbuf *, 669 struct urtw_data *, int); 670static int urtw_newstate(struct ieee80211vap *, 671 enum ieee80211_state, int); 672static void urtw_led_ch(void *); 673static void urtw_ledtask(void *, int); 674static void urtw_watchdog(void *); 675static void urtw_set_multi(void *); 676static int urtw_isbmode(uint16_t); 677static uint16_t urtw_rate2rtl(uint32_t); 678static uint16_t urtw_rtl2rate(uint32_t); 679static usb_error_t urtw_set_rate(struct urtw_softc *); 680static usb_error_t urtw_update_msr(struct urtw_softc *); 681static usb_error_t urtw_read8_c(struct urtw_softc *, int, uint8_t *); 682static usb_error_t urtw_read16_c(struct urtw_softc *, int, uint16_t *); 683static usb_error_t urtw_read32_c(struct urtw_softc *, int, uint32_t *); 684static usb_error_t urtw_write8_c(struct urtw_softc *, int, uint8_t); 685static usb_error_t urtw_write16_c(struct urtw_softc *, int, uint16_t); 686static usb_error_t urtw_write32_c(struct urtw_softc *, int, uint32_t); 687static usb_error_t urtw_eprom_cs(struct urtw_softc *, int); 688static usb_error_t urtw_eprom_ck(struct urtw_softc *); 689static usb_error_t urtw_eprom_sendbits(struct urtw_softc *, int16_t *, 690 int); 691static usb_error_t urtw_eprom_read32(struct urtw_softc *, uint32_t, 692 uint32_t *); 693static usb_error_t urtw_eprom_readbit(struct urtw_softc *, int16_t *); 694static usb_error_t urtw_eprom_writebit(struct urtw_softc *, int16_t); 695static usb_error_t urtw_get_macaddr(struct urtw_softc *); 696static usb_error_t urtw_get_txpwr(struct urtw_softc *); 697static usb_error_t urtw_get_rfchip(struct urtw_softc *); 698static usb_error_t urtw_led_init(struct urtw_softc *); 699static usb_error_t urtw_8185_rf_pins_enable(struct urtw_softc *); 700static usb_error_t urtw_8185_tx_antenna(struct urtw_softc *, uint8_t); 701static usb_error_t urtw_8187_write_phy(struct urtw_softc *, uint8_t, 702 uint32_t); 703static usb_error_t urtw_8187_write_phy_ofdm_c(struct urtw_softc *, 704 uint8_t, uint32_t); 705static usb_error_t urtw_8187_write_phy_cck_c(struct urtw_softc *, uint8_t, 706 uint32_t); 707static usb_error_t urtw_8225_setgain(struct urtw_softc *, int16_t); 708static usb_error_t urtw_8225_usb_init(struct urtw_softc *); 709static usb_error_t urtw_8225_write_c(struct urtw_softc *, uint8_t, 710 uint16_t); 711static usb_error_t urtw_8225_write_s16(struct urtw_softc *, uint8_t, int, 712 uint16_t *); 713static usb_error_t urtw_8225_read(struct urtw_softc *, uint8_t, 714 uint32_t *); 715static usb_error_t urtw_8225_rf_init(struct urtw_softc *); 716static usb_error_t urtw_8225_rf_set_chan(struct urtw_softc *, int); 717static usb_error_t urtw_8225_rf_set_sens(struct urtw_softc *, int); 718static usb_error_t urtw_8225_set_txpwrlvl(struct urtw_softc *, int); 719static usb_error_t urtw_8225_rf_stop(struct urtw_softc *); 720static usb_error_t urtw_8225v2_rf_init(struct urtw_softc *); 721static usb_error_t urtw_8225v2_rf_set_chan(struct urtw_softc *, int); 722static usb_error_t urtw_8225v2_set_txpwrlvl(struct urtw_softc *, int); 723static usb_error_t urtw_8225v2_setgain(struct urtw_softc *, int16_t); 724static usb_error_t urtw_8225_isv2(struct urtw_softc *, int *); 725static usb_error_t urtw_8225v2b_rf_init(struct urtw_softc *); 726static usb_error_t urtw_8225v2b_rf_set_chan(struct urtw_softc *, int); 727static usb_error_t urtw_read8e(struct urtw_softc *, int, uint8_t *); 728static usb_error_t urtw_write8e(struct urtw_softc *, int, uint8_t); 729static usb_error_t urtw_8180_set_anaparam(struct urtw_softc *, uint32_t); 730static usb_error_t urtw_8185_set_anaparam2(struct urtw_softc *, uint32_t); 731static usb_error_t urtw_intr_enable(struct urtw_softc *); 732static usb_error_t urtw_intr_disable(struct urtw_softc *); 733static usb_error_t urtw_reset(struct urtw_softc *); 734static usb_error_t urtw_led_on(struct urtw_softc *, int); 735static usb_error_t urtw_led_ctl(struct urtw_softc *, int); 736static usb_error_t urtw_led_blink(struct urtw_softc *); 737static usb_error_t urtw_led_mode0(struct urtw_softc *, int); 738static usb_error_t urtw_led_mode1(struct urtw_softc *, int); 739static usb_error_t urtw_led_mode2(struct urtw_softc *, int); 740static usb_error_t urtw_led_mode3(struct urtw_softc *, int); 741static usb_error_t urtw_rx_setconf(struct urtw_softc *); 742static usb_error_t urtw_rx_enable(struct urtw_softc *); 743static usb_error_t urtw_tx_enable(struct urtw_softc *sc); 744static void urtw_free_tx_data_list(struct urtw_softc *); 745static void urtw_free_rx_data_list(struct urtw_softc *); 746static void urtw_free_data_list(struct urtw_softc *, 747 struct urtw_data data[], int, int); 748static usb_error_t urtw_adapter_start(struct urtw_softc *); 749static usb_error_t urtw_adapter_start_b(struct urtw_softc *); 750static usb_error_t urtw_set_mode(struct urtw_softc *, uint32_t); 751static usb_error_t urtw_8187b_cmd_reset(struct urtw_softc *); 752static usb_error_t urtw_do_request(struct urtw_softc *, 753 struct usb_device_request *, void *); 754static usb_error_t urtw_8225v2b_set_txpwrlvl(struct urtw_softc *, int); 755static usb_error_t urtw_led_off(struct urtw_softc *, int); 756static void urtw_abort_xfers(struct urtw_softc *); 757static struct urtw_data * 758 urtw_getbuf(struct urtw_softc *sc); 759static int urtw_compute_txtime(uint16_t, uint16_t, uint8_t, 760 uint8_t); 761static void urtw_updateslot(struct ieee80211com *); 762static void urtw_updateslottask(void *, int); 763static void urtw_sysctl_node(struct urtw_softc *); 764 765static int 766urtw_match(device_t dev) 767{ 768 struct usb_attach_arg *uaa = device_get_ivars(dev); 769 770 if (uaa->usb_mode != USB_MODE_HOST) 771 return (ENXIO); 772 if (uaa->info.bConfigIndex != URTW_CONFIG_INDEX) 773 return (ENXIO); 774 if (uaa->info.bIfaceIndex != URTW_IFACE_INDEX) 775 return (ENXIO); 776 777 return (usbd_lookup_id_by_uaa(urtw_devs, sizeof(urtw_devs), uaa)); 778} 779 780static int 781urtw_attach(device_t dev) 782{ 783 const struct usb_config *setup_start; 784 int ret = ENXIO; 785 struct urtw_softc *sc = device_get_softc(dev); 786 struct usb_attach_arg *uaa = device_get_ivars(dev); 787 struct ieee80211com *ic; 788 struct ifnet *ifp; 789 uint8_t bands, iface_index = URTW_IFACE_INDEX; /* XXX */ 790 uint16_t n_setup; 791 uint32_t data; 792 usb_error_t error; 793 794 device_set_usb_desc(dev); 795 796 sc->sc_dev = dev; 797 sc->sc_udev = uaa->device; 798 if (USB_GET_DRIVER_INFO(uaa) == URTW_REV_RTL8187B) 799 sc->sc_flags |= URTW_RTL8187B; 800#ifdef URTW_DEBUG 801 sc->sc_debug = urtw_debug; 802#endif 803 804 mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), MTX_NETWORK_LOCK, 805 MTX_DEF); 806 usb_callout_init_mtx(&sc->sc_led_ch, &sc->sc_mtx, 0); 807 TASK_INIT(&sc->sc_led_task, 0, urtw_ledtask, sc); 808 TASK_INIT(&sc->sc_updateslot_task, 0, urtw_updateslottask, sc); 809 callout_init(&sc->sc_watchdog_ch, 0); 810 811 if (sc->sc_flags & URTW_RTL8187B) { 812 setup_start = urtw_8187b_usbconfig; 813 n_setup = URTW_8187B_N_XFERS; 814 } else { 815 setup_start = urtw_8187l_usbconfig; 816 n_setup = URTW_8187L_N_XFERS; 817 } 818 819 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 820 setup_start, n_setup, sc, &sc->sc_mtx); 821 if (error) { 822 device_printf(dev, "could not allocate USB transfers, " 823 "err=%s\n", usbd_errstr(error)); 824 ret = ENXIO; 825 goto fail0; 826 } 827 828 if (sc->sc_flags & URTW_RTL8187B) { 829 sc->sc_tx_dma_buf = 830 usbd_xfer_get_frame_buffer(sc->sc_xfer[ 831 URTW_8187B_BULK_TX_BE], 0); 832 } else { 833 sc->sc_tx_dma_buf = 834 usbd_xfer_get_frame_buffer(sc->sc_xfer[ 835 URTW_8187L_BULK_TX_LOW], 0); 836 } 837 838 URTW_LOCK(sc); 839 840 urtw_read32_m(sc, URTW_RX, &data); 841 sc->sc_epromtype = (data & URTW_RX_9356SEL) ? URTW_EEPROM_93C56 : 842 URTW_EEPROM_93C46; 843 844 error = urtw_get_rfchip(sc); 845 if (error != 0) 846 goto fail; 847 error = urtw_get_macaddr(sc); 848 if (error != 0) 849 goto fail; 850 error = urtw_get_txpwr(sc); 851 if (error != 0) 852 goto fail; 853 error = urtw_led_init(sc); 854 if (error != 0) 855 goto fail; 856 857 URTW_UNLOCK(sc); 858 859 sc->sc_rts_retry = URTW_DEFAULT_RTS_RETRY; 860 sc->sc_tx_retry = URTW_DEFAULT_TX_RETRY; 861 sc->sc_currate = 3; 862 sc->sc_preamble_mode = urtw_preamble_mode; 863 864 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 865 if (ifp == NULL) { 866 device_printf(sc->sc_dev, "can not allocate ifnet\n"); 867 ret = ENOMEM; 868 goto fail1; 869 } 870 871 ifp->if_softc = sc; 872 if_initname(ifp, "urtw", device_get_unit(sc->sc_dev)); 873 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 874 ifp->if_init = urtw_init; 875 ifp->if_ioctl = urtw_ioctl; 876 ifp->if_start = urtw_start; 877 /* XXX URTW_TX_DATA_LIST_COUNT */ 878 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 879 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 880 IFQ_SET_READY(&ifp->if_snd); 881 882 ic = ifp->if_l2com; 883 ic->ic_ifp = ifp; 884 ic->ic_softc = sc; 885 ic->ic_name = device_get_nameunit(dev); 886 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 887 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 888 889 /* set device capabilities */ 890 ic->ic_caps = 891 IEEE80211_C_STA | /* station mode */ 892 IEEE80211_C_MONITOR | /* monitor mode supported */ 893 IEEE80211_C_TXPMGT | /* tx power management */ 894 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 895 IEEE80211_C_SHSLOT | /* short slot time supported */ 896 IEEE80211_C_BGSCAN | /* capable of bg scanning */ 897 IEEE80211_C_WPA; /* 802.11i */ 898 899 bands = 0; 900 setbit(&bands, IEEE80211_MODE_11B); 901 setbit(&bands, IEEE80211_MODE_11G); 902 ieee80211_init_channels(ic, NULL, &bands); 903 904 ieee80211_ifattach(ic, sc->sc_bssid); 905 ic->ic_raw_xmit = urtw_raw_xmit; 906 ic->ic_scan_start = urtw_scan_start; 907 ic->ic_scan_end = urtw_scan_end; 908 ic->ic_set_channel = urtw_set_channel; 909 ic->ic_updateslot = urtw_updateslot; 910 ic->ic_vap_create = urtw_vap_create; 911 ic->ic_vap_delete = urtw_vap_delete; 912 ic->ic_update_mcast = urtw_update_mcast; 913 914 ieee80211_radiotap_attach(ic, 915 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 916 URTW_TX_RADIOTAP_PRESENT, 917 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 918 URTW_RX_RADIOTAP_PRESENT); 919 920 urtw_sysctl_node(sc); 921 922 if (bootverbose) 923 ieee80211_announce(ic); 924 return (0); 925 926fail: URTW_UNLOCK(sc); 927fail1: usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ? 928 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS); 929fail0: 930 return (ret); 931} 932 933static int 934urtw_detach(device_t dev) 935{ 936 struct urtw_softc *sc = device_get_softc(dev); 937 struct ifnet *ifp = sc->sc_ifp; 938 struct ieee80211com *ic = ifp->if_l2com; 939 unsigned int x; 940 unsigned int n_xfers; 941 942 /* Prevent further ioctls */ 943 URTW_LOCK(sc); 944 sc->sc_flags |= URTW_DETACHED; 945 URTW_UNLOCK(sc); 946 947 urtw_stop(ifp); 948 949 ieee80211_draintask(ic, &sc->sc_updateslot_task); 950 ieee80211_draintask(ic, &sc->sc_led_task); 951 952 usb_callout_drain(&sc->sc_led_ch); 953 callout_drain(&sc->sc_watchdog_ch); 954 955 n_xfers = (sc->sc_flags & URTW_RTL8187B) ? 956 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS; 957 958 /* prevent further allocations from RX/TX data lists */ 959 URTW_LOCK(sc); 960 STAILQ_INIT(&sc->sc_tx_active); 961 STAILQ_INIT(&sc->sc_tx_inactive); 962 STAILQ_INIT(&sc->sc_tx_pending); 963 964 STAILQ_INIT(&sc->sc_rx_active); 965 STAILQ_INIT(&sc->sc_rx_inactive); 966 URTW_UNLOCK(sc); 967 968 /* drain USB transfers */ 969 for (x = 0; x != n_xfers; x++) 970 usbd_transfer_drain(sc->sc_xfer[x]); 971 972 /* free data buffers */ 973 URTW_LOCK(sc); 974 urtw_free_tx_data_list(sc); 975 urtw_free_rx_data_list(sc); 976 URTW_UNLOCK(sc); 977 978 /* free USB transfers and some data buffers */ 979 usbd_transfer_unsetup(sc->sc_xfer, n_xfers); 980 981 ieee80211_ifdetach(ic); 982 if_free(ifp); 983 mtx_destroy(&sc->sc_mtx); 984 return (0); 985} 986 987static void 988urtw_free_tx_data_list(struct urtw_softc *sc) 989{ 990 urtw_free_data_list(sc, sc->sc_tx, URTW_TX_DATA_LIST_COUNT, 0); 991} 992 993static void 994urtw_free_rx_data_list(struct urtw_softc *sc) 995{ 996 urtw_free_data_list(sc, sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1); 997} 998 999static void 1000urtw_free_data_list(struct urtw_softc *sc, struct urtw_data data[], int ndata, 1001 int fillmbuf) 1002{ 1003 int i; 1004 1005 for (i = 0; i < ndata; i++) { 1006 struct urtw_data *dp = &data[i]; 1007 1008 if (fillmbuf == 1) { 1009 if (dp->m != NULL) { 1010 m_freem(dp->m); 1011 dp->m = NULL; 1012 dp->buf = NULL; 1013 } 1014 } else { 1015 dp->buf = NULL; 1016 } 1017 if (dp->ni != NULL) { 1018 ieee80211_free_node(dp->ni); 1019 dp->ni = NULL; 1020 } 1021 } 1022} 1023 1024static struct ieee80211vap * 1025urtw_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 1026 enum ieee80211_opmode opmode, int flags, 1027 const uint8_t bssid[IEEE80211_ADDR_LEN], 1028 const uint8_t mac[IEEE80211_ADDR_LEN]) 1029{ 1030 struct urtw_vap *uvp; 1031 struct ieee80211vap *vap; 1032 1033 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 1034 return (NULL); 1035 uvp = (struct urtw_vap *) malloc(sizeof(struct urtw_vap), 1036 M_80211_VAP, M_NOWAIT | M_ZERO); 1037 if (uvp == NULL) 1038 return (NULL); 1039 vap = &uvp->vap; 1040 /* enable s/w bmiss handling for sta mode */ 1041 1042 if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 1043 flags | IEEE80211_CLONE_NOBEACONS, bssid, mac) != 0) { 1044 /* out of memory */ 1045 free(uvp, M_80211_VAP); 1046 return (NULL); 1047 } 1048 1049 /* override state transition machine */ 1050 uvp->newstate = vap->iv_newstate; 1051 vap->iv_newstate = urtw_newstate; 1052 1053 /* complete setup */ 1054 ieee80211_vap_attach(vap, ieee80211_media_change, 1055 ieee80211_media_status); 1056 ic->ic_opmode = opmode; 1057 return (vap); 1058} 1059 1060static void 1061urtw_vap_delete(struct ieee80211vap *vap) 1062{ 1063 struct urtw_vap *uvp = URTW_VAP(vap); 1064 1065 ieee80211_vap_detach(vap); 1066 free(uvp, M_80211_VAP); 1067} 1068 1069static void 1070urtw_init_locked(void *arg) 1071{ 1072 int ret; 1073 struct urtw_softc *sc = arg; 1074 struct ifnet *ifp = sc->sc_ifp; 1075 usb_error_t error; 1076 1077 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1078 urtw_stop_locked(ifp); 1079 1080 error = (sc->sc_flags & URTW_RTL8187B) ? urtw_adapter_start_b(sc) : 1081 urtw_adapter_start(sc); 1082 if (error != 0) 1083 goto fail; 1084 1085 /* reset softc variables */ 1086 sc->sc_txtimer = 0; 1087 1088 if (!(sc->sc_flags & URTW_INIT_ONCE)) { 1089 ret = urtw_alloc_rx_data_list(sc); 1090 if (ret != 0) 1091 goto fail; 1092 ret = urtw_alloc_tx_data_list(sc); 1093 if (ret != 0) 1094 goto fail; 1095 sc->sc_flags |= URTW_INIT_ONCE; 1096 } 1097 1098 error = urtw_rx_enable(sc); 1099 if (error != 0) 1100 goto fail; 1101 error = urtw_tx_enable(sc); 1102 if (error != 0) 1103 goto fail; 1104 1105 if (sc->sc_flags & URTW_RTL8187B) 1106 usbd_transfer_start(sc->sc_xfer[URTW_8187B_BULK_TX_STATUS]); 1107 1108 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1109 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1110 1111 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1112fail: 1113 return; 1114} 1115 1116static void 1117urtw_init(void *arg) 1118{ 1119 struct urtw_softc *sc = arg; 1120 1121 URTW_LOCK(sc); 1122 urtw_init_locked(arg); 1123 URTW_UNLOCK(sc); 1124} 1125 1126static usb_error_t 1127urtw_adapter_start_b(struct urtw_softc *sc) 1128{ 1129#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 1130 uint8_t data8; 1131 usb_error_t error; 1132 1133 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1134 if (error) 1135 goto fail; 1136 1137 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1138 urtw_write8_m(sc, URTW_CONFIG3, 1139 data8 | URTW_CONFIG3_ANAPARAM_WRITE | URTW_CONFIG3_GNT_SELECT); 1140 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8187B_8225_ANAPARAM2_ON); 1141 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_ON); 1142 urtw_write8_m(sc, URTW_ANAPARAM3, URTW_8187B_8225_ANAPARAM3_ON); 1143 1144 urtw_write8_m(sc, 0x61, 0x10); 1145 urtw_read8_m(sc, 0x62, &data8); 1146 urtw_write8_m(sc, 0x62, data8 & ~(1 << 5)); 1147 urtw_write8_m(sc, 0x62, data8 | (1 << 5)); 1148 1149 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1150 data8 &= ~URTW_CONFIG3_ANAPARAM_WRITE; 1151 urtw_write8_m(sc, URTW_CONFIG3, data8); 1152 1153 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1154 if (error) 1155 goto fail; 1156 1157 error = urtw_8187b_cmd_reset(sc); 1158 if (error) 1159 goto fail; 1160 1161 error = sc->sc_rf_init(sc); 1162 if (error != 0) 1163 goto fail; 1164 urtw_write8_m(sc, URTW_CMD, URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1165 1166 /* fix RTL8187B RX stall */ 1167 error = urtw_intr_enable(sc); 1168 if (error) 1169 goto fail; 1170 1171 error = urtw_write8e(sc, 0x41, 0xf4); 1172 if (error) 1173 goto fail; 1174 error = urtw_write8e(sc, 0x40, 0x00); 1175 if (error) 1176 goto fail; 1177 error = urtw_write8e(sc, 0x42, 0x00); 1178 if (error) 1179 goto fail; 1180 error = urtw_write8e(sc, 0x42, 0x01); 1181 if (error) 1182 goto fail; 1183 error = urtw_write8e(sc, 0x40, 0x0f); 1184 if (error) 1185 goto fail; 1186 error = urtw_write8e(sc, 0x42, 0x00); 1187 if (error) 1188 goto fail; 1189 error = urtw_write8e(sc, 0x42, 0x01); 1190 if (error) 1191 goto fail; 1192 1193 urtw_read8_m(sc, 0xdb, &data8); 1194 urtw_write8_m(sc, 0xdb, data8 | (1 << 2)); 1195 urtw_write16_m(sc, 0x372, 0x59fa); 1196 urtw_write16_m(sc, 0x374, 0x59d2); 1197 urtw_write16_m(sc, 0x376, 0x59d2); 1198 urtw_write16_m(sc, 0x378, 0x19fa); 1199 urtw_write16_m(sc, 0x37a, 0x19fa); 1200 urtw_write16_m(sc, 0x37c, 0x00d0); 1201 urtw_write8_m(sc, 0x61, 0); 1202 1203 urtw_write8_m(sc, 0x180, 0x0f); 1204 urtw_write8_m(sc, 0x183, 0x03); 1205 urtw_write8_m(sc, 0xda, 0x10); 1206 urtw_write8_m(sc, 0x24d, 0x08); 1207 urtw_write32_m(sc, URTW_HSSI_PARA, 0x0600321b); 1208 1209 urtw_write16_m(sc, 0x1ec, 0x800); /* RX MAX SIZE */ 1210fail: 1211 return (error); 1212#undef N 1213} 1214 1215static usb_error_t 1216urtw_adapter_start(struct urtw_softc *sc) 1217{ 1218 usb_error_t error; 1219 1220 error = urtw_reset(sc); 1221 if (error) 1222 goto fail; 1223 1224 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 0); 1225 urtw_write8_m(sc, URTW_GPIO, 0); 1226 1227 /* for led */ 1228 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1229 error = urtw_led_ctl(sc, URTW_LED_CTL_POWER_ON); 1230 if (error != 0) 1231 goto fail; 1232 1233 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1234 if (error) 1235 goto fail; 1236 /* applying MAC address again. */ 1237 urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)sc->sc_bssid)[0]); 1238 urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)sc->sc_bssid)[1] & 0xffff); 1239 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1240 if (error) 1241 goto fail; 1242 1243 error = urtw_update_msr(sc); 1244 if (error) 1245 goto fail; 1246 1247 urtw_write32_m(sc, URTW_INT_TIMEOUT, 0); 1248 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 1249 urtw_write8_m(sc, URTW_RATE_FALLBACK, URTW_RATE_FALLBACK_ENABLE | 0x1); 1250 error = urtw_set_rate(sc); 1251 if (error != 0) 1252 goto fail; 1253 1254 error = sc->sc_rf_init(sc); 1255 if (error != 0) 1256 goto fail; 1257 if (sc->sc_rf_set_sens != NULL) 1258 sc->sc_rf_set_sens(sc, sc->sc_sens); 1259 1260 /* XXX correct? to call write16 */ 1261 urtw_write16_m(sc, URTW_PSR, 1); 1262 urtw_write16_m(sc, URTW_ADDR_MAGIC2, 0x10); 1263 urtw_write8_m(sc, URTW_TALLY_SEL, 0x80); 1264 urtw_write8_m(sc, URTW_ADDR_MAGIC3, 0x60); 1265 /* XXX correct? to call write16 */ 1266 urtw_write16_m(sc, URTW_PSR, 0); 1267 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1268 1269 error = urtw_intr_enable(sc); 1270 if (error != 0) 1271 goto fail; 1272 1273fail: 1274 return (error); 1275} 1276 1277static usb_error_t 1278urtw_set_mode(struct urtw_softc *sc, uint32_t mode) 1279{ 1280 uint8_t data; 1281 usb_error_t error; 1282 1283 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 1284 data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT); 1285 data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK); 1286 urtw_write8_m(sc, URTW_EPROM_CMD, data); 1287fail: 1288 return (error); 1289} 1290 1291static usb_error_t 1292urtw_8187b_cmd_reset(struct urtw_softc *sc) 1293{ 1294 int i; 1295 uint8_t data8; 1296 usb_error_t error; 1297 1298 /* XXX the code can be duplicate with urtw_reset(). */ 1299 urtw_read8_m(sc, URTW_CMD, &data8); 1300 data8 = (data8 & 0x2) | URTW_CMD_RST; 1301 urtw_write8_m(sc, URTW_CMD, data8); 1302 1303 for (i = 0; i < 20; i++) { 1304 usb_pause_mtx(&sc->sc_mtx, 2); 1305 urtw_read8_m(sc, URTW_CMD, &data8); 1306 if (!(data8 & URTW_CMD_RST)) 1307 break; 1308 } 1309 if (i >= 20) { 1310 device_printf(sc->sc_dev, "reset timeout\n"); 1311 goto fail; 1312 } 1313fail: 1314 return (error); 1315} 1316 1317static usb_error_t 1318urtw_do_request(struct urtw_softc *sc, 1319 struct usb_device_request *req, void *data) 1320{ 1321 usb_error_t err; 1322 int ntries = 10; 1323 1324 URTW_ASSERT_LOCKED(sc); 1325 1326 while (ntries--) { 1327 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 1328 req, data, 0, NULL, 250 /* ms */); 1329 if (err == 0) 1330 break; 1331 1332 DPRINTF(sc, URTW_DEBUG_INIT, 1333 "Control request failed, %s (retrying)\n", 1334 usbd_errstr(err)); 1335 usb_pause_mtx(&sc->sc_mtx, hz / 100); 1336 } 1337 return (err); 1338} 1339 1340static void 1341urtw_stop_locked(struct ifnet *ifp) 1342{ 1343 struct urtw_softc *sc = ifp->if_softc; 1344 uint8_t data8; 1345 usb_error_t error; 1346 1347 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1348 1349 error = urtw_intr_disable(sc); 1350 if (error) 1351 goto fail; 1352 urtw_read8_m(sc, URTW_CMD, &data8); 1353 data8 &= ~(URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1354 urtw_write8_m(sc, URTW_CMD, data8); 1355 1356 error = sc->sc_rf_stop(sc); 1357 if (error != 0) 1358 goto fail; 1359 1360 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1361 if (error) 1362 goto fail; 1363 urtw_read8_m(sc, URTW_CONFIG4, &data8); 1364 urtw_write8_m(sc, URTW_CONFIG4, data8 | URTW_CONFIG4_VCOOFF); 1365 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1366 if (error) 1367 goto fail; 1368fail: 1369 if (error) 1370 device_printf(sc->sc_dev, "failed to stop (%s)\n", 1371 usbd_errstr(error)); 1372 1373 usb_callout_stop(&sc->sc_led_ch); 1374 callout_stop(&sc->sc_watchdog_ch); 1375 1376 urtw_abort_xfers(sc); 1377} 1378 1379static void 1380urtw_stop(struct ifnet *ifp) 1381{ 1382 struct urtw_softc *sc = ifp->if_softc; 1383 1384 URTW_LOCK(sc); 1385 urtw_stop_locked(ifp); 1386 URTW_UNLOCK(sc); 1387} 1388 1389static void 1390urtw_abort_xfers(struct urtw_softc *sc) 1391{ 1392 int i, max; 1393 1394 URTW_ASSERT_LOCKED(sc); 1395 1396 max = (sc->sc_flags & URTW_RTL8187B) ? URTW_8187B_N_XFERS : 1397 URTW_8187L_N_XFERS; 1398 1399 /* abort any pending transfers */ 1400 for (i = 0; i < max; i++) 1401 usbd_transfer_stop(sc->sc_xfer[i]); 1402} 1403 1404static int 1405urtw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1406{ 1407 struct ieee80211com *ic = ifp->if_l2com; 1408 struct urtw_softc *sc = ic->ic_softc; 1409 struct ifreq *ifr = (struct ifreq *) data; 1410 int error; 1411 int startall = 0; 1412 1413 URTW_LOCK(sc); 1414 error = (sc->sc_flags & URTW_DETACHED) ? ENXIO : 0; 1415 URTW_UNLOCK(sc); 1416 if (error) 1417 return (error); 1418 1419 switch (cmd) { 1420 case SIOCSIFFLAGS: 1421 if (ifp->if_flags & IFF_UP) { 1422 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1423 if ((ifp->if_flags ^ sc->sc_if_flags) & 1424 (IFF_ALLMULTI | IFF_PROMISC)) 1425 urtw_set_multi(sc); 1426 } else { 1427 urtw_init(sc); 1428 startall = 1; 1429 } 1430 } else { 1431 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1432 urtw_stop(ifp); 1433 } 1434 sc->sc_if_flags = ifp->if_flags; 1435 if (startall) 1436 ieee80211_start_all(ic); 1437 break; 1438 case SIOCGIFMEDIA: 1439 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1440 break; 1441 case SIOCGIFADDR: 1442 error = ether_ioctl(ifp, cmd, data); 1443 break; 1444 default: 1445 error = EINVAL; 1446 break; 1447 } 1448 return (error); 1449} 1450 1451static void 1452urtw_start(struct ifnet *ifp) 1453{ 1454 struct urtw_data *bf; 1455 struct urtw_softc *sc = ifp->if_softc; 1456 struct ieee80211_node *ni; 1457 struct mbuf *m; 1458 1459 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1460 return; 1461 1462 URTW_LOCK(sc); 1463 for (;;) { 1464 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1465 if (m == NULL) 1466 break; 1467 bf = urtw_getbuf(sc); 1468 if (bf == NULL) { 1469 IFQ_DRV_PREPEND(&ifp->if_snd, m); 1470 break; 1471 } 1472 1473 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 1474 m->m_pkthdr.rcvif = NULL; 1475 1476 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_NORMAL) != 0) { 1477 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1478 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1479 ieee80211_free_node(ni); 1480 break; 1481 } 1482 1483 sc->sc_txtimer = 5; 1484 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1485 } 1486 URTW_UNLOCK(sc); 1487} 1488 1489static int 1490urtw_alloc_data_list(struct urtw_softc *sc, struct urtw_data data[], 1491 int ndata, int maxsz, void *dma_buf) 1492{ 1493 int i, error; 1494 1495 for (i = 0; i < ndata; i++) { 1496 struct urtw_data *dp = &data[i]; 1497 1498 dp->sc = sc; 1499 if (dma_buf == NULL) { 1500 dp->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1501 if (dp->m == NULL) { 1502 device_printf(sc->sc_dev, 1503 "could not allocate rx mbuf\n"); 1504 error = ENOMEM; 1505 goto fail; 1506 } 1507 dp->buf = mtod(dp->m, uint8_t *); 1508 } else { 1509 dp->m = NULL; 1510 dp->buf = ((uint8_t *)dma_buf) + 1511 (i * maxsz); 1512 } 1513 dp->ni = NULL; 1514 } 1515 return (0); 1516 1517fail: urtw_free_data_list(sc, data, ndata, 1); 1518 return (error); 1519} 1520 1521static int 1522urtw_alloc_rx_data_list(struct urtw_softc *sc) 1523{ 1524 int error, i; 1525 1526 error = urtw_alloc_data_list(sc, 1527 sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1528 MCLBYTES, NULL /* mbufs */); 1529 if (error != 0) 1530 return (error); 1531 1532 STAILQ_INIT(&sc->sc_rx_active); 1533 STAILQ_INIT(&sc->sc_rx_inactive); 1534 1535 for (i = 0; i < URTW_RX_DATA_LIST_COUNT; i++) 1536 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1537 1538 return (0); 1539} 1540 1541static int 1542urtw_alloc_tx_data_list(struct urtw_softc *sc) 1543{ 1544 int error, i; 1545 1546 error = urtw_alloc_data_list(sc, 1547 sc->sc_tx, URTW_TX_DATA_LIST_COUNT, URTW_TX_MAXSIZE, 1548 sc->sc_tx_dma_buf /* no mbufs */); 1549 if (error != 0) 1550 return (error); 1551 1552 STAILQ_INIT(&sc->sc_tx_active); 1553 STAILQ_INIT(&sc->sc_tx_inactive); 1554 STAILQ_INIT(&sc->sc_tx_pending); 1555 1556 for (i = 0; i < URTW_TX_DATA_LIST_COUNT; i++) 1557 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], 1558 next); 1559 1560 return (0); 1561} 1562 1563static int 1564urtw_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1565 const struct ieee80211_bpf_params *params) 1566{ 1567 struct ieee80211com *ic = ni->ni_ic; 1568 struct ifnet *ifp = ic->ic_ifp; 1569 struct urtw_data *bf; 1570 struct urtw_softc *sc = ic->ic_softc; 1571 1572 /* prevent management frames from being sent if we're not ready */ 1573 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1574 m_freem(m); 1575 ieee80211_free_node(ni); 1576 return ENETDOWN; 1577 } 1578 URTW_LOCK(sc); 1579 bf = urtw_getbuf(sc); 1580 if (bf == NULL) { 1581 ieee80211_free_node(ni); 1582 m_freem(m); 1583 URTW_UNLOCK(sc); 1584 return (ENOBUFS); /* XXX */ 1585 } 1586 1587 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 1588 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_LOW) != 0) { 1589 ieee80211_free_node(ni); 1590 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1591 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1592 URTW_UNLOCK(sc); 1593 return (EIO); 1594 } 1595 URTW_UNLOCK(sc); 1596 1597 sc->sc_txtimer = 5; 1598 return (0); 1599} 1600 1601static void 1602urtw_scan_start(struct ieee80211com *ic) 1603{ 1604 1605 /* XXX do nothing? */ 1606} 1607 1608static void 1609urtw_scan_end(struct ieee80211com *ic) 1610{ 1611 1612 /* XXX do nothing? */ 1613} 1614 1615static void 1616urtw_set_channel(struct ieee80211com *ic) 1617{ 1618 struct urtw_softc *sc = ic->ic_softc; 1619 struct ifnet *ifp = sc->sc_ifp; 1620 uint32_t data, orig; 1621 usb_error_t error; 1622 1623 /* 1624 * if the user set a channel explicitly using ifconfig(8) this function 1625 * can be called earlier than we're expected that in some cases the 1626 * initialization would be failed if setting a channel is called before 1627 * the init have done. 1628 */ 1629 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1630 return; 1631 1632 if (sc->sc_curchan != NULL && sc->sc_curchan == ic->ic_curchan) 1633 return; 1634 1635 URTW_LOCK(sc); 1636 1637 /* 1638 * during changing th channel we need to temporarily be disable 1639 * TX. 1640 */ 1641 urtw_read32_m(sc, URTW_TX_CONF, &orig); 1642 data = orig & ~URTW_TX_LOOPBACK_MASK; 1643 urtw_write32_m(sc, URTW_TX_CONF, data | URTW_TX_LOOPBACK_MAC); 1644 1645 error = sc->sc_rf_set_chan(sc, ieee80211_chan2ieee(ic, ic->ic_curchan)); 1646 if (error != 0) 1647 goto fail; 1648 usb_pause_mtx(&sc->sc_mtx, 10); 1649 urtw_write32_m(sc, URTW_TX_CONF, orig); 1650 1651 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1652 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1653 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 1654 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1655 1656fail: 1657 URTW_UNLOCK(sc); 1658 1659 sc->sc_curchan = ic->ic_curchan; 1660 1661 if (error != 0) 1662 device_printf(sc->sc_dev, "could not change the channel\n"); 1663} 1664 1665static void 1666urtw_update_mcast(struct ieee80211com *ic) 1667{ 1668 1669 /* XXX do nothing? */ 1670} 1671 1672static int 1673urtw_tx_start(struct urtw_softc *sc, struct ieee80211_node *ni, struct mbuf *m0, 1674 struct urtw_data *data, int prior) 1675{ 1676 struct ifnet *ifp = sc->sc_ifp; 1677 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 1678 struct ieee80211_key *k; 1679 const struct ieee80211_txparam *tp; 1680 struct ieee80211com *ic = ifp->if_l2com; 1681 struct ieee80211vap *vap = ni->ni_vap; 1682 struct usb_xfer *rtl8187b_pipes[URTW_8187B_TXPIPE_MAX] = { 1683 sc->sc_xfer[URTW_8187B_BULK_TX_BE], 1684 sc->sc_xfer[URTW_8187B_BULK_TX_BK], 1685 sc->sc_xfer[URTW_8187B_BULK_TX_VI], 1686 sc->sc_xfer[URTW_8187B_BULK_TX_VO] 1687 }; 1688 struct usb_xfer *xfer; 1689 int dur = 0, rtsdur = 0, rtsenable = 0, ctsenable = 0, rate, 1690 pkttime = 0, txdur = 0, isshort = 0, xferlen; 1691 uint16_t acktime, rtstime, ctstime; 1692 uint32_t flags; 1693 usb_error_t error; 1694 1695 URTW_ASSERT_LOCKED(sc); 1696 1697 /* 1698 * Software crypto. 1699 */ 1700 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1701 k = ieee80211_crypto_encap(ni, m0); 1702 if (k == NULL) { 1703 device_printf(sc->sc_dev, 1704 "ieee80211_crypto_encap returns NULL.\n"); 1705 /* XXX we don't expect the fragmented frames */ 1706 m_freem(m0); 1707 return (ENOBUFS); 1708 } 1709 1710 /* in case packet header moved, reset pointer */ 1711 wh = mtod(m0, struct ieee80211_frame *); 1712 } 1713 1714 if (ieee80211_radiotap_active_vap(vap)) { 1715 struct urtw_tx_radiotap_header *tap = &sc->sc_txtap; 1716 1717 /* XXX Are variables correct? */ 1718 tap->wt_flags = 0; 1719 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1720 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1721 1722 ieee80211_radiotap_tx(vap, m0); 1723 } 1724 1725 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_MGT || 1726 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_CTL) { 1727 tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)]; 1728 rate = tp->mgmtrate; 1729 } else { 1730 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1731 /* for data frames */ 1732 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1733 rate = tp->mcastrate; 1734 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 1735 rate = tp->ucastrate; 1736 else 1737 rate = urtw_rtl2rate(sc->sc_currate); 1738 } 1739 1740 sc->sc_stats.txrates[sc->sc_currate]++; 1741 1742 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1743 txdur = pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1744 IEEE80211_CRC_LEN, rate, 0, 0); 1745 else { 1746 acktime = urtw_compute_txtime(14, 2,0, 0); 1747 if ((m0->m_pkthdr.len + 4) > vap->iv_rtsthreshold) { 1748 rtsenable = 1; 1749 ctsenable = 0; 1750 rtstime = urtw_compute_txtime(URTW_ACKCTS_LEN, 2, 0, 0); 1751 ctstime = urtw_compute_txtime(14, 2, 0, 0); 1752 pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1753 IEEE80211_CRC_LEN, rate, 0, isshort); 1754 rtsdur = ctstime + pkttime + acktime + 1755 3 * URTW_ASIFS_TIME; 1756 txdur = rtstime + rtsdur; 1757 } else { 1758 rtsenable = ctsenable = rtsdur = 0; 1759 pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1760 IEEE80211_CRC_LEN, rate, 0, isshort); 1761 txdur = pkttime + URTW_ASIFS_TIME + acktime; 1762 } 1763 1764 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1765 dur = urtw_compute_txtime(m0->m_pkthdr.len + 1766 IEEE80211_CRC_LEN, rate, 0, isshort) + 1767 3 * URTW_ASIFS_TIME + 1768 2 * acktime; 1769 else 1770 dur = URTW_ASIFS_TIME + acktime; 1771 } 1772 USETW(wh->i_dur, dur); 1773 1774 xferlen = m0->m_pkthdr.len; 1775 xferlen += (sc->sc_flags & URTW_RTL8187B) ? (4 * 8) : (4 * 3); 1776 if ((0 == xferlen % 64) || (0 == xferlen % 512)) 1777 xferlen += 1; 1778 1779 memset(data->buf, 0, URTW_TX_MAXSIZE); 1780 flags = m0->m_pkthdr.len & 0xfff; 1781 flags |= URTW_TX_FLAG_NO_ENC; 1782 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1783 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE) && 1784 (sc->sc_preamble_mode == URTW_PREAMBLE_MODE_SHORT) && 1785 (sc->sc_currate != 0)) 1786 flags |= URTW_TX_FLAG_SPLCP; 1787 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1788 flags |= URTW_TX_FLAG_MOREFRAG; 1789 1790 flags |= (sc->sc_currate & 0xf) << URTW_TX_FLAG_TXRATE_SHIFT; 1791 1792 if (sc->sc_flags & URTW_RTL8187B) { 1793 struct urtw_8187b_txhdr *tx; 1794 1795 tx = (struct urtw_8187b_txhdr *)data->buf; 1796 if (ctsenable) 1797 flags |= URTW_TX_FLAG_CTS; 1798 if (rtsenable) { 1799 flags |= URTW_TX_FLAG_RTS; 1800 flags |= (urtw_rate2rtl(11) & 0xf) << 1801 URTW_TX_FLAG_RTSRATE_SHIFT; 1802 tx->rtsdur = rtsdur; 1803 } 1804 tx->flag = htole32(flags); 1805 tx->txdur = txdur; 1806 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1807 IEEE80211_FC0_TYPE_MGT && 1808 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1809 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1810 tx->retry = 1; 1811 else 1812 tx->retry = URTW_TX_MAXRETRY; 1813 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1)); 1814 } else { 1815 struct urtw_8187l_txhdr *tx; 1816 1817 tx = (struct urtw_8187l_txhdr *)data->buf; 1818 if (rtsenable) { 1819 flags |= URTW_TX_FLAG_RTS; 1820 tx->rtsdur = rtsdur; 1821 } 1822 flags |= (urtw_rate2rtl(11) & 0xf) << URTW_TX_FLAG_RTSRATE_SHIFT; 1823 tx->flag = htole32(flags); 1824 tx->retry = 3; /* CW minimum */ 1825 tx->retry = 7 << 4; /* CW maximum */ 1826 tx->retry = URTW_TX_MAXRETRY << 8; /* retry limitation */ 1827 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1)); 1828 } 1829 1830 data->buflen = xferlen; 1831 data->ni = ni; 1832 data->m = m0; 1833 1834 if (sc->sc_flags & URTW_RTL8187B) { 1835 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1836 case IEEE80211_FC0_TYPE_CTL: 1837 case IEEE80211_FC0_TYPE_MGT: 1838 xfer = sc->sc_xfer[URTW_8187B_BULK_TX_EP12]; 1839 break; 1840 default: 1841 KASSERT(M_WME_GETAC(m0) < URTW_8187B_TXPIPE_MAX, 1842 ("unsupported WME pipe %d", M_WME_GETAC(m0))); 1843 xfer = rtl8187b_pipes[M_WME_GETAC(m0)]; 1844 break; 1845 } 1846 } else 1847 xfer = (prior == URTW_PRIORITY_LOW) ? 1848 sc->sc_xfer[URTW_8187L_BULK_TX_LOW] : 1849 sc->sc_xfer[URTW_8187L_BULK_TX_NORMAL]; 1850 1851 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 1852 usbd_transfer_start(xfer); 1853 1854 error = urtw_led_ctl(sc, URTW_LED_CTL_TX); 1855 if (error != 0) 1856 device_printf(sc->sc_dev, "could not control LED (%d)\n", 1857 error); 1858 return (0); 1859} 1860 1861static int 1862urtw_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1863{ 1864 struct ieee80211com *ic = vap->iv_ic; 1865 struct urtw_softc *sc = ic->ic_softc; 1866 struct urtw_vap *uvp = URTW_VAP(vap); 1867 struct ieee80211_node *ni; 1868 usb_error_t error = 0; 1869 1870 DPRINTF(sc, URTW_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1871 ieee80211_state_name[vap->iv_state], 1872 ieee80211_state_name[nstate]); 1873 1874 sc->sc_state = nstate; 1875 1876 IEEE80211_UNLOCK(ic); 1877 URTW_LOCK(sc); 1878 usb_callout_stop(&sc->sc_led_ch); 1879 callout_stop(&sc->sc_watchdog_ch); 1880 1881 switch (nstate) { 1882 case IEEE80211_S_INIT: 1883 case IEEE80211_S_SCAN: 1884 case IEEE80211_S_AUTH: 1885 case IEEE80211_S_ASSOC: 1886 break; 1887 case IEEE80211_S_RUN: 1888 ni = ieee80211_ref_node(vap->iv_bss); 1889 /* setting bssid. */ 1890 urtw_write32_m(sc, URTW_BSSID, ((uint32_t *)ni->ni_bssid)[0]); 1891 urtw_write16_m(sc, URTW_BSSID + 4, 1892 ((uint16_t *)ni->ni_bssid)[2]); 1893 urtw_update_msr(sc); 1894 /* XXX maybe the below would be incorrect. */ 1895 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1896 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1897 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 0x64); 1898 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1899 error = urtw_led_ctl(sc, URTW_LED_CTL_LINK); 1900 if (error != 0) 1901 device_printf(sc->sc_dev, 1902 "could not control LED (%d)\n", error); 1903 ieee80211_free_node(ni); 1904 break; 1905 default: 1906 break; 1907 } 1908fail: 1909 URTW_UNLOCK(sc); 1910 IEEE80211_LOCK(ic); 1911 return (uvp->newstate(vap, nstate, arg)); 1912} 1913 1914static void 1915urtw_watchdog(void *arg) 1916{ 1917 struct urtw_softc *sc = arg; 1918 struct ifnet *ifp = sc->sc_ifp; 1919 1920 if (sc->sc_txtimer > 0) { 1921 if (--sc->sc_txtimer == 0) { 1922 device_printf(sc->sc_dev, "device timeout\n"); 1923 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1924 return; 1925 } 1926 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1927 } 1928} 1929 1930static void 1931urtw_set_multi(void *arg) 1932{ 1933 struct urtw_softc *sc = arg; 1934 struct ifnet *ifp = sc->sc_ifp; 1935 1936 if (!(ifp->if_flags & IFF_UP)) 1937 return; 1938 1939 /* 1940 * XXX don't know how to set a device. Lack of docs. Just try to set 1941 * IFF_ALLMULTI flag here. 1942 */ 1943 ifp->if_flags |= IFF_ALLMULTI; 1944} 1945 1946static usb_error_t 1947urtw_set_rate(struct urtw_softc *sc) 1948{ 1949 int i, basic_rate, min_rr_rate, max_rr_rate; 1950 uint16_t data; 1951 usb_error_t error; 1952 1953 basic_rate = urtw_rate2rtl(48); 1954 min_rr_rate = urtw_rate2rtl(12); 1955 max_rr_rate = urtw_rate2rtl(48); 1956 1957 urtw_write8_m(sc, URTW_RESP_RATE, 1958 max_rr_rate << URTW_RESP_MAX_RATE_SHIFT | 1959 min_rr_rate << URTW_RESP_MIN_RATE_SHIFT); 1960 1961 urtw_read16_m(sc, URTW_BRSR, &data); 1962 data &= ~URTW_BRSR_MBR_8185; 1963 1964 for (i = 0; i <= basic_rate; i++) 1965 data |= (1 << i); 1966 1967 urtw_write16_m(sc, URTW_BRSR, data); 1968fail: 1969 return (error); 1970} 1971 1972static uint16_t 1973urtw_rate2rtl(uint32_t rate) 1974{ 1975#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 1976 int i; 1977 1978 for (i = 0; i < N(urtw_ratetable); i++) { 1979 if (rate == urtw_ratetable[i].reg) 1980 return urtw_ratetable[i].val; 1981 } 1982 1983 return (3); 1984#undef N 1985} 1986 1987static uint16_t 1988urtw_rtl2rate(uint32_t rate) 1989{ 1990#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 1991 int i; 1992 1993 for (i = 0; i < N(urtw_ratetable); i++) { 1994 if (rate == urtw_ratetable[i].val) 1995 return urtw_ratetable[i].reg; 1996 } 1997 1998 return (0); 1999#undef N 2000} 2001 2002static usb_error_t 2003urtw_update_msr(struct urtw_softc *sc) 2004{ 2005 struct ifnet *ifp = sc->sc_ifp; 2006 struct ieee80211com *ic = ifp->if_l2com; 2007 uint8_t data; 2008 usb_error_t error; 2009 2010 urtw_read8_m(sc, URTW_MSR, &data); 2011 data &= ~URTW_MSR_LINK_MASK; 2012 2013 if (sc->sc_state == IEEE80211_S_RUN) { 2014 switch (ic->ic_opmode) { 2015 case IEEE80211_M_STA: 2016 case IEEE80211_M_MONITOR: 2017 data |= URTW_MSR_LINK_STA; 2018 if (sc->sc_flags & URTW_RTL8187B) 2019 data |= URTW_MSR_LINK_ENEDCA; 2020 break; 2021 case IEEE80211_M_IBSS: 2022 data |= URTW_MSR_LINK_ADHOC; 2023 break; 2024 case IEEE80211_M_HOSTAP: 2025 data |= URTW_MSR_LINK_HOSTAP; 2026 break; 2027 default: 2028 DPRINTF(sc, URTW_DEBUG_STATE, 2029 "unsupported operation mode 0x%x\n", 2030 ic->ic_opmode); 2031 error = USB_ERR_INVAL; 2032 goto fail; 2033 } 2034 } else 2035 data |= URTW_MSR_LINK_NONE; 2036 2037 urtw_write8_m(sc, URTW_MSR, data); 2038fail: 2039 return (error); 2040} 2041 2042static usb_error_t 2043urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data) 2044{ 2045 struct usb_device_request req; 2046 usb_error_t error; 2047 2048 URTW_ASSERT_LOCKED(sc); 2049 2050 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2051 req.bRequest = URTW_8187_GETREGS_REQ; 2052 USETW(req.wValue, (val & 0xff) | 0xff00); 2053 USETW(req.wIndex, (val >> 8) & 0x3); 2054 USETW(req.wLength, sizeof(uint8_t)); 2055 2056 error = urtw_do_request(sc, &req, data); 2057 return (error); 2058} 2059 2060static usb_error_t 2061urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data) 2062{ 2063 struct usb_device_request req; 2064 usb_error_t error; 2065 2066 URTW_ASSERT_LOCKED(sc); 2067 2068 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2069 req.bRequest = URTW_8187_GETREGS_REQ; 2070 USETW(req.wValue, (val & 0xff) | 0xff00); 2071 USETW(req.wIndex, (val >> 8) & 0x3); 2072 USETW(req.wLength, sizeof(uint16_t)); 2073 2074 error = urtw_do_request(sc, &req, data); 2075 return (error); 2076} 2077 2078static usb_error_t 2079urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data) 2080{ 2081 struct usb_device_request req; 2082 usb_error_t error; 2083 2084 URTW_ASSERT_LOCKED(sc); 2085 2086 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2087 req.bRequest = URTW_8187_GETREGS_REQ; 2088 USETW(req.wValue, (val & 0xff) | 0xff00); 2089 USETW(req.wIndex, (val >> 8) & 0x3); 2090 USETW(req.wLength, sizeof(uint32_t)); 2091 2092 error = urtw_do_request(sc, &req, data); 2093 return (error); 2094} 2095 2096static usb_error_t 2097urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data) 2098{ 2099 struct usb_device_request req; 2100 2101 URTW_ASSERT_LOCKED(sc); 2102 2103 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2104 req.bRequest = URTW_8187_SETREGS_REQ; 2105 USETW(req.wValue, (val & 0xff) | 0xff00); 2106 USETW(req.wIndex, (val >> 8) & 0x3); 2107 USETW(req.wLength, sizeof(uint8_t)); 2108 2109 return (urtw_do_request(sc, &req, &data)); 2110} 2111 2112static usb_error_t 2113urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data) 2114{ 2115 struct usb_device_request req; 2116 2117 URTW_ASSERT_LOCKED(sc); 2118 2119 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2120 req.bRequest = URTW_8187_SETREGS_REQ; 2121 USETW(req.wValue, (val & 0xff) | 0xff00); 2122 USETW(req.wIndex, (val >> 8) & 0x3); 2123 USETW(req.wLength, sizeof(uint16_t)); 2124 2125 return (urtw_do_request(sc, &req, &data)); 2126} 2127 2128static usb_error_t 2129urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data) 2130{ 2131 struct usb_device_request req; 2132 2133 URTW_ASSERT_LOCKED(sc); 2134 2135 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2136 req.bRequest = URTW_8187_SETREGS_REQ; 2137 USETW(req.wValue, (val & 0xff) | 0xff00); 2138 USETW(req.wIndex, (val >> 8) & 0x3); 2139 USETW(req.wLength, sizeof(uint32_t)); 2140 2141 return (urtw_do_request(sc, &req, &data)); 2142} 2143 2144static usb_error_t 2145urtw_get_macaddr(struct urtw_softc *sc) 2146{ 2147 uint32_t data; 2148 usb_error_t error; 2149 2150 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data); 2151 if (error != 0) 2152 goto fail; 2153 sc->sc_bssid[0] = data & 0xff; 2154 sc->sc_bssid[1] = (data & 0xff00) >> 8; 2155 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data); 2156 if (error != 0) 2157 goto fail; 2158 sc->sc_bssid[2] = data & 0xff; 2159 sc->sc_bssid[3] = (data & 0xff00) >> 8; 2160 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data); 2161 if (error != 0) 2162 goto fail; 2163 sc->sc_bssid[4] = data & 0xff; 2164 sc->sc_bssid[5] = (data & 0xff00) >> 8; 2165fail: 2166 return (error); 2167} 2168 2169static usb_error_t 2170urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data) 2171{ 2172#define URTW_READCMD_LEN 3 2173 int addrlen, i; 2174 int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 }; 2175 usb_error_t error; 2176 2177 /* NB: make sure the buffer is initialized */ 2178 *data = 0; 2179 2180 /* enable EPROM programming */ 2181 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_PROGRAM_MODE); 2182 DELAY(URTW_EPROM_DELAY); 2183 2184 error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE); 2185 if (error != 0) 2186 goto fail; 2187 error = urtw_eprom_ck(sc); 2188 if (error != 0) 2189 goto fail; 2190 error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN); 2191 if (error != 0) 2192 goto fail; 2193 if (sc->sc_epromtype == URTW_EEPROM_93C56) { 2194 addrlen = 8; 2195 addrstr[0] = addr & (1 << 7); 2196 addrstr[1] = addr & (1 << 6); 2197 addrstr[2] = addr & (1 << 5); 2198 addrstr[3] = addr & (1 << 4); 2199 addrstr[4] = addr & (1 << 3); 2200 addrstr[5] = addr & (1 << 2); 2201 addrstr[6] = addr & (1 << 1); 2202 addrstr[7] = addr & (1 << 0); 2203 } else { 2204 addrlen=6; 2205 addrstr[0] = addr & (1 << 5); 2206 addrstr[1] = addr & (1 << 4); 2207 addrstr[2] = addr & (1 << 3); 2208 addrstr[3] = addr & (1 << 2); 2209 addrstr[4] = addr & (1 << 1); 2210 addrstr[5] = addr & (1 << 0); 2211 } 2212 error = urtw_eprom_sendbits(sc, addrstr, addrlen); 2213 if (error != 0) 2214 goto fail; 2215 2216 error = urtw_eprom_writebit(sc, 0); 2217 if (error != 0) 2218 goto fail; 2219 2220 for (i = 0; i < 16; i++) { 2221 error = urtw_eprom_ck(sc); 2222 if (error != 0) 2223 goto fail; 2224 error = urtw_eprom_readbit(sc, &data16); 2225 if (error != 0) 2226 goto fail; 2227 2228 (*data) |= (data16 << (15 - i)); 2229 } 2230 2231 error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE); 2232 if (error != 0) 2233 goto fail; 2234 error = urtw_eprom_ck(sc); 2235 if (error != 0) 2236 goto fail; 2237 2238 /* now disable EPROM programming */ 2239 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE); 2240fail: 2241 return (error); 2242#undef URTW_READCMD_LEN 2243} 2244 2245static usb_error_t 2246urtw_eprom_cs(struct urtw_softc *sc, int able) 2247{ 2248 uint8_t data; 2249 usb_error_t error; 2250 2251 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2252 if (able == URTW_EPROM_ENABLE) 2253 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CS); 2254 else 2255 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CS); 2256 DELAY(URTW_EPROM_DELAY); 2257fail: 2258 return (error); 2259} 2260 2261static usb_error_t 2262urtw_eprom_ck(struct urtw_softc *sc) 2263{ 2264 uint8_t data; 2265 usb_error_t error; 2266 2267 /* masking */ 2268 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2269 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK); 2270 DELAY(URTW_EPROM_DELAY); 2271 /* unmasking */ 2272 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2273 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK); 2274 DELAY(URTW_EPROM_DELAY); 2275fail: 2276 return (error); 2277} 2278 2279static usb_error_t 2280urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data) 2281{ 2282 uint8_t data8; 2283 usb_error_t error; 2284 2285 urtw_read8_m(sc, URTW_EPROM_CMD, &data8); 2286 *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0; 2287 DELAY(URTW_EPROM_DELAY); 2288 2289fail: 2290 return (error); 2291} 2292 2293static usb_error_t 2294urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit) 2295{ 2296 uint8_t data; 2297 usb_error_t error; 2298 2299 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2300 if (bit != 0) 2301 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_WRITEBIT); 2302 else 2303 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_WRITEBIT); 2304 DELAY(URTW_EPROM_DELAY); 2305fail: 2306 return (error); 2307} 2308 2309static usb_error_t 2310urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen) 2311{ 2312 int i = 0; 2313 usb_error_t error = 0; 2314 2315 for (i = 0; i < buflen; i++) { 2316 error = urtw_eprom_writebit(sc, buf[i]); 2317 if (error != 0) 2318 goto fail; 2319 error = urtw_eprom_ck(sc); 2320 if (error != 0) 2321 goto fail; 2322 } 2323fail: 2324 return (error); 2325} 2326 2327 2328static usb_error_t 2329urtw_get_txpwr(struct urtw_softc *sc) 2330{ 2331 int i, j; 2332 uint32_t data; 2333 usb_error_t error; 2334 2335 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW_BASE, &data); 2336 if (error != 0) 2337 goto fail; 2338 sc->sc_txpwr_cck_base = data & 0xf; 2339 sc->sc_txpwr_ofdm_base = (data >> 4) & 0xf; 2340 2341 for (i = 1, j = 0; i < 6; i += 2, j++) { 2342 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW0 + j, &data); 2343 if (error != 0) 2344 goto fail; 2345 sc->sc_txpwr_cck[i] = data & 0xf; 2346 sc->sc_txpwr_cck[i + 1] = (data & 0xf00) >> 8; 2347 sc->sc_txpwr_ofdm[i] = (data & 0xf0) >> 4; 2348 sc->sc_txpwr_ofdm[i + 1] = (data & 0xf000) >> 12; 2349 } 2350 for (i = 1, j = 0; i < 4; i += 2, j++) { 2351 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW1 + j, &data); 2352 if (error != 0) 2353 goto fail; 2354 sc->sc_txpwr_cck[i + 6] = data & 0xf; 2355 sc->sc_txpwr_cck[i + 6 + 1] = (data & 0xf00) >> 8; 2356 sc->sc_txpwr_ofdm[i + 6] = (data & 0xf0) >> 4; 2357 sc->sc_txpwr_ofdm[i + 6 + 1] = (data & 0xf000) >> 12; 2358 } 2359 if (sc->sc_flags & URTW_RTL8187B) { 2360 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2, &data); 2361 if (error != 0) 2362 goto fail; 2363 sc->sc_txpwr_cck[1 + 6 + 4] = data & 0xf; 2364 sc->sc_txpwr_ofdm[1 + 6 + 4] = (data & 0xf0) >> 4; 2365 error = urtw_eprom_read32(sc, 0x0a, &data); 2366 if (error != 0) 2367 goto fail; 2368 sc->sc_txpwr_cck[2 + 6 + 4] = data & 0xf; 2369 sc->sc_txpwr_ofdm[2 + 6 + 4] = (data & 0xf0) >> 4; 2370 error = urtw_eprom_read32(sc, 0x1c, &data); 2371 if (error != 0) 2372 goto fail; 2373 sc->sc_txpwr_cck[3 + 6 + 4] = data & 0xf; 2374 sc->sc_txpwr_cck[3 + 6 + 4 + 1] = (data & 0xf00) >> 8; 2375 sc->sc_txpwr_ofdm[3 + 6 + 4] = (data & 0xf0) >> 4; 2376 sc->sc_txpwr_ofdm[3 + 6 + 4 + 1] = (data & 0xf000) >> 12; 2377 } else { 2378 for (i = 1, j = 0; i < 4; i += 2, j++) { 2379 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2 + j, 2380 &data); 2381 if (error != 0) 2382 goto fail; 2383 sc->sc_txpwr_cck[i + 6 + 4] = data & 0xf; 2384 sc->sc_txpwr_cck[i + 6 + 4 + 1] = (data & 0xf00) >> 8; 2385 sc->sc_txpwr_ofdm[i + 6 + 4] = (data & 0xf0) >> 4; 2386 sc->sc_txpwr_ofdm[i + 6 + 4 + 1] = (data & 0xf000) >> 12; 2387 } 2388 } 2389fail: 2390 return (error); 2391} 2392 2393 2394static usb_error_t 2395urtw_get_rfchip(struct urtw_softc *sc) 2396{ 2397 int ret; 2398 uint8_t data8; 2399 uint32_t data; 2400 usb_error_t error; 2401 2402 if (sc->sc_flags & URTW_RTL8187B) { 2403 urtw_read8_m(sc, 0xe1, &data8); 2404 switch (data8) { 2405 case 0: 2406 sc->sc_flags |= URTW_RTL8187B_REV_B; 2407 break; 2408 case 1: 2409 sc->sc_flags |= URTW_RTL8187B_REV_D; 2410 break; 2411 case 2: 2412 sc->sc_flags |= URTW_RTL8187B_REV_E; 2413 break; 2414 default: 2415 device_printf(sc->sc_dev, "unknown type: %#x\n", data8); 2416 sc->sc_flags |= URTW_RTL8187B_REV_B; 2417 break; 2418 } 2419 } else { 2420 urtw_read32_m(sc, URTW_TX_CONF, &data); 2421 switch (data & URTW_TX_HWMASK) { 2422 case URTW_TX_R8187vD_B: 2423 sc->sc_flags |= URTW_RTL8187B; 2424 break; 2425 case URTW_TX_R8187vD: 2426 break; 2427 default: 2428 device_printf(sc->sc_dev, "unknown RTL8187L type: %#x\n", 2429 data & URTW_TX_HWMASK); 2430 break; 2431 } 2432 } 2433 2434 error = urtw_eprom_read32(sc, URTW_EPROM_RFCHIPID, &data); 2435 if (error != 0) 2436 goto fail; 2437 switch (data & 0xff) { 2438 case URTW_EPROM_RFCHIPID_RTL8225U: 2439 error = urtw_8225_isv2(sc, &ret); 2440 if (error != 0) 2441 goto fail; 2442 if (ret == 0) { 2443 sc->sc_rf_init = urtw_8225_rf_init; 2444 sc->sc_rf_set_sens = urtw_8225_rf_set_sens; 2445 sc->sc_rf_set_chan = urtw_8225_rf_set_chan; 2446 sc->sc_rf_stop = urtw_8225_rf_stop; 2447 } else { 2448 sc->sc_rf_init = urtw_8225v2_rf_init; 2449 sc->sc_rf_set_chan = urtw_8225v2_rf_set_chan; 2450 sc->sc_rf_stop = urtw_8225_rf_stop; 2451 } 2452 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2453 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2454 break; 2455 case URTW_EPROM_RFCHIPID_RTL8225Z2: 2456 sc->sc_rf_init = urtw_8225v2b_rf_init; 2457 sc->sc_rf_set_chan = urtw_8225v2b_rf_set_chan; 2458 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2459 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2460 sc->sc_rf_stop = urtw_8225_rf_stop; 2461 break; 2462 default: 2463 DPRINTF(sc, URTW_DEBUG_STATE, 2464 "unsupported RF chip %d\n", data & 0xff); 2465 error = USB_ERR_INVAL; 2466 goto fail; 2467 } 2468 2469 device_printf(sc->sc_dev, "%s rf %s hwrev %s\n", 2470 (sc->sc_flags & URTW_RTL8187B) ? "rtl8187b" : "rtl8187l", 2471 ((data & 0xff) == URTW_EPROM_RFCHIPID_RTL8225U) ? "rtl8225u" : 2472 "rtl8225z2", 2473 (sc->sc_flags & URTW_RTL8187B) ? ((data8 == 0) ? "b" : 2474 (data8 == 1) ? "d" : "e") : "none"); 2475 2476fail: 2477 return (error); 2478} 2479 2480 2481static usb_error_t 2482urtw_led_init(struct urtw_softc *sc) 2483{ 2484 uint32_t rev; 2485 usb_error_t error; 2486 2487 urtw_read8_m(sc, URTW_PSR, &sc->sc_psr); 2488 error = urtw_eprom_read32(sc, URTW_EPROM_SWREV, &rev); 2489 if (error != 0) 2490 goto fail; 2491 2492 switch (rev & URTW_EPROM_CID_MASK) { 2493 case URTW_EPROM_CID_ALPHA0: 2494 sc->sc_strategy = URTW_SW_LED_MODE1; 2495 break; 2496 case URTW_EPROM_CID_SERCOMM_PS: 2497 sc->sc_strategy = URTW_SW_LED_MODE3; 2498 break; 2499 case URTW_EPROM_CID_HW_LED: 2500 sc->sc_strategy = URTW_HW_LED; 2501 break; 2502 case URTW_EPROM_CID_RSVD0: 2503 case URTW_EPROM_CID_RSVD1: 2504 default: 2505 sc->sc_strategy = URTW_SW_LED_MODE0; 2506 break; 2507 } 2508 2509 sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0; 2510 2511fail: 2512 return (error); 2513} 2514 2515 2516static usb_error_t 2517urtw_8225_rf_init(struct urtw_softc *sc) 2518{ 2519#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 2520 int i; 2521 uint16_t data; 2522 usb_error_t error; 2523 2524 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2525 if (error) 2526 goto fail; 2527 2528 error = urtw_8225_usb_init(sc); 2529 if (error) 2530 goto fail; 2531 2532 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2533 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2534 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2535 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2536 2537 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2538 if (error) 2539 goto fail; 2540 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2541 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2542 if (error) 2543 goto fail; 2544 2545 error = urtw_8185_rf_pins_enable(sc); 2546 if (error) 2547 goto fail; 2548 usb_pause_mtx(&sc->sc_mtx, 1000); 2549 2550 for (i = 0; i < N(urtw_8225_rf_part1); i++) { 2551 urtw_8225_write(sc, urtw_8225_rf_part1[i].reg, 2552 urtw_8225_rf_part1[i].val); 2553 usb_pause_mtx(&sc->sc_mtx, 1); 2554 } 2555 usb_pause_mtx(&sc->sc_mtx, 100); 2556 urtw_8225_write(sc, 2557 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2558 usb_pause_mtx(&sc->sc_mtx, 200); 2559 urtw_8225_write(sc, 2560 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2561 usb_pause_mtx(&sc->sc_mtx, 200); 2562 urtw_8225_write(sc, 2563 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC3); 2564 2565 for (i = 0; i < 95; i++) { 2566 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2567 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, urtw_8225_rxgain[i]); 2568 } 2569 2570 urtw_8225_write(sc, 2571 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC4); 2572 urtw_8225_write(sc, 2573 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC5); 2574 2575 for (i = 0; i < 128; i++) { 2576 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2577 usb_pause_mtx(&sc->sc_mtx, 1); 2578 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2579 usb_pause_mtx(&sc->sc_mtx, 1); 2580 } 2581 2582 for (i = 0; i < N(urtw_8225_rf_part2); i++) { 2583 urtw_8187_write_phy_ofdm(sc, urtw_8225_rf_part2[i].reg, 2584 urtw_8225_rf_part2[i].val); 2585 usb_pause_mtx(&sc->sc_mtx, 1); 2586 } 2587 2588 error = urtw_8225_setgain(sc, 4); 2589 if (error) 2590 goto fail; 2591 2592 for (i = 0; i < N(urtw_8225_rf_part3); i++) { 2593 urtw_8187_write_phy_cck(sc, urtw_8225_rf_part3[i].reg, 2594 urtw_8225_rf_part3[i].val); 2595 usb_pause_mtx(&sc->sc_mtx, 1); 2596 } 2597 2598 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2599 2600 error = urtw_8225_set_txpwrlvl(sc, 1); 2601 if (error) 2602 goto fail; 2603 2604 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2605 usb_pause_mtx(&sc->sc_mtx, 1); 2606 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2607 usb_pause_mtx(&sc->sc_mtx, 1); 2608 2609 /* TX ant A, 0x0 for B */ 2610 error = urtw_8185_tx_antenna(sc, 0x3); 2611 if (error) 2612 goto fail; 2613 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2614 2615 error = urtw_8225_rf_set_chan(sc, 1); 2616fail: 2617 return (error); 2618#undef N 2619} 2620 2621static usb_error_t 2622urtw_8185_rf_pins_enable(struct urtw_softc *sc) 2623{ 2624 usb_error_t error = 0; 2625 2626 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1ff7); 2627fail: 2628 return (error); 2629} 2630 2631static usb_error_t 2632urtw_8185_tx_antenna(struct urtw_softc *sc, uint8_t ant) 2633{ 2634 usb_error_t error; 2635 2636 urtw_write8_m(sc, URTW_TX_ANTENNA, ant); 2637 usb_pause_mtx(&sc->sc_mtx, 1); 2638fail: 2639 return (error); 2640} 2641 2642static usb_error_t 2643urtw_8187_write_phy_ofdm_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2644{ 2645 2646 data = data & 0xff; 2647 return urtw_8187_write_phy(sc, addr, data); 2648} 2649 2650static usb_error_t 2651urtw_8187_write_phy_cck_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2652{ 2653 2654 data = data & 0xff; 2655 return urtw_8187_write_phy(sc, addr, data | 0x10000); 2656} 2657 2658static usb_error_t 2659urtw_8187_write_phy(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2660{ 2661 uint32_t phyw; 2662 usb_error_t error; 2663 2664 phyw = ((data << 8) | (addr | 0x80)); 2665 urtw_write8_m(sc, URTW_PHY_MAGIC4, ((phyw & 0xff000000) >> 24)); 2666 urtw_write8_m(sc, URTW_PHY_MAGIC3, ((phyw & 0x00ff0000) >> 16)); 2667 urtw_write8_m(sc, URTW_PHY_MAGIC2, ((phyw & 0x0000ff00) >> 8)); 2668 urtw_write8_m(sc, URTW_PHY_MAGIC1, ((phyw & 0x000000ff))); 2669 usb_pause_mtx(&sc->sc_mtx, 1); 2670fail: 2671 return (error); 2672} 2673 2674static usb_error_t 2675urtw_8225_setgain(struct urtw_softc *sc, int16_t gain) 2676{ 2677 usb_error_t error; 2678 2679 urtw_8187_write_phy_ofdm(sc, 0x0d, urtw_8225_gain[gain * 4]); 2680 urtw_8187_write_phy_ofdm(sc, 0x1b, urtw_8225_gain[gain * 4 + 2]); 2681 urtw_8187_write_phy_ofdm(sc, 0x1d, urtw_8225_gain[gain * 4 + 3]); 2682 urtw_8187_write_phy_ofdm(sc, 0x23, urtw_8225_gain[gain * 4 + 1]); 2683fail: 2684 return (error); 2685} 2686 2687static usb_error_t 2688urtw_8225_usb_init(struct urtw_softc *sc) 2689{ 2690 uint8_t data; 2691 usb_error_t error; 2692 2693 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 0); 2694 urtw_write8_m(sc, URTW_GPIO, 0); 2695 error = urtw_read8e(sc, 0x53, &data); 2696 if (error) 2697 goto fail; 2698 error = urtw_write8e(sc, 0x53, data | (1 << 7)); 2699 if (error) 2700 goto fail; 2701 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 4); 2702 urtw_write8_m(sc, URTW_GPIO, 0x20); 2703 urtw_write8_m(sc, URTW_GP_ENABLE, 0); 2704 2705 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x80); 2706 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x80); 2707 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x80); 2708 2709 usb_pause_mtx(&sc->sc_mtx, 500); 2710fail: 2711 return (error); 2712} 2713 2714static usb_error_t 2715urtw_8225_write_c(struct urtw_softc *sc, uint8_t addr, uint16_t data) 2716{ 2717 uint16_t d80, d82, d84; 2718 usb_error_t error; 2719 2720 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &d80); 2721 d80 &= URTW_RF_PINS_MAGIC1; 2722 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &d82); 2723 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &d84); 2724 d84 &= URTW_RF_PINS_MAGIC2; 2725 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, d82 | URTW_RF_PINS_MAGIC3); 2726 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84 | URTW_RF_PINS_MAGIC3); 2727 DELAY(10); 2728 2729 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2730 DELAY(2); 2731 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80); 2732 DELAY(10); 2733 2734 error = urtw_8225_write_s16(sc, addr, 0x8225, &data); 2735 if (error != 0) 2736 goto fail; 2737 2738 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2739 DELAY(10); 2740 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2741 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84); 2742 usb_pause_mtx(&sc->sc_mtx, 2); 2743fail: 2744 return (error); 2745} 2746 2747static usb_error_t 2748urtw_8225_write_s16(struct urtw_softc *sc, uint8_t addr, int index, 2749 uint16_t *data) 2750{ 2751 uint8_t buf[2]; 2752 uint16_t data16; 2753 struct usb_device_request req; 2754 usb_error_t error = 0; 2755 2756 data16 = *data; 2757 2758 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2759 req.bRequest = URTW_8187_SETREGS_REQ; 2760 USETW(req.wValue, addr); 2761 USETW(req.wIndex, index); 2762 USETW(req.wLength, sizeof(uint16_t)); 2763 buf[0] = (data16 & 0x00ff); 2764 buf[1] = (data16 & 0xff00) >> 8; 2765 2766 error = urtw_do_request(sc, &req, buf); 2767 2768 return (error); 2769} 2770 2771static usb_error_t 2772urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan) 2773{ 2774 usb_error_t error; 2775 2776 error = urtw_8225_set_txpwrlvl(sc, chan); 2777 if (error) 2778 goto fail; 2779 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 2780 usb_pause_mtx(&sc->sc_mtx, 10); 2781fail: 2782 return (error); 2783} 2784 2785static usb_error_t 2786urtw_8225_rf_set_sens(struct urtw_softc *sc, int sens) 2787{ 2788 usb_error_t error; 2789 2790 if (sens < 0 || sens > 6) 2791 return -1; 2792 2793 if (sens > 4) 2794 urtw_8225_write(sc, 2795 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC1); 2796 else 2797 urtw_8225_write(sc, 2798 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC2); 2799 2800 sens = 6 - sens; 2801 error = urtw_8225_setgain(sc, sens); 2802 if (error) 2803 goto fail; 2804 2805 urtw_8187_write_phy_cck(sc, 0x41, urtw_8225_threshold[sens]); 2806 2807fail: 2808 return (error); 2809} 2810 2811static usb_error_t 2812urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan) 2813{ 2814 int i, idx, set; 2815 uint8_t *cck_pwltable; 2816 uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max; 2817 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 2818 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 2819 usb_error_t error; 2820 2821 cck_pwrlvl_max = 11; 2822 ofdm_pwrlvl_max = 25; /* 12 -> 25 */ 2823 ofdm_pwrlvl_min = 10; 2824 2825 /* CCK power setting */ 2826 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 2827 idx = cck_pwrlvl % 6; 2828 set = cck_pwrlvl / 6; 2829 cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 : 2830 urtw_8225_txpwr_cck; 2831 2832 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 2833 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2834 for (i = 0; i < 8; i++) { 2835 urtw_8187_write_phy_cck(sc, 0x44 + i, 2836 cck_pwltable[idx * 8 + i]); 2837 } 2838 usb_pause_mtx(&sc->sc_mtx, 1); 2839 2840 /* OFDM power setting */ 2841 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 2842 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 2843 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 2844 2845 idx = ofdm_pwrlvl % 6; 2846 set = ofdm_pwrlvl / 6; 2847 2848 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 2849 if (error) 2850 goto fail; 2851 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 2852 urtw_8187_write_phy_ofdm(sc, 6, 0); 2853 urtw_8187_write_phy_ofdm(sc, 8, 0); 2854 2855 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 2856 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2857 urtw_8187_write_phy_ofdm(sc, 0x5, urtw_8225_txpwr_ofdm[idx]); 2858 urtw_8187_write_phy_ofdm(sc, 0x7, urtw_8225_txpwr_ofdm[idx]); 2859 usb_pause_mtx(&sc->sc_mtx, 1); 2860fail: 2861 return (error); 2862} 2863 2864 2865static usb_error_t 2866urtw_8225_rf_stop(struct urtw_softc *sc) 2867{ 2868 uint8_t data; 2869 usb_error_t error; 2870 2871 urtw_8225_write(sc, 0x4, 0x1f); 2872 2873 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2874 if (error) 2875 goto fail; 2876 2877 urtw_read8_m(sc, URTW_CONFIG3, &data); 2878 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 2879 if (sc->sc_flags & URTW_RTL8187B) { 2880 urtw_write32_m(sc, URTW_ANAPARAM2, 2881 URTW_8187B_8225_ANAPARAM2_OFF); 2882 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_OFF); 2883 urtw_write32_m(sc, URTW_ANAPARAM3, 2884 URTW_8187B_8225_ANAPARAM3_OFF); 2885 } else { 2886 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8225_ANAPARAM2_OFF); 2887 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8225_ANAPARAM_OFF); 2888 } 2889 2890 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 2891 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2892 if (error) 2893 goto fail; 2894 2895fail: 2896 return (error); 2897} 2898 2899static usb_error_t 2900urtw_8225v2_rf_init(struct urtw_softc *sc) 2901{ 2902#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 2903 int i; 2904 uint16_t data; 2905 uint32_t data32; 2906 usb_error_t error; 2907 2908 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2909 if (error) 2910 goto fail; 2911 2912 error = urtw_8225_usb_init(sc); 2913 if (error) 2914 goto fail; 2915 2916 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2917 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2918 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2919 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2920 2921 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2922 if (error) 2923 goto fail; 2924 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2925 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2926 if (error) 2927 goto fail; 2928 2929 error = urtw_8185_rf_pins_enable(sc); 2930 if (error) 2931 goto fail; 2932 2933 usb_pause_mtx(&sc->sc_mtx, 500); 2934 2935 for (i = 0; i < N(urtw_8225v2_rf_part1); i++) { 2936 urtw_8225_write(sc, urtw_8225v2_rf_part1[i].reg, 2937 urtw_8225v2_rf_part1[i].val); 2938 } 2939 usb_pause_mtx(&sc->sc_mtx, 50); 2940 2941 urtw_8225_write(sc, 2942 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 2943 2944 for (i = 0; i < 95; i++) { 2945 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2946 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 2947 urtw_8225v2_rxgain[i]); 2948 } 2949 2950 urtw_8225_write(sc, 2951 URTW_8225_ADDR_3_MAGIC, URTW_8225_ADDR_3_DATA_MAGIC1); 2952 urtw_8225_write(sc, 2953 URTW_8225_ADDR_5_MAGIC, URTW_8225_ADDR_5_DATA_MAGIC1); 2954 urtw_8225_write(sc, 2955 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC2); 2956 urtw_8225_write(sc, 2957 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2958 usb_pause_mtx(&sc->sc_mtx, 100); 2959 urtw_8225_write(sc, 2960 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2961 usb_pause_mtx(&sc->sc_mtx, 100); 2962 2963 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2964 if (error != 0) 2965 goto fail; 2966 if (data32 != URTW_8225_ADDR_6_DATA_MAGIC1) 2967 device_printf(sc->sc_dev, "expect 0xe6!! (0x%x)\n", data32); 2968 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) { 2969 urtw_8225_write(sc, 2970 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2971 usb_pause_mtx(&sc->sc_mtx, 100); 2972 urtw_8225_write(sc, 2973 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2974 usb_pause_mtx(&sc->sc_mtx, 50); 2975 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2976 if (error != 0) 2977 goto fail; 2978 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) 2979 device_printf(sc->sc_dev, "RF calibration failed\n"); 2980 } 2981 usb_pause_mtx(&sc->sc_mtx, 100); 2982 2983 urtw_8225_write(sc, 2984 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC6); 2985 for (i = 0; i < 128; i++) { 2986 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2987 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2988 } 2989 2990 for (i = 0; i < N(urtw_8225v2_rf_part2); i++) { 2991 urtw_8187_write_phy_ofdm(sc, urtw_8225v2_rf_part2[i].reg, 2992 urtw_8225v2_rf_part2[i].val); 2993 } 2994 2995 error = urtw_8225v2_setgain(sc, 4); 2996 if (error) 2997 goto fail; 2998 2999 for (i = 0; i < N(urtw_8225v2_rf_part3); i++) { 3000 urtw_8187_write_phy_cck(sc, urtw_8225v2_rf_part3[i].reg, 3001 urtw_8225v2_rf_part3[i].val); 3002 } 3003 3004 urtw_write8_m(sc, URTW_TESTR, 0x0d); 3005 3006 error = urtw_8225v2_set_txpwrlvl(sc, 1); 3007 if (error) 3008 goto fail; 3009 3010 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 3011 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 3012 3013 /* TX ant A, 0x0 for B */ 3014 error = urtw_8185_tx_antenna(sc, 0x3); 3015 if (error) 3016 goto fail; 3017 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 3018 3019 error = urtw_8225_rf_set_chan(sc, 1); 3020fail: 3021 return (error); 3022#undef N 3023} 3024 3025static usb_error_t 3026urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan) 3027{ 3028 usb_error_t error; 3029 3030 error = urtw_8225v2_set_txpwrlvl(sc, chan); 3031 if (error) 3032 goto fail; 3033 3034 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3035 usb_pause_mtx(&sc->sc_mtx, 10); 3036fail: 3037 return (error); 3038} 3039 3040static usb_error_t 3041urtw_8225_read(struct urtw_softc *sc, uint8_t addr, uint32_t *data) 3042{ 3043 int i; 3044 int16_t bit; 3045 uint8_t rlen = 12, wlen = 6; 3046 uint16_t o1, o2, o3, tmp; 3047 uint32_t d2w = ((uint32_t)(addr & 0x1f)) << 27; 3048 uint32_t mask = 0x80000000, value = 0; 3049 usb_error_t error; 3050 3051 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &o1); 3052 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &o2); 3053 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &o3); 3054 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2 | URTW_RF_PINS_MAGIC4); 3055 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3 | URTW_RF_PINS_MAGIC4); 3056 o1 &= ~URTW_RF_PINS_MAGIC4; 3057 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN); 3058 DELAY(5); 3059 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1); 3060 DELAY(5); 3061 3062 for (i = 0; i < (wlen / 2); i++, mask = mask >> 1) { 3063 bit = ((d2w & mask) != 0) ? 1 : 0; 3064 3065 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3066 DELAY(2); 3067 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3068 URTW_BB_HOST_BANG_CLK); 3069 DELAY(2); 3070 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3071 URTW_BB_HOST_BANG_CLK); 3072 DELAY(2); 3073 mask = mask >> 1; 3074 if (i == 2) 3075 break; 3076 bit = ((d2w & mask) != 0) ? 1 : 0; 3077 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3078 URTW_BB_HOST_BANG_CLK); 3079 DELAY(2); 3080 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3081 URTW_BB_HOST_BANG_CLK); 3082 DELAY(2); 3083 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3084 DELAY(1); 3085 } 3086 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW | 3087 URTW_BB_HOST_BANG_CLK); 3088 DELAY(2); 3089 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW); 3090 DELAY(2); 3091 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_RW); 3092 DELAY(2); 3093 3094 mask = 0x800; 3095 for (i = 0; i < rlen; i++, mask = mask >> 1) { 3096 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3097 o1 | URTW_BB_HOST_BANG_RW); 3098 DELAY(2); 3099 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3100 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3101 DELAY(2); 3102 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3103 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3104 DELAY(2); 3105 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3106 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3107 DELAY(2); 3108 3109 urtw_read16_m(sc, URTW_RF_PINS_INPUT, &tmp); 3110 value |= ((tmp & URTW_BB_HOST_BANG_CLK) ? mask : 0); 3111 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3112 o1 | URTW_BB_HOST_BANG_RW); 3113 DELAY(2); 3114 } 3115 3116 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN | 3117 URTW_BB_HOST_BANG_RW); 3118 DELAY(2); 3119 3120 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2); 3121 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3); 3122 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_OUTPUT_MAGIC1); 3123 3124 if (data != NULL) 3125 *data = value; 3126fail: 3127 return (error); 3128} 3129 3130 3131static usb_error_t 3132urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan) 3133{ 3134 int i; 3135 uint8_t *cck_pwrtable; 3136 uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10; 3137 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3138 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3139 usb_error_t error; 3140 3141 /* CCK power setting */ 3142 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 3143 cck_pwrlvl += sc->sc_txpwr_cck_base; 3144 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3145 cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 : 3146 urtw_8225v2_txpwr_cck; 3147 3148 for (i = 0; i < 8; i++) 3149 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3150 3151 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3152 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl]); 3153 usb_pause_mtx(&sc->sc_mtx, 1); 3154 3155 /* OFDM power setting */ 3156 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 3157 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 3158 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3159 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3160 3161 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3162 if (error) 3163 goto fail; 3164 3165 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 3166 urtw_8187_write_phy_ofdm(sc, 5, 0x0); 3167 urtw_8187_write_phy_ofdm(sc, 6, 0x40); 3168 urtw_8187_write_phy_ofdm(sc, 7, 0x0); 3169 urtw_8187_write_phy_ofdm(sc, 8, 0x40); 3170 3171 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3172 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]); 3173 usb_pause_mtx(&sc->sc_mtx, 1); 3174fail: 3175 return (error); 3176} 3177 3178static usb_error_t 3179urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain) 3180{ 3181 uint8_t *gainp; 3182 usb_error_t error; 3183 3184 /* XXX for A? */ 3185 gainp = urtw_8225v2_gain_bg; 3186 urtw_8187_write_phy_ofdm(sc, 0x0d, gainp[gain * 3]); 3187 usb_pause_mtx(&sc->sc_mtx, 1); 3188 urtw_8187_write_phy_ofdm(sc, 0x1b, gainp[gain * 3 + 1]); 3189 usb_pause_mtx(&sc->sc_mtx, 1); 3190 urtw_8187_write_phy_ofdm(sc, 0x1d, gainp[gain * 3 + 2]); 3191 usb_pause_mtx(&sc->sc_mtx, 1); 3192 urtw_8187_write_phy_ofdm(sc, 0x21, 0x17); 3193 usb_pause_mtx(&sc->sc_mtx, 1); 3194fail: 3195 return (error); 3196} 3197 3198static usb_error_t 3199urtw_8225_isv2(struct urtw_softc *sc, int *ret) 3200{ 3201 uint32_t data; 3202 usb_error_t error; 3203 3204 *ret = 1; 3205 3206 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_MAGIC5); 3207 urtw_write16_m(sc, URTW_RF_PINS_SELECT, URTW_RF_PINS_MAGIC5); 3208 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, URTW_RF_PINS_MAGIC5); 3209 usb_pause_mtx(&sc->sc_mtx, 500); 3210 3211 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3212 URTW_8225_ADDR_0_DATA_MAGIC1); 3213 3214 error = urtw_8225_read(sc, URTW_8225_ADDR_8_MAGIC, &data); 3215 if (error != 0) 3216 goto fail; 3217 if (data != URTW_8225_ADDR_8_DATA_MAGIC1) 3218 *ret = 0; 3219 else { 3220 error = urtw_8225_read(sc, URTW_8225_ADDR_9_MAGIC, &data); 3221 if (error != 0) 3222 goto fail; 3223 if (data != URTW_8225_ADDR_9_DATA_MAGIC1) 3224 *ret = 0; 3225 } 3226 3227 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3228 URTW_8225_ADDR_0_DATA_MAGIC2); 3229fail: 3230 return (error); 3231} 3232 3233static usb_error_t 3234urtw_8225v2b_rf_init(struct urtw_softc *sc) 3235{ 3236#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 3237 int i; 3238 uint8_t data8; 3239 usb_error_t error; 3240 3241 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3242 if (error) 3243 goto fail; 3244 3245 /* 3246 * initialize extra registers on 8187 3247 */ 3248 urtw_write16_m(sc, URTW_BRSR_8187B, 0xfff); 3249 3250 /* retry limit */ 3251 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3252 data8 |= URTW_CW_CONF_PERPACKET_RETRY; 3253 urtw_write8_m(sc, URTW_CW_CONF, data8); 3254 3255 /* TX AGC */ 3256 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3257 data8 |= URTW_TX_AGC_CTL_PERPACKET_GAIN; 3258 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3259 3260 /* Auto Rate Fallback Control */ 3261#define URTW_ARFR 0x1e0 3262 urtw_write16_m(sc, URTW_ARFR, 0xfff); 3263 urtw_read8_m(sc, URTW_RATE_FALLBACK, &data8); 3264 urtw_write8_m(sc, URTW_RATE_FALLBACK, 3265 data8 | URTW_RATE_FALLBACK_ENABLE); 3266 3267 urtw_read8_m(sc, URTW_MSR, &data8); 3268 urtw_write8_m(sc, URTW_MSR, data8 & 0xf3); 3269 urtw_read8_m(sc, URTW_MSR, &data8); 3270 urtw_write8_m(sc, URTW_MSR, data8 | URTW_MSR_LINK_ENEDCA); 3271 urtw_write8_m(sc, URTW_ACM_CONTROL, sc->sc_acmctl); 3272 3273 urtw_write16_m(sc, URTW_ATIM_WND, 2); 3274 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 3275#define URTW_FEMR_FOR_8187B 0x1d4 3276 urtw_write16_m(sc, URTW_FEMR_FOR_8187B, 0xffff); 3277 3278 /* led type */ 3279 urtw_read8_m(sc, URTW_CONFIG1, &data8); 3280 data8 = (data8 & 0x3f) | 0x80; 3281 urtw_write8_m(sc, URTW_CONFIG1, data8); 3282 3283 /* applying MAC address again. */ 3284 urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)sc->sc_bssid)[0]); 3285 urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)sc->sc_bssid)[1] & 0xffff); 3286 3287 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3288 if (error) 3289 goto fail; 3290 3291 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 3292 3293 /* 3294 * MAC configuration 3295 */ 3296 for (i = 0; i < N(urtw_8225v2b_rf_part1); i++) 3297 urtw_write8_m(sc, urtw_8225v2b_rf_part1[i].reg, 3298 urtw_8225v2b_rf_part1[i].val); 3299 urtw_write16_m(sc, URTW_TID_AC_MAP, 0xfa50); 3300 urtw_write16_m(sc, URTW_INT_MIG, 0x0000); 3301 urtw_write32_m(sc, 0x1f0, 0); 3302 urtw_write32_m(sc, 0x1f4, 0); 3303 urtw_write8_m(sc, 0x1f8, 0); 3304 urtw_write32_m(sc, URTW_RF_TIMING, 0x4001); 3305 3306#define URTW_RFSW_CTRL 0x272 3307 urtw_write16_m(sc, URTW_RFSW_CTRL, 0x569a); 3308 3309 /* 3310 * initialize PHY 3311 */ 3312 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3313 if (error) 3314 goto fail; 3315 urtw_read8_m(sc, URTW_CONFIG3, &data8); 3316 urtw_write8_m(sc, URTW_CONFIG3, 3317 data8 | URTW_CONFIG3_ANAPARAM_WRITE); 3318 3319 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3320 if (error) 3321 goto fail; 3322 3323 /* setup RFE initial timing */ 3324 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x0480); 3325 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x2488); 3326 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1fff); 3327 usb_pause_mtx(&sc->sc_mtx, 1100); 3328 3329 for (i = 0; i < N(urtw_8225v2b_rf_part0); i++) { 3330 urtw_8225_write(sc, urtw_8225v2b_rf_part0[i].reg, 3331 urtw_8225v2b_rf_part0[i].val); 3332 usb_pause_mtx(&sc->sc_mtx, 1); 3333 } 3334 urtw_8225_write(sc, 0x00, 0x01b7); 3335 3336 for (i = 0; i < 95; i++) { 3337 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 3338 usb_pause_mtx(&sc->sc_mtx, 1); 3339 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 3340 urtw_8225v2b_rxgain[i]); 3341 usb_pause_mtx(&sc->sc_mtx, 1); 3342 } 3343 3344 urtw_8225_write(sc, URTW_8225_ADDR_3_MAGIC, 0x080); 3345 usb_pause_mtx(&sc->sc_mtx, 1); 3346 urtw_8225_write(sc, URTW_8225_ADDR_5_MAGIC, 0x004); 3347 usb_pause_mtx(&sc->sc_mtx, 1); 3348 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x0b7); 3349 usb_pause_mtx(&sc->sc_mtx, 1); 3350 usb_pause_mtx(&sc->sc_mtx, 3000); 3351 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0xc4d); 3352 usb_pause_mtx(&sc->sc_mtx, 2000); 3353 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0x44d); 3354 usb_pause_mtx(&sc->sc_mtx, 1); 3355 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x2bf); 3356 usb_pause_mtx(&sc->sc_mtx, 1); 3357 3358 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 0x03); 3359 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 0x07); 3360 urtw_write8_m(sc, URTW_TX_ANTENNA, 0x03); 3361 3362 urtw_8187_write_phy_ofdm(sc, 0x80, 0x12); 3363 for (i = 0; i < 128; i++) { 3364 uint32_t addr, data; 3365 3366 data = (urtw_8225z2_agc[i] << 8) | 0x0000008f; 3367 addr = ((i + 0x80) << 8) | 0x0000008e; 3368 3369 urtw_8187_write_phy_ofdm(sc, data & 0x7f, (data >> 8) & 0xff); 3370 urtw_8187_write_phy_ofdm(sc, addr & 0x7f, (addr >> 8) & 0xff); 3371 urtw_8187_write_phy_ofdm(sc, 0x0e, 0x00); 3372 } 3373 urtw_8187_write_phy_ofdm(sc, 0x80, 0x10); 3374 3375 for (i = 0; i < N(urtw_8225v2b_rf_part2); i++) 3376 urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val); 3377 3378 urtw_write32_m(sc, URTW_8187B_AC_VO, (7 << 12) | (3 << 8) | 0x1c); 3379 urtw_write32_m(sc, URTW_8187B_AC_VI, (7 << 12) | (3 << 8) | 0x1c); 3380 urtw_write32_m(sc, URTW_8187B_AC_BE, (7 << 12) | (3 << 8) | 0x1c); 3381 urtw_write32_m(sc, URTW_8187B_AC_BK, (7 << 12) | (3 << 8) | 0x1c); 3382 3383 urtw_8187_write_phy_ofdm(sc, 0x97, 0x46); 3384 urtw_8187_write_phy_ofdm(sc, 0xa4, 0xb6); 3385 urtw_8187_write_phy_ofdm(sc, 0x85, 0xfc); 3386 urtw_8187_write_phy_cck(sc, 0xc1, 0x88); 3387 3388fail: 3389 return (error); 3390#undef N 3391} 3392 3393static usb_error_t 3394urtw_8225v2b_rf_set_chan(struct urtw_softc *sc, int chan) 3395{ 3396 usb_error_t error; 3397 3398 error = urtw_8225v2b_set_txpwrlvl(sc, chan); 3399 if (error) 3400 goto fail; 3401 3402 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3403 usb_pause_mtx(&sc->sc_mtx, 10); 3404fail: 3405 return (error); 3406} 3407 3408static usb_error_t 3409urtw_8225v2b_set_txpwrlvl(struct urtw_softc *sc, int chan) 3410{ 3411 int i; 3412 uint8_t *cck_pwrtable; 3413 uint8_t cck_pwrlvl_max = 15; 3414 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3415 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3416 usb_error_t error; 3417 3418 /* CCK power setting */ 3419 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? 3420 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? cck_pwrlvl_max : 22) : 3421 (cck_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 0 : 7)); 3422 cck_pwrlvl += sc->sc_txpwr_cck_base; 3423 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3424 cck_pwrtable = (chan == 14) ? urtw_8225v2b_txpwr_cck_ch14 : 3425 urtw_8225v2b_txpwr_cck; 3426 3427 if (sc->sc_flags & URTW_RTL8187B_REV_B) 3428 cck_pwrtable += (cck_pwrlvl <= 6) ? 0 : 3429 ((cck_pwrlvl <= 11) ? 8 : 16); 3430 else 3431 cck_pwrtable += (cck_pwrlvl <= 5) ? 0 : 3432 ((cck_pwrlvl <= 11) ? 8 : ((cck_pwrlvl <= 17) ? 16 : 24)); 3433 3434 for (i = 0; i < 8; i++) 3435 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3436 3437 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3438 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl] << 1); 3439 usb_pause_mtx(&sc->sc_mtx, 1); 3440 3441 /* OFDM power setting */ 3442 ofdm_pwrlvl = (ofdm_pwrlvl > 15) ? 3443 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 17 : 25) : 3444 (ofdm_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 2 : 10)); 3445 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3446 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3447 3448 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3449 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl] << 1); 3450 3451 if (sc->sc_flags & URTW_RTL8187B_REV_B) { 3452 if (ofdm_pwrlvl <= 11) { 3453 urtw_8187_write_phy_ofdm(sc, 0x87, 0x60); 3454 urtw_8187_write_phy_ofdm(sc, 0x89, 0x60); 3455 } else { 3456 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3457 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3458 } 3459 } else { 3460 if (ofdm_pwrlvl <= 11) { 3461 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3462 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3463 } else if (ofdm_pwrlvl <= 17) { 3464 urtw_8187_write_phy_ofdm(sc, 0x87, 0x54); 3465 urtw_8187_write_phy_ofdm(sc, 0x89, 0x54); 3466 } else { 3467 urtw_8187_write_phy_ofdm(sc, 0x87, 0x50); 3468 urtw_8187_write_phy_ofdm(sc, 0x89, 0x50); 3469 } 3470 } 3471 usb_pause_mtx(&sc->sc_mtx, 1); 3472fail: 3473 return (error); 3474} 3475 3476static usb_error_t 3477urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data) 3478{ 3479 struct usb_device_request req; 3480 usb_error_t error; 3481 3482 req.bmRequestType = UT_READ_VENDOR_DEVICE; 3483 req.bRequest = URTW_8187_GETREGS_REQ; 3484 USETW(req.wValue, val | 0xfe00); 3485 USETW(req.wIndex, 0); 3486 USETW(req.wLength, sizeof(uint8_t)); 3487 3488 error = urtw_do_request(sc, &req, data); 3489 return (error); 3490} 3491 3492static usb_error_t 3493urtw_write8e(struct urtw_softc *sc, int val, uint8_t data) 3494{ 3495 struct usb_device_request req; 3496 3497 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 3498 req.bRequest = URTW_8187_SETREGS_REQ; 3499 USETW(req.wValue, val | 0xfe00); 3500 USETW(req.wIndex, 0); 3501 USETW(req.wLength, sizeof(uint8_t)); 3502 3503 return (urtw_do_request(sc, &req, &data)); 3504} 3505 3506static usb_error_t 3507urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val) 3508{ 3509 uint8_t data; 3510 usb_error_t error; 3511 3512 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3513 if (error) 3514 goto fail; 3515 3516 urtw_read8_m(sc, URTW_CONFIG3, &data); 3517 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3518 urtw_write32_m(sc, URTW_ANAPARAM, val); 3519 urtw_read8_m(sc, URTW_CONFIG3, &data); 3520 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3521 3522 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3523 if (error) 3524 goto fail; 3525fail: 3526 return (error); 3527} 3528 3529static usb_error_t 3530urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val) 3531{ 3532 uint8_t data; 3533 usb_error_t error; 3534 3535 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3536 if (error) 3537 goto fail; 3538 3539 urtw_read8_m(sc, URTW_CONFIG3, &data); 3540 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3541 urtw_write32_m(sc, URTW_ANAPARAM2, val); 3542 urtw_read8_m(sc, URTW_CONFIG3, &data); 3543 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3544 3545 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3546 if (error) 3547 goto fail; 3548fail: 3549 return (error); 3550} 3551 3552static usb_error_t 3553urtw_intr_enable(struct urtw_softc *sc) 3554{ 3555 usb_error_t error; 3556 3557 urtw_write16_m(sc, URTW_INTR_MASK, 0xffff); 3558fail: 3559 return (error); 3560} 3561 3562static usb_error_t 3563urtw_intr_disable(struct urtw_softc *sc) 3564{ 3565 usb_error_t error; 3566 3567 urtw_write16_m(sc, URTW_INTR_MASK, 0); 3568fail: 3569 return (error); 3570} 3571 3572static usb_error_t 3573urtw_reset(struct urtw_softc *sc) 3574{ 3575 uint8_t data; 3576 usb_error_t error; 3577 3578 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3579 if (error) 3580 goto fail; 3581 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3582 if (error) 3583 goto fail; 3584 3585 error = urtw_intr_disable(sc); 3586 if (error) 3587 goto fail; 3588 usb_pause_mtx(&sc->sc_mtx, 100); 3589 3590 error = urtw_write8e(sc, 0x18, 0x10); 3591 if (error != 0) 3592 goto fail; 3593 error = urtw_write8e(sc, 0x18, 0x11); 3594 if (error != 0) 3595 goto fail; 3596 error = urtw_write8e(sc, 0x18, 0x00); 3597 if (error != 0) 3598 goto fail; 3599 usb_pause_mtx(&sc->sc_mtx, 100); 3600 3601 urtw_read8_m(sc, URTW_CMD, &data); 3602 data = (data & 0x2) | URTW_CMD_RST; 3603 urtw_write8_m(sc, URTW_CMD, data); 3604 usb_pause_mtx(&sc->sc_mtx, 100); 3605 3606 urtw_read8_m(sc, URTW_CMD, &data); 3607 if (data & URTW_CMD_RST) { 3608 device_printf(sc->sc_dev, "reset timeout\n"); 3609 goto fail; 3610 } 3611 3612 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 3613 if (error) 3614 goto fail; 3615 usb_pause_mtx(&sc->sc_mtx, 100); 3616 3617 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3618 if (error) 3619 goto fail; 3620 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3621 if (error) 3622 goto fail; 3623fail: 3624 return (error); 3625} 3626 3627static usb_error_t 3628urtw_led_ctl(struct urtw_softc *sc, int mode) 3629{ 3630 usb_error_t error = 0; 3631 3632 switch (sc->sc_strategy) { 3633 case URTW_SW_LED_MODE0: 3634 error = urtw_led_mode0(sc, mode); 3635 break; 3636 case URTW_SW_LED_MODE1: 3637 error = urtw_led_mode1(sc, mode); 3638 break; 3639 case URTW_SW_LED_MODE2: 3640 error = urtw_led_mode2(sc, mode); 3641 break; 3642 case URTW_SW_LED_MODE3: 3643 error = urtw_led_mode3(sc, mode); 3644 break; 3645 default: 3646 DPRINTF(sc, URTW_DEBUG_STATE, 3647 "unsupported LED mode %d\n", sc->sc_strategy); 3648 error = USB_ERR_INVAL; 3649 break; 3650 } 3651 3652 return (error); 3653} 3654 3655static usb_error_t 3656urtw_led_mode0(struct urtw_softc *sc, int mode) 3657{ 3658 3659 switch (mode) { 3660 case URTW_LED_CTL_POWER_ON: 3661 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK; 3662 break; 3663 case URTW_LED_CTL_TX: 3664 if (sc->sc_gpio_ledinprogress == 1) 3665 return (0); 3666 3667 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL; 3668 sc->sc_gpio_blinktime = 2; 3669 break; 3670 case URTW_LED_CTL_LINK: 3671 sc->sc_gpio_ledstate = URTW_LED_ON; 3672 break; 3673 default: 3674 DPRINTF(sc, URTW_DEBUG_STATE, 3675 "unsupported LED mode 0x%x", mode); 3676 return (USB_ERR_INVAL); 3677 } 3678 3679 switch (sc->sc_gpio_ledstate) { 3680 case URTW_LED_ON: 3681 if (sc->sc_gpio_ledinprogress != 0) 3682 break; 3683 urtw_led_on(sc, URTW_LED_GPIO); 3684 break; 3685 case URTW_LED_BLINK_NORMAL: 3686 if (sc->sc_gpio_ledinprogress != 0) 3687 break; 3688 sc->sc_gpio_ledinprogress = 1; 3689 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ? 3690 URTW_LED_OFF : URTW_LED_ON; 3691 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3692 break; 3693 case URTW_LED_POWER_ON_BLINK: 3694 urtw_led_on(sc, URTW_LED_GPIO); 3695 usb_pause_mtx(&sc->sc_mtx, 100); 3696 urtw_led_off(sc, URTW_LED_GPIO); 3697 break; 3698 default: 3699 DPRINTF(sc, URTW_DEBUG_STATE, 3700 "unknown LED status 0x%x", sc->sc_gpio_ledstate); 3701 return (USB_ERR_INVAL); 3702 } 3703 return (0); 3704} 3705 3706static usb_error_t 3707urtw_led_mode1(struct urtw_softc *sc, int mode) 3708{ 3709 return (USB_ERR_INVAL); 3710} 3711 3712static usb_error_t 3713urtw_led_mode2(struct urtw_softc *sc, int mode) 3714{ 3715 return (USB_ERR_INVAL); 3716} 3717 3718static usb_error_t 3719urtw_led_mode3(struct urtw_softc *sc, int mode) 3720{ 3721 return (USB_ERR_INVAL); 3722} 3723 3724static usb_error_t 3725urtw_led_on(struct urtw_softc *sc, int type) 3726{ 3727 usb_error_t error; 3728 3729 if (type == URTW_LED_GPIO) { 3730 switch (sc->sc_gpio_ledpin) { 3731 case URTW_LED_PIN_GPIO0: 3732 urtw_write8_m(sc, URTW_GPIO, 0x01); 3733 urtw_write8_m(sc, URTW_GP_ENABLE, 0x00); 3734 break; 3735 default: 3736 DPRINTF(sc, URTW_DEBUG_STATE, 3737 "unsupported LED PIN type 0x%x", 3738 sc->sc_gpio_ledpin); 3739 error = USB_ERR_INVAL; 3740 goto fail; 3741 } 3742 } else { 3743 DPRINTF(sc, URTW_DEBUG_STATE, 3744 "unsupported LED type 0x%x", type); 3745 error = USB_ERR_INVAL; 3746 goto fail; 3747 } 3748 3749 sc->sc_gpio_ledon = 1; 3750fail: 3751 return (error); 3752} 3753 3754static usb_error_t 3755urtw_led_off(struct urtw_softc *sc, int type) 3756{ 3757 usb_error_t error; 3758 3759 if (type == URTW_LED_GPIO) { 3760 switch (sc->sc_gpio_ledpin) { 3761 case URTW_LED_PIN_GPIO0: 3762 urtw_write8_m(sc, URTW_GPIO, URTW_GPIO_DATA_MAGIC1); 3763 urtw_write8_m(sc, 3764 URTW_GP_ENABLE, URTW_GP_ENABLE_DATA_MAGIC1); 3765 break; 3766 default: 3767 DPRINTF(sc, URTW_DEBUG_STATE, 3768 "unsupported LED PIN type 0x%x", 3769 sc->sc_gpio_ledpin); 3770 error = USB_ERR_INVAL; 3771 goto fail; 3772 } 3773 } else { 3774 DPRINTF(sc, URTW_DEBUG_STATE, 3775 "unsupported LED type 0x%x", type); 3776 error = USB_ERR_INVAL; 3777 goto fail; 3778 } 3779 3780 sc->sc_gpio_ledon = 0; 3781 3782fail: 3783 return (error); 3784} 3785 3786static void 3787urtw_led_ch(void *arg) 3788{ 3789 struct urtw_softc *sc = arg; 3790 struct ifnet *ifp = sc->sc_ifp; 3791 struct ieee80211com *ic = ifp->if_l2com; 3792 3793 ieee80211_runtask(ic, &sc->sc_led_task); 3794} 3795 3796static void 3797urtw_ledtask(void *arg, int pending) 3798{ 3799 struct urtw_softc *sc = arg; 3800 3801 if (sc->sc_strategy != URTW_SW_LED_MODE0) { 3802 DPRINTF(sc, URTW_DEBUG_STATE, 3803 "could not process a LED strategy 0x%x", 3804 sc->sc_strategy); 3805 return; 3806 } 3807 3808 URTW_LOCK(sc); 3809 urtw_led_blink(sc); 3810 URTW_UNLOCK(sc); 3811} 3812 3813static usb_error_t 3814urtw_led_blink(struct urtw_softc *sc) 3815{ 3816 uint8_t ing = 0; 3817 usb_error_t error; 3818 3819 if (sc->sc_gpio_blinkstate == URTW_LED_ON) 3820 error = urtw_led_on(sc, URTW_LED_GPIO); 3821 else 3822 error = urtw_led_off(sc, URTW_LED_GPIO); 3823 sc->sc_gpio_blinktime--; 3824 if (sc->sc_gpio_blinktime == 0) 3825 ing = 1; 3826 else { 3827 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL && 3828 sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY && 3829 sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3) 3830 ing = 1; 3831 } 3832 if (ing == 1) { 3833 if (sc->sc_gpio_ledstate == URTW_LED_ON && 3834 sc->sc_gpio_ledon == 0) 3835 error = urtw_led_on(sc, URTW_LED_GPIO); 3836 else if (sc->sc_gpio_ledstate == URTW_LED_OFF && 3837 sc->sc_gpio_ledon == 1) 3838 error = urtw_led_off(sc, URTW_LED_GPIO); 3839 3840 sc->sc_gpio_blinktime = 0; 3841 sc->sc_gpio_ledinprogress = 0; 3842 return (0); 3843 } 3844 3845 sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ? 3846 URTW_LED_ON : URTW_LED_OFF; 3847 3848 switch (sc->sc_gpio_ledstate) { 3849 case URTW_LED_BLINK_NORMAL: 3850 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3851 break; 3852 default: 3853 DPRINTF(sc, URTW_DEBUG_STATE, 3854 "unknown LED status 0x%x", 3855 sc->sc_gpio_ledstate); 3856 return (USB_ERR_INVAL); 3857 } 3858 return (0); 3859} 3860 3861static usb_error_t 3862urtw_rx_enable(struct urtw_softc *sc) 3863{ 3864 uint8_t data; 3865 usb_error_t error; 3866 3867 usbd_transfer_start((sc->sc_flags & URTW_RTL8187B) ? 3868 sc->sc_xfer[URTW_8187B_BULK_RX] : sc->sc_xfer[URTW_8187L_BULK_RX]); 3869 3870 error = urtw_rx_setconf(sc); 3871 if (error != 0) 3872 goto fail; 3873 3874 if ((sc->sc_flags & URTW_RTL8187B) == 0) { 3875 urtw_read8_m(sc, URTW_CMD, &data); 3876 urtw_write8_m(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE); 3877 } 3878fail: 3879 return (error); 3880} 3881 3882static usb_error_t 3883urtw_tx_enable(struct urtw_softc *sc) 3884{ 3885 uint8_t data8; 3886 uint32_t data; 3887 usb_error_t error; 3888 3889 if (sc->sc_flags & URTW_RTL8187B) { 3890 urtw_read32_m(sc, URTW_TX_CONF, &data); 3891 data &= ~URTW_TX_LOOPBACK_MASK; 3892 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3893 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3894 data &= ~URTW_TX_SWPLCPLEN; 3895 data |= URTW_TX_HW_SEQNUM | URTW_TX_DISREQQSIZE | 3896 (7 << 8) | /* short retry limit */ 3897 (7 << 0) | /* long retry limit */ 3898 (7 << 21); /* MAX TX DMA */ 3899 urtw_write32_m(sc, URTW_TX_CONF, data); 3900 3901 urtw_read8_m(sc, URTW_MSR, &data8); 3902 data8 |= URTW_MSR_LINK_ENEDCA; 3903 urtw_write8_m(sc, URTW_MSR, data8); 3904 return (error); 3905 } 3906 3907 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3908 data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY); 3909 urtw_write8_m(sc, URTW_CW_CONF, data8); 3910 3911 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3912 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN; 3913 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 3914 data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT; 3915 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3916 3917 urtw_read32_m(sc, URTW_TX_CONF, &data); 3918 data &= ~URTW_TX_LOOPBACK_MASK; 3919 data |= URTW_TX_LOOPBACK_NONE; 3920 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3921 data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT; 3922 data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT; 3923 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3924 data |= URTW_TX_MXDMA_2048 | URTW_TX_CWMIN | URTW_TX_DISCW; 3925 data &= ~URTW_TX_SWPLCPLEN; 3926 data |= URTW_TX_NOICV; 3927 urtw_write32_m(sc, URTW_TX_CONF, data); 3928 3929 urtw_read8_m(sc, URTW_CMD, &data8); 3930 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 3931fail: 3932 return (error); 3933} 3934 3935static usb_error_t 3936urtw_rx_setconf(struct urtw_softc *sc) 3937{ 3938 struct ifnet *ifp = sc->sc_ifp; 3939 struct ieee80211com *ic = ifp->if_l2com; 3940 uint32_t data; 3941 usb_error_t error; 3942 3943 urtw_read32_m(sc, URTW_RX, &data); 3944 data = data &~ URTW_RX_FILTER_MASK; 3945 if (sc->sc_flags & URTW_RTL8187B) { 3946 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA | 3947 URTW_RX_FILTER_MCAST | URTW_RX_FILTER_BCAST | 3948 URTW_RX_FILTER_NICMAC | URTW_RX_CHECK_BSSID | 3949 URTW_RX_FIFO_THRESHOLD_NONE | 3950 URTW_MAX_RX_DMA_2048 | 3951 URTW_RX_AUTORESETPHY | URTW_RCR_ONLYERLPKT; 3952 } else { 3953 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA; 3954 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST; 3955 3956 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 3957 data = data | URTW_RX_FILTER_ICVERR; 3958 data = data | URTW_RX_FILTER_PWR; 3959 } 3960 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR) 3961 data = data | URTW_RX_FILTER_CRCERR; 3962 3963 if (ic->ic_opmode == IEEE80211_M_MONITOR || 3964 (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) { 3965 data = data | URTW_RX_FILTER_ALLMAC; 3966 } else { 3967 data = data | URTW_RX_FILTER_NICMAC; 3968 data = data | URTW_RX_CHECK_BSSID; 3969 } 3970 3971 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK; 3972 data = data | URTW_RX_FIFO_THRESHOLD_NONE | 3973 URTW_RX_AUTORESETPHY; 3974 data = data &~ URTW_MAX_RX_DMA_MASK; 3975 data = data | URTW_MAX_RX_DMA_2048 | URTW_RCR_ONLYERLPKT; 3976 } 3977 3978 urtw_write32_m(sc, URTW_RX, data); 3979fail: 3980 return (error); 3981} 3982 3983static struct mbuf * 3984urtw_rxeof(struct usb_xfer *xfer, struct urtw_data *data, int *rssi_p, 3985 int8_t *nf_p) 3986{ 3987 int actlen, flen, rssi; 3988 struct ieee80211_frame *wh; 3989 struct mbuf *m, *mnew; 3990 struct urtw_softc *sc = data->sc; 3991 struct ifnet *ifp = sc->sc_ifp; 3992 struct ieee80211com *ic = ifp->if_l2com; 3993 uint8_t noise = 0, rate; 3994 3995 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 3996 3997 if (actlen < (int)URTW_MIN_RXBUFSZ) { 3998 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 3999 return (NULL); 4000 } 4001 4002 if (sc->sc_flags & URTW_RTL8187B) { 4003 struct urtw_8187b_rxhdr *rx; 4004 4005 rx = (struct urtw_8187b_rxhdr *)(data->buf + 4006 (actlen - (sizeof(struct urtw_8187b_rxhdr)))); 4007 flen = le32toh(rx->flag) & 0xfff; 4008 if (flen > actlen) { 4009 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 4010 return (NULL); 4011 } 4012 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf; 4013 /* XXX correct? */ 4014 rssi = rx->rssi & URTW_RX_RSSI_MASK; 4015 noise = rx->noise; 4016 } else { 4017 struct urtw_8187l_rxhdr *rx; 4018 4019 rx = (struct urtw_8187l_rxhdr *)(data->buf + 4020 (actlen - (sizeof(struct urtw_8187l_rxhdr)))); 4021 flen = le32toh(rx->flag) & 0xfff; 4022 if (flen > actlen) { 4023 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 4024 return (NULL); 4025 } 4026 4027 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf; 4028 /* XXX correct? */ 4029 rssi = rx->rssi & URTW_RX_8187L_RSSI_MASK; 4030 noise = rx->noise; 4031 } 4032 4033 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 4034 if (mnew == NULL) { 4035 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 4036 return (NULL); 4037 } 4038 4039 m = data->m; 4040 data->m = mnew; 4041 data->buf = mtod(mnew, uint8_t *); 4042 4043 /* finalize mbuf */ 4044 m->m_pkthdr.rcvif = ifp; 4045 m->m_pkthdr.len = m->m_len = flen - IEEE80211_CRC_LEN; 4046 4047 if (ieee80211_radiotap_active(ic)) { 4048 struct urtw_rx_radiotap_header *tap = &sc->sc_rxtap; 4049 4050 /* XXX Are variables correct? */ 4051 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 4052 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 4053 tap->wr_dbm_antsignal = (int8_t)rssi; 4054 } 4055 4056 wh = mtod(m, struct ieee80211_frame *); 4057 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_DATA) 4058 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate; 4059 4060 *rssi_p = rssi; 4061 *nf_p = noise; /* XXX correct? */ 4062 4063 return (m); 4064} 4065 4066static void 4067urtw_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 4068{ 4069 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4070 struct ifnet *ifp = sc->sc_ifp; 4071 struct ieee80211com *ic = ifp->if_l2com; 4072 struct ieee80211_frame *wh; 4073 struct ieee80211_node *ni; 4074 struct mbuf *m = NULL; 4075 struct urtw_data *data; 4076 int8_t nf = -95; 4077 int rssi = 1; 4078 4079 URTW_ASSERT_LOCKED(sc); 4080 4081 switch (USB_GET_STATE(xfer)) { 4082 case USB_ST_TRANSFERRED: 4083 data = STAILQ_FIRST(&sc->sc_rx_active); 4084 if (data == NULL) 4085 goto setup; 4086 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4087 m = urtw_rxeof(xfer, data, &rssi, &nf); 4088 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4089 /* FALLTHROUGH */ 4090 case USB_ST_SETUP: 4091setup: 4092 data = STAILQ_FIRST(&sc->sc_rx_inactive); 4093 if (data == NULL) { 4094 KASSERT(m == NULL, ("mbuf isn't NULL")); 4095 return; 4096 } 4097 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 4098 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 4099 usbd_xfer_set_frame_data(xfer, 0, data->buf, 4100 usbd_xfer_max_len(xfer)); 4101 usbd_transfer_submit(xfer); 4102 4103 /* 4104 * To avoid LOR we should unlock our private mutex here to call 4105 * ieee80211_input() because here is at the end of a USB 4106 * callback and safe to unlock. 4107 */ 4108 URTW_UNLOCK(sc); 4109 if (m != NULL) { 4110 wh = mtod(m, struct ieee80211_frame *); 4111 ni = ieee80211_find_rxnode(ic, 4112 (struct ieee80211_frame_min *)wh); 4113 if (ni != NULL) { 4114 (void) ieee80211_input(ni, m, rssi, nf); 4115 /* node is no longer needed */ 4116 ieee80211_free_node(ni); 4117 } else 4118 (void) ieee80211_input_all(ic, m, rssi, nf); 4119 m = NULL; 4120 } 4121 URTW_LOCK(sc); 4122 break; 4123 default: 4124 /* needs it to the inactive queue due to a error. */ 4125 data = STAILQ_FIRST(&sc->sc_rx_active); 4126 if (data != NULL) { 4127 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4128 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4129 } 4130 if (error != USB_ERR_CANCELLED) { 4131 usbd_xfer_set_stall(xfer); 4132 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 4133 goto setup; 4134 } 4135 break; 4136 } 4137} 4138 4139#define URTW_STATUS_TYPE_TXCLOSE 1 4140#define URTW_STATUS_TYPE_BEACON_INTR 0 4141 4142static void 4143urtw_txstatus_eof(struct usb_xfer *xfer) 4144{ 4145 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4146 struct ifnet *ifp = sc->sc_ifp; 4147 int actlen, type, pktretry, seq; 4148 uint64_t val; 4149 4150 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 4151 4152 if (actlen != sizeof(uint64_t)) 4153 return; 4154 4155 val = le64toh(sc->sc_txstatus); 4156 type = (val >> 30) & 0x3; 4157 if (type == URTW_STATUS_TYPE_TXCLOSE) { 4158 pktretry = val & 0xff; 4159 seq = (val >> 16) & 0xff; 4160 if (pktretry == URTW_TX_MAXRETRY) 4161 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 4162 DPRINTF(sc, URTW_DEBUG_TXSTATUS, "pktretry %d seq %#x\n", 4163 pktretry, seq); 4164 } 4165} 4166 4167static void 4168urtw_bulk_tx_status_callback(struct usb_xfer *xfer, usb_error_t error) 4169{ 4170 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4171 struct ifnet *ifp = sc->sc_ifp; 4172 void *dma_buf = usbd_xfer_get_frame_buffer(xfer, 0); 4173 4174 URTW_ASSERT_LOCKED(sc); 4175 4176 switch (USB_GET_STATE(xfer)) { 4177 case USB_ST_TRANSFERRED: 4178 urtw_txstatus_eof(xfer); 4179 /* FALLTHROUGH */ 4180 case USB_ST_SETUP: 4181setup: 4182 memcpy(dma_buf, &sc->sc_txstatus, sizeof(uint64_t)); 4183 usbd_xfer_set_frame_len(xfer, 0, sizeof(uint64_t)); 4184 usbd_transfer_submit(xfer); 4185 break; 4186 default: 4187 if (error != USB_ERR_CANCELLED) { 4188 usbd_xfer_set_stall(xfer); 4189 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 4190 goto setup; 4191 } 4192 break; 4193 } 4194} 4195 4196static void 4197urtw_txeof(struct usb_xfer *xfer, struct urtw_data *data) 4198{ 4199 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4200 struct ifnet *ifp = sc->sc_ifp; 4201 struct mbuf *m; 4202 4203 URTW_ASSERT_LOCKED(sc); 4204 4205 /* 4206 * Do any tx complete callback. Note this must be done before releasing 4207 * the node reference. 4208 */ 4209 if (data->m) { 4210 m = data->m; 4211 if (m->m_flags & M_TXCB) { 4212 /* XXX status? */ 4213 ieee80211_process_callback(data->ni, m, 0); 4214 } 4215 m_freem(m); 4216 data->m = NULL; 4217 } 4218 if (data->ni) { 4219 ieee80211_free_node(data->ni); 4220 data->ni = NULL; 4221 } 4222 sc->sc_txtimer = 0; 4223 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 4224 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 4225} 4226 4227static void 4228urtw_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 4229{ 4230 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4231 struct ifnet *ifp = sc->sc_ifp; 4232 struct urtw_data *data; 4233 4234 URTW_ASSERT_LOCKED(sc); 4235 4236 switch (USB_GET_STATE(xfer)) { 4237 case USB_ST_TRANSFERRED: 4238 data = STAILQ_FIRST(&sc->sc_tx_active); 4239 if (data == NULL) 4240 goto setup; 4241 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 4242 urtw_txeof(xfer, data); 4243 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 4244 /* FALLTHROUGH */ 4245 case USB_ST_SETUP: 4246setup: 4247 data = STAILQ_FIRST(&sc->sc_tx_pending); 4248 if (data == NULL) { 4249 DPRINTF(sc, URTW_DEBUG_XMIT, 4250 "%s: empty pending queue\n", __func__); 4251 return; 4252 } 4253 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 4254 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 4255 4256 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 4257 usbd_transfer_submit(xfer); 4258 4259 URTW_UNLOCK(sc); 4260 urtw_start(ifp); 4261 URTW_LOCK(sc); 4262 break; 4263 default: 4264 data = STAILQ_FIRST(&sc->sc_tx_active); 4265 if (data == NULL) 4266 goto setup; 4267 if (data->ni != NULL) { 4268 ieee80211_free_node(data->ni); 4269 data->ni = NULL; 4270 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 4271 } 4272 if (error != USB_ERR_CANCELLED) { 4273 usbd_xfer_set_stall(xfer); 4274 goto setup; 4275 } 4276 break; 4277 } 4278} 4279 4280static struct urtw_data * 4281_urtw_getbuf(struct urtw_softc *sc) 4282{ 4283 struct urtw_data *bf; 4284 4285 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 4286 if (bf != NULL) 4287 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 4288 else 4289 bf = NULL; 4290 if (bf == NULL) 4291 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: %s\n", __func__, 4292 "out of xmit buffers"); 4293 return (bf); 4294} 4295 4296static struct urtw_data * 4297urtw_getbuf(struct urtw_softc *sc) 4298{ 4299 struct urtw_data *bf; 4300 4301 URTW_ASSERT_LOCKED(sc); 4302 4303 bf = _urtw_getbuf(sc); 4304 if (bf == NULL) { 4305 struct ifnet *ifp = sc->sc_ifp; 4306 4307 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: stop queue\n", __func__); 4308 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 4309 } 4310 return (bf); 4311} 4312 4313static int 4314urtw_isbmode(uint16_t rate) 4315{ 4316 4317 return ((rate <= 22 && rate != 12 && rate != 18) || 4318 rate == 44) ? (1) : (0); 4319} 4320 4321static uint16_t 4322urtw_rate2dbps(uint16_t rate) 4323{ 4324 4325 switch(rate) { 4326 case 12: 4327 case 18: 4328 case 24: 4329 case 36: 4330 case 48: 4331 case 72: 4332 case 96: 4333 case 108: 4334 return (rate * 2); 4335 default: 4336 break; 4337 } 4338 return (24); 4339} 4340 4341static int 4342urtw_compute_txtime(uint16_t framelen, uint16_t rate, 4343 uint8_t ismgt, uint8_t isshort) 4344{ 4345 uint16_t ceiling, frametime, n_dbps; 4346 4347 if (urtw_isbmode(rate)) { 4348 if (ismgt || !isshort || rate == 2) 4349 frametime = (uint16_t)(144 + 48 + 4350 (framelen * 8 / (rate / 2))); 4351 else 4352 frametime = (uint16_t)(72 + 24 + 4353 (framelen * 8 / (rate / 2))); 4354 if ((framelen * 8 % (rate / 2)) != 0) 4355 frametime++; 4356 } else { 4357 n_dbps = urtw_rate2dbps(rate); 4358 ceiling = (16 + 8 * framelen + 6) / n_dbps 4359 + (((16 + 8 * framelen + 6) % n_dbps) ? 1 : 0); 4360 frametime = (uint16_t)(16 + 4 + 4 * ceiling + 6); 4361 } 4362 return (frametime); 4363} 4364 4365/* 4366 * Callback from the 802.11 layer to update the 4367 * slot time based on the current setting. 4368 */ 4369static void 4370urtw_updateslot(struct ieee80211com *ic) 4371{ 4372 struct urtw_softc *sc = ic->ic_softc; 4373 4374 ieee80211_runtask(ic, &sc->sc_updateslot_task); 4375} 4376 4377static void 4378urtw_updateslottask(void *arg, int pending) 4379{ 4380 struct urtw_softc *sc = arg; 4381 struct ifnet *ifp = sc->sc_ifp; 4382 struct ieee80211com *ic = ifp->if_l2com; 4383 int error; 4384 4385 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 4386 return; 4387 4388 URTW_LOCK(sc); 4389 if (sc->sc_flags & URTW_RTL8187B) { 4390 urtw_write8_m(sc, URTW_SIFS, 0x22); 4391 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) 4392 urtw_write8_m(sc, URTW_SLOT, 0x9); 4393 else 4394 urtw_write8_m(sc, URTW_SLOT, 0x14); 4395 urtw_write8_m(sc, URTW_8187B_EIFS, 0x5b); 4396 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 0x5b); 4397 } else { 4398 urtw_write8_m(sc, URTW_SIFS, 0x22); 4399 if (sc->sc_state == IEEE80211_S_ASSOC && 4400 ic->ic_flags & IEEE80211_F_SHSLOT) 4401 urtw_write8_m(sc, URTW_SLOT, 0x9); 4402 else 4403 urtw_write8_m(sc, URTW_SLOT, 0x14); 4404 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) { 4405 urtw_write8_m(sc, URTW_DIFS, 0x14); 4406 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14); 4407 urtw_write8_m(sc, URTW_CW_VAL, 0x73); 4408 } else { 4409 urtw_write8_m(sc, URTW_DIFS, 0x24); 4410 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24); 4411 urtw_write8_m(sc, URTW_CW_VAL, 0xa5); 4412 } 4413 } 4414fail: 4415 URTW_UNLOCK(sc); 4416} 4417 4418static void 4419urtw_sysctl_node(struct urtw_softc *sc) 4420{ 4421#define URTW_SYSCTL_STAT_ADD32(c, h, n, p, d) \ 4422 SYSCTL_ADD_UINT(c, h, OID_AUTO, n, CTLFLAG_RD, p, 0, d) 4423 struct sysctl_ctx_list *ctx; 4424 struct sysctl_oid_list *child, *parent; 4425 struct sysctl_oid *tree; 4426 struct urtw_stats *stats = &sc->sc_stats; 4427 4428 ctx = device_get_sysctl_ctx(sc->sc_dev); 4429 child = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->sc_dev)); 4430 4431 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD, 4432 NULL, "URTW statistics"); 4433 parent = SYSCTL_CHILDREN(tree); 4434 4435 /* Tx statistics. */ 4436 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "tx", CTLFLAG_RD, 4437 NULL, "Tx MAC statistics"); 4438 child = SYSCTL_CHILDREN(tree); 4439 URTW_SYSCTL_STAT_ADD32(ctx, child, "1m", &stats->txrates[0], 4440 "1 Mbit/s"); 4441 URTW_SYSCTL_STAT_ADD32(ctx, child, "2m", &stats->txrates[1], 4442 "2 Mbit/s"); 4443 URTW_SYSCTL_STAT_ADD32(ctx, child, "5.5m", &stats->txrates[2], 4444 "5.5 Mbit/s"); 4445 URTW_SYSCTL_STAT_ADD32(ctx, child, "6m", &stats->txrates[4], 4446 "6 Mbit/s"); 4447 URTW_SYSCTL_STAT_ADD32(ctx, child, "9m", &stats->txrates[5], 4448 "9 Mbit/s"); 4449 URTW_SYSCTL_STAT_ADD32(ctx, child, "11m", &stats->txrates[3], 4450 "11 Mbit/s"); 4451 URTW_SYSCTL_STAT_ADD32(ctx, child, "12m", &stats->txrates[6], 4452 "12 Mbit/s"); 4453 URTW_SYSCTL_STAT_ADD32(ctx, child, "18m", &stats->txrates[7], 4454 "18 Mbit/s"); 4455 URTW_SYSCTL_STAT_ADD32(ctx, child, "24m", &stats->txrates[8], 4456 "24 Mbit/s"); 4457 URTW_SYSCTL_STAT_ADD32(ctx, child, "36m", &stats->txrates[9], 4458 "36 Mbit/s"); 4459 URTW_SYSCTL_STAT_ADD32(ctx, child, "48m", &stats->txrates[10], 4460 "48 Mbit/s"); 4461 URTW_SYSCTL_STAT_ADD32(ctx, child, "54m", &stats->txrates[11], 4462 "54 Mbit/s"); 4463#undef URTW_SYSCTL_STAT_ADD32 4464} 4465 4466static device_method_t urtw_methods[] = { 4467 DEVMETHOD(device_probe, urtw_match), 4468 DEVMETHOD(device_attach, urtw_attach), 4469 DEVMETHOD(device_detach, urtw_detach), 4470 DEVMETHOD_END 4471}; 4472static driver_t urtw_driver = { 4473 .name = "urtw", 4474 .methods = urtw_methods, 4475 .size = sizeof(struct urtw_softc) 4476}; 4477static devclass_t urtw_devclass; 4478 4479DRIVER_MODULE(urtw, uhub, urtw_driver, urtw_devclass, NULL, 0); 4480MODULE_DEPEND(urtw, wlan, 1, 1, 1); 4481MODULE_DEPEND(urtw, usb, 1, 1, 1); 4482MODULE_VERSION(urtw, 1); 4483