if_urtw.c revision 271866
1/*- 2 * Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org> 3 * 4 * Permission to use, copy, modify, and distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#include <sys/cdefs.h> 18__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_urtw.c 271866 2014-09-19 10:35:56Z glebius $"); 19#include <sys/param.h> 20#include <sys/sockio.h> 21#include <sys/sysctl.h> 22#include <sys/lock.h> 23#include <sys/mutex.h> 24#include <sys/mbuf.h> 25#include <sys/kernel.h> 26#include <sys/socket.h> 27#include <sys/systm.h> 28#include <sys/malloc.h> 29#include <sys/module.h> 30#include <sys/bus.h> 31#include <sys/endian.h> 32#include <sys/kdb.h> 33 34#include <machine/bus.h> 35#include <machine/resource.h> 36#include <sys/rman.h> 37 38#include <net/if.h> 39#include <net/if_var.h> 40#include <net/if_arp.h> 41#include <net/ethernet.h> 42#include <net/if_dl.h> 43#include <net/if_media.h> 44#include <net/if_types.h> 45 46#ifdef INET 47#include <netinet/in.h> 48#include <netinet/in_systm.h> 49#include <netinet/in_var.h> 50#include <netinet/if_ether.h> 51#include <netinet/ip.h> 52#endif 53 54#include <net80211/ieee80211_var.h> 55#include <net80211/ieee80211_regdomain.h> 56#include <net80211/ieee80211_radiotap.h> 57 58#include <dev/usb/usb.h> 59#include <dev/usb/usbdi.h> 60#include "usbdevs.h" 61 62#include <dev/usb/wlan/if_urtwreg.h> 63#include <dev/usb/wlan/if_urtwvar.h> 64 65static SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW, 0, "USB Realtek 8187L"); 66#ifdef URTW_DEBUG 67int urtw_debug = 0; 68SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RWTUN, &urtw_debug, 0, 69 "control debugging printfs"); 70enum { 71 URTW_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 72 URTW_DEBUG_RECV = 0x00000002, /* basic recv operation */ 73 URTW_DEBUG_RESET = 0x00000004, /* reset processing */ 74 URTW_DEBUG_TX_PROC = 0x00000008, /* tx ISR proc */ 75 URTW_DEBUG_RX_PROC = 0x00000010, /* rx ISR proc */ 76 URTW_DEBUG_STATE = 0x00000020, /* 802.11 state transitions */ 77 URTW_DEBUG_STAT = 0x00000040, /* statistic */ 78 URTW_DEBUG_INIT = 0x00000080, /* initialization of dev */ 79 URTW_DEBUG_TXSTATUS = 0x00000100, /* tx status */ 80 URTW_DEBUG_ANY = 0xffffffff 81}; 82#define DPRINTF(sc, m, fmt, ...) do { \ 83 if (sc->sc_debug & (m)) \ 84 printf(fmt, __VA_ARGS__); \ 85} while (0) 86#else 87#define DPRINTF(sc, m, fmt, ...) do { \ 88 (void) sc; \ 89} while (0) 90#endif 91static int urtw_preamble_mode = URTW_PREAMBLE_MODE_LONG; 92SYSCTL_INT(_hw_usb_urtw, OID_AUTO, preamble_mode, CTLFLAG_RWTUN, 93 &urtw_preamble_mode, 0, "set the preable mode (long or short)"); 94 95/* recognized device vendors/products */ 96#define urtw_lookup(v, p) \ 97 ((const struct urtw_type *)usb_lookup(urtw_devs, v, p)) 98#define URTW_DEV_B(v,p) \ 99 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187B) } 100#define URTW_DEV_L(v,p) \ 101 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187L) } 102#define URTW_REV_RTL8187B 0 103#define URTW_REV_RTL8187L 1 104static const STRUCT_USB_HOST_ID urtw_devs[] = { 105 URTW_DEV_B(NETGEAR, WG111V3), 106 URTW_DEV_B(REALTEK, RTL8187B_0), 107 URTW_DEV_B(REALTEK, RTL8187B_1), 108 URTW_DEV_B(REALTEK, RTL8187B_2), 109 URTW_DEV_B(SITECOMEU, WL168V4), 110 URTW_DEV_L(ASUS, P5B_WIFI), 111 URTW_DEV_L(BELKIN, F5D7050E), 112 URTW_DEV_L(LINKSYS4, WUSB54GCV2), 113 URTW_DEV_L(NETGEAR, WG111V2), 114 URTW_DEV_L(REALTEK, RTL8187), 115 URTW_DEV_L(SITECOMEU, WL168V1), 116 URTW_DEV_L(SURECOM, EP9001G2A), 117 { USB_VPI(USB_VENDOR_OVISLINK, 0x8187, URTW_REV_RTL8187L) }, 118 { USB_VPI(USB_VENDOR_DICKSMITH, 0x9401, URTW_REV_RTL8187L) }, 119 { USB_VPI(USB_VENDOR_HP, 0xca02, URTW_REV_RTL8187L) }, 120 { USB_VPI(USB_VENDOR_LOGITEC, 0x010c, URTW_REV_RTL8187L) }, 121 { USB_VPI(USB_VENDOR_NETGEAR, 0x6100, URTW_REV_RTL8187L) }, 122 { USB_VPI(USB_VENDOR_SPHAIRON, 0x0150, URTW_REV_RTL8187L) }, 123 { USB_VPI(USB_VENDOR_QCOM, 0x6232, URTW_REV_RTL8187L) }, 124#undef URTW_DEV_L 125#undef URTW_DEV_B 126}; 127 128#define urtw_read8_m(sc, val, data) do { \ 129 error = urtw_read8_c(sc, val, data); \ 130 if (error != 0) \ 131 goto fail; \ 132} while (0) 133#define urtw_write8_m(sc, val, data) do { \ 134 error = urtw_write8_c(sc, val, data); \ 135 if (error != 0) \ 136 goto fail; \ 137} while (0) 138#define urtw_read16_m(sc, val, data) do { \ 139 error = urtw_read16_c(sc, val, data); \ 140 if (error != 0) \ 141 goto fail; \ 142} while (0) 143#define urtw_write16_m(sc, val, data) do { \ 144 error = urtw_write16_c(sc, val, data); \ 145 if (error != 0) \ 146 goto fail; \ 147} while (0) 148#define urtw_read32_m(sc, val, data) do { \ 149 error = urtw_read32_c(sc, val, data); \ 150 if (error != 0) \ 151 goto fail; \ 152} while (0) 153#define urtw_write32_m(sc, val, data) do { \ 154 error = urtw_write32_c(sc, val, data); \ 155 if (error != 0) \ 156 goto fail; \ 157} while (0) 158#define urtw_8187_write_phy_ofdm(sc, val, data) do { \ 159 error = urtw_8187_write_phy_ofdm_c(sc, val, data); \ 160 if (error != 0) \ 161 goto fail; \ 162} while (0) 163#define urtw_8187_write_phy_cck(sc, val, data) do { \ 164 error = urtw_8187_write_phy_cck_c(sc, val, data); \ 165 if (error != 0) \ 166 goto fail; \ 167} while (0) 168#define urtw_8225_write(sc, val, data) do { \ 169 error = urtw_8225_write_c(sc, val, data); \ 170 if (error != 0) \ 171 goto fail; \ 172} while (0) 173 174struct urtw_pair { 175 uint32_t reg; 176 uint32_t val; 177}; 178 179static uint8_t urtw_8225_agc[] = { 180 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b, 181 0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 182 0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85, 183 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a, 184 0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 185 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24, 186 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 187 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 188 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 189 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 190 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 191 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 192}; 193 194static uint8_t urtw_8225z2_agc[] = { 195 0x5e, 0x5e, 0x5e, 0x5e, 0x5d, 0x5b, 0x59, 0x57, 0x55, 0x53, 0x51, 196 0x4f, 0x4d, 0x4b, 0x49, 0x47, 0x45, 0x43, 0x41, 0x3f, 0x3d, 0x3b, 197 0x39, 0x37, 0x35, 0x33, 0x31, 0x2f, 0x2d, 0x2b, 0x29, 0x27, 0x25, 198 0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 0x15, 0x13, 0x11, 0x0f, 199 0x0d, 0x0b, 0x09, 0x07, 0x05, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 200 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x19, 0x19, 201 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x20, 0x21, 0x22, 0x23, 202 0x24, 0x25, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29, 0x2a, 0x2a, 203 0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2d, 204 0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x31, 0x31, 205 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 206 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31 207}; 208 209static uint32_t urtw_8225_channel[] = { 210 0x0000, /* dummy channel 0 */ 211 0x085c, /* 1 */ 212 0x08dc, /* 2 */ 213 0x095c, /* 3 */ 214 0x09dc, /* 4 */ 215 0x0a5c, /* 5 */ 216 0x0adc, /* 6 */ 217 0x0b5c, /* 7 */ 218 0x0bdc, /* 8 */ 219 0x0c5c, /* 9 */ 220 0x0cdc, /* 10 */ 221 0x0d5c, /* 11 */ 222 0x0ddc, /* 12 */ 223 0x0e5c, /* 13 */ 224 0x0f72, /* 14 */ 225}; 226 227static uint8_t urtw_8225_gain[] = { 228 0x23, 0x88, 0x7c, 0xa5, /* -82dbm */ 229 0x23, 0x88, 0x7c, 0xb5, /* -82dbm */ 230 0x23, 0x88, 0x7c, 0xc5, /* -82dbm */ 231 0x33, 0x80, 0x79, 0xc5, /* -78dbm */ 232 0x43, 0x78, 0x76, 0xc5, /* -74dbm */ 233 0x53, 0x60, 0x73, 0xc5, /* -70dbm */ 234 0x63, 0x58, 0x70, 0xc5, /* -66dbm */ 235}; 236 237static struct urtw_pair urtw_8225_rf_part1[] = { 238 { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 239 { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a }, 240 { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 }, 241 { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 }, 242}; 243 244static struct urtw_pair urtw_8225_rf_part2[] = { 245 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 246 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 247 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 }, 248 { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 }, 249 { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 }, 250 { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, { 0x18, 0xef }, 251 { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x76 }, { 0x1c, 0x04 }, 252 { 0x1e, 0x95 }, { 0x1f, 0x75 }, { 0x20, 0x1f }, { 0x21, 0x27 }, 253 { 0x22, 0x16 }, { 0x24, 0x46 }, { 0x25, 0x20 }, { 0x26, 0x90 }, 254 { 0x27, 0x88 } 255}; 256 257static struct urtw_pair urtw_8225_rf_part3[] = { 258 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 259 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x10, 0x9b }, 260 { 0x11, 0x88 }, { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, 261 { 0x1a, 0xa0 }, { 0x1b, 0x08 }, { 0x40, 0x86 }, { 0x41, 0x8d }, 262 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x1f }, { 0x45, 0x1e }, 263 { 0x46, 0x1a }, { 0x47, 0x15 }, { 0x48, 0x10 }, { 0x49, 0x0a }, 264 { 0x4a, 0x05 }, { 0x4b, 0x02 }, { 0x4c, 0x05 } 265}; 266 267static uint16_t urtw_8225_rxgain[] = { 268 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 269 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 270 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 271 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 272 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 273 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 274 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 275 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 276 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 277 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 278 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3, 279 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb 280}; 281 282static uint8_t urtw_8225_threshold[] = { 283 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd, 284}; 285 286static uint8_t urtw_8225_tx_gain_cck_ofdm[] = { 287 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e 288}; 289 290static uint8_t urtw_8225_txpwr_cck[] = { 291 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02, 292 0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02, 293 0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02, 294 0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02, 295 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03, 296 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03 297}; 298 299static uint8_t urtw_8225_txpwr_cck_ch14[] = { 300 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00, 301 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00, 302 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00, 303 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00, 304 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00, 305 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00 306}; 307 308static uint8_t urtw_8225_txpwr_ofdm[]={ 309 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4 310}; 311 312static uint8_t urtw_8225v2_gain_bg[]={ 313 0x23, 0x15, 0xa5, /* -82-1dbm */ 314 0x23, 0x15, 0xb5, /* -82-2dbm */ 315 0x23, 0x15, 0xc5, /* -82-3dbm */ 316 0x33, 0x15, 0xc5, /* -78dbm */ 317 0x43, 0x15, 0xc5, /* -74dbm */ 318 0x53, 0x15, 0xc5, /* -70dbm */ 319 0x63, 0x15, 0xc5, /* -66dbm */ 320}; 321 322static struct urtw_pair urtw_8225v2_rf_part1[] = { 323 { 0x00, 0x02bf }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 324 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 325 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 326 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 327}; 328 329static struct urtw_pair urtw_8225v2b_rf_part0[] = { 330 { 0x00, 0x00b7 }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 331 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 332 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 333 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 334}; 335 336static struct urtw_pair urtw_8225v2b_rf_part1[] = { 337 {0x0f0, 0x32}, {0x0f1, 0x32}, {0x0f2, 0x00}, 338 {0x0f3, 0x00}, {0x0f4, 0x32}, {0x0f5, 0x43}, 339 {0x0f6, 0x00}, {0x0f7, 0x00}, {0x0f8, 0x46}, 340 {0x0f9, 0xa4}, {0x0fa, 0x00}, {0x0fb, 0x00}, 341 {0x0fc, 0x96}, {0x0fd, 0xa4}, {0x0fe, 0x00}, 342 {0x0ff, 0x00}, {0x158, 0x4b}, {0x159, 0x00}, 343 {0x15a, 0x4b}, {0x15b, 0x00}, {0x160, 0x4b}, 344 {0x161, 0x09}, {0x162, 0x4b}, {0x163, 0x09}, 345 {0x1ce, 0x0f}, {0x1cf, 0x00}, {0x1e0, 0xff}, 346 {0x1e1, 0x0f}, {0x1e2, 0x00}, {0x1f0, 0x4e}, 347 {0x1f1, 0x01}, {0x1f2, 0x02}, {0x1f3, 0x03}, 348 {0x1f4, 0x04}, {0x1f5, 0x05}, {0x1f6, 0x06}, 349 {0x1f7, 0x07}, {0x1f8, 0x08}, {0x24e, 0x00}, 350 {0x20c, 0x04}, {0x221, 0x61}, {0x222, 0x68}, 351 {0x223, 0x6f}, {0x224, 0x76}, {0x225, 0x7d}, 352 {0x226, 0x84}, {0x227, 0x8d}, {0x24d, 0x08}, 353 {0x250, 0x05}, {0x251, 0xf5}, {0x252, 0x04}, 354 {0x253, 0xa0}, {0x254, 0x1f}, {0x255, 0x23}, 355 {0x256, 0x45}, {0x257, 0x67}, {0x258, 0x08}, 356 {0x259, 0x08}, {0x25a, 0x08}, {0x25b, 0x08}, 357 {0x260, 0x08}, {0x261, 0x08}, {0x262, 0x08}, 358 {0x263, 0x08}, {0x264, 0xcf}, {0x272, 0x56}, 359 {0x273, 0x9a}, {0x034, 0xf0}, {0x035, 0x0f}, 360 {0x05b, 0x40}, {0x084, 0x88}, {0x085, 0x24}, 361 {0x088, 0x54}, {0x08b, 0xb8}, {0x08c, 0x07}, 362 {0x08d, 0x00}, {0x094, 0x1b}, {0x095, 0x12}, 363 {0x096, 0x00}, {0x097, 0x06}, {0x09d, 0x1a}, 364 {0x09f, 0x10}, {0x0b4, 0x22}, {0x0be, 0x80}, 365 {0x0db, 0x00}, {0x0ee, 0x00}, {0x091, 0x03}, 366 {0x24c, 0x00}, {0x39f, 0x00}, {0x08c, 0x01}, 367 {0x08d, 0x10}, {0x08e, 0x08}, {0x08f, 0x00} 368}; 369 370static struct urtw_pair urtw_8225v2_rf_part2[] = { 371 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 372 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 373 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x08 }, { 0x0b, 0x80 }, 374 { 0x0c, 0x01 }, { 0x0d, 0x43 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, 375 { 0x10, 0x84 }, { 0x11, 0x07 }, { 0x12, 0x20 }, { 0x13, 0x20 }, 376 { 0x14, 0x00 }, { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, 377 { 0x18, 0xef }, { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x15 }, 378 { 0x1c, 0x04 }, { 0x1d, 0xc5 }, { 0x1e, 0x95 }, { 0x1f, 0x75 }, 379 { 0x20, 0x1f }, { 0x21, 0x17 }, { 0x22, 0x16 }, { 0x23, 0x80 }, 380 { 0x24, 0x46 }, { 0x25, 0x00 }, { 0x26, 0x90 }, { 0x27, 0x88 } 381}; 382 383static struct urtw_pair urtw_8225v2b_rf_part2[] = { 384 { 0x00, 0x10 }, { 0x01, 0x0d }, { 0x02, 0x01 }, { 0x03, 0x00 }, 385 { 0x04, 0x14 }, { 0x05, 0xfb }, { 0x06, 0xfb }, { 0x07, 0x60 }, 386 { 0x08, 0x00 }, { 0x09, 0x60 }, { 0x0a, 0x00 }, { 0x0b, 0x00 }, 387 { 0x0c, 0x00 }, { 0x0d, 0x5c }, { 0x0e, 0x00 }, { 0x0f, 0x00 }, 388 { 0x10, 0x40 }, { 0x11, 0x00 }, { 0x12, 0x40 }, { 0x13, 0x00 }, 389 { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0xa8 }, { 0x17, 0x26 }, 390 { 0x18, 0x32 }, { 0x19, 0x33 }, { 0x1a, 0x07 }, { 0x1b, 0xa5 }, 391 { 0x1c, 0x6f }, { 0x1d, 0x55 }, { 0x1e, 0xc8 }, { 0x1f, 0xb3 }, 392 { 0x20, 0x0a }, { 0x21, 0xe1 }, { 0x22, 0x2C }, { 0x23, 0x8a }, 393 { 0x24, 0x86 }, { 0x25, 0x83 }, { 0x26, 0x34 }, { 0x27, 0x0f }, 394 { 0x28, 0x4f }, { 0x29, 0x24 }, { 0x2a, 0x6f }, { 0x2b, 0xc2 }, 395 { 0x2c, 0x6b }, { 0x2d, 0x40 }, { 0x2e, 0x80 }, { 0x2f, 0x00 }, 396 { 0x30, 0xc0 }, { 0x31, 0xc1 }, { 0x32, 0x58 }, { 0x33, 0xf1 }, 397 { 0x34, 0x00 }, { 0x35, 0xe4 }, { 0x36, 0x90 }, { 0x37, 0x3e }, 398 { 0x38, 0x6d }, { 0x39, 0x3c }, { 0x3a, 0xfb }, { 0x3b, 0x07 } 399}; 400 401static struct urtw_pair urtw_8225v2_rf_part3[] = { 402 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 403 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x09, 0x11 }, 404 { 0x0a, 0x17 }, { 0x0b, 0x11 }, { 0x10, 0x9b }, { 0x11, 0x88 }, 405 { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, { 0x1a, 0xa0 }, 406 { 0x1b, 0x08 }, { 0x1d, 0x00 }, { 0x40, 0x86 }, { 0x41, 0x9d }, 407 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x36 }, { 0x45, 0x35 }, 408 { 0x46, 0x2e }, { 0x47, 0x25 }, { 0x48, 0x1c }, { 0x49, 0x12 }, 409 { 0x4a, 0x09 }, { 0x4b, 0x04 }, { 0x4c, 0x05 } 410}; 411 412static uint16_t urtw_8225v2_rxgain[] = { 413 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009, 414 0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141, 415 0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183, 416 0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244, 417 0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288, 418 0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345, 419 0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389, 420 0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393, 421 0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d, 422 0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9, 423 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 424 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 425}; 426 427static uint16_t urtw_8225v2b_rxgain[] = { 428 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 429 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 430 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 431 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 432 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 433 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 434 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 435 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 436 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 437 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 438 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 439 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 440}; 441 442static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = { 443 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 444 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 445 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 446 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 447 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 448 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, 449}; 450 451static uint8_t urtw_8225v2_txpwr_cck[] = { 452 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04 453}; 454 455static uint8_t urtw_8225v2_txpwr_cck_ch14[] = { 456 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00 457}; 458 459static uint8_t urtw_8225v2b_txpwr_cck[] = { 460 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04, 461 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03, 462 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03, 463 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03 464}; 465 466static uint8_t urtw_8225v2b_txpwr_cck_ch14[] = { 467 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00, 468 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 469 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 470 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00 471}; 472 473static struct urtw_pair urtw_ratetable[] = { 474 { 2, 0 }, { 4, 1 }, { 11, 2 }, { 12, 4 }, { 18, 5 }, 475 { 22, 3 }, { 24, 6 }, { 36, 7 }, { 48, 8 }, { 72, 9 }, 476 { 96, 10 }, { 108, 11 } 477}; 478 479#if 0 480static const uint8_t urtw_8187b_reg_table[][3] = { 481 { 0xf0, 0x32, 0 }, { 0xf1, 0x32, 0 }, { 0xf2, 0x00, 0 }, 482 { 0xf3, 0x00, 0 }, { 0xf4, 0x32, 0 }, { 0xf5, 0x43, 0 }, 483 { 0xf6, 0x00, 0 }, { 0xf7, 0x00, 0 }, { 0xf8, 0x46, 0 }, 484 { 0xf9, 0xa4, 0 }, { 0xfa, 0x00, 0 }, { 0xfb, 0x00, 0 }, 485 { 0xfc, 0x96, 0 }, { 0xfd, 0xa4, 0 }, { 0xfe, 0x00, 0 }, 486 { 0xff, 0x00, 0 }, { 0x58, 0x4b, 1 }, { 0x59, 0x00, 1 }, 487 { 0x5a, 0x4b, 1 }, { 0x5b, 0x00, 1 }, { 0x60, 0x4b, 1 }, 488 { 0x61, 0x09, 1 }, { 0x62, 0x4b, 1 }, { 0x63, 0x09, 1 }, 489 { 0xce, 0x0f, 1 }, { 0xcf, 0x00, 1 }, { 0xe0, 0xff, 1 }, 490 { 0xe1, 0x0f, 1 }, { 0xe2, 0x00, 1 }, { 0xf0, 0x4e, 1 }, 491 { 0xf1, 0x01, 1 }, { 0xf2, 0x02, 1 }, { 0xf3, 0x03, 1 }, 492 { 0xf4, 0x04, 1 }, { 0xf5, 0x05, 1 }, { 0xf6, 0x06, 1 }, 493 { 0xf7, 0x07, 1 }, { 0xf8, 0x08, 1 }, { 0x4e, 0x00, 2 }, 494 { 0x0c, 0x04, 2 }, { 0x21, 0x61, 2 }, { 0x22, 0x68, 2 }, 495 { 0x23, 0x6f, 2 }, { 0x24, 0x76, 2 }, { 0x25, 0x7d, 2 }, 496 { 0x26, 0x84, 2 }, { 0x27, 0x8d, 2 }, { 0x4d, 0x08, 2 }, 497 { 0x50, 0x05, 2 }, { 0x51, 0xf5, 2 }, { 0x52, 0x04, 2 }, 498 { 0x53, 0xa0, 2 }, { 0x54, 0x1f, 2 }, { 0x55, 0x23, 2 }, 499 { 0x56, 0x45, 2 }, { 0x57, 0x67, 2 }, { 0x58, 0x08, 2 }, 500 { 0x59, 0x08, 2 }, { 0x5a, 0x08, 2 }, { 0x5b, 0x08, 2 }, 501 { 0x60, 0x08, 2 }, { 0x61, 0x08, 2 }, { 0x62, 0x08, 2 }, 502 { 0x63, 0x08, 2 }, { 0x64, 0xcf, 2 }, { 0x72, 0x56, 2 }, 503 { 0x73, 0x9a, 2 }, { 0x34, 0xf0, 0 }, { 0x35, 0x0f, 0 }, 504 { 0x5b, 0x40, 0 }, { 0x84, 0x88, 0 }, { 0x85, 0x24, 0 }, 505 { 0x88, 0x54, 0 }, { 0x8b, 0xb8, 0 }, { 0x8c, 0x07, 0 }, 506 { 0x8d, 0x00, 0 }, { 0x94, 0x1b, 0 }, { 0x95, 0x12, 0 }, 507 { 0x96, 0x00, 0 }, { 0x97, 0x06, 0 }, { 0x9d, 0x1a, 0 }, 508 { 0x9f, 0x10, 0 }, { 0xb4, 0x22, 0 }, { 0xbe, 0x80, 0 }, 509 { 0xdb, 0x00, 0 }, { 0xee, 0x00, 0 }, { 0x91, 0x03, 0 }, 510 { 0x4c, 0x00, 2 }, { 0x9f, 0x00, 3 }, { 0x8c, 0x01, 0 }, 511 { 0x8d, 0x10, 0 }, { 0x8e, 0x08, 0 }, { 0x8f, 0x00, 0 } 512}; 513#endif 514 515static usb_callback_t urtw_bulk_rx_callback; 516static usb_callback_t urtw_bulk_tx_callback; 517static usb_callback_t urtw_bulk_tx_status_callback; 518 519static const struct usb_config urtw_8187b_usbconfig[URTW_8187B_N_XFERS] = { 520 [URTW_8187B_BULK_RX] = { 521 .type = UE_BULK, 522 .endpoint = 0x83, 523 .direction = UE_DIR_IN, 524 .bufsize = MCLBYTES, 525 .flags = { 526 .ext_buffer = 1, 527 .pipe_bof = 1, 528 .short_xfer_ok = 1 529 }, 530 .callback = urtw_bulk_rx_callback 531 }, 532 [URTW_8187B_BULK_TX_STATUS] = { 533 .type = UE_BULK, 534 .endpoint = 0x89, 535 .direction = UE_DIR_IN, 536 .bufsize = sizeof(uint64_t), 537 .flags = { 538 .pipe_bof = 1, 539 .short_xfer_ok = 1 540 }, 541 .callback = urtw_bulk_tx_status_callback 542 }, 543 [URTW_8187B_BULK_TX_BE] = { 544 .type = UE_BULK, 545 .endpoint = URTW_8187B_TXPIPE_BE, 546 .direction = UE_DIR_OUT, 547 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT, 548 .flags = { 549 .force_short_xfer = 1, 550 .pipe_bof = 1, 551 }, 552 .callback = urtw_bulk_tx_callback, 553 .timeout = URTW_DATA_TIMEOUT 554 }, 555 [URTW_8187B_BULK_TX_BK] = { 556 .type = UE_BULK, 557 .endpoint = URTW_8187B_TXPIPE_BK, 558 .direction = UE_DIR_OUT, 559 .bufsize = URTW_TX_MAXSIZE, 560 .flags = { 561 .ext_buffer = 1, 562 .force_short_xfer = 1, 563 .pipe_bof = 1, 564 }, 565 .callback = urtw_bulk_tx_callback, 566 .timeout = URTW_DATA_TIMEOUT 567 }, 568 [URTW_8187B_BULK_TX_VI] = { 569 .type = UE_BULK, 570 .endpoint = URTW_8187B_TXPIPE_VI, 571 .direction = UE_DIR_OUT, 572 .bufsize = URTW_TX_MAXSIZE, 573 .flags = { 574 .ext_buffer = 1, 575 .force_short_xfer = 1, 576 .pipe_bof = 1, 577 }, 578 .callback = urtw_bulk_tx_callback, 579 .timeout = URTW_DATA_TIMEOUT 580 }, 581 [URTW_8187B_BULK_TX_VO] = { 582 .type = UE_BULK, 583 .endpoint = URTW_8187B_TXPIPE_VO, 584 .direction = UE_DIR_OUT, 585 .bufsize = URTW_TX_MAXSIZE, 586 .flags = { 587 .ext_buffer = 1, 588 .force_short_xfer = 1, 589 .pipe_bof = 1, 590 }, 591 .callback = urtw_bulk_tx_callback, 592 .timeout = URTW_DATA_TIMEOUT 593 }, 594 [URTW_8187B_BULK_TX_EP12] = { 595 .type = UE_BULK, 596 .endpoint = 0xc, 597 .direction = UE_DIR_OUT, 598 .bufsize = URTW_TX_MAXSIZE, 599 .flags = { 600 .ext_buffer = 1, 601 .force_short_xfer = 1, 602 .pipe_bof = 1, 603 }, 604 .callback = urtw_bulk_tx_callback, 605 .timeout = URTW_DATA_TIMEOUT 606 } 607}; 608 609static const struct usb_config urtw_8187l_usbconfig[URTW_8187L_N_XFERS] = { 610 [URTW_8187L_BULK_RX] = { 611 .type = UE_BULK, 612 .endpoint = 0x81, 613 .direction = UE_DIR_IN, 614 .bufsize = MCLBYTES, 615 .flags = { 616 .ext_buffer = 1, 617 .pipe_bof = 1, 618 .short_xfer_ok = 1 619 }, 620 .callback = urtw_bulk_rx_callback 621 }, 622 [URTW_8187L_BULK_TX_LOW] = { 623 .type = UE_BULK, 624 .endpoint = 0x2, 625 .direction = UE_DIR_OUT, 626 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT, 627 .flags = { 628 .force_short_xfer = 1, 629 .pipe_bof = 1, 630 }, 631 .callback = urtw_bulk_tx_callback, 632 .timeout = URTW_DATA_TIMEOUT 633 }, 634 [URTW_8187L_BULK_TX_NORMAL] = { 635 .type = UE_BULK, 636 .endpoint = 0x3, 637 .direction = UE_DIR_OUT, 638 .bufsize = URTW_TX_MAXSIZE, 639 .flags = { 640 .ext_buffer = 1, 641 .force_short_xfer = 1, 642 .pipe_bof = 1, 643 }, 644 .callback = urtw_bulk_tx_callback, 645 .timeout = URTW_DATA_TIMEOUT 646 }, 647}; 648 649static struct ieee80211vap *urtw_vap_create(struct ieee80211com *, 650 const char [IFNAMSIZ], int, enum ieee80211_opmode, 651 int, const uint8_t [IEEE80211_ADDR_LEN], 652 const uint8_t [IEEE80211_ADDR_LEN]); 653static void urtw_vap_delete(struct ieee80211vap *); 654static void urtw_init(void *); 655static void urtw_stop(struct ifnet *); 656static void urtw_stop_locked(struct ifnet *); 657static int urtw_ioctl(struct ifnet *, u_long, caddr_t); 658static void urtw_start(struct ifnet *); 659static int urtw_alloc_rx_data_list(struct urtw_softc *); 660static int urtw_alloc_tx_data_list(struct urtw_softc *); 661static int urtw_raw_xmit(struct ieee80211_node *, struct mbuf *, 662 const struct ieee80211_bpf_params *); 663static void urtw_scan_start(struct ieee80211com *); 664static void urtw_scan_end(struct ieee80211com *); 665static void urtw_set_channel(struct ieee80211com *); 666static void urtw_update_mcast(struct ifnet *); 667static int urtw_tx_start(struct urtw_softc *, 668 struct ieee80211_node *, struct mbuf *, 669 struct urtw_data *, int); 670static int urtw_newstate(struct ieee80211vap *, 671 enum ieee80211_state, int); 672static void urtw_led_ch(void *); 673static void urtw_ledtask(void *, int); 674static void urtw_watchdog(void *); 675static void urtw_set_multi(void *); 676static int urtw_isbmode(uint16_t); 677static uint16_t urtw_rate2rtl(uint32_t); 678static uint16_t urtw_rtl2rate(uint32_t); 679static usb_error_t urtw_set_rate(struct urtw_softc *); 680static usb_error_t urtw_update_msr(struct urtw_softc *); 681static usb_error_t urtw_read8_c(struct urtw_softc *, int, uint8_t *); 682static usb_error_t urtw_read16_c(struct urtw_softc *, int, uint16_t *); 683static usb_error_t urtw_read32_c(struct urtw_softc *, int, uint32_t *); 684static usb_error_t urtw_write8_c(struct urtw_softc *, int, uint8_t); 685static usb_error_t urtw_write16_c(struct urtw_softc *, int, uint16_t); 686static usb_error_t urtw_write32_c(struct urtw_softc *, int, uint32_t); 687static usb_error_t urtw_eprom_cs(struct urtw_softc *, int); 688static usb_error_t urtw_eprom_ck(struct urtw_softc *); 689static usb_error_t urtw_eprom_sendbits(struct urtw_softc *, int16_t *, 690 int); 691static usb_error_t urtw_eprom_read32(struct urtw_softc *, uint32_t, 692 uint32_t *); 693static usb_error_t urtw_eprom_readbit(struct urtw_softc *, int16_t *); 694static usb_error_t urtw_eprom_writebit(struct urtw_softc *, int16_t); 695static usb_error_t urtw_get_macaddr(struct urtw_softc *); 696static usb_error_t urtw_get_txpwr(struct urtw_softc *); 697static usb_error_t urtw_get_rfchip(struct urtw_softc *); 698static usb_error_t urtw_led_init(struct urtw_softc *); 699static usb_error_t urtw_8185_rf_pins_enable(struct urtw_softc *); 700static usb_error_t urtw_8185_tx_antenna(struct urtw_softc *, uint8_t); 701static usb_error_t urtw_8187_write_phy(struct urtw_softc *, uint8_t, 702 uint32_t); 703static usb_error_t urtw_8187_write_phy_ofdm_c(struct urtw_softc *, 704 uint8_t, uint32_t); 705static usb_error_t urtw_8187_write_phy_cck_c(struct urtw_softc *, uint8_t, 706 uint32_t); 707static usb_error_t urtw_8225_setgain(struct urtw_softc *, int16_t); 708static usb_error_t urtw_8225_usb_init(struct urtw_softc *); 709static usb_error_t urtw_8225_write_c(struct urtw_softc *, uint8_t, 710 uint16_t); 711static usb_error_t urtw_8225_write_s16(struct urtw_softc *, uint8_t, int, 712 uint16_t *); 713static usb_error_t urtw_8225_read(struct urtw_softc *, uint8_t, 714 uint32_t *); 715static usb_error_t urtw_8225_rf_init(struct urtw_softc *); 716static usb_error_t urtw_8225_rf_set_chan(struct urtw_softc *, int); 717static usb_error_t urtw_8225_rf_set_sens(struct urtw_softc *, int); 718static usb_error_t urtw_8225_set_txpwrlvl(struct urtw_softc *, int); 719static usb_error_t urtw_8225_rf_stop(struct urtw_softc *); 720static usb_error_t urtw_8225v2_rf_init(struct urtw_softc *); 721static usb_error_t urtw_8225v2_rf_set_chan(struct urtw_softc *, int); 722static usb_error_t urtw_8225v2_set_txpwrlvl(struct urtw_softc *, int); 723static usb_error_t urtw_8225v2_setgain(struct urtw_softc *, int16_t); 724static usb_error_t urtw_8225_isv2(struct urtw_softc *, int *); 725static usb_error_t urtw_8225v2b_rf_init(struct urtw_softc *); 726static usb_error_t urtw_8225v2b_rf_set_chan(struct urtw_softc *, int); 727static usb_error_t urtw_read8e(struct urtw_softc *, int, uint8_t *); 728static usb_error_t urtw_write8e(struct urtw_softc *, int, uint8_t); 729static usb_error_t urtw_8180_set_anaparam(struct urtw_softc *, uint32_t); 730static usb_error_t urtw_8185_set_anaparam2(struct urtw_softc *, uint32_t); 731static usb_error_t urtw_intr_enable(struct urtw_softc *); 732static usb_error_t urtw_intr_disable(struct urtw_softc *); 733static usb_error_t urtw_reset(struct urtw_softc *); 734static usb_error_t urtw_led_on(struct urtw_softc *, int); 735static usb_error_t urtw_led_ctl(struct urtw_softc *, int); 736static usb_error_t urtw_led_blink(struct urtw_softc *); 737static usb_error_t urtw_led_mode0(struct urtw_softc *, int); 738static usb_error_t urtw_led_mode1(struct urtw_softc *, int); 739static usb_error_t urtw_led_mode2(struct urtw_softc *, int); 740static usb_error_t urtw_led_mode3(struct urtw_softc *, int); 741static usb_error_t urtw_rx_setconf(struct urtw_softc *); 742static usb_error_t urtw_rx_enable(struct urtw_softc *); 743static usb_error_t urtw_tx_enable(struct urtw_softc *sc); 744static void urtw_free_tx_data_list(struct urtw_softc *); 745static void urtw_free_rx_data_list(struct urtw_softc *); 746static void urtw_free_data_list(struct urtw_softc *, 747 struct urtw_data data[], int, int); 748static usb_error_t urtw_adapter_start(struct urtw_softc *); 749static usb_error_t urtw_adapter_start_b(struct urtw_softc *); 750static usb_error_t urtw_set_mode(struct urtw_softc *, uint32_t); 751static usb_error_t urtw_8187b_cmd_reset(struct urtw_softc *); 752static usb_error_t urtw_do_request(struct urtw_softc *, 753 struct usb_device_request *, void *); 754static usb_error_t urtw_8225v2b_set_txpwrlvl(struct urtw_softc *, int); 755static usb_error_t urtw_led_off(struct urtw_softc *, int); 756static void urtw_abort_xfers(struct urtw_softc *); 757static struct urtw_data * 758 urtw_getbuf(struct urtw_softc *sc); 759static int urtw_compute_txtime(uint16_t, uint16_t, uint8_t, 760 uint8_t); 761static void urtw_updateslot(struct ifnet *); 762static void urtw_updateslottask(void *, int); 763static void urtw_sysctl_node(struct urtw_softc *); 764 765static int 766urtw_match(device_t dev) 767{ 768 struct usb_attach_arg *uaa = device_get_ivars(dev); 769 770 if (uaa->usb_mode != USB_MODE_HOST) 771 return (ENXIO); 772 if (uaa->info.bConfigIndex != URTW_CONFIG_INDEX) 773 return (ENXIO); 774 if (uaa->info.bIfaceIndex != URTW_IFACE_INDEX) 775 return (ENXIO); 776 777 return (usbd_lookup_id_by_uaa(urtw_devs, sizeof(urtw_devs), uaa)); 778} 779 780static int 781urtw_attach(device_t dev) 782{ 783 const struct usb_config *setup_start; 784 int ret = ENXIO; 785 struct urtw_softc *sc = device_get_softc(dev); 786 struct usb_attach_arg *uaa = device_get_ivars(dev); 787 struct ieee80211com *ic; 788 struct ifnet *ifp; 789 uint8_t bands, iface_index = URTW_IFACE_INDEX; /* XXX */ 790 uint16_t n_setup; 791 uint32_t data; 792 usb_error_t error; 793 794 device_set_usb_desc(dev); 795 796 sc->sc_dev = dev; 797 sc->sc_udev = uaa->device; 798 if (USB_GET_DRIVER_INFO(uaa) == URTW_REV_RTL8187B) 799 sc->sc_flags |= URTW_RTL8187B; 800#ifdef URTW_DEBUG 801 sc->sc_debug = urtw_debug; 802#endif 803 804 mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), MTX_NETWORK_LOCK, 805 MTX_DEF); 806 usb_callout_init_mtx(&sc->sc_led_ch, &sc->sc_mtx, 0); 807 TASK_INIT(&sc->sc_led_task, 0, urtw_ledtask, sc); 808 TASK_INIT(&sc->sc_updateslot_task, 0, urtw_updateslottask, sc); 809 callout_init(&sc->sc_watchdog_ch, 0); 810 811 if (sc->sc_flags & URTW_RTL8187B) { 812 setup_start = urtw_8187b_usbconfig; 813 n_setup = URTW_8187B_N_XFERS; 814 } else { 815 setup_start = urtw_8187l_usbconfig; 816 n_setup = URTW_8187L_N_XFERS; 817 } 818 819 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 820 setup_start, n_setup, sc, &sc->sc_mtx); 821 if (error) { 822 device_printf(dev, "could not allocate USB transfers, " 823 "err=%s\n", usbd_errstr(error)); 824 ret = ENXIO; 825 goto fail0; 826 } 827 828 if (sc->sc_flags & URTW_RTL8187B) { 829 sc->sc_tx_dma_buf = 830 usbd_xfer_get_frame_buffer(sc->sc_xfer[ 831 URTW_8187B_BULK_TX_BE], 0); 832 } else { 833 sc->sc_tx_dma_buf = 834 usbd_xfer_get_frame_buffer(sc->sc_xfer[ 835 URTW_8187L_BULK_TX_LOW], 0); 836 } 837 838 URTW_LOCK(sc); 839 840 urtw_read32_m(sc, URTW_RX, &data); 841 sc->sc_epromtype = (data & URTW_RX_9356SEL) ? URTW_EEPROM_93C56 : 842 URTW_EEPROM_93C46; 843 844 error = urtw_get_rfchip(sc); 845 if (error != 0) 846 goto fail; 847 error = urtw_get_macaddr(sc); 848 if (error != 0) 849 goto fail; 850 error = urtw_get_txpwr(sc); 851 if (error != 0) 852 goto fail; 853 error = urtw_led_init(sc); 854 if (error != 0) 855 goto fail; 856 857 URTW_UNLOCK(sc); 858 859 sc->sc_rts_retry = URTW_DEFAULT_RTS_RETRY; 860 sc->sc_tx_retry = URTW_DEFAULT_TX_RETRY; 861 sc->sc_currate = 3; 862 sc->sc_preamble_mode = urtw_preamble_mode; 863 864 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 865 if (ifp == NULL) { 866 device_printf(sc->sc_dev, "can not allocate ifnet\n"); 867 ret = ENOMEM; 868 goto fail1; 869 } 870 871 ifp->if_softc = sc; 872 if_initname(ifp, "urtw", device_get_unit(sc->sc_dev)); 873 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 874 ifp->if_init = urtw_init; 875 ifp->if_ioctl = urtw_ioctl; 876 ifp->if_start = urtw_start; 877 /* XXX URTW_TX_DATA_LIST_COUNT */ 878 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 879 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 880 IFQ_SET_READY(&ifp->if_snd); 881 882 ic = ifp->if_l2com; 883 ic->ic_ifp = ifp; 884 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 885 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 886 887 /* set device capabilities */ 888 ic->ic_caps = 889 IEEE80211_C_STA | /* station mode */ 890 IEEE80211_C_MONITOR | /* monitor mode supported */ 891 IEEE80211_C_TXPMGT | /* tx power management */ 892 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 893 IEEE80211_C_SHSLOT | /* short slot time supported */ 894 IEEE80211_C_BGSCAN | /* capable of bg scanning */ 895 IEEE80211_C_WPA; /* 802.11i */ 896 897 bands = 0; 898 setbit(&bands, IEEE80211_MODE_11B); 899 setbit(&bands, IEEE80211_MODE_11G); 900 ieee80211_init_channels(ic, NULL, &bands); 901 902 ieee80211_ifattach(ic, sc->sc_bssid); 903 ic->ic_raw_xmit = urtw_raw_xmit; 904 ic->ic_scan_start = urtw_scan_start; 905 ic->ic_scan_end = urtw_scan_end; 906 ic->ic_set_channel = urtw_set_channel; 907 ic->ic_updateslot = urtw_updateslot; 908 ic->ic_vap_create = urtw_vap_create; 909 ic->ic_vap_delete = urtw_vap_delete; 910 ic->ic_update_mcast = urtw_update_mcast; 911 912 ieee80211_radiotap_attach(ic, 913 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 914 URTW_TX_RADIOTAP_PRESENT, 915 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 916 URTW_RX_RADIOTAP_PRESENT); 917 918 urtw_sysctl_node(sc); 919 920 if (bootverbose) 921 ieee80211_announce(ic); 922 return (0); 923 924fail: URTW_UNLOCK(sc); 925fail1: usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ? 926 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS); 927fail0: 928 return (ret); 929} 930 931static int 932urtw_detach(device_t dev) 933{ 934 struct urtw_softc *sc = device_get_softc(dev); 935 struct ifnet *ifp = sc->sc_ifp; 936 struct ieee80211com *ic = ifp->if_l2com; 937 unsigned int x; 938 unsigned int n_xfers; 939 940 /* Prevent further ioctls */ 941 URTW_LOCK(sc); 942 sc->sc_flags |= URTW_DETACHED; 943 URTW_UNLOCK(sc); 944 945 urtw_stop(ifp); 946 947 ieee80211_draintask(ic, &sc->sc_updateslot_task); 948 ieee80211_draintask(ic, &sc->sc_led_task); 949 950 usb_callout_drain(&sc->sc_led_ch); 951 callout_drain(&sc->sc_watchdog_ch); 952 953 n_xfers = (sc->sc_flags & URTW_RTL8187B) ? 954 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS; 955 956 /* prevent further allocations from RX/TX data lists */ 957 URTW_LOCK(sc); 958 STAILQ_INIT(&sc->sc_tx_active); 959 STAILQ_INIT(&sc->sc_tx_inactive); 960 STAILQ_INIT(&sc->sc_tx_pending); 961 962 STAILQ_INIT(&sc->sc_rx_active); 963 STAILQ_INIT(&sc->sc_rx_inactive); 964 URTW_UNLOCK(sc); 965 966 /* drain USB transfers */ 967 for (x = 0; x != n_xfers; x++) 968 usbd_transfer_drain(sc->sc_xfer[x]); 969 970 /* free data buffers */ 971 URTW_LOCK(sc); 972 urtw_free_tx_data_list(sc); 973 urtw_free_rx_data_list(sc); 974 URTW_UNLOCK(sc); 975 976 /* free USB transfers and some data buffers */ 977 usbd_transfer_unsetup(sc->sc_xfer, n_xfers); 978 979 ieee80211_ifdetach(ic); 980 if_free(ifp); 981 mtx_destroy(&sc->sc_mtx); 982 return (0); 983} 984 985static void 986urtw_free_tx_data_list(struct urtw_softc *sc) 987{ 988 urtw_free_data_list(sc, sc->sc_tx, URTW_TX_DATA_LIST_COUNT, 0); 989} 990 991static void 992urtw_free_rx_data_list(struct urtw_softc *sc) 993{ 994 urtw_free_data_list(sc, sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1); 995} 996 997static void 998urtw_free_data_list(struct urtw_softc *sc, struct urtw_data data[], int ndata, 999 int fillmbuf) 1000{ 1001 int i; 1002 1003 for (i = 0; i < ndata; i++) { 1004 struct urtw_data *dp = &data[i]; 1005 1006 if (fillmbuf == 1) { 1007 if (dp->m != NULL) { 1008 m_freem(dp->m); 1009 dp->m = NULL; 1010 dp->buf = NULL; 1011 } 1012 } else { 1013 dp->buf = NULL; 1014 } 1015 if (dp->ni != NULL) { 1016 ieee80211_free_node(dp->ni); 1017 dp->ni = NULL; 1018 } 1019 } 1020} 1021 1022static struct ieee80211vap * 1023urtw_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 1024 enum ieee80211_opmode opmode, int flags, 1025 const uint8_t bssid[IEEE80211_ADDR_LEN], 1026 const uint8_t mac[IEEE80211_ADDR_LEN]) 1027{ 1028 struct urtw_vap *uvp; 1029 struct ieee80211vap *vap; 1030 1031 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 1032 return (NULL); 1033 uvp = (struct urtw_vap *) malloc(sizeof(struct urtw_vap), 1034 M_80211_VAP, M_NOWAIT | M_ZERO); 1035 if (uvp == NULL) 1036 return (NULL); 1037 vap = &uvp->vap; 1038 /* enable s/w bmiss handling for sta mode */ 1039 1040 if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 1041 flags | IEEE80211_CLONE_NOBEACONS, bssid, mac) != 0) { 1042 /* out of memory */ 1043 free(uvp, M_80211_VAP); 1044 return (NULL); 1045 } 1046 1047 /* override state transition machine */ 1048 uvp->newstate = vap->iv_newstate; 1049 vap->iv_newstate = urtw_newstate; 1050 1051 /* complete setup */ 1052 ieee80211_vap_attach(vap, ieee80211_media_change, 1053 ieee80211_media_status); 1054 ic->ic_opmode = opmode; 1055 return (vap); 1056} 1057 1058static void 1059urtw_vap_delete(struct ieee80211vap *vap) 1060{ 1061 struct urtw_vap *uvp = URTW_VAP(vap); 1062 1063 ieee80211_vap_detach(vap); 1064 free(uvp, M_80211_VAP); 1065} 1066 1067static void 1068urtw_init_locked(void *arg) 1069{ 1070 int ret; 1071 struct urtw_softc *sc = arg; 1072 struct ifnet *ifp = sc->sc_ifp; 1073 usb_error_t error; 1074 1075 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1076 urtw_stop_locked(ifp); 1077 1078 error = (sc->sc_flags & URTW_RTL8187B) ? urtw_adapter_start_b(sc) : 1079 urtw_adapter_start(sc); 1080 if (error != 0) 1081 goto fail; 1082 1083 /* reset softc variables */ 1084 sc->sc_txtimer = 0; 1085 1086 if (!(sc->sc_flags & URTW_INIT_ONCE)) { 1087 ret = urtw_alloc_rx_data_list(sc); 1088 if (ret != 0) 1089 goto fail; 1090 ret = urtw_alloc_tx_data_list(sc); 1091 if (ret != 0) 1092 goto fail; 1093 sc->sc_flags |= URTW_INIT_ONCE; 1094 } 1095 1096 error = urtw_rx_enable(sc); 1097 if (error != 0) 1098 goto fail; 1099 error = urtw_tx_enable(sc); 1100 if (error != 0) 1101 goto fail; 1102 1103 if (sc->sc_flags & URTW_RTL8187B) 1104 usbd_transfer_start(sc->sc_xfer[URTW_8187B_BULK_TX_STATUS]); 1105 1106 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1107 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1108 1109 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1110fail: 1111 return; 1112} 1113 1114static void 1115urtw_init(void *arg) 1116{ 1117 struct urtw_softc *sc = arg; 1118 1119 URTW_LOCK(sc); 1120 urtw_init_locked(arg); 1121 URTW_UNLOCK(sc); 1122} 1123 1124static usb_error_t 1125urtw_adapter_start_b(struct urtw_softc *sc) 1126{ 1127#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 1128 uint8_t data8; 1129 usb_error_t error; 1130 1131 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1132 if (error) 1133 goto fail; 1134 1135 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1136 urtw_write8_m(sc, URTW_CONFIG3, 1137 data8 | URTW_CONFIG3_ANAPARAM_WRITE | URTW_CONFIG3_GNT_SELECT); 1138 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8187B_8225_ANAPARAM2_ON); 1139 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_ON); 1140 urtw_write8_m(sc, URTW_ANAPARAM3, URTW_8187B_8225_ANAPARAM3_ON); 1141 1142 urtw_write8_m(sc, 0x61, 0x10); 1143 urtw_read8_m(sc, 0x62, &data8); 1144 urtw_write8_m(sc, 0x62, data8 & ~(1 << 5)); 1145 urtw_write8_m(sc, 0x62, data8 | (1 << 5)); 1146 1147 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1148 data8 &= ~URTW_CONFIG3_ANAPARAM_WRITE; 1149 urtw_write8_m(sc, URTW_CONFIG3, data8); 1150 1151 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1152 if (error) 1153 goto fail; 1154 1155 error = urtw_8187b_cmd_reset(sc); 1156 if (error) 1157 goto fail; 1158 1159 error = sc->sc_rf_init(sc); 1160 if (error != 0) 1161 goto fail; 1162 urtw_write8_m(sc, URTW_CMD, URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1163 1164 /* fix RTL8187B RX stall */ 1165 error = urtw_intr_enable(sc); 1166 if (error) 1167 goto fail; 1168 1169 error = urtw_write8e(sc, 0x41, 0xf4); 1170 if (error) 1171 goto fail; 1172 error = urtw_write8e(sc, 0x40, 0x00); 1173 if (error) 1174 goto fail; 1175 error = urtw_write8e(sc, 0x42, 0x00); 1176 if (error) 1177 goto fail; 1178 error = urtw_write8e(sc, 0x42, 0x01); 1179 if (error) 1180 goto fail; 1181 error = urtw_write8e(sc, 0x40, 0x0f); 1182 if (error) 1183 goto fail; 1184 error = urtw_write8e(sc, 0x42, 0x00); 1185 if (error) 1186 goto fail; 1187 error = urtw_write8e(sc, 0x42, 0x01); 1188 if (error) 1189 goto fail; 1190 1191 urtw_read8_m(sc, 0xdb, &data8); 1192 urtw_write8_m(sc, 0xdb, data8 | (1 << 2)); 1193 urtw_write16_m(sc, 0x372, 0x59fa); 1194 urtw_write16_m(sc, 0x374, 0x59d2); 1195 urtw_write16_m(sc, 0x376, 0x59d2); 1196 urtw_write16_m(sc, 0x378, 0x19fa); 1197 urtw_write16_m(sc, 0x37a, 0x19fa); 1198 urtw_write16_m(sc, 0x37c, 0x00d0); 1199 urtw_write8_m(sc, 0x61, 0); 1200 1201 urtw_write8_m(sc, 0x180, 0x0f); 1202 urtw_write8_m(sc, 0x183, 0x03); 1203 urtw_write8_m(sc, 0xda, 0x10); 1204 urtw_write8_m(sc, 0x24d, 0x08); 1205 urtw_write32_m(sc, URTW_HSSI_PARA, 0x0600321b); 1206 1207 urtw_write16_m(sc, 0x1ec, 0x800); /* RX MAX SIZE */ 1208fail: 1209 return (error); 1210#undef N 1211} 1212 1213static usb_error_t 1214urtw_adapter_start(struct urtw_softc *sc) 1215{ 1216 usb_error_t error; 1217 1218 error = urtw_reset(sc); 1219 if (error) 1220 goto fail; 1221 1222 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 0); 1223 urtw_write8_m(sc, URTW_GPIO, 0); 1224 1225 /* for led */ 1226 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1227 error = urtw_led_ctl(sc, URTW_LED_CTL_POWER_ON); 1228 if (error != 0) 1229 goto fail; 1230 1231 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1232 if (error) 1233 goto fail; 1234 /* applying MAC address again. */ 1235 urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)sc->sc_bssid)[0]); 1236 urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)sc->sc_bssid)[1] & 0xffff); 1237 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1238 if (error) 1239 goto fail; 1240 1241 error = urtw_update_msr(sc); 1242 if (error) 1243 goto fail; 1244 1245 urtw_write32_m(sc, URTW_INT_TIMEOUT, 0); 1246 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 1247 urtw_write8_m(sc, URTW_RATE_FALLBACK, URTW_RATE_FALLBACK_ENABLE | 0x1); 1248 error = urtw_set_rate(sc); 1249 if (error != 0) 1250 goto fail; 1251 1252 error = sc->sc_rf_init(sc); 1253 if (error != 0) 1254 goto fail; 1255 if (sc->sc_rf_set_sens != NULL) 1256 sc->sc_rf_set_sens(sc, sc->sc_sens); 1257 1258 /* XXX correct? to call write16 */ 1259 urtw_write16_m(sc, URTW_PSR, 1); 1260 urtw_write16_m(sc, URTW_ADDR_MAGIC2, 0x10); 1261 urtw_write8_m(sc, URTW_TALLY_SEL, 0x80); 1262 urtw_write8_m(sc, URTW_ADDR_MAGIC3, 0x60); 1263 /* XXX correct? to call write16 */ 1264 urtw_write16_m(sc, URTW_PSR, 0); 1265 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1266 1267 error = urtw_intr_enable(sc); 1268 if (error != 0) 1269 goto fail; 1270 1271fail: 1272 return (error); 1273} 1274 1275static usb_error_t 1276urtw_set_mode(struct urtw_softc *sc, uint32_t mode) 1277{ 1278 uint8_t data; 1279 usb_error_t error; 1280 1281 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 1282 data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT); 1283 data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK); 1284 urtw_write8_m(sc, URTW_EPROM_CMD, data); 1285fail: 1286 return (error); 1287} 1288 1289static usb_error_t 1290urtw_8187b_cmd_reset(struct urtw_softc *sc) 1291{ 1292 int i; 1293 uint8_t data8; 1294 usb_error_t error; 1295 1296 /* XXX the code can be duplicate with urtw_reset(). */ 1297 urtw_read8_m(sc, URTW_CMD, &data8); 1298 data8 = (data8 & 0x2) | URTW_CMD_RST; 1299 urtw_write8_m(sc, URTW_CMD, data8); 1300 1301 for (i = 0; i < 20; i++) { 1302 usb_pause_mtx(&sc->sc_mtx, 2); 1303 urtw_read8_m(sc, URTW_CMD, &data8); 1304 if (!(data8 & URTW_CMD_RST)) 1305 break; 1306 } 1307 if (i >= 20) { 1308 device_printf(sc->sc_dev, "reset timeout\n"); 1309 goto fail; 1310 } 1311fail: 1312 return (error); 1313} 1314 1315static usb_error_t 1316urtw_do_request(struct urtw_softc *sc, 1317 struct usb_device_request *req, void *data) 1318{ 1319 usb_error_t err; 1320 int ntries = 10; 1321 1322 URTW_ASSERT_LOCKED(sc); 1323 1324 while (ntries--) { 1325 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 1326 req, data, 0, NULL, 250 /* ms */); 1327 if (err == 0) 1328 break; 1329 1330 DPRINTF(sc, URTW_DEBUG_INIT, 1331 "Control request failed, %s (retrying)\n", 1332 usbd_errstr(err)); 1333 usb_pause_mtx(&sc->sc_mtx, hz / 100); 1334 } 1335 return (err); 1336} 1337 1338static void 1339urtw_stop_locked(struct ifnet *ifp) 1340{ 1341 struct urtw_softc *sc = ifp->if_softc; 1342 uint8_t data8; 1343 usb_error_t error; 1344 1345 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1346 1347 error = urtw_intr_disable(sc); 1348 if (error) 1349 goto fail; 1350 urtw_read8_m(sc, URTW_CMD, &data8); 1351 data8 &= ~(URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1352 urtw_write8_m(sc, URTW_CMD, data8); 1353 1354 error = sc->sc_rf_stop(sc); 1355 if (error != 0) 1356 goto fail; 1357 1358 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1359 if (error) 1360 goto fail; 1361 urtw_read8_m(sc, URTW_CONFIG4, &data8); 1362 urtw_write8_m(sc, URTW_CONFIG4, data8 | URTW_CONFIG4_VCOOFF); 1363 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1364 if (error) 1365 goto fail; 1366fail: 1367 if (error) 1368 device_printf(sc->sc_dev, "failed to stop (%s)\n", 1369 usbd_errstr(error)); 1370 1371 usb_callout_stop(&sc->sc_led_ch); 1372 callout_stop(&sc->sc_watchdog_ch); 1373 1374 urtw_abort_xfers(sc); 1375} 1376 1377static void 1378urtw_stop(struct ifnet *ifp) 1379{ 1380 struct urtw_softc *sc = ifp->if_softc; 1381 1382 URTW_LOCK(sc); 1383 urtw_stop_locked(ifp); 1384 URTW_UNLOCK(sc); 1385} 1386 1387static void 1388urtw_abort_xfers(struct urtw_softc *sc) 1389{ 1390 int i, max; 1391 1392 URTW_ASSERT_LOCKED(sc); 1393 1394 max = (sc->sc_flags & URTW_RTL8187B) ? URTW_8187B_N_XFERS : 1395 URTW_8187L_N_XFERS; 1396 1397 /* abort any pending transfers */ 1398 for (i = 0; i < max; i++) 1399 usbd_transfer_stop(sc->sc_xfer[i]); 1400} 1401 1402static int 1403urtw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1404{ 1405 struct urtw_softc *sc = ifp->if_softc; 1406 struct ieee80211com *ic = ifp->if_l2com; 1407 struct ifreq *ifr = (struct ifreq *) data; 1408 int error; 1409 int startall = 0; 1410 1411 URTW_LOCK(sc); 1412 error = (sc->sc_flags & URTW_DETACHED) ? ENXIO : 0; 1413 URTW_UNLOCK(sc); 1414 if (error) 1415 return (error); 1416 1417 switch (cmd) { 1418 case SIOCSIFFLAGS: 1419 if (ifp->if_flags & IFF_UP) { 1420 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1421 if ((ifp->if_flags ^ sc->sc_if_flags) & 1422 (IFF_ALLMULTI | IFF_PROMISC)) 1423 urtw_set_multi(sc); 1424 } else { 1425 urtw_init(ifp->if_softc); 1426 startall = 1; 1427 } 1428 } else { 1429 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1430 urtw_stop(ifp); 1431 } 1432 sc->sc_if_flags = ifp->if_flags; 1433 if (startall) 1434 ieee80211_start_all(ic); 1435 break; 1436 case SIOCGIFMEDIA: 1437 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1438 break; 1439 case SIOCGIFADDR: 1440 error = ether_ioctl(ifp, cmd, data); 1441 break; 1442 default: 1443 error = EINVAL; 1444 break; 1445 } 1446 return (error); 1447} 1448 1449static void 1450urtw_start(struct ifnet *ifp) 1451{ 1452 struct urtw_data *bf; 1453 struct urtw_softc *sc = ifp->if_softc; 1454 struct ieee80211_node *ni; 1455 struct mbuf *m; 1456 1457 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1458 return; 1459 1460 URTW_LOCK(sc); 1461 for (;;) { 1462 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1463 if (m == NULL) 1464 break; 1465 bf = urtw_getbuf(sc); 1466 if (bf == NULL) { 1467 IFQ_DRV_PREPEND(&ifp->if_snd, m); 1468 break; 1469 } 1470 1471 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 1472 m->m_pkthdr.rcvif = NULL; 1473 1474 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_NORMAL) != 0) { 1475 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1476 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1477 ieee80211_free_node(ni); 1478 break; 1479 } 1480 1481 sc->sc_txtimer = 5; 1482 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1483 } 1484 URTW_UNLOCK(sc); 1485} 1486 1487static int 1488urtw_alloc_data_list(struct urtw_softc *sc, struct urtw_data data[], 1489 int ndata, int maxsz, void *dma_buf) 1490{ 1491 int i, error; 1492 1493 for (i = 0; i < ndata; i++) { 1494 struct urtw_data *dp = &data[i]; 1495 1496 dp->sc = sc; 1497 if (dma_buf == NULL) { 1498 dp->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1499 if (dp->m == NULL) { 1500 device_printf(sc->sc_dev, 1501 "could not allocate rx mbuf\n"); 1502 error = ENOMEM; 1503 goto fail; 1504 } 1505 dp->buf = mtod(dp->m, uint8_t *); 1506 } else { 1507 dp->m = NULL; 1508 dp->buf = ((uint8_t *)dma_buf) + 1509 (i * maxsz); 1510 } 1511 dp->ni = NULL; 1512 } 1513 return (0); 1514 1515fail: urtw_free_data_list(sc, data, ndata, 1); 1516 return (error); 1517} 1518 1519static int 1520urtw_alloc_rx_data_list(struct urtw_softc *sc) 1521{ 1522 int error, i; 1523 1524 error = urtw_alloc_data_list(sc, 1525 sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1526 MCLBYTES, NULL /* mbufs */); 1527 if (error != 0) 1528 return (error); 1529 1530 STAILQ_INIT(&sc->sc_rx_active); 1531 STAILQ_INIT(&sc->sc_rx_inactive); 1532 1533 for (i = 0; i < URTW_RX_DATA_LIST_COUNT; i++) 1534 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1535 1536 return (0); 1537} 1538 1539static int 1540urtw_alloc_tx_data_list(struct urtw_softc *sc) 1541{ 1542 int error, i; 1543 1544 error = urtw_alloc_data_list(sc, 1545 sc->sc_tx, URTW_TX_DATA_LIST_COUNT, URTW_TX_MAXSIZE, 1546 sc->sc_tx_dma_buf /* no mbufs */); 1547 if (error != 0) 1548 return (error); 1549 1550 STAILQ_INIT(&sc->sc_tx_active); 1551 STAILQ_INIT(&sc->sc_tx_inactive); 1552 STAILQ_INIT(&sc->sc_tx_pending); 1553 1554 for (i = 0; i < URTW_TX_DATA_LIST_COUNT; i++) 1555 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], 1556 next); 1557 1558 return (0); 1559} 1560 1561static int 1562urtw_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1563 const struct ieee80211_bpf_params *params) 1564{ 1565 struct ieee80211com *ic = ni->ni_ic; 1566 struct ifnet *ifp = ic->ic_ifp; 1567 struct urtw_data *bf; 1568 struct urtw_softc *sc = ifp->if_softc; 1569 1570 /* prevent management frames from being sent if we're not ready */ 1571 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1572 m_freem(m); 1573 ieee80211_free_node(ni); 1574 return ENETDOWN; 1575 } 1576 URTW_LOCK(sc); 1577 bf = urtw_getbuf(sc); 1578 if (bf == NULL) { 1579 ieee80211_free_node(ni); 1580 m_freem(m); 1581 URTW_UNLOCK(sc); 1582 return (ENOBUFS); /* XXX */ 1583 } 1584 1585 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 1586 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_LOW) != 0) { 1587 ieee80211_free_node(ni); 1588 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1589 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1590 URTW_UNLOCK(sc); 1591 return (EIO); 1592 } 1593 URTW_UNLOCK(sc); 1594 1595 sc->sc_txtimer = 5; 1596 return (0); 1597} 1598 1599static void 1600urtw_scan_start(struct ieee80211com *ic) 1601{ 1602 1603 /* XXX do nothing? */ 1604} 1605 1606static void 1607urtw_scan_end(struct ieee80211com *ic) 1608{ 1609 1610 /* XXX do nothing? */ 1611} 1612 1613static void 1614urtw_set_channel(struct ieee80211com *ic) 1615{ 1616 struct urtw_softc *sc = ic->ic_ifp->if_softc; 1617 struct ifnet *ifp = sc->sc_ifp; 1618 uint32_t data, orig; 1619 usb_error_t error; 1620 1621 /* 1622 * if the user set a channel explicitly using ifconfig(8) this function 1623 * can be called earlier than we're expected that in some cases the 1624 * initialization would be failed if setting a channel is called before 1625 * the init have done. 1626 */ 1627 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1628 return; 1629 1630 if (sc->sc_curchan != NULL && sc->sc_curchan == ic->ic_curchan) 1631 return; 1632 1633 URTW_LOCK(sc); 1634 1635 /* 1636 * during changing th channel we need to temporarily be disable 1637 * TX. 1638 */ 1639 urtw_read32_m(sc, URTW_TX_CONF, &orig); 1640 data = orig & ~URTW_TX_LOOPBACK_MASK; 1641 urtw_write32_m(sc, URTW_TX_CONF, data | URTW_TX_LOOPBACK_MAC); 1642 1643 error = sc->sc_rf_set_chan(sc, ieee80211_chan2ieee(ic, ic->ic_curchan)); 1644 if (error != 0) 1645 goto fail; 1646 usb_pause_mtx(&sc->sc_mtx, 10); 1647 urtw_write32_m(sc, URTW_TX_CONF, orig); 1648 1649 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1650 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1651 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 1652 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1653 1654fail: 1655 URTW_UNLOCK(sc); 1656 1657 sc->sc_curchan = ic->ic_curchan; 1658 1659 if (error != 0) 1660 device_printf(sc->sc_dev, "could not change the channel\n"); 1661} 1662 1663static void 1664urtw_update_mcast(struct ifnet *ifp) 1665{ 1666 1667 /* XXX do nothing? */ 1668} 1669 1670static int 1671urtw_tx_start(struct urtw_softc *sc, struct ieee80211_node *ni, struct mbuf *m0, 1672 struct urtw_data *data, int prior) 1673{ 1674 struct ifnet *ifp = sc->sc_ifp; 1675 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 1676 struct ieee80211_key *k; 1677 const struct ieee80211_txparam *tp; 1678 struct ieee80211com *ic = ifp->if_l2com; 1679 struct ieee80211vap *vap = ni->ni_vap; 1680 struct usb_xfer *rtl8187b_pipes[URTW_8187B_TXPIPE_MAX] = { 1681 sc->sc_xfer[URTW_8187B_BULK_TX_BE], 1682 sc->sc_xfer[URTW_8187B_BULK_TX_BK], 1683 sc->sc_xfer[URTW_8187B_BULK_TX_VI], 1684 sc->sc_xfer[URTW_8187B_BULK_TX_VO] 1685 }; 1686 struct usb_xfer *xfer; 1687 int dur = 0, rtsdur = 0, rtsenable = 0, ctsenable = 0, rate, 1688 pkttime = 0, txdur = 0, isshort = 0, xferlen; 1689 uint16_t acktime, rtstime, ctstime; 1690 uint32_t flags; 1691 usb_error_t error; 1692 1693 URTW_ASSERT_LOCKED(sc); 1694 1695 /* 1696 * Software crypto. 1697 */ 1698 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1699 k = ieee80211_crypto_encap(ni, m0); 1700 if (k == NULL) { 1701 device_printf(sc->sc_dev, 1702 "ieee80211_crypto_encap returns NULL.\n"); 1703 /* XXX we don't expect the fragmented frames */ 1704 m_freem(m0); 1705 return (ENOBUFS); 1706 } 1707 1708 /* in case packet header moved, reset pointer */ 1709 wh = mtod(m0, struct ieee80211_frame *); 1710 } 1711 1712 if (ieee80211_radiotap_active_vap(vap)) { 1713 struct urtw_tx_radiotap_header *tap = &sc->sc_txtap; 1714 1715 /* XXX Are variables correct? */ 1716 tap->wt_flags = 0; 1717 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1718 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1719 1720 ieee80211_radiotap_tx(vap, m0); 1721 } 1722 1723 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_MGT || 1724 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_CTL) { 1725 tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)]; 1726 rate = tp->mgmtrate; 1727 } else { 1728 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1729 /* for data frames */ 1730 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1731 rate = tp->mcastrate; 1732 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 1733 rate = tp->ucastrate; 1734 else 1735 rate = urtw_rtl2rate(sc->sc_currate); 1736 } 1737 1738 sc->sc_stats.txrates[sc->sc_currate]++; 1739 1740 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1741 txdur = pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1742 IEEE80211_CRC_LEN, rate, 0, 0); 1743 else { 1744 acktime = urtw_compute_txtime(14, 2,0, 0); 1745 if ((m0->m_pkthdr.len + 4) > vap->iv_rtsthreshold) { 1746 rtsenable = 1; 1747 ctsenable = 0; 1748 rtstime = urtw_compute_txtime(URTW_ACKCTS_LEN, 2, 0, 0); 1749 ctstime = urtw_compute_txtime(14, 2, 0, 0); 1750 pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1751 IEEE80211_CRC_LEN, rate, 0, isshort); 1752 rtsdur = ctstime + pkttime + acktime + 1753 3 * URTW_ASIFS_TIME; 1754 txdur = rtstime + rtsdur; 1755 } else { 1756 rtsenable = ctsenable = rtsdur = 0; 1757 pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1758 IEEE80211_CRC_LEN, rate, 0, isshort); 1759 txdur = pkttime + URTW_ASIFS_TIME + acktime; 1760 } 1761 1762 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1763 dur = urtw_compute_txtime(m0->m_pkthdr.len + 1764 IEEE80211_CRC_LEN, rate, 0, isshort) + 1765 3 * URTW_ASIFS_TIME + 1766 2 * acktime; 1767 else 1768 dur = URTW_ASIFS_TIME + acktime; 1769 } 1770 USETW(wh->i_dur, dur); 1771 1772 xferlen = m0->m_pkthdr.len; 1773 xferlen += (sc->sc_flags & URTW_RTL8187B) ? (4 * 8) : (4 * 3); 1774 if ((0 == xferlen % 64) || (0 == xferlen % 512)) 1775 xferlen += 1; 1776 1777 memset(data->buf, 0, URTW_TX_MAXSIZE); 1778 flags = m0->m_pkthdr.len & 0xfff; 1779 flags |= URTW_TX_FLAG_NO_ENC; 1780 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1781 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE) && 1782 (sc->sc_preamble_mode == URTW_PREAMBLE_MODE_SHORT) && 1783 (sc->sc_currate != 0)) 1784 flags |= URTW_TX_FLAG_SPLCP; 1785 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1786 flags |= URTW_TX_FLAG_MOREFRAG; 1787 1788 flags |= (sc->sc_currate & 0xf) << URTW_TX_FLAG_TXRATE_SHIFT; 1789 1790 if (sc->sc_flags & URTW_RTL8187B) { 1791 struct urtw_8187b_txhdr *tx; 1792 1793 tx = (struct urtw_8187b_txhdr *)data->buf; 1794 if (ctsenable) 1795 flags |= URTW_TX_FLAG_CTS; 1796 if (rtsenable) { 1797 flags |= URTW_TX_FLAG_RTS; 1798 flags |= (urtw_rate2rtl(11) & 0xf) << 1799 URTW_TX_FLAG_RTSRATE_SHIFT; 1800 tx->rtsdur = rtsdur; 1801 } 1802 tx->flag = htole32(flags); 1803 tx->txdur = txdur; 1804 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1805 IEEE80211_FC0_TYPE_MGT && 1806 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1807 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1808 tx->retry = 1; 1809 else 1810 tx->retry = URTW_TX_MAXRETRY; 1811 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1)); 1812 } else { 1813 struct urtw_8187l_txhdr *tx; 1814 1815 tx = (struct urtw_8187l_txhdr *)data->buf; 1816 if (rtsenable) { 1817 flags |= URTW_TX_FLAG_RTS; 1818 tx->rtsdur = rtsdur; 1819 } 1820 flags |= (urtw_rate2rtl(11) & 0xf) << URTW_TX_FLAG_RTSRATE_SHIFT; 1821 tx->flag = htole32(flags); 1822 tx->retry = 3; /* CW minimum */ 1823 tx->retry = 7 << 4; /* CW maximum */ 1824 tx->retry = URTW_TX_MAXRETRY << 8; /* retry limitation */ 1825 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1)); 1826 } 1827 1828 data->buflen = xferlen; 1829 data->ni = ni; 1830 data->m = m0; 1831 1832 if (sc->sc_flags & URTW_RTL8187B) { 1833 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1834 case IEEE80211_FC0_TYPE_CTL: 1835 case IEEE80211_FC0_TYPE_MGT: 1836 xfer = sc->sc_xfer[URTW_8187B_BULK_TX_EP12]; 1837 break; 1838 default: 1839 KASSERT(M_WME_GETAC(m0) < URTW_8187B_TXPIPE_MAX, 1840 ("unsupported WME pipe %d", M_WME_GETAC(m0))); 1841 xfer = rtl8187b_pipes[M_WME_GETAC(m0)]; 1842 break; 1843 } 1844 } else 1845 xfer = (prior == URTW_PRIORITY_LOW) ? 1846 sc->sc_xfer[URTW_8187L_BULK_TX_LOW] : 1847 sc->sc_xfer[URTW_8187L_BULK_TX_NORMAL]; 1848 1849 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 1850 usbd_transfer_start(xfer); 1851 1852 error = urtw_led_ctl(sc, URTW_LED_CTL_TX); 1853 if (error != 0) 1854 device_printf(sc->sc_dev, "could not control LED (%d)\n", 1855 error); 1856 return (0); 1857} 1858 1859static int 1860urtw_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1861{ 1862 struct ieee80211com *ic = vap->iv_ic; 1863 struct urtw_softc *sc = ic->ic_ifp->if_softc; 1864 struct urtw_vap *uvp = URTW_VAP(vap); 1865 struct ieee80211_node *ni; 1866 usb_error_t error = 0; 1867 1868 DPRINTF(sc, URTW_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1869 ieee80211_state_name[vap->iv_state], 1870 ieee80211_state_name[nstate]); 1871 1872 sc->sc_state = nstate; 1873 1874 IEEE80211_UNLOCK(ic); 1875 URTW_LOCK(sc); 1876 usb_callout_stop(&sc->sc_led_ch); 1877 callout_stop(&sc->sc_watchdog_ch); 1878 1879 switch (nstate) { 1880 case IEEE80211_S_INIT: 1881 case IEEE80211_S_SCAN: 1882 case IEEE80211_S_AUTH: 1883 case IEEE80211_S_ASSOC: 1884 break; 1885 case IEEE80211_S_RUN: 1886 ni = ieee80211_ref_node(vap->iv_bss); 1887 /* setting bssid. */ 1888 urtw_write32_m(sc, URTW_BSSID, ((uint32_t *)ni->ni_bssid)[0]); 1889 urtw_write16_m(sc, URTW_BSSID + 4, 1890 ((uint16_t *)ni->ni_bssid)[2]); 1891 urtw_update_msr(sc); 1892 /* XXX maybe the below would be incorrect. */ 1893 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1894 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1895 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 0x64); 1896 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1897 error = urtw_led_ctl(sc, URTW_LED_CTL_LINK); 1898 if (error != 0) 1899 device_printf(sc->sc_dev, 1900 "could not control LED (%d)\n", error); 1901 ieee80211_free_node(ni); 1902 break; 1903 default: 1904 break; 1905 } 1906fail: 1907 URTW_UNLOCK(sc); 1908 IEEE80211_LOCK(ic); 1909 return (uvp->newstate(vap, nstate, arg)); 1910} 1911 1912static void 1913urtw_watchdog(void *arg) 1914{ 1915 struct urtw_softc *sc = arg; 1916 struct ifnet *ifp = sc->sc_ifp; 1917 1918 if (sc->sc_txtimer > 0) { 1919 if (--sc->sc_txtimer == 0) { 1920 device_printf(sc->sc_dev, "device timeout\n"); 1921 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1922 return; 1923 } 1924 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1925 } 1926} 1927 1928static void 1929urtw_set_multi(void *arg) 1930{ 1931 struct urtw_softc *sc = arg; 1932 struct ifnet *ifp = sc->sc_ifp; 1933 1934 if (!(ifp->if_flags & IFF_UP)) 1935 return; 1936 1937 /* 1938 * XXX don't know how to set a device. Lack of docs. Just try to set 1939 * IFF_ALLMULTI flag here. 1940 */ 1941 ifp->if_flags |= IFF_ALLMULTI; 1942} 1943 1944static usb_error_t 1945urtw_set_rate(struct urtw_softc *sc) 1946{ 1947 int i, basic_rate, min_rr_rate, max_rr_rate; 1948 uint16_t data; 1949 usb_error_t error; 1950 1951 basic_rate = urtw_rate2rtl(48); 1952 min_rr_rate = urtw_rate2rtl(12); 1953 max_rr_rate = urtw_rate2rtl(48); 1954 1955 urtw_write8_m(sc, URTW_RESP_RATE, 1956 max_rr_rate << URTW_RESP_MAX_RATE_SHIFT | 1957 min_rr_rate << URTW_RESP_MIN_RATE_SHIFT); 1958 1959 urtw_read16_m(sc, URTW_BRSR, &data); 1960 data &= ~URTW_BRSR_MBR_8185; 1961 1962 for (i = 0; i <= basic_rate; i++) 1963 data |= (1 << i); 1964 1965 urtw_write16_m(sc, URTW_BRSR, data); 1966fail: 1967 return (error); 1968} 1969 1970static uint16_t 1971urtw_rate2rtl(uint32_t rate) 1972{ 1973#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 1974 int i; 1975 1976 for (i = 0; i < N(urtw_ratetable); i++) { 1977 if (rate == urtw_ratetable[i].reg) 1978 return urtw_ratetable[i].val; 1979 } 1980 1981 return (3); 1982#undef N 1983} 1984 1985static uint16_t 1986urtw_rtl2rate(uint32_t rate) 1987{ 1988#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 1989 int i; 1990 1991 for (i = 0; i < N(urtw_ratetable); i++) { 1992 if (rate == urtw_ratetable[i].val) 1993 return urtw_ratetable[i].reg; 1994 } 1995 1996 return (0); 1997#undef N 1998} 1999 2000static usb_error_t 2001urtw_update_msr(struct urtw_softc *sc) 2002{ 2003 struct ifnet *ifp = sc->sc_ifp; 2004 struct ieee80211com *ic = ifp->if_l2com; 2005 uint8_t data; 2006 usb_error_t error; 2007 2008 urtw_read8_m(sc, URTW_MSR, &data); 2009 data &= ~URTW_MSR_LINK_MASK; 2010 2011 if (sc->sc_state == IEEE80211_S_RUN) { 2012 switch (ic->ic_opmode) { 2013 case IEEE80211_M_STA: 2014 case IEEE80211_M_MONITOR: 2015 data |= URTW_MSR_LINK_STA; 2016 if (sc->sc_flags & URTW_RTL8187B) 2017 data |= URTW_MSR_LINK_ENEDCA; 2018 break; 2019 case IEEE80211_M_IBSS: 2020 data |= URTW_MSR_LINK_ADHOC; 2021 break; 2022 case IEEE80211_M_HOSTAP: 2023 data |= URTW_MSR_LINK_HOSTAP; 2024 break; 2025 default: 2026 DPRINTF(sc, URTW_DEBUG_STATE, 2027 "unsupported operation mode 0x%x\n", 2028 ic->ic_opmode); 2029 error = USB_ERR_INVAL; 2030 goto fail; 2031 } 2032 } else 2033 data |= URTW_MSR_LINK_NONE; 2034 2035 urtw_write8_m(sc, URTW_MSR, data); 2036fail: 2037 return (error); 2038} 2039 2040static usb_error_t 2041urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data) 2042{ 2043 struct usb_device_request req; 2044 usb_error_t error; 2045 2046 URTW_ASSERT_LOCKED(sc); 2047 2048 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2049 req.bRequest = URTW_8187_GETREGS_REQ; 2050 USETW(req.wValue, (val & 0xff) | 0xff00); 2051 USETW(req.wIndex, (val >> 8) & 0x3); 2052 USETW(req.wLength, sizeof(uint8_t)); 2053 2054 error = urtw_do_request(sc, &req, data); 2055 return (error); 2056} 2057 2058static usb_error_t 2059urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data) 2060{ 2061 struct usb_device_request req; 2062 usb_error_t error; 2063 2064 URTW_ASSERT_LOCKED(sc); 2065 2066 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2067 req.bRequest = URTW_8187_GETREGS_REQ; 2068 USETW(req.wValue, (val & 0xff) | 0xff00); 2069 USETW(req.wIndex, (val >> 8) & 0x3); 2070 USETW(req.wLength, sizeof(uint16_t)); 2071 2072 error = urtw_do_request(sc, &req, data); 2073 return (error); 2074} 2075 2076static usb_error_t 2077urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data) 2078{ 2079 struct usb_device_request req; 2080 usb_error_t error; 2081 2082 URTW_ASSERT_LOCKED(sc); 2083 2084 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2085 req.bRequest = URTW_8187_GETREGS_REQ; 2086 USETW(req.wValue, (val & 0xff) | 0xff00); 2087 USETW(req.wIndex, (val >> 8) & 0x3); 2088 USETW(req.wLength, sizeof(uint32_t)); 2089 2090 error = urtw_do_request(sc, &req, data); 2091 return (error); 2092} 2093 2094static usb_error_t 2095urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data) 2096{ 2097 struct usb_device_request req; 2098 2099 URTW_ASSERT_LOCKED(sc); 2100 2101 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2102 req.bRequest = URTW_8187_SETREGS_REQ; 2103 USETW(req.wValue, (val & 0xff) | 0xff00); 2104 USETW(req.wIndex, (val >> 8) & 0x3); 2105 USETW(req.wLength, sizeof(uint8_t)); 2106 2107 return (urtw_do_request(sc, &req, &data)); 2108} 2109 2110static usb_error_t 2111urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data) 2112{ 2113 struct usb_device_request req; 2114 2115 URTW_ASSERT_LOCKED(sc); 2116 2117 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2118 req.bRequest = URTW_8187_SETREGS_REQ; 2119 USETW(req.wValue, (val & 0xff) | 0xff00); 2120 USETW(req.wIndex, (val >> 8) & 0x3); 2121 USETW(req.wLength, sizeof(uint16_t)); 2122 2123 return (urtw_do_request(sc, &req, &data)); 2124} 2125 2126static usb_error_t 2127urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data) 2128{ 2129 struct usb_device_request req; 2130 2131 URTW_ASSERT_LOCKED(sc); 2132 2133 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2134 req.bRequest = URTW_8187_SETREGS_REQ; 2135 USETW(req.wValue, (val & 0xff) | 0xff00); 2136 USETW(req.wIndex, (val >> 8) & 0x3); 2137 USETW(req.wLength, sizeof(uint32_t)); 2138 2139 return (urtw_do_request(sc, &req, &data)); 2140} 2141 2142static usb_error_t 2143urtw_get_macaddr(struct urtw_softc *sc) 2144{ 2145 uint32_t data; 2146 usb_error_t error; 2147 2148 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data); 2149 if (error != 0) 2150 goto fail; 2151 sc->sc_bssid[0] = data & 0xff; 2152 sc->sc_bssid[1] = (data & 0xff00) >> 8; 2153 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data); 2154 if (error != 0) 2155 goto fail; 2156 sc->sc_bssid[2] = data & 0xff; 2157 sc->sc_bssid[3] = (data & 0xff00) >> 8; 2158 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data); 2159 if (error != 0) 2160 goto fail; 2161 sc->sc_bssid[4] = data & 0xff; 2162 sc->sc_bssid[5] = (data & 0xff00) >> 8; 2163fail: 2164 return (error); 2165} 2166 2167static usb_error_t 2168urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data) 2169{ 2170#define URTW_READCMD_LEN 3 2171 int addrlen, i; 2172 int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 }; 2173 usb_error_t error; 2174 2175 /* NB: make sure the buffer is initialized */ 2176 *data = 0; 2177 2178 /* enable EPROM programming */ 2179 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_PROGRAM_MODE); 2180 DELAY(URTW_EPROM_DELAY); 2181 2182 error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE); 2183 if (error != 0) 2184 goto fail; 2185 error = urtw_eprom_ck(sc); 2186 if (error != 0) 2187 goto fail; 2188 error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN); 2189 if (error != 0) 2190 goto fail; 2191 if (sc->sc_epromtype == URTW_EEPROM_93C56) { 2192 addrlen = 8; 2193 addrstr[0] = addr & (1 << 7); 2194 addrstr[1] = addr & (1 << 6); 2195 addrstr[2] = addr & (1 << 5); 2196 addrstr[3] = addr & (1 << 4); 2197 addrstr[4] = addr & (1 << 3); 2198 addrstr[5] = addr & (1 << 2); 2199 addrstr[6] = addr & (1 << 1); 2200 addrstr[7] = addr & (1 << 0); 2201 } else { 2202 addrlen=6; 2203 addrstr[0] = addr & (1 << 5); 2204 addrstr[1] = addr & (1 << 4); 2205 addrstr[2] = addr & (1 << 3); 2206 addrstr[3] = addr & (1 << 2); 2207 addrstr[4] = addr & (1 << 1); 2208 addrstr[5] = addr & (1 << 0); 2209 } 2210 error = urtw_eprom_sendbits(sc, addrstr, addrlen); 2211 if (error != 0) 2212 goto fail; 2213 2214 error = urtw_eprom_writebit(sc, 0); 2215 if (error != 0) 2216 goto fail; 2217 2218 for (i = 0; i < 16; i++) { 2219 error = urtw_eprom_ck(sc); 2220 if (error != 0) 2221 goto fail; 2222 error = urtw_eprom_readbit(sc, &data16); 2223 if (error != 0) 2224 goto fail; 2225 2226 (*data) |= (data16 << (15 - i)); 2227 } 2228 2229 error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE); 2230 if (error != 0) 2231 goto fail; 2232 error = urtw_eprom_ck(sc); 2233 if (error != 0) 2234 goto fail; 2235 2236 /* now disable EPROM programming */ 2237 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE); 2238fail: 2239 return (error); 2240#undef URTW_READCMD_LEN 2241} 2242 2243static usb_error_t 2244urtw_eprom_cs(struct urtw_softc *sc, int able) 2245{ 2246 uint8_t data; 2247 usb_error_t error; 2248 2249 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2250 if (able == URTW_EPROM_ENABLE) 2251 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CS); 2252 else 2253 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CS); 2254 DELAY(URTW_EPROM_DELAY); 2255fail: 2256 return (error); 2257} 2258 2259static usb_error_t 2260urtw_eprom_ck(struct urtw_softc *sc) 2261{ 2262 uint8_t data; 2263 usb_error_t error; 2264 2265 /* masking */ 2266 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2267 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK); 2268 DELAY(URTW_EPROM_DELAY); 2269 /* unmasking */ 2270 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2271 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK); 2272 DELAY(URTW_EPROM_DELAY); 2273fail: 2274 return (error); 2275} 2276 2277static usb_error_t 2278urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data) 2279{ 2280 uint8_t data8; 2281 usb_error_t error; 2282 2283 urtw_read8_m(sc, URTW_EPROM_CMD, &data8); 2284 *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0; 2285 DELAY(URTW_EPROM_DELAY); 2286 2287fail: 2288 return (error); 2289} 2290 2291static usb_error_t 2292urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit) 2293{ 2294 uint8_t data; 2295 usb_error_t error; 2296 2297 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2298 if (bit != 0) 2299 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_WRITEBIT); 2300 else 2301 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_WRITEBIT); 2302 DELAY(URTW_EPROM_DELAY); 2303fail: 2304 return (error); 2305} 2306 2307static usb_error_t 2308urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen) 2309{ 2310 int i = 0; 2311 usb_error_t error = 0; 2312 2313 for (i = 0; i < buflen; i++) { 2314 error = urtw_eprom_writebit(sc, buf[i]); 2315 if (error != 0) 2316 goto fail; 2317 error = urtw_eprom_ck(sc); 2318 if (error != 0) 2319 goto fail; 2320 } 2321fail: 2322 return (error); 2323} 2324 2325 2326static usb_error_t 2327urtw_get_txpwr(struct urtw_softc *sc) 2328{ 2329 int i, j; 2330 uint32_t data; 2331 usb_error_t error; 2332 2333 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW_BASE, &data); 2334 if (error != 0) 2335 goto fail; 2336 sc->sc_txpwr_cck_base = data & 0xf; 2337 sc->sc_txpwr_ofdm_base = (data >> 4) & 0xf; 2338 2339 for (i = 1, j = 0; i < 6; i += 2, j++) { 2340 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW0 + j, &data); 2341 if (error != 0) 2342 goto fail; 2343 sc->sc_txpwr_cck[i] = data & 0xf; 2344 sc->sc_txpwr_cck[i + 1] = (data & 0xf00) >> 8; 2345 sc->sc_txpwr_ofdm[i] = (data & 0xf0) >> 4; 2346 sc->sc_txpwr_ofdm[i + 1] = (data & 0xf000) >> 12; 2347 } 2348 for (i = 1, j = 0; i < 4; i += 2, j++) { 2349 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW1 + j, &data); 2350 if (error != 0) 2351 goto fail; 2352 sc->sc_txpwr_cck[i + 6] = data & 0xf; 2353 sc->sc_txpwr_cck[i + 6 + 1] = (data & 0xf00) >> 8; 2354 sc->sc_txpwr_ofdm[i + 6] = (data & 0xf0) >> 4; 2355 sc->sc_txpwr_ofdm[i + 6 + 1] = (data & 0xf000) >> 12; 2356 } 2357 if (sc->sc_flags & URTW_RTL8187B) { 2358 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2, &data); 2359 if (error != 0) 2360 goto fail; 2361 sc->sc_txpwr_cck[1 + 6 + 4] = data & 0xf; 2362 sc->sc_txpwr_ofdm[1 + 6 + 4] = (data & 0xf0) >> 4; 2363 error = urtw_eprom_read32(sc, 0x0a, &data); 2364 if (error != 0) 2365 goto fail; 2366 sc->sc_txpwr_cck[2 + 6 + 4] = data & 0xf; 2367 sc->sc_txpwr_ofdm[2 + 6 + 4] = (data & 0xf0) >> 4; 2368 error = urtw_eprom_read32(sc, 0x1c, &data); 2369 if (error != 0) 2370 goto fail; 2371 sc->sc_txpwr_cck[3 + 6 + 4] = data & 0xf; 2372 sc->sc_txpwr_cck[3 + 6 + 4 + 1] = (data & 0xf00) >> 8; 2373 sc->sc_txpwr_ofdm[3 + 6 + 4] = (data & 0xf0) >> 4; 2374 sc->sc_txpwr_ofdm[3 + 6 + 4 + 1] = (data & 0xf000) >> 12; 2375 } else { 2376 for (i = 1, j = 0; i < 4; i += 2, j++) { 2377 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2 + j, 2378 &data); 2379 if (error != 0) 2380 goto fail; 2381 sc->sc_txpwr_cck[i + 6 + 4] = data & 0xf; 2382 sc->sc_txpwr_cck[i + 6 + 4 + 1] = (data & 0xf00) >> 8; 2383 sc->sc_txpwr_ofdm[i + 6 + 4] = (data & 0xf0) >> 4; 2384 sc->sc_txpwr_ofdm[i + 6 + 4 + 1] = (data & 0xf000) >> 12; 2385 } 2386 } 2387fail: 2388 return (error); 2389} 2390 2391 2392static usb_error_t 2393urtw_get_rfchip(struct urtw_softc *sc) 2394{ 2395 int ret; 2396 uint8_t data8; 2397 uint32_t data; 2398 usb_error_t error; 2399 2400 if (sc->sc_flags & URTW_RTL8187B) { 2401 urtw_read8_m(sc, 0xe1, &data8); 2402 switch (data8) { 2403 case 0: 2404 sc->sc_flags |= URTW_RTL8187B_REV_B; 2405 break; 2406 case 1: 2407 sc->sc_flags |= URTW_RTL8187B_REV_D; 2408 break; 2409 case 2: 2410 sc->sc_flags |= URTW_RTL8187B_REV_E; 2411 break; 2412 default: 2413 device_printf(sc->sc_dev, "unknown type: %#x\n", data8); 2414 sc->sc_flags |= URTW_RTL8187B_REV_B; 2415 break; 2416 } 2417 } else { 2418 urtw_read32_m(sc, URTW_TX_CONF, &data); 2419 switch (data & URTW_TX_HWMASK) { 2420 case URTW_TX_R8187vD_B: 2421 sc->sc_flags |= URTW_RTL8187B; 2422 break; 2423 case URTW_TX_R8187vD: 2424 break; 2425 default: 2426 device_printf(sc->sc_dev, "unknown RTL8187L type: %#x\n", 2427 data & URTW_TX_HWMASK); 2428 break; 2429 } 2430 } 2431 2432 error = urtw_eprom_read32(sc, URTW_EPROM_RFCHIPID, &data); 2433 if (error != 0) 2434 goto fail; 2435 switch (data & 0xff) { 2436 case URTW_EPROM_RFCHIPID_RTL8225U: 2437 error = urtw_8225_isv2(sc, &ret); 2438 if (error != 0) 2439 goto fail; 2440 if (ret == 0) { 2441 sc->sc_rf_init = urtw_8225_rf_init; 2442 sc->sc_rf_set_sens = urtw_8225_rf_set_sens; 2443 sc->sc_rf_set_chan = urtw_8225_rf_set_chan; 2444 sc->sc_rf_stop = urtw_8225_rf_stop; 2445 } else { 2446 sc->sc_rf_init = urtw_8225v2_rf_init; 2447 sc->sc_rf_set_chan = urtw_8225v2_rf_set_chan; 2448 sc->sc_rf_stop = urtw_8225_rf_stop; 2449 } 2450 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2451 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2452 break; 2453 case URTW_EPROM_RFCHIPID_RTL8225Z2: 2454 sc->sc_rf_init = urtw_8225v2b_rf_init; 2455 sc->sc_rf_set_chan = urtw_8225v2b_rf_set_chan; 2456 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2457 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2458 sc->sc_rf_stop = urtw_8225_rf_stop; 2459 break; 2460 default: 2461 DPRINTF(sc, URTW_DEBUG_STATE, 2462 "unsupported RF chip %d\n", data & 0xff); 2463 error = USB_ERR_INVAL; 2464 goto fail; 2465 } 2466 2467 device_printf(sc->sc_dev, "%s rf %s hwrev %s\n", 2468 (sc->sc_flags & URTW_RTL8187B) ? "rtl8187b" : "rtl8187l", 2469 ((data & 0xff) == URTW_EPROM_RFCHIPID_RTL8225U) ? "rtl8225u" : 2470 "rtl8225z2", 2471 (sc->sc_flags & URTW_RTL8187B) ? ((data8 == 0) ? "b" : 2472 (data8 == 1) ? "d" : "e") : "none"); 2473 2474fail: 2475 return (error); 2476} 2477 2478 2479static usb_error_t 2480urtw_led_init(struct urtw_softc *sc) 2481{ 2482 uint32_t rev; 2483 usb_error_t error; 2484 2485 urtw_read8_m(sc, URTW_PSR, &sc->sc_psr); 2486 error = urtw_eprom_read32(sc, URTW_EPROM_SWREV, &rev); 2487 if (error != 0) 2488 goto fail; 2489 2490 switch (rev & URTW_EPROM_CID_MASK) { 2491 case URTW_EPROM_CID_ALPHA0: 2492 sc->sc_strategy = URTW_SW_LED_MODE1; 2493 break; 2494 case URTW_EPROM_CID_SERCOMM_PS: 2495 sc->sc_strategy = URTW_SW_LED_MODE3; 2496 break; 2497 case URTW_EPROM_CID_HW_LED: 2498 sc->sc_strategy = URTW_HW_LED; 2499 break; 2500 case URTW_EPROM_CID_RSVD0: 2501 case URTW_EPROM_CID_RSVD1: 2502 default: 2503 sc->sc_strategy = URTW_SW_LED_MODE0; 2504 break; 2505 } 2506 2507 sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0; 2508 2509fail: 2510 return (error); 2511} 2512 2513 2514static usb_error_t 2515urtw_8225_rf_init(struct urtw_softc *sc) 2516{ 2517#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 2518 int i; 2519 uint16_t data; 2520 usb_error_t error; 2521 2522 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2523 if (error) 2524 goto fail; 2525 2526 error = urtw_8225_usb_init(sc); 2527 if (error) 2528 goto fail; 2529 2530 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2531 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2532 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2533 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2534 2535 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2536 if (error) 2537 goto fail; 2538 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2539 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2540 if (error) 2541 goto fail; 2542 2543 error = urtw_8185_rf_pins_enable(sc); 2544 if (error) 2545 goto fail; 2546 usb_pause_mtx(&sc->sc_mtx, 1000); 2547 2548 for (i = 0; i < N(urtw_8225_rf_part1); i++) { 2549 urtw_8225_write(sc, urtw_8225_rf_part1[i].reg, 2550 urtw_8225_rf_part1[i].val); 2551 usb_pause_mtx(&sc->sc_mtx, 1); 2552 } 2553 usb_pause_mtx(&sc->sc_mtx, 100); 2554 urtw_8225_write(sc, 2555 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2556 usb_pause_mtx(&sc->sc_mtx, 200); 2557 urtw_8225_write(sc, 2558 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2559 usb_pause_mtx(&sc->sc_mtx, 200); 2560 urtw_8225_write(sc, 2561 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC3); 2562 2563 for (i = 0; i < 95; i++) { 2564 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2565 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, urtw_8225_rxgain[i]); 2566 } 2567 2568 urtw_8225_write(sc, 2569 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC4); 2570 urtw_8225_write(sc, 2571 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC5); 2572 2573 for (i = 0; i < 128; i++) { 2574 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2575 usb_pause_mtx(&sc->sc_mtx, 1); 2576 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2577 usb_pause_mtx(&sc->sc_mtx, 1); 2578 } 2579 2580 for (i = 0; i < N(urtw_8225_rf_part2); i++) { 2581 urtw_8187_write_phy_ofdm(sc, urtw_8225_rf_part2[i].reg, 2582 urtw_8225_rf_part2[i].val); 2583 usb_pause_mtx(&sc->sc_mtx, 1); 2584 } 2585 2586 error = urtw_8225_setgain(sc, 4); 2587 if (error) 2588 goto fail; 2589 2590 for (i = 0; i < N(urtw_8225_rf_part3); i++) { 2591 urtw_8187_write_phy_cck(sc, urtw_8225_rf_part3[i].reg, 2592 urtw_8225_rf_part3[i].val); 2593 usb_pause_mtx(&sc->sc_mtx, 1); 2594 } 2595 2596 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2597 2598 error = urtw_8225_set_txpwrlvl(sc, 1); 2599 if (error) 2600 goto fail; 2601 2602 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2603 usb_pause_mtx(&sc->sc_mtx, 1); 2604 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2605 usb_pause_mtx(&sc->sc_mtx, 1); 2606 2607 /* TX ant A, 0x0 for B */ 2608 error = urtw_8185_tx_antenna(sc, 0x3); 2609 if (error) 2610 goto fail; 2611 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2612 2613 error = urtw_8225_rf_set_chan(sc, 1); 2614fail: 2615 return (error); 2616#undef N 2617} 2618 2619static usb_error_t 2620urtw_8185_rf_pins_enable(struct urtw_softc *sc) 2621{ 2622 usb_error_t error = 0; 2623 2624 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1ff7); 2625fail: 2626 return (error); 2627} 2628 2629static usb_error_t 2630urtw_8185_tx_antenna(struct urtw_softc *sc, uint8_t ant) 2631{ 2632 usb_error_t error; 2633 2634 urtw_write8_m(sc, URTW_TX_ANTENNA, ant); 2635 usb_pause_mtx(&sc->sc_mtx, 1); 2636fail: 2637 return (error); 2638} 2639 2640static usb_error_t 2641urtw_8187_write_phy_ofdm_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2642{ 2643 2644 data = data & 0xff; 2645 return urtw_8187_write_phy(sc, addr, data); 2646} 2647 2648static usb_error_t 2649urtw_8187_write_phy_cck_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2650{ 2651 2652 data = data & 0xff; 2653 return urtw_8187_write_phy(sc, addr, data | 0x10000); 2654} 2655 2656static usb_error_t 2657urtw_8187_write_phy(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2658{ 2659 uint32_t phyw; 2660 usb_error_t error; 2661 2662 phyw = ((data << 8) | (addr | 0x80)); 2663 urtw_write8_m(sc, URTW_PHY_MAGIC4, ((phyw & 0xff000000) >> 24)); 2664 urtw_write8_m(sc, URTW_PHY_MAGIC3, ((phyw & 0x00ff0000) >> 16)); 2665 urtw_write8_m(sc, URTW_PHY_MAGIC2, ((phyw & 0x0000ff00) >> 8)); 2666 urtw_write8_m(sc, URTW_PHY_MAGIC1, ((phyw & 0x000000ff))); 2667 usb_pause_mtx(&sc->sc_mtx, 1); 2668fail: 2669 return (error); 2670} 2671 2672static usb_error_t 2673urtw_8225_setgain(struct urtw_softc *sc, int16_t gain) 2674{ 2675 usb_error_t error; 2676 2677 urtw_8187_write_phy_ofdm(sc, 0x0d, urtw_8225_gain[gain * 4]); 2678 urtw_8187_write_phy_ofdm(sc, 0x1b, urtw_8225_gain[gain * 4 + 2]); 2679 urtw_8187_write_phy_ofdm(sc, 0x1d, urtw_8225_gain[gain * 4 + 3]); 2680 urtw_8187_write_phy_ofdm(sc, 0x23, urtw_8225_gain[gain * 4 + 1]); 2681fail: 2682 return (error); 2683} 2684 2685static usb_error_t 2686urtw_8225_usb_init(struct urtw_softc *sc) 2687{ 2688 uint8_t data; 2689 usb_error_t error; 2690 2691 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 0); 2692 urtw_write8_m(sc, URTW_GPIO, 0); 2693 error = urtw_read8e(sc, 0x53, &data); 2694 if (error) 2695 goto fail; 2696 error = urtw_write8e(sc, 0x53, data | (1 << 7)); 2697 if (error) 2698 goto fail; 2699 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 4); 2700 urtw_write8_m(sc, URTW_GPIO, 0x20); 2701 urtw_write8_m(sc, URTW_GP_ENABLE, 0); 2702 2703 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x80); 2704 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x80); 2705 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x80); 2706 2707 usb_pause_mtx(&sc->sc_mtx, 500); 2708fail: 2709 return (error); 2710} 2711 2712static usb_error_t 2713urtw_8225_write_c(struct urtw_softc *sc, uint8_t addr, uint16_t data) 2714{ 2715 uint16_t d80, d82, d84; 2716 usb_error_t error; 2717 2718 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &d80); 2719 d80 &= URTW_RF_PINS_MAGIC1; 2720 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &d82); 2721 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &d84); 2722 d84 &= URTW_RF_PINS_MAGIC2; 2723 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, d82 | URTW_RF_PINS_MAGIC3); 2724 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84 | URTW_RF_PINS_MAGIC3); 2725 DELAY(10); 2726 2727 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2728 DELAY(2); 2729 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80); 2730 DELAY(10); 2731 2732 error = urtw_8225_write_s16(sc, addr, 0x8225, &data); 2733 if (error != 0) 2734 goto fail; 2735 2736 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2737 DELAY(10); 2738 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2739 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84); 2740 usb_pause_mtx(&sc->sc_mtx, 2); 2741fail: 2742 return (error); 2743} 2744 2745static usb_error_t 2746urtw_8225_write_s16(struct urtw_softc *sc, uint8_t addr, int index, 2747 uint16_t *data) 2748{ 2749 uint8_t buf[2]; 2750 uint16_t data16; 2751 struct usb_device_request req; 2752 usb_error_t error = 0; 2753 2754 data16 = *data; 2755 2756 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2757 req.bRequest = URTW_8187_SETREGS_REQ; 2758 USETW(req.wValue, addr); 2759 USETW(req.wIndex, index); 2760 USETW(req.wLength, sizeof(uint16_t)); 2761 buf[0] = (data16 & 0x00ff); 2762 buf[1] = (data16 & 0xff00) >> 8; 2763 2764 error = urtw_do_request(sc, &req, buf); 2765 2766 return (error); 2767} 2768 2769static usb_error_t 2770urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan) 2771{ 2772 usb_error_t error; 2773 2774 error = urtw_8225_set_txpwrlvl(sc, chan); 2775 if (error) 2776 goto fail; 2777 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 2778 usb_pause_mtx(&sc->sc_mtx, 10); 2779fail: 2780 return (error); 2781} 2782 2783static usb_error_t 2784urtw_8225_rf_set_sens(struct urtw_softc *sc, int sens) 2785{ 2786 usb_error_t error; 2787 2788 if (sens < 0 || sens > 6) 2789 return -1; 2790 2791 if (sens > 4) 2792 urtw_8225_write(sc, 2793 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC1); 2794 else 2795 urtw_8225_write(sc, 2796 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC2); 2797 2798 sens = 6 - sens; 2799 error = urtw_8225_setgain(sc, sens); 2800 if (error) 2801 goto fail; 2802 2803 urtw_8187_write_phy_cck(sc, 0x41, urtw_8225_threshold[sens]); 2804 2805fail: 2806 return (error); 2807} 2808 2809static usb_error_t 2810urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan) 2811{ 2812 int i, idx, set; 2813 uint8_t *cck_pwltable; 2814 uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max; 2815 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 2816 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 2817 usb_error_t error; 2818 2819 cck_pwrlvl_max = 11; 2820 ofdm_pwrlvl_max = 25; /* 12 -> 25 */ 2821 ofdm_pwrlvl_min = 10; 2822 2823 /* CCK power setting */ 2824 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 2825 idx = cck_pwrlvl % 6; 2826 set = cck_pwrlvl / 6; 2827 cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 : 2828 urtw_8225_txpwr_cck; 2829 2830 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 2831 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2832 for (i = 0; i < 8; i++) { 2833 urtw_8187_write_phy_cck(sc, 0x44 + i, 2834 cck_pwltable[idx * 8 + i]); 2835 } 2836 usb_pause_mtx(&sc->sc_mtx, 1); 2837 2838 /* OFDM power setting */ 2839 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 2840 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 2841 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 2842 2843 idx = ofdm_pwrlvl % 6; 2844 set = ofdm_pwrlvl / 6; 2845 2846 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 2847 if (error) 2848 goto fail; 2849 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 2850 urtw_8187_write_phy_ofdm(sc, 6, 0); 2851 urtw_8187_write_phy_ofdm(sc, 8, 0); 2852 2853 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 2854 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2855 urtw_8187_write_phy_ofdm(sc, 0x5, urtw_8225_txpwr_ofdm[idx]); 2856 urtw_8187_write_phy_ofdm(sc, 0x7, urtw_8225_txpwr_ofdm[idx]); 2857 usb_pause_mtx(&sc->sc_mtx, 1); 2858fail: 2859 return (error); 2860} 2861 2862 2863static usb_error_t 2864urtw_8225_rf_stop(struct urtw_softc *sc) 2865{ 2866 uint8_t data; 2867 usb_error_t error; 2868 2869 urtw_8225_write(sc, 0x4, 0x1f); 2870 2871 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2872 if (error) 2873 goto fail; 2874 2875 urtw_read8_m(sc, URTW_CONFIG3, &data); 2876 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 2877 if (sc->sc_flags & URTW_RTL8187B) { 2878 urtw_write32_m(sc, URTW_ANAPARAM2, 2879 URTW_8187B_8225_ANAPARAM2_OFF); 2880 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_OFF); 2881 urtw_write32_m(sc, URTW_ANAPARAM3, 2882 URTW_8187B_8225_ANAPARAM3_OFF); 2883 } else { 2884 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8225_ANAPARAM2_OFF); 2885 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8225_ANAPARAM_OFF); 2886 } 2887 2888 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 2889 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2890 if (error) 2891 goto fail; 2892 2893fail: 2894 return (error); 2895} 2896 2897static usb_error_t 2898urtw_8225v2_rf_init(struct urtw_softc *sc) 2899{ 2900#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 2901 int i; 2902 uint16_t data; 2903 uint32_t data32; 2904 usb_error_t error; 2905 2906 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2907 if (error) 2908 goto fail; 2909 2910 error = urtw_8225_usb_init(sc); 2911 if (error) 2912 goto fail; 2913 2914 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2915 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2916 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2917 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2918 2919 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2920 if (error) 2921 goto fail; 2922 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2923 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2924 if (error) 2925 goto fail; 2926 2927 error = urtw_8185_rf_pins_enable(sc); 2928 if (error) 2929 goto fail; 2930 2931 usb_pause_mtx(&sc->sc_mtx, 500); 2932 2933 for (i = 0; i < N(urtw_8225v2_rf_part1); i++) { 2934 urtw_8225_write(sc, urtw_8225v2_rf_part1[i].reg, 2935 urtw_8225v2_rf_part1[i].val); 2936 } 2937 usb_pause_mtx(&sc->sc_mtx, 50); 2938 2939 urtw_8225_write(sc, 2940 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 2941 2942 for (i = 0; i < 95; i++) { 2943 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2944 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 2945 urtw_8225v2_rxgain[i]); 2946 } 2947 2948 urtw_8225_write(sc, 2949 URTW_8225_ADDR_3_MAGIC, URTW_8225_ADDR_3_DATA_MAGIC1); 2950 urtw_8225_write(sc, 2951 URTW_8225_ADDR_5_MAGIC, URTW_8225_ADDR_5_DATA_MAGIC1); 2952 urtw_8225_write(sc, 2953 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC2); 2954 urtw_8225_write(sc, 2955 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2956 usb_pause_mtx(&sc->sc_mtx, 100); 2957 urtw_8225_write(sc, 2958 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2959 usb_pause_mtx(&sc->sc_mtx, 100); 2960 2961 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2962 if (error != 0) 2963 goto fail; 2964 if (data32 != URTW_8225_ADDR_6_DATA_MAGIC1) 2965 device_printf(sc->sc_dev, "expect 0xe6!! (0x%x)\n", data32); 2966 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) { 2967 urtw_8225_write(sc, 2968 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2969 usb_pause_mtx(&sc->sc_mtx, 100); 2970 urtw_8225_write(sc, 2971 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2972 usb_pause_mtx(&sc->sc_mtx, 50); 2973 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2974 if (error != 0) 2975 goto fail; 2976 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) 2977 device_printf(sc->sc_dev, "RF calibration failed\n"); 2978 } 2979 usb_pause_mtx(&sc->sc_mtx, 100); 2980 2981 urtw_8225_write(sc, 2982 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC6); 2983 for (i = 0; i < 128; i++) { 2984 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2985 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2986 } 2987 2988 for (i = 0; i < N(urtw_8225v2_rf_part2); i++) { 2989 urtw_8187_write_phy_ofdm(sc, urtw_8225v2_rf_part2[i].reg, 2990 urtw_8225v2_rf_part2[i].val); 2991 } 2992 2993 error = urtw_8225v2_setgain(sc, 4); 2994 if (error) 2995 goto fail; 2996 2997 for (i = 0; i < N(urtw_8225v2_rf_part3); i++) { 2998 urtw_8187_write_phy_cck(sc, urtw_8225v2_rf_part3[i].reg, 2999 urtw_8225v2_rf_part3[i].val); 3000 } 3001 3002 urtw_write8_m(sc, URTW_TESTR, 0x0d); 3003 3004 error = urtw_8225v2_set_txpwrlvl(sc, 1); 3005 if (error) 3006 goto fail; 3007 3008 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 3009 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 3010 3011 /* TX ant A, 0x0 for B */ 3012 error = urtw_8185_tx_antenna(sc, 0x3); 3013 if (error) 3014 goto fail; 3015 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 3016 3017 error = urtw_8225_rf_set_chan(sc, 1); 3018fail: 3019 return (error); 3020#undef N 3021} 3022 3023static usb_error_t 3024urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan) 3025{ 3026 usb_error_t error; 3027 3028 error = urtw_8225v2_set_txpwrlvl(sc, chan); 3029 if (error) 3030 goto fail; 3031 3032 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3033 usb_pause_mtx(&sc->sc_mtx, 10); 3034fail: 3035 return (error); 3036} 3037 3038static usb_error_t 3039urtw_8225_read(struct urtw_softc *sc, uint8_t addr, uint32_t *data) 3040{ 3041 int i; 3042 int16_t bit; 3043 uint8_t rlen = 12, wlen = 6; 3044 uint16_t o1, o2, o3, tmp; 3045 uint32_t d2w = ((uint32_t)(addr & 0x1f)) << 27; 3046 uint32_t mask = 0x80000000, value = 0; 3047 usb_error_t error; 3048 3049 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &o1); 3050 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &o2); 3051 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &o3); 3052 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2 | URTW_RF_PINS_MAGIC4); 3053 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3 | URTW_RF_PINS_MAGIC4); 3054 o1 &= ~URTW_RF_PINS_MAGIC4; 3055 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN); 3056 DELAY(5); 3057 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1); 3058 DELAY(5); 3059 3060 for (i = 0; i < (wlen / 2); i++, mask = mask >> 1) { 3061 bit = ((d2w & mask) != 0) ? 1 : 0; 3062 3063 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3064 DELAY(2); 3065 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3066 URTW_BB_HOST_BANG_CLK); 3067 DELAY(2); 3068 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3069 URTW_BB_HOST_BANG_CLK); 3070 DELAY(2); 3071 mask = mask >> 1; 3072 if (i == 2) 3073 break; 3074 bit = ((d2w & mask) != 0) ? 1 : 0; 3075 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3076 URTW_BB_HOST_BANG_CLK); 3077 DELAY(2); 3078 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3079 URTW_BB_HOST_BANG_CLK); 3080 DELAY(2); 3081 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3082 DELAY(1); 3083 } 3084 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW | 3085 URTW_BB_HOST_BANG_CLK); 3086 DELAY(2); 3087 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW); 3088 DELAY(2); 3089 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_RW); 3090 DELAY(2); 3091 3092 mask = 0x800; 3093 for (i = 0; i < rlen; i++, mask = mask >> 1) { 3094 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3095 o1 | URTW_BB_HOST_BANG_RW); 3096 DELAY(2); 3097 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3098 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3099 DELAY(2); 3100 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3101 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3102 DELAY(2); 3103 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3104 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3105 DELAY(2); 3106 3107 urtw_read16_m(sc, URTW_RF_PINS_INPUT, &tmp); 3108 value |= ((tmp & URTW_BB_HOST_BANG_CLK) ? mask : 0); 3109 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3110 o1 | URTW_BB_HOST_BANG_RW); 3111 DELAY(2); 3112 } 3113 3114 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN | 3115 URTW_BB_HOST_BANG_RW); 3116 DELAY(2); 3117 3118 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2); 3119 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3); 3120 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_OUTPUT_MAGIC1); 3121 3122 if (data != NULL) 3123 *data = value; 3124fail: 3125 return (error); 3126} 3127 3128 3129static usb_error_t 3130urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan) 3131{ 3132 int i; 3133 uint8_t *cck_pwrtable; 3134 uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10; 3135 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3136 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3137 usb_error_t error; 3138 3139 /* CCK power setting */ 3140 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 3141 cck_pwrlvl += sc->sc_txpwr_cck_base; 3142 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3143 cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 : 3144 urtw_8225v2_txpwr_cck; 3145 3146 for (i = 0; i < 8; i++) 3147 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3148 3149 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3150 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl]); 3151 usb_pause_mtx(&sc->sc_mtx, 1); 3152 3153 /* OFDM power setting */ 3154 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 3155 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 3156 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3157 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3158 3159 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3160 if (error) 3161 goto fail; 3162 3163 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 3164 urtw_8187_write_phy_ofdm(sc, 5, 0x0); 3165 urtw_8187_write_phy_ofdm(sc, 6, 0x40); 3166 urtw_8187_write_phy_ofdm(sc, 7, 0x0); 3167 urtw_8187_write_phy_ofdm(sc, 8, 0x40); 3168 3169 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3170 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]); 3171 usb_pause_mtx(&sc->sc_mtx, 1); 3172fail: 3173 return (error); 3174} 3175 3176static usb_error_t 3177urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain) 3178{ 3179 uint8_t *gainp; 3180 usb_error_t error; 3181 3182 /* XXX for A? */ 3183 gainp = urtw_8225v2_gain_bg; 3184 urtw_8187_write_phy_ofdm(sc, 0x0d, gainp[gain * 3]); 3185 usb_pause_mtx(&sc->sc_mtx, 1); 3186 urtw_8187_write_phy_ofdm(sc, 0x1b, gainp[gain * 3 + 1]); 3187 usb_pause_mtx(&sc->sc_mtx, 1); 3188 urtw_8187_write_phy_ofdm(sc, 0x1d, gainp[gain * 3 + 2]); 3189 usb_pause_mtx(&sc->sc_mtx, 1); 3190 urtw_8187_write_phy_ofdm(sc, 0x21, 0x17); 3191 usb_pause_mtx(&sc->sc_mtx, 1); 3192fail: 3193 return (error); 3194} 3195 3196static usb_error_t 3197urtw_8225_isv2(struct urtw_softc *sc, int *ret) 3198{ 3199 uint32_t data; 3200 usb_error_t error; 3201 3202 *ret = 1; 3203 3204 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_MAGIC5); 3205 urtw_write16_m(sc, URTW_RF_PINS_SELECT, URTW_RF_PINS_MAGIC5); 3206 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, URTW_RF_PINS_MAGIC5); 3207 usb_pause_mtx(&sc->sc_mtx, 500); 3208 3209 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3210 URTW_8225_ADDR_0_DATA_MAGIC1); 3211 3212 error = urtw_8225_read(sc, URTW_8225_ADDR_8_MAGIC, &data); 3213 if (error != 0) 3214 goto fail; 3215 if (data != URTW_8225_ADDR_8_DATA_MAGIC1) 3216 *ret = 0; 3217 else { 3218 error = urtw_8225_read(sc, URTW_8225_ADDR_9_MAGIC, &data); 3219 if (error != 0) 3220 goto fail; 3221 if (data != URTW_8225_ADDR_9_DATA_MAGIC1) 3222 *ret = 0; 3223 } 3224 3225 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3226 URTW_8225_ADDR_0_DATA_MAGIC2); 3227fail: 3228 return (error); 3229} 3230 3231static usb_error_t 3232urtw_8225v2b_rf_init(struct urtw_softc *sc) 3233{ 3234#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 3235 int i; 3236 uint8_t data8; 3237 usb_error_t error; 3238 3239 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3240 if (error) 3241 goto fail; 3242 3243 /* 3244 * initialize extra registers on 8187 3245 */ 3246 urtw_write16_m(sc, URTW_BRSR_8187B, 0xfff); 3247 3248 /* retry limit */ 3249 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3250 data8 |= URTW_CW_CONF_PERPACKET_RETRY; 3251 urtw_write8_m(sc, URTW_CW_CONF, data8); 3252 3253 /* TX AGC */ 3254 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3255 data8 |= URTW_TX_AGC_CTL_PERPACKET_GAIN; 3256 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3257 3258 /* Auto Rate Fallback Control */ 3259#define URTW_ARFR 0x1e0 3260 urtw_write16_m(sc, URTW_ARFR, 0xfff); 3261 urtw_read8_m(sc, URTW_RATE_FALLBACK, &data8); 3262 urtw_write8_m(sc, URTW_RATE_FALLBACK, 3263 data8 | URTW_RATE_FALLBACK_ENABLE); 3264 3265 urtw_read8_m(sc, URTW_MSR, &data8); 3266 urtw_write8_m(sc, URTW_MSR, data8 & 0xf3); 3267 urtw_read8_m(sc, URTW_MSR, &data8); 3268 urtw_write8_m(sc, URTW_MSR, data8 | URTW_MSR_LINK_ENEDCA); 3269 urtw_write8_m(sc, URTW_ACM_CONTROL, sc->sc_acmctl); 3270 3271 urtw_write16_m(sc, URTW_ATIM_WND, 2); 3272 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 3273#define URTW_FEMR_FOR_8187B 0x1d4 3274 urtw_write16_m(sc, URTW_FEMR_FOR_8187B, 0xffff); 3275 3276 /* led type */ 3277 urtw_read8_m(sc, URTW_CONFIG1, &data8); 3278 data8 = (data8 & 0x3f) | 0x80; 3279 urtw_write8_m(sc, URTW_CONFIG1, data8); 3280 3281 /* applying MAC address again. */ 3282 urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)sc->sc_bssid)[0]); 3283 urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)sc->sc_bssid)[1] & 0xffff); 3284 3285 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3286 if (error) 3287 goto fail; 3288 3289 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 3290 3291 /* 3292 * MAC configuration 3293 */ 3294 for (i = 0; i < N(urtw_8225v2b_rf_part1); i++) 3295 urtw_write8_m(sc, urtw_8225v2b_rf_part1[i].reg, 3296 urtw_8225v2b_rf_part1[i].val); 3297 urtw_write16_m(sc, URTW_TID_AC_MAP, 0xfa50); 3298 urtw_write16_m(sc, URTW_INT_MIG, 0x0000); 3299 urtw_write32_m(sc, 0x1f0, 0); 3300 urtw_write32_m(sc, 0x1f4, 0); 3301 urtw_write8_m(sc, 0x1f8, 0); 3302 urtw_write32_m(sc, URTW_RF_TIMING, 0x4001); 3303 3304#define URTW_RFSW_CTRL 0x272 3305 urtw_write16_m(sc, URTW_RFSW_CTRL, 0x569a); 3306 3307 /* 3308 * initialize PHY 3309 */ 3310 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3311 if (error) 3312 goto fail; 3313 urtw_read8_m(sc, URTW_CONFIG3, &data8); 3314 urtw_write8_m(sc, URTW_CONFIG3, 3315 data8 | URTW_CONFIG3_ANAPARAM_WRITE); 3316 3317 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3318 if (error) 3319 goto fail; 3320 3321 /* setup RFE initial timing */ 3322 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x0480); 3323 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x2488); 3324 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1fff); 3325 usb_pause_mtx(&sc->sc_mtx, 1100); 3326 3327 for (i = 0; i < N(urtw_8225v2b_rf_part0); i++) { 3328 urtw_8225_write(sc, urtw_8225v2b_rf_part0[i].reg, 3329 urtw_8225v2b_rf_part0[i].val); 3330 usb_pause_mtx(&sc->sc_mtx, 1); 3331 } 3332 urtw_8225_write(sc, 0x00, 0x01b7); 3333 3334 for (i = 0; i < 95; i++) { 3335 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 3336 usb_pause_mtx(&sc->sc_mtx, 1); 3337 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 3338 urtw_8225v2b_rxgain[i]); 3339 usb_pause_mtx(&sc->sc_mtx, 1); 3340 } 3341 3342 urtw_8225_write(sc, URTW_8225_ADDR_3_MAGIC, 0x080); 3343 usb_pause_mtx(&sc->sc_mtx, 1); 3344 urtw_8225_write(sc, URTW_8225_ADDR_5_MAGIC, 0x004); 3345 usb_pause_mtx(&sc->sc_mtx, 1); 3346 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x0b7); 3347 usb_pause_mtx(&sc->sc_mtx, 1); 3348 usb_pause_mtx(&sc->sc_mtx, 3000); 3349 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0xc4d); 3350 usb_pause_mtx(&sc->sc_mtx, 2000); 3351 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0x44d); 3352 usb_pause_mtx(&sc->sc_mtx, 1); 3353 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x2bf); 3354 usb_pause_mtx(&sc->sc_mtx, 1); 3355 3356 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 0x03); 3357 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 0x07); 3358 urtw_write8_m(sc, URTW_TX_ANTENNA, 0x03); 3359 3360 urtw_8187_write_phy_ofdm(sc, 0x80, 0x12); 3361 for (i = 0; i < 128; i++) { 3362 uint32_t addr, data; 3363 3364 data = (urtw_8225z2_agc[i] << 8) | 0x0000008f; 3365 addr = ((i + 0x80) << 8) | 0x0000008e; 3366 3367 urtw_8187_write_phy_ofdm(sc, data & 0x7f, (data >> 8) & 0xff); 3368 urtw_8187_write_phy_ofdm(sc, addr & 0x7f, (addr >> 8) & 0xff); 3369 urtw_8187_write_phy_ofdm(sc, 0x0e, 0x00); 3370 } 3371 urtw_8187_write_phy_ofdm(sc, 0x80, 0x10); 3372 3373 for (i = 0; i < N(urtw_8225v2b_rf_part2); i++) 3374 urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val); 3375 3376 urtw_write32_m(sc, URTW_8187B_AC_VO, (7 << 12) | (3 << 8) | 0x1c); 3377 urtw_write32_m(sc, URTW_8187B_AC_VI, (7 << 12) | (3 << 8) | 0x1c); 3378 urtw_write32_m(sc, URTW_8187B_AC_BE, (7 << 12) | (3 << 8) | 0x1c); 3379 urtw_write32_m(sc, URTW_8187B_AC_BK, (7 << 12) | (3 << 8) | 0x1c); 3380 3381 urtw_8187_write_phy_ofdm(sc, 0x97, 0x46); 3382 urtw_8187_write_phy_ofdm(sc, 0xa4, 0xb6); 3383 urtw_8187_write_phy_ofdm(sc, 0x85, 0xfc); 3384 urtw_8187_write_phy_cck(sc, 0xc1, 0x88); 3385 3386fail: 3387 return (error); 3388#undef N 3389} 3390 3391static usb_error_t 3392urtw_8225v2b_rf_set_chan(struct urtw_softc *sc, int chan) 3393{ 3394 usb_error_t error; 3395 3396 error = urtw_8225v2b_set_txpwrlvl(sc, chan); 3397 if (error) 3398 goto fail; 3399 3400 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3401 usb_pause_mtx(&sc->sc_mtx, 10); 3402fail: 3403 return (error); 3404} 3405 3406static usb_error_t 3407urtw_8225v2b_set_txpwrlvl(struct urtw_softc *sc, int chan) 3408{ 3409 int i; 3410 uint8_t *cck_pwrtable; 3411 uint8_t cck_pwrlvl_max = 15; 3412 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3413 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3414 usb_error_t error; 3415 3416 /* CCK power setting */ 3417 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? 3418 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? cck_pwrlvl_max : 22) : 3419 (cck_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 0 : 7)); 3420 cck_pwrlvl += sc->sc_txpwr_cck_base; 3421 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3422 cck_pwrtable = (chan == 14) ? urtw_8225v2b_txpwr_cck_ch14 : 3423 urtw_8225v2b_txpwr_cck; 3424 3425 if (sc->sc_flags & URTW_RTL8187B_REV_B) 3426 cck_pwrtable += (cck_pwrlvl <= 6) ? 0 : 3427 ((cck_pwrlvl <= 11) ? 8 : 16); 3428 else 3429 cck_pwrtable += (cck_pwrlvl <= 5) ? 0 : 3430 ((cck_pwrlvl <= 11) ? 8 : ((cck_pwrlvl <= 17) ? 16 : 24)); 3431 3432 for (i = 0; i < 8; i++) 3433 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3434 3435 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3436 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl] << 1); 3437 usb_pause_mtx(&sc->sc_mtx, 1); 3438 3439 /* OFDM power setting */ 3440 ofdm_pwrlvl = (ofdm_pwrlvl > 15) ? 3441 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 17 : 25) : 3442 (ofdm_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 2 : 10)); 3443 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3444 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3445 3446 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3447 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl] << 1); 3448 3449 if (sc->sc_flags & URTW_RTL8187B_REV_B) { 3450 if (ofdm_pwrlvl <= 11) { 3451 urtw_8187_write_phy_ofdm(sc, 0x87, 0x60); 3452 urtw_8187_write_phy_ofdm(sc, 0x89, 0x60); 3453 } else { 3454 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3455 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3456 } 3457 } else { 3458 if (ofdm_pwrlvl <= 11) { 3459 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3460 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3461 } else if (ofdm_pwrlvl <= 17) { 3462 urtw_8187_write_phy_ofdm(sc, 0x87, 0x54); 3463 urtw_8187_write_phy_ofdm(sc, 0x89, 0x54); 3464 } else { 3465 urtw_8187_write_phy_ofdm(sc, 0x87, 0x50); 3466 urtw_8187_write_phy_ofdm(sc, 0x89, 0x50); 3467 } 3468 } 3469 usb_pause_mtx(&sc->sc_mtx, 1); 3470fail: 3471 return (error); 3472} 3473 3474static usb_error_t 3475urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data) 3476{ 3477 struct usb_device_request req; 3478 usb_error_t error; 3479 3480 req.bmRequestType = UT_READ_VENDOR_DEVICE; 3481 req.bRequest = URTW_8187_GETREGS_REQ; 3482 USETW(req.wValue, val | 0xfe00); 3483 USETW(req.wIndex, 0); 3484 USETW(req.wLength, sizeof(uint8_t)); 3485 3486 error = urtw_do_request(sc, &req, data); 3487 return (error); 3488} 3489 3490static usb_error_t 3491urtw_write8e(struct urtw_softc *sc, int val, uint8_t data) 3492{ 3493 struct usb_device_request req; 3494 3495 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 3496 req.bRequest = URTW_8187_SETREGS_REQ; 3497 USETW(req.wValue, val | 0xfe00); 3498 USETW(req.wIndex, 0); 3499 USETW(req.wLength, sizeof(uint8_t)); 3500 3501 return (urtw_do_request(sc, &req, &data)); 3502} 3503 3504static usb_error_t 3505urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val) 3506{ 3507 uint8_t data; 3508 usb_error_t error; 3509 3510 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3511 if (error) 3512 goto fail; 3513 3514 urtw_read8_m(sc, URTW_CONFIG3, &data); 3515 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3516 urtw_write32_m(sc, URTW_ANAPARAM, val); 3517 urtw_read8_m(sc, URTW_CONFIG3, &data); 3518 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3519 3520 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3521 if (error) 3522 goto fail; 3523fail: 3524 return (error); 3525} 3526 3527static usb_error_t 3528urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val) 3529{ 3530 uint8_t data; 3531 usb_error_t error; 3532 3533 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3534 if (error) 3535 goto fail; 3536 3537 urtw_read8_m(sc, URTW_CONFIG3, &data); 3538 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3539 urtw_write32_m(sc, URTW_ANAPARAM2, val); 3540 urtw_read8_m(sc, URTW_CONFIG3, &data); 3541 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3542 3543 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3544 if (error) 3545 goto fail; 3546fail: 3547 return (error); 3548} 3549 3550static usb_error_t 3551urtw_intr_enable(struct urtw_softc *sc) 3552{ 3553 usb_error_t error; 3554 3555 urtw_write16_m(sc, URTW_INTR_MASK, 0xffff); 3556fail: 3557 return (error); 3558} 3559 3560static usb_error_t 3561urtw_intr_disable(struct urtw_softc *sc) 3562{ 3563 usb_error_t error; 3564 3565 urtw_write16_m(sc, URTW_INTR_MASK, 0); 3566fail: 3567 return (error); 3568} 3569 3570static usb_error_t 3571urtw_reset(struct urtw_softc *sc) 3572{ 3573 uint8_t data; 3574 usb_error_t error; 3575 3576 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3577 if (error) 3578 goto fail; 3579 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3580 if (error) 3581 goto fail; 3582 3583 error = urtw_intr_disable(sc); 3584 if (error) 3585 goto fail; 3586 usb_pause_mtx(&sc->sc_mtx, 100); 3587 3588 error = urtw_write8e(sc, 0x18, 0x10); 3589 if (error != 0) 3590 goto fail; 3591 error = urtw_write8e(sc, 0x18, 0x11); 3592 if (error != 0) 3593 goto fail; 3594 error = urtw_write8e(sc, 0x18, 0x00); 3595 if (error != 0) 3596 goto fail; 3597 usb_pause_mtx(&sc->sc_mtx, 100); 3598 3599 urtw_read8_m(sc, URTW_CMD, &data); 3600 data = (data & 0x2) | URTW_CMD_RST; 3601 urtw_write8_m(sc, URTW_CMD, data); 3602 usb_pause_mtx(&sc->sc_mtx, 100); 3603 3604 urtw_read8_m(sc, URTW_CMD, &data); 3605 if (data & URTW_CMD_RST) { 3606 device_printf(sc->sc_dev, "reset timeout\n"); 3607 goto fail; 3608 } 3609 3610 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 3611 if (error) 3612 goto fail; 3613 usb_pause_mtx(&sc->sc_mtx, 100); 3614 3615 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3616 if (error) 3617 goto fail; 3618 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3619 if (error) 3620 goto fail; 3621fail: 3622 return (error); 3623} 3624 3625static usb_error_t 3626urtw_led_ctl(struct urtw_softc *sc, int mode) 3627{ 3628 usb_error_t error = 0; 3629 3630 switch (sc->sc_strategy) { 3631 case URTW_SW_LED_MODE0: 3632 error = urtw_led_mode0(sc, mode); 3633 break; 3634 case URTW_SW_LED_MODE1: 3635 error = urtw_led_mode1(sc, mode); 3636 break; 3637 case URTW_SW_LED_MODE2: 3638 error = urtw_led_mode2(sc, mode); 3639 break; 3640 case URTW_SW_LED_MODE3: 3641 error = urtw_led_mode3(sc, mode); 3642 break; 3643 default: 3644 DPRINTF(sc, URTW_DEBUG_STATE, 3645 "unsupported LED mode %d\n", sc->sc_strategy); 3646 error = USB_ERR_INVAL; 3647 break; 3648 } 3649 3650 return (error); 3651} 3652 3653static usb_error_t 3654urtw_led_mode0(struct urtw_softc *sc, int mode) 3655{ 3656 3657 switch (mode) { 3658 case URTW_LED_CTL_POWER_ON: 3659 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK; 3660 break; 3661 case URTW_LED_CTL_TX: 3662 if (sc->sc_gpio_ledinprogress == 1) 3663 return (0); 3664 3665 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL; 3666 sc->sc_gpio_blinktime = 2; 3667 break; 3668 case URTW_LED_CTL_LINK: 3669 sc->sc_gpio_ledstate = URTW_LED_ON; 3670 break; 3671 default: 3672 DPRINTF(sc, URTW_DEBUG_STATE, 3673 "unsupported LED mode 0x%x", mode); 3674 return (USB_ERR_INVAL); 3675 } 3676 3677 switch (sc->sc_gpio_ledstate) { 3678 case URTW_LED_ON: 3679 if (sc->sc_gpio_ledinprogress != 0) 3680 break; 3681 urtw_led_on(sc, URTW_LED_GPIO); 3682 break; 3683 case URTW_LED_BLINK_NORMAL: 3684 if (sc->sc_gpio_ledinprogress != 0) 3685 break; 3686 sc->sc_gpio_ledinprogress = 1; 3687 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ? 3688 URTW_LED_OFF : URTW_LED_ON; 3689 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3690 break; 3691 case URTW_LED_POWER_ON_BLINK: 3692 urtw_led_on(sc, URTW_LED_GPIO); 3693 usb_pause_mtx(&sc->sc_mtx, 100); 3694 urtw_led_off(sc, URTW_LED_GPIO); 3695 break; 3696 default: 3697 DPRINTF(sc, URTW_DEBUG_STATE, 3698 "unknown LED status 0x%x", sc->sc_gpio_ledstate); 3699 return (USB_ERR_INVAL); 3700 } 3701 return (0); 3702} 3703 3704static usb_error_t 3705urtw_led_mode1(struct urtw_softc *sc, int mode) 3706{ 3707 return (USB_ERR_INVAL); 3708} 3709 3710static usb_error_t 3711urtw_led_mode2(struct urtw_softc *sc, int mode) 3712{ 3713 return (USB_ERR_INVAL); 3714} 3715 3716static usb_error_t 3717urtw_led_mode3(struct urtw_softc *sc, int mode) 3718{ 3719 return (USB_ERR_INVAL); 3720} 3721 3722static usb_error_t 3723urtw_led_on(struct urtw_softc *sc, int type) 3724{ 3725 usb_error_t error; 3726 3727 if (type == URTW_LED_GPIO) { 3728 switch (sc->sc_gpio_ledpin) { 3729 case URTW_LED_PIN_GPIO0: 3730 urtw_write8_m(sc, URTW_GPIO, 0x01); 3731 urtw_write8_m(sc, URTW_GP_ENABLE, 0x00); 3732 break; 3733 default: 3734 DPRINTF(sc, URTW_DEBUG_STATE, 3735 "unsupported LED PIN type 0x%x", 3736 sc->sc_gpio_ledpin); 3737 error = USB_ERR_INVAL; 3738 goto fail; 3739 } 3740 } else { 3741 DPRINTF(sc, URTW_DEBUG_STATE, 3742 "unsupported LED type 0x%x", type); 3743 error = USB_ERR_INVAL; 3744 goto fail; 3745 } 3746 3747 sc->sc_gpio_ledon = 1; 3748fail: 3749 return (error); 3750} 3751 3752static usb_error_t 3753urtw_led_off(struct urtw_softc *sc, int type) 3754{ 3755 usb_error_t error; 3756 3757 if (type == URTW_LED_GPIO) { 3758 switch (sc->sc_gpio_ledpin) { 3759 case URTW_LED_PIN_GPIO0: 3760 urtw_write8_m(sc, URTW_GPIO, URTW_GPIO_DATA_MAGIC1); 3761 urtw_write8_m(sc, 3762 URTW_GP_ENABLE, URTW_GP_ENABLE_DATA_MAGIC1); 3763 break; 3764 default: 3765 DPRINTF(sc, URTW_DEBUG_STATE, 3766 "unsupported LED PIN type 0x%x", 3767 sc->sc_gpio_ledpin); 3768 error = USB_ERR_INVAL; 3769 goto fail; 3770 } 3771 } else { 3772 DPRINTF(sc, URTW_DEBUG_STATE, 3773 "unsupported LED type 0x%x", type); 3774 error = USB_ERR_INVAL; 3775 goto fail; 3776 } 3777 3778 sc->sc_gpio_ledon = 0; 3779 3780fail: 3781 return (error); 3782} 3783 3784static void 3785urtw_led_ch(void *arg) 3786{ 3787 struct urtw_softc *sc = arg; 3788 struct ifnet *ifp = sc->sc_ifp; 3789 struct ieee80211com *ic = ifp->if_l2com; 3790 3791 ieee80211_runtask(ic, &sc->sc_led_task); 3792} 3793 3794static void 3795urtw_ledtask(void *arg, int pending) 3796{ 3797 struct urtw_softc *sc = arg; 3798 3799 if (sc->sc_strategy != URTW_SW_LED_MODE0) { 3800 DPRINTF(sc, URTW_DEBUG_STATE, 3801 "could not process a LED strategy 0x%x", 3802 sc->sc_strategy); 3803 return; 3804 } 3805 3806 URTW_LOCK(sc); 3807 urtw_led_blink(sc); 3808 URTW_UNLOCK(sc); 3809} 3810 3811static usb_error_t 3812urtw_led_blink(struct urtw_softc *sc) 3813{ 3814 uint8_t ing = 0; 3815 usb_error_t error; 3816 3817 if (sc->sc_gpio_blinkstate == URTW_LED_ON) 3818 error = urtw_led_on(sc, URTW_LED_GPIO); 3819 else 3820 error = urtw_led_off(sc, URTW_LED_GPIO); 3821 sc->sc_gpio_blinktime--; 3822 if (sc->sc_gpio_blinktime == 0) 3823 ing = 1; 3824 else { 3825 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL && 3826 sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY && 3827 sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3) 3828 ing = 1; 3829 } 3830 if (ing == 1) { 3831 if (sc->sc_gpio_ledstate == URTW_LED_ON && 3832 sc->sc_gpio_ledon == 0) 3833 error = urtw_led_on(sc, URTW_LED_GPIO); 3834 else if (sc->sc_gpio_ledstate == URTW_LED_OFF && 3835 sc->sc_gpio_ledon == 1) 3836 error = urtw_led_off(sc, URTW_LED_GPIO); 3837 3838 sc->sc_gpio_blinktime = 0; 3839 sc->sc_gpio_ledinprogress = 0; 3840 return (0); 3841 } 3842 3843 sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ? 3844 URTW_LED_ON : URTW_LED_OFF; 3845 3846 switch (sc->sc_gpio_ledstate) { 3847 case URTW_LED_BLINK_NORMAL: 3848 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3849 break; 3850 default: 3851 DPRINTF(sc, URTW_DEBUG_STATE, 3852 "unknown LED status 0x%x", 3853 sc->sc_gpio_ledstate); 3854 return (USB_ERR_INVAL); 3855 } 3856 return (0); 3857} 3858 3859static usb_error_t 3860urtw_rx_enable(struct urtw_softc *sc) 3861{ 3862 uint8_t data; 3863 usb_error_t error; 3864 3865 usbd_transfer_start((sc->sc_flags & URTW_RTL8187B) ? 3866 sc->sc_xfer[URTW_8187B_BULK_RX] : sc->sc_xfer[URTW_8187L_BULK_RX]); 3867 3868 error = urtw_rx_setconf(sc); 3869 if (error != 0) 3870 goto fail; 3871 3872 if ((sc->sc_flags & URTW_RTL8187B) == 0) { 3873 urtw_read8_m(sc, URTW_CMD, &data); 3874 urtw_write8_m(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE); 3875 } 3876fail: 3877 return (error); 3878} 3879 3880static usb_error_t 3881urtw_tx_enable(struct urtw_softc *sc) 3882{ 3883 uint8_t data8; 3884 uint32_t data; 3885 usb_error_t error; 3886 3887 if (sc->sc_flags & URTW_RTL8187B) { 3888 urtw_read32_m(sc, URTW_TX_CONF, &data); 3889 data &= ~URTW_TX_LOOPBACK_MASK; 3890 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3891 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3892 data &= ~URTW_TX_SWPLCPLEN; 3893 data |= URTW_TX_HW_SEQNUM | URTW_TX_DISREQQSIZE | 3894 (7 << 8) | /* short retry limit */ 3895 (7 << 0) | /* long retry limit */ 3896 (7 << 21); /* MAX TX DMA */ 3897 urtw_write32_m(sc, URTW_TX_CONF, data); 3898 3899 urtw_read8_m(sc, URTW_MSR, &data8); 3900 data8 |= URTW_MSR_LINK_ENEDCA; 3901 urtw_write8_m(sc, URTW_MSR, data8); 3902 return (error); 3903 } 3904 3905 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3906 data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY); 3907 urtw_write8_m(sc, URTW_CW_CONF, data8); 3908 3909 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3910 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN; 3911 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 3912 data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT; 3913 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3914 3915 urtw_read32_m(sc, URTW_TX_CONF, &data); 3916 data &= ~URTW_TX_LOOPBACK_MASK; 3917 data |= URTW_TX_LOOPBACK_NONE; 3918 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3919 data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT; 3920 data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT; 3921 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3922 data |= URTW_TX_MXDMA_2048 | URTW_TX_CWMIN | URTW_TX_DISCW; 3923 data &= ~URTW_TX_SWPLCPLEN; 3924 data |= URTW_TX_NOICV; 3925 urtw_write32_m(sc, URTW_TX_CONF, data); 3926 3927 urtw_read8_m(sc, URTW_CMD, &data8); 3928 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 3929fail: 3930 return (error); 3931} 3932 3933static usb_error_t 3934urtw_rx_setconf(struct urtw_softc *sc) 3935{ 3936 struct ifnet *ifp = sc->sc_ifp; 3937 struct ieee80211com *ic = ifp->if_l2com; 3938 uint32_t data; 3939 usb_error_t error; 3940 3941 urtw_read32_m(sc, URTW_RX, &data); 3942 data = data &~ URTW_RX_FILTER_MASK; 3943 if (sc->sc_flags & URTW_RTL8187B) { 3944 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA | 3945 URTW_RX_FILTER_MCAST | URTW_RX_FILTER_BCAST | 3946 URTW_RX_FILTER_NICMAC | URTW_RX_CHECK_BSSID | 3947 URTW_RX_FIFO_THRESHOLD_NONE | 3948 URTW_MAX_RX_DMA_2048 | 3949 URTW_RX_AUTORESETPHY | URTW_RCR_ONLYERLPKT; 3950 } else { 3951 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA; 3952 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST; 3953 3954 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 3955 data = data | URTW_RX_FILTER_ICVERR; 3956 data = data | URTW_RX_FILTER_PWR; 3957 } 3958 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR) 3959 data = data | URTW_RX_FILTER_CRCERR; 3960 3961 if (ic->ic_opmode == IEEE80211_M_MONITOR || 3962 (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) { 3963 data = data | URTW_RX_FILTER_ALLMAC; 3964 } else { 3965 data = data | URTW_RX_FILTER_NICMAC; 3966 data = data | URTW_RX_CHECK_BSSID; 3967 } 3968 3969 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK; 3970 data = data | URTW_RX_FIFO_THRESHOLD_NONE | 3971 URTW_RX_AUTORESETPHY; 3972 data = data &~ URTW_MAX_RX_DMA_MASK; 3973 data = data | URTW_MAX_RX_DMA_2048 | URTW_RCR_ONLYERLPKT; 3974 } 3975 3976 urtw_write32_m(sc, URTW_RX, data); 3977fail: 3978 return (error); 3979} 3980 3981static struct mbuf * 3982urtw_rxeof(struct usb_xfer *xfer, struct urtw_data *data, int *rssi_p, 3983 int8_t *nf_p) 3984{ 3985 int actlen, flen, rssi; 3986 struct ieee80211_frame *wh; 3987 struct mbuf *m, *mnew; 3988 struct urtw_softc *sc = data->sc; 3989 struct ifnet *ifp = sc->sc_ifp; 3990 struct ieee80211com *ic = ifp->if_l2com; 3991 uint8_t noise = 0, rate; 3992 3993 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 3994 3995 if (actlen < (int)URTW_MIN_RXBUFSZ) { 3996 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 3997 return (NULL); 3998 } 3999 4000 if (sc->sc_flags & URTW_RTL8187B) { 4001 struct urtw_8187b_rxhdr *rx; 4002 4003 rx = (struct urtw_8187b_rxhdr *)(data->buf + 4004 (actlen - (sizeof(struct urtw_8187b_rxhdr)))); 4005 flen = le32toh(rx->flag) & 0xfff; 4006 if (flen > actlen) { 4007 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 4008 return (NULL); 4009 } 4010 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf; 4011 /* XXX correct? */ 4012 rssi = rx->rssi & URTW_RX_RSSI_MASK; 4013 noise = rx->noise; 4014 } else { 4015 struct urtw_8187l_rxhdr *rx; 4016 4017 rx = (struct urtw_8187l_rxhdr *)(data->buf + 4018 (actlen - (sizeof(struct urtw_8187l_rxhdr)))); 4019 flen = le32toh(rx->flag) & 0xfff; 4020 if (flen > actlen) { 4021 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 4022 return (NULL); 4023 } 4024 4025 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf; 4026 /* XXX correct? */ 4027 rssi = rx->rssi & URTW_RX_8187L_RSSI_MASK; 4028 noise = rx->noise; 4029 } 4030 4031 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 4032 if (mnew == NULL) { 4033 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 4034 return (NULL); 4035 } 4036 4037 m = data->m; 4038 data->m = mnew; 4039 data->buf = mtod(mnew, uint8_t *); 4040 4041 /* finalize mbuf */ 4042 m->m_pkthdr.rcvif = ifp; 4043 m->m_pkthdr.len = m->m_len = flen - IEEE80211_CRC_LEN; 4044 4045 if (ieee80211_radiotap_active(ic)) { 4046 struct urtw_rx_radiotap_header *tap = &sc->sc_rxtap; 4047 4048 /* XXX Are variables correct? */ 4049 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 4050 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 4051 tap->wr_dbm_antsignal = (int8_t)rssi; 4052 } 4053 4054 wh = mtod(m, struct ieee80211_frame *); 4055 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_DATA) 4056 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate; 4057 4058 *rssi_p = rssi; 4059 *nf_p = noise; /* XXX correct? */ 4060 4061 return (m); 4062} 4063 4064static void 4065urtw_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 4066{ 4067 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4068 struct ifnet *ifp = sc->sc_ifp; 4069 struct ieee80211com *ic = ifp->if_l2com; 4070 struct ieee80211_frame *wh; 4071 struct ieee80211_node *ni; 4072 struct mbuf *m = NULL; 4073 struct urtw_data *data; 4074 int8_t nf = -95; 4075 int rssi = 1; 4076 4077 URTW_ASSERT_LOCKED(sc); 4078 4079 switch (USB_GET_STATE(xfer)) { 4080 case USB_ST_TRANSFERRED: 4081 data = STAILQ_FIRST(&sc->sc_rx_active); 4082 if (data == NULL) 4083 goto setup; 4084 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4085 m = urtw_rxeof(xfer, data, &rssi, &nf); 4086 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4087 /* FALLTHROUGH */ 4088 case USB_ST_SETUP: 4089setup: 4090 data = STAILQ_FIRST(&sc->sc_rx_inactive); 4091 if (data == NULL) { 4092 KASSERT(m == NULL, ("mbuf isn't NULL")); 4093 return; 4094 } 4095 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 4096 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 4097 usbd_xfer_set_frame_data(xfer, 0, data->buf, 4098 usbd_xfer_max_len(xfer)); 4099 usbd_transfer_submit(xfer); 4100 4101 /* 4102 * To avoid LOR we should unlock our private mutex here to call 4103 * ieee80211_input() because here is at the end of a USB 4104 * callback and safe to unlock. 4105 */ 4106 URTW_UNLOCK(sc); 4107 if (m != NULL) { 4108 wh = mtod(m, struct ieee80211_frame *); 4109 ni = ieee80211_find_rxnode(ic, 4110 (struct ieee80211_frame_min *)wh); 4111 if (ni != NULL) { 4112 (void) ieee80211_input(ni, m, rssi, nf); 4113 /* node is no longer needed */ 4114 ieee80211_free_node(ni); 4115 } else 4116 (void) ieee80211_input_all(ic, m, rssi, nf); 4117 m = NULL; 4118 } 4119 URTW_LOCK(sc); 4120 break; 4121 default: 4122 /* needs it to the inactive queue due to a error. */ 4123 data = STAILQ_FIRST(&sc->sc_rx_active); 4124 if (data != NULL) { 4125 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4126 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4127 } 4128 if (error != USB_ERR_CANCELLED) { 4129 usbd_xfer_set_stall(xfer); 4130 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 4131 goto setup; 4132 } 4133 break; 4134 } 4135} 4136 4137#define URTW_STATUS_TYPE_TXCLOSE 1 4138#define URTW_STATUS_TYPE_BEACON_INTR 0 4139 4140static void 4141urtw_txstatus_eof(struct usb_xfer *xfer) 4142{ 4143 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4144 struct ifnet *ifp = sc->sc_ifp; 4145 int actlen, type, pktretry, seq; 4146 uint64_t val; 4147 4148 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 4149 4150 if (actlen != sizeof(uint64_t)) 4151 return; 4152 4153 val = le64toh(sc->sc_txstatus); 4154 type = (val >> 30) & 0x3; 4155 if (type == URTW_STATUS_TYPE_TXCLOSE) { 4156 pktretry = val & 0xff; 4157 seq = (val >> 16) & 0xff; 4158 if (pktretry == URTW_TX_MAXRETRY) 4159 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 4160 DPRINTF(sc, URTW_DEBUG_TXSTATUS, "pktretry %d seq %#x\n", 4161 pktretry, seq); 4162 } 4163} 4164 4165static void 4166urtw_bulk_tx_status_callback(struct usb_xfer *xfer, usb_error_t error) 4167{ 4168 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4169 struct ifnet *ifp = sc->sc_ifp; 4170 void *dma_buf = usbd_xfer_get_frame_buffer(xfer, 0); 4171 4172 URTW_ASSERT_LOCKED(sc); 4173 4174 switch (USB_GET_STATE(xfer)) { 4175 case USB_ST_TRANSFERRED: 4176 urtw_txstatus_eof(xfer); 4177 /* FALLTHROUGH */ 4178 case USB_ST_SETUP: 4179setup: 4180 memcpy(dma_buf, &sc->sc_txstatus, sizeof(uint64_t)); 4181 usbd_xfer_set_frame_len(xfer, 0, sizeof(uint64_t)); 4182 usbd_transfer_submit(xfer); 4183 break; 4184 default: 4185 if (error != USB_ERR_CANCELLED) { 4186 usbd_xfer_set_stall(xfer); 4187 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 4188 goto setup; 4189 } 4190 break; 4191 } 4192} 4193 4194static void 4195urtw_txeof(struct usb_xfer *xfer, struct urtw_data *data) 4196{ 4197 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4198 struct ifnet *ifp = sc->sc_ifp; 4199 struct mbuf *m; 4200 4201 URTW_ASSERT_LOCKED(sc); 4202 4203 /* 4204 * Do any tx complete callback. Note this must be done before releasing 4205 * the node reference. 4206 */ 4207 if (data->m) { 4208 m = data->m; 4209 if (m->m_flags & M_TXCB) { 4210 /* XXX status? */ 4211 ieee80211_process_callback(data->ni, m, 0); 4212 } 4213 m_freem(m); 4214 data->m = NULL; 4215 } 4216 if (data->ni) { 4217 ieee80211_free_node(data->ni); 4218 data->ni = NULL; 4219 } 4220 sc->sc_txtimer = 0; 4221 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 4222 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 4223} 4224 4225static void 4226urtw_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 4227{ 4228 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4229 struct ifnet *ifp = sc->sc_ifp; 4230 struct urtw_data *data; 4231 4232 URTW_ASSERT_LOCKED(sc); 4233 4234 switch (USB_GET_STATE(xfer)) { 4235 case USB_ST_TRANSFERRED: 4236 data = STAILQ_FIRST(&sc->sc_tx_active); 4237 if (data == NULL) 4238 goto setup; 4239 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 4240 urtw_txeof(xfer, data); 4241 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 4242 /* FALLTHROUGH */ 4243 case USB_ST_SETUP: 4244setup: 4245 data = STAILQ_FIRST(&sc->sc_tx_pending); 4246 if (data == NULL) { 4247 DPRINTF(sc, URTW_DEBUG_XMIT, 4248 "%s: empty pending queue\n", __func__); 4249 return; 4250 } 4251 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 4252 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 4253 4254 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 4255 usbd_transfer_submit(xfer); 4256 4257 URTW_UNLOCK(sc); 4258 urtw_start(ifp); 4259 URTW_LOCK(sc); 4260 break; 4261 default: 4262 data = STAILQ_FIRST(&sc->sc_tx_active); 4263 if (data == NULL) 4264 goto setup; 4265 if (data->ni != NULL) { 4266 ieee80211_free_node(data->ni); 4267 data->ni = NULL; 4268 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 4269 } 4270 if (error != USB_ERR_CANCELLED) { 4271 usbd_xfer_set_stall(xfer); 4272 goto setup; 4273 } 4274 break; 4275 } 4276} 4277 4278static struct urtw_data * 4279_urtw_getbuf(struct urtw_softc *sc) 4280{ 4281 struct urtw_data *bf; 4282 4283 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 4284 if (bf != NULL) 4285 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 4286 else 4287 bf = NULL; 4288 if (bf == NULL) 4289 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: %s\n", __func__, 4290 "out of xmit buffers"); 4291 return (bf); 4292} 4293 4294static struct urtw_data * 4295urtw_getbuf(struct urtw_softc *sc) 4296{ 4297 struct urtw_data *bf; 4298 4299 URTW_ASSERT_LOCKED(sc); 4300 4301 bf = _urtw_getbuf(sc); 4302 if (bf == NULL) { 4303 struct ifnet *ifp = sc->sc_ifp; 4304 4305 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: stop queue\n", __func__); 4306 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 4307 } 4308 return (bf); 4309} 4310 4311static int 4312urtw_isbmode(uint16_t rate) 4313{ 4314 4315 return ((rate <= 22 && rate != 12 && rate != 18) || 4316 rate == 44) ? (1) : (0); 4317} 4318 4319static uint16_t 4320urtw_rate2dbps(uint16_t rate) 4321{ 4322 4323 switch(rate) { 4324 case 12: 4325 case 18: 4326 case 24: 4327 case 36: 4328 case 48: 4329 case 72: 4330 case 96: 4331 case 108: 4332 return (rate * 2); 4333 default: 4334 break; 4335 } 4336 return (24); 4337} 4338 4339static int 4340urtw_compute_txtime(uint16_t framelen, uint16_t rate, 4341 uint8_t ismgt, uint8_t isshort) 4342{ 4343 uint16_t ceiling, frametime, n_dbps; 4344 4345 if (urtw_isbmode(rate)) { 4346 if (ismgt || !isshort || rate == 2) 4347 frametime = (uint16_t)(144 + 48 + 4348 (framelen * 8 / (rate / 2))); 4349 else 4350 frametime = (uint16_t)(72 + 24 + 4351 (framelen * 8 / (rate / 2))); 4352 if ((framelen * 8 % (rate / 2)) != 0) 4353 frametime++; 4354 } else { 4355 n_dbps = urtw_rate2dbps(rate); 4356 ceiling = (16 + 8 * framelen + 6) / n_dbps 4357 + (((16 + 8 * framelen + 6) % n_dbps) ? 1 : 0); 4358 frametime = (uint16_t)(16 + 4 + 4 * ceiling + 6); 4359 } 4360 return (frametime); 4361} 4362 4363/* 4364 * Callback from the 802.11 layer to update the 4365 * slot time based on the current setting. 4366 */ 4367static void 4368urtw_updateslot(struct ifnet *ifp) 4369{ 4370 struct urtw_softc *sc = ifp->if_softc; 4371 struct ieee80211com *ic = ifp->if_l2com; 4372 4373 ieee80211_runtask(ic, &sc->sc_updateslot_task); 4374} 4375 4376static void 4377urtw_updateslottask(void *arg, int pending) 4378{ 4379 struct urtw_softc *sc = arg; 4380 struct ifnet *ifp = sc->sc_ifp; 4381 struct ieee80211com *ic = ifp->if_l2com; 4382 int error; 4383 4384 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 4385 return; 4386 4387 URTW_LOCK(sc); 4388 if (sc->sc_flags & URTW_RTL8187B) { 4389 urtw_write8_m(sc, URTW_SIFS, 0x22); 4390 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) 4391 urtw_write8_m(sc, URTW_SLOT, 0x9); 4392 else 4393 urtw_write8_m(sc, URTW_SLOT, 0x14); 4394 urtw_write8_m(sc, URTW_8187B_EIFS, 0x5b); 4395 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 0x5b); 4396 } else { 4397 urtw_write8_m(sc, URTW_SIFS, 0x22); 4398 if (sc->sc_state == IEEE80211_S_ASSOC && 4399 ic->ic_flags & IEEE80211_F_SHSLOT) 4400 urtw_write8_m(sc, URTW_SLOT, 0x9); 4401 else 4402 urtw_write8_m(sc, URTW_SLOT, 0x14); 4403 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) { 4404 urtw_write8_m(sc, URTW_DIFS, 0x14); 4405 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14); 4406 urtw_write8_m(sc, URTW_CW_VAL, 0x73); 4407 } else { 4408 urtw_write8_m(sc, URTW_DIFS, 0x24); 4409 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24); 4410 urtw_write8_m(sc, URTW_CW_VAL, 0xa5); 4411 } 4412 } 4413fail: 4414 URTW_UNLOCK(sc); 4415} 4416 4417static void 4418urtw_sysctl_node(struct urtw_softc *sc) 4419{ 4420#define URTW_SYSCTL_STAT_ADD32(c, h, n, p, d) \ 4421 SYSCTL_ADD_UINT(c, h, OID_AUTO, n, CTLFLAG_RD, p, 0, d) 4422 struct sysctl_ctx_list *ctx; 4423 struct sysctl_oid_list *child, *parent; 4424 struct sysctl_oid *tree; 4425 struct urtw_stats *stats = &sc->sc_stats; 4426 4427 ctx = device_get_sysctl_ctx(sc->sc_dev); 4428 child = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->sc_dev)); 4429 4430 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD, 4431 NULL, "URTW statistics"); 4432 parent = SYSCTL_CHILDREN(tree); 4433 4434 /* Tx statistics. */ 4435 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "tx", CTLFLAG_RD, 4436 NULL, "Tx MAC statistics"); 4437 child = SYSCTL_CHILDREN(tree); 4438 URTW_SYSCTL_STAT_ADD32(ctx, child, "1m", &stats->txrates[0], 4439 "1 Mbit/s"); 4440 URTW_SYSCTL_STAT_ADD32(ctx, child, "2m", &stats->txrates[1], 4441 "2 Mbit/s"); 4442 URTW_SYSCTL_STAT_ADD32(ctx, child, "5.5m", &stats->txrates[2], 4443 "5.5 Mbit/s"); 4444 URTW_SYSCTL_STAT_ADD32(ctx, child, "6m", &stats->txrates[4], 4445 "6 Mbit/s"); 4446 URTW_SYSCTL_STAT_ADD32(ctx, child, "9m", &stats->txrates[5], 4447 "9 Mbit/s"); 4448 URTW_SYSCTL_STAT_ADD32(ctx, child, "11m", &stats->txrates[3], 4449 "11 Mbit/s"); 4450 URTW_SYSCTL_STAT_ADD32(ctx, child, "12m", &stats->txrates[6], 4451 "12 Mbit/s"); 4452 URTW_SYSCTL_STAT_ADD32(ctx, child, "18m", &stats->txrates[7], 4453 "18 Mbit/s"); 4454 URTW_SYSCTL_STAT_ADD32(ctx, child, "24m", &stats->txrates[8], 4455 "24 Mbit/s"); 4456 URTW_SYSCTL_STAT_ADD32(ctx, child, "36m", &stats->txrates[9], 4457 "36 Mbit/s"); 4458 URTW_SYSCTL_STAT_ADD32(ctx, child, "48m", &stats->txrates[10], 4459 "48 Mbit/s"); 4460 URTW_SYSCTL_STAT_ADD32(ctx, child, "54m", &stats->txrates[11], 4461 "54 Mbit/s"); 4462#undef URTW_SYSCTL_STAT_ADD32 4463} 4464 4465static device_method_t urtw_methods[] = { 4466 DEVMETHOD(device_probe, urtw_match), 4467 DEVMETHOD(device_attach, urtw_attach), 4468 DEVMETHOD(device_detach, urtw_detach), 4469 DEVMETHOD_END 4470}; 4471static driver_t urtw_driver = { 4472 .name = "urtw", 4473 .methods = urtw_methods, 4474 .size = sizeof(struct urtw_softc) 4475}; 4476static devclass_t urtw_devclass; 4477 4478DRIVER_MODULE(urtw, uhub, urtw_driver, urtw_devclass, NULL, 0); 4479MODULE_DEPEND(urtw, wlan, 1, 1, 1); 4480MODULE_DEPEND(urtw, usb, 1, 1, 1); 4481MODULE_VERSION(urtw, 1); 4482