if_urtw.c revision 198194
1/*- 2 * Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org> 3 * 4 * Permission to use, copy, modify, and distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#include <sys/cdefs.h> 18__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_urtw.c 198194 2009-10-18 00:11:49Z weongyo $"); 19#include <sys/param.h> 20#include <sys/sockio.h> 21#include <sys/sysctl.h> 22#include <sys/lock.h> 23#include <sys/mutex.h> 24#include <sys/mbuf.h> 25#include <sys/kernel.h> 26#include <sys/socket.h> 27#include <sys/systm.h> 28#include <sys/malloc.h> 29#include <sys/module.h> 30#include <sys/bus.h> 31#include <sys/endian.h> 32#include <sys/kdb.h> 33 34#include <machine/bus.h> 35#include <machine/resource.h> 36#include <sys/rman.h> 37 38#include <net/if.h> 39#include <net/if_arp.h> 40#include <net/ethernet.h> 41#include <net/if_dl.h> 42#include <net/if_media.h> 43#include <net/if_types.h> 44 45#ifdef INET 46#include <netinet/in.h> 47#include <netinet/in_systm.h> 48#include <netinet/in_var.h> 49#include <netinet/if_ether.h> 50#include <netinet/ip.h> 51#endif 52 53#include <net80211/ieee80211_var.h> 54#include <net80211/ieee80211_regdomain.h> 55#include <net80211/ieee80211_radiotap.h> 56 57#include <dev/usb/usb.h> 58#include <dev/usb/usbdi.h> 59#include "usbdevs.h" 60 61#include <dev/usb/wlan/if_urtwreg.h> 62#include <dev/usb/wlan/if_urtwvar.h> 63 64SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW, 0, "USB Realtek 8187L"); 65#ifdef URTW_DEBUG 66int urtw_debug = 0; 67SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RW, &urtw_debug, 0, 68 "control debugging printfs"); 69TUNABLE_INT("hw.usb.urtw.debug", &urtw_debug); 70enum { 71 URTW_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 72 URTW_DEBUG_RECV = 0x00000002, /* basic recv operation */ 73 URTW_DEBUG_RESET = 0x00000004, /* reset processing */ 74 URTW_DEBUG_TX_PROC = 0x00000008, /* tx ISR proc */ 75 URTW_DEBUG_RX_PROC = 0x00000010, /* rx ISR proc */ 76 URTW_DEBUG_STATE = 0x00000020, /* 802.11 state transitions */ 77 URTW_DEBUG_STAT = 0x00000040, /* statistic */ 78 URTW_DEBUG_INIT = 0x00000080, /* initialization of dev */ 79 URTW_DEBUG_TXSTATUS = 0x00000100, /* tx status */ 80 URTW_DEBUG_ANY = 0xffffffff 81}; 82#define DPRINTF(sc, m, fmt, ...) do { \ 83 if (sc->sc_debug & (m)) \ 84 printf(fmt, __VA_ARGS__); \ 85} while (0) 86#else 87#define DPRINTF(sc, m, fmt, ...) do { \ 88 (void) sc; \ 89} while (0) 90#endif 91static int urtw_preamble_mode = URTW_PREAMBLE_MODE_LONG; 92SYSCTL_INT(_hw_usb_urtw, OID_AUTO, preamble_mode, CTLFLAG_RW, 93 &urtw_preamble_mode, 0, "set the preable mode (long or short)"); 94TUNABLE_INT("hw.usb.urtw.preamble_mode", &urtw_preamble_mode); 95 96/* recognized device vendors/products */ 97#define urtw_lookup(v, p) \ 98 ((const struct urtw_type *)usb_lookup(urtw_devs, v, p)) 99#define URTW_DEV_B(v,p) \ 100 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187B) } 101#define URTW_DEV_L(v,p) \ 102 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187L) } 103#define URTW_REV_RTL8187B 0 104#define URTW_REV_RTL8187L 1 105static const struct usb_device_id urtw_devs[] = { 106 URTW_DEV_B(NETGEAR, WG111V3), 107 URTW_DEV_B(REALTEK, RTL8187B_0), 108 URTW_DEV_B(REALTEK, RTL8187B_1), 109 URTW_DEV_B(REALTEK, RTL8187B_2), 110 URTW_DEV_B(SITECOMEU, WL168V4), 111 URTW_DEV_L(ASUS, P5B_WIFI), 112 URTW_DEV_L(BELKIN, F5D7050E), 113 URTW_DEV_L(LINKSYS4, WUSB54GCV2), 114 URTW_DEV_L(NETGEAR, WG111V2), 115 URTW_DEV_L(REALTEK, RTL8187), 116 URTW_DEV_L(SITECOMEU, WL168V1), 117 URTW_DEV_L(SURECOM, EP9001G2A), 118 { USB_VPI(0x1b75, 0x8187, URTW_REV_RTL8187L) }, 119 { USB_VPI(USB_VENDOR_DICKSMITH, 0x9401, URTW_REV_RTL8187L) }, 120 { USB_VPI(USB_VENDOR_HP, 0xca02, URTW_REV_RTL8187L) }, 121 { USB_VPI(USB_VENDOR_LOGITEC, 0x010c, URTW_REV_RTL8187L) }, 122 { USB_VPI(USB_VENDOR_NETGEAR, 0x6100, URTW_REV_RTL8187L) }, 123 { USB_VPI(USB_VENDOR_SPHAIRON, 0x0150, URTW_REV_RTL8187L) }, 124 { USB_VPI(USB_VENDOR_QCOM, 0x6232, URTW_REV_RTL8187L) }, 125#undef URTW_DEV_L 126#undef URTW_DEV_B 127}; 128 129#define urtw_read8_m(sc, val, data) do { \ 130 error = urtw_read8_c(sc, val, data); \ 131 if (error != 0) \ 132 goto fail; \ 133} while (0) 134#define urtw_write8_m(sc, val, data) do { \ 135 error = urtw_write8_c(sc, val, data); \ 136 if (error != 0) \ 137 goto fail; \ 138} while (0) 139#define urtw_read16_m(sc, val, data) do { \ 140 error = urtw_read16_c(sc, val, data); \ 141 if (error != 0) \ 142 goto fail; \ 143} while (0) 144#define urtw_write16_m(sc, val, data) do { \ 145 error = urtw_write16_c(sc, val, data); \ 146 if (error != 0) \ 147 goto fail; \ 148} while (0) 149#define urtw_read32_m(sc, val, data) do { \ 150 error = urtw_read32_c(sc, val, data); \ 151 if (error != 0) \ 152 goto fail; \ 153} while (0) 154#define urtw_write32_m(sc, val, data) do { \ 155 error = urtw_write32_c(sc, val, data); \ 156 if (error != 0) \ 157 goto fail; \ 158} while (0) 159#define urtw_8187_write_phy_ofdm(sc, val, data) do { \ 160 error = urtw_8187_write_phy_ofdm_c(sc, val, data); \ 161 if (error != 0) \ 162 goto fail; \ 163} while (0) 164#define urtw_8187_write_phy_cck(sc, val, data) do { \ 165 error = urtw_8187_write_phy_cck_c(sc, val, data); \ 166 if (error != 0) \ 167 goto fail; \ 168} while (0) 169#define urtw_8225_write(sc, val, data) do { \ 170 error = urtw_8225_write_c(sc, val, data); \ 171 if (error != 0) \ 172 goto fail; \ 173} while (0) 174 175struct urtw_pair { 176 uint32_t reg; 177 uint32_t val; 178}; 179 180static uint8_t urtw_8225_agc[] = { 181 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b, 182 0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 183 0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85, 184 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a, 185 0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 186 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24, 187 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 188 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 189 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 190 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 191 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 192 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 193}; 194 195static uint8_t urtw_8225z2_agc[] = { 196 0x5e, 0x5e, 0x5e, 0x5e, 0x5d, 0x5b, 0x59, 0x57, 0x55, 0x53, 0x51, 197 0x4f, 0x4d, 0x4b, 0x49, 0x47, 0x45, 0x43, 0x41, 0x3f, 0x3d, 0x3b, 198 0x39, 0x37, 0x35, 0x33, 0x31, 0x2f, 0x2d, 0x2b, 0x29, 0x27, 0x25, 199 0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 0x15, 0x13, 0x11, 0x0f, 200 0x0d, 0x0b, 0x09, 0x07, 0x05, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 201 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x19, 0x19, 202 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x20, 0x21, 0x22, 0x23, 203 0x24, 0x25, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29, 0x2a, 0x2a, 204 0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2d, 205 0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x31, 0x31, 206 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 207 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31 208}; 209 210static uint32_t urtw_8225_channel[] = { 211 0x0000, /* dummy channel 0 */ 212 0x085c, /* 1 */ 213 0x08dc, /* 2 */ 214 0x095c, /* 3 */ 215 0x09dc, /* 4 */ 216 0x0a5c, /* 5 */ 217 0x0adc, /* 6 */ 218 0x0b5c, /* 7 */ 219 0x0bdc, /* 8 */ 220 0x0c5c, /* 9 */ 221 0x0cdc, /* 10 */ 222 0x0d5c, /* 11 */ 223 0x0ddc, /* 12 */ 224 0x0e5c, /* 13 */ 225 0x0f72, /* 14 */ 226}; 227 228static uint8_t urtw_8225_gain[] = { 229 0x23, 0x88, 0x7c, 0xa5, /* -82dbm */ 230 0x23, 0x88, 0x7c, 0xb5, /* -82dbm */ 231 0x23, 0x88, 0x7c, 0xc5, /* -82dbm */ 232 0x33, 0x80, 0x79, 0xc5, /* -78dbm */ 233 0x43, 0x78, 0x76, 0xc5, /* -74dbm */ 234 0x53, 0x60, 0x73, 0xc5, /* -70dbm */ 235 0x63, 0x58, 0x70, 0xc5, /* -66dbm */ 236}; 237 238static struct urtw_pair urtw_8225_rf_part1[] = { 239 { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 240 { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a }, 241 { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 }, 242 { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 }, 243}; 244 245static struct urtw_pair urtw_8225_rf_part2[] = { 246 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 247 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 248 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 }, 249 { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 }, 250 { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 }, 251 { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, { 0x18, 0xef }, 252 { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x76 }, { 0x1c, 0x04 }, 253 { 0x1e, 0x95 }, { 0x1f, 0x75 }, { 0x20, 0x1f }, { 0x21, 0x27 }, 254 { 0x22, 0x16 }, { 0x24, 0x46 }, { 0x25, 0x20 }, { 0x26, 0x90 }, 255 { 0x27, 0x88 } 256}; 257 258static struct urtw_pair urtw_8225_rf_part3[] = { 259 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 260 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x10, 0x9b }, 261 { 0x11, 0x88 }, { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, 262 { 0x1a, 0xa0 }, { 0x1b, 0x08 }, { 0x40, 0x86 }, { 0x41, 0x8d }, 263 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x1f }, { 0x45, 0x1e }, 264 { 0x46, 0x1a }, { 0x47, 0x15 }, { 0x48, 0x10 }, { 0x49, 0x0a }, 265 { 0x4a, 0x05 }, { 0x4b, 0x02 }, { 0x4c, 0x05 } 266}; 267 268static uint16_t urtw_8225_rxgain[] = { 269 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 270 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 271 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 272 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 273 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 274 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 275 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 276 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 277 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 278 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 279 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3, 280 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb 281}; 282 283static uint8_t urtw_8225_threshold[] = { 284 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd, 285}; 286 287static uint8_t urtw_8225_tx_gain_cck_ofdm[] = { 288 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e 289}; 290 291static uint8_t urtw_8225_txpwr_cck[] = { 292 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02, 293 0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02, 294 0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02, 295 0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02, 296 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03, 297 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03 298}; 299 300static uint8_t urtw_8225_txpwr_cck_ch14[] = { 301 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00, 302 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00, 303 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00, 304 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00, 305 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00, 306 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00 307}; 308 309static uint8_t urtw_8225_txpwr_ofdm[]={ 310 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4 311}; 312 313static uint8_t urtw_8225v2_gain_bg[]={ 314 0x23, 0x15, 0xa5, /* -82-1dbm */ 315 0x23, 0x15, 0xb5, /* -82-2dbm */ 316 0x23, 0x15, 0xc5, /* -82-3dbm */ 317 0x33, 0x15, 0xc5, /* -78dbm */ 318 0x43, 0x15, 0xc5, /* -74dbm */ 319 0x53, 0x15, 0xc5, /* -70dbm */ 320 0x63, 0x15, 0xc5, /* -66dbm */ 321}; 322 323static struct urtw_pair urtw_8225v2_rf_part1[] = { 324 { 0x00, 0x02bf }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 325 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 326 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 327 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 328}; 329 330static struct urtw_pair urtw_8225v2b_rf_part0[] = { 331 { 0x00, 0x00b7 }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 332 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 333 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 334 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 335}; 336 337static struct urtw_pair urtw_8225v2b_rf_part1[] = { 338 {0x0f0, 0x32}, {0x0f1, 0x32}, {0x0f2, 0x00}, 339 {0x0f3, 0x00}, {0x0f4, 0x32}, {0x0f5, 0x43}, 340 {0x0f6, 0x00}, {0x0f7, 0x00}, {0x0f8, 0x46}, 341 {0x0f9, 0xa4}, {0x0fa, 0x00}, {0x0fb, 0x00}, 342 {0x0fc, 0x96}, {0x0fd, 0xa4}, {0x0fe, 0x00}, 343 {0x0ff, 0x00}, {0x158, 0x4b}, {0x159, 0x00}, 344 {0x15a, 0x4b}, {0x15b, 0x00}, {0x160, 0x4b}, 345 {0x161, 0x09}, {0x162, 0x4b}, {0x163, 0x09}, 346 {0x1ce, 0x0f}, {0x1cf, 0x00}, {0x1e0, 0xff}, 347 {0x1e1, 0x0f}, {0x1e2, 0x00}, {0x1f0, 0x4e}, 348 {0x1f1, 0x01}, {0x1f2, 0x02}, {0x1f3, 0x03}, 349 {0x1f4, 0x04}, {0x1f5, 0x05}, {0x1f6, 0x06}, 350 {0x1f7, 0x07}, {0x1f8, 0x08}, {0x24e, 0x00}, 351 {0x20c, 0x04}, {0x221, 0x61}, {0x222, 0x68}, 352 {0x223, 0x6f}, {0x224, 0x76}, {0x225, 0x7d}, 353 {0x226, 0x84}, {0x227, 0x8d}, {0x24d, 0x08}, 354 {0x250, 0x05}, {0x251, 0xf5}, {0x252, 0x04}, 355 {0x253, 0xa0}, {0x254, 0x1f}, {0x255, 0x23}, 356 {0x256, 0x45}, {0x257, 0x67}, {0x258, 0x08}, 357 {0x259, 0x08}, {0x25a, 0x08}, {0x25b, 0x08}, 358 {0x260, 0x08}, {0x261, 0x08}, {0x262, 0x08}, 359 {0x263, 0x08}, {0x264, 0xcf}, {0x272, 0x56}, 360 {0x273, 0x9a}, {0x034, 0xf0}, {0x035, 0x0f}, 361 {0x05b, 0x40}, {0x084, 0x88}, {0x085, 0x24}, 362 {0x088, 0x54}, {0x08b, 0xb8}, {0x08c, 0x07}, 363 {0x08d, 0x00}, {0x094, 0x1b}, {0x095, 0x12}, 364 {0x096, 0x00}, {0x097, 0x06}, {0x09d, 0x1a}, 365 {0x09f, 0x10}, {0x0b4, 0x22}, {0x0be, 0x80}, 366 {0x0db, 0x00}, {0x0ee, 0x00}, {0x091, 0x03}, 367 {0x24c, 0x00}, {0x39f, 0x00}, {0x08c, 0x01}, 368 {0x08d, 0x10}, {0x08e, 0x08}, {0x08f, 0x00} 369}; 370 371static struct urtw_pair urtw_8225v2_rf_part2[] = { 372 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 373 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 374 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x08 }, { 0x0b, 0x80 }, 375 { 0x0c, 0x01 }, { 0x0d, 0x43 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, 376 { 0x10, 0x84 }, { 0x11, 0x07 }, { 0x12, 0x20 }, { 0x13, 0x20 }, 377 { 0x14, 0x00 }, { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, 378 { 0x18, 0xef }, { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x15 }, 379 { 0x1c, 0x04 }, { 0x1d, 0xc5 }, { 0x1e, 0x95 }, { 0x1f, 0x75 }, 380 { 0x20, 0x1f }, { 0x21, 0x17 }, { 0x22, 0x16 }, { 0x23, 0x80 }, 381 { 0x24, 0x46 }, { 0x25, 0x00 }, { 0x26, 0x90 }, { 0x27, 0x88 } 382}; 383 384static struct urtw_pair urtw_8225v2b_rf_part2[] = { 385 { 0x00, 0x10 }, { 0x01, 0x0d }, { 0x02, 0x01 }, { 0x03, 0x00 }, 386 { 0x04, 0x14 }, { 0x05, 0xfb }, { 0x06, 0xfb }, { 0x07, 0x60 }, 387 { 0x08, 0x00 }, { 0x09, 0x60 }, { 0x0a, 0x00 }, { 0x0b, 0x00 }, 388 { 0x0c, 0x00 }, { 0x0d, 0x5c }, { 0x0e, 0x00 }, { 0x0f, 0x00 }, 389 { 0x10, 0x40 }, { 0x11, 0x00 }, { 0x12, 0x40 }, { 0x13, 0x00 }, 390 { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0xa8 }, { 0x17, 0x26 }, 391 { 0x18, 0x32 }, { 0x19, 0x33 }, { 0x1a, 0x07 }, { 0x1b, 0xa5 }, 392 { 0x1c, 0x6f }, { 0x1d, 0x55 }, { 0x1e, 0xc8 }, { 0x1f, 0xb3 }, 393 { 0x20, 0x0a }, { 0x21, 0xe1 }, { 0x22, 0x2C }, { 0x23, 0x8a }, 394 { 0x24, 0x86 }, { 0x25, 0x83 }, { 0x26, 0x34 }, { 0x27, 0x0f }, 395 { 0x28, 0x4f }, { 0x29, 0x24 }, { 0x2a, 0x6f }, { 0x2b, 0xc2 }, 396 { 0x2c, 0x6b }, { 0x2d, 0x40 }, { 0x2e, 0x80 }, { 0x2f, 0x00 }, 397 { 0x30, 0xc0 }, { 0x31, 0xc1 }, { 0x32, 0x58 }, { 0x33, 0xf1 }, 398 { 0x34, 0x00 }, { 0x35, 0xe4 }, { 0x36, 0x90 }, { 0x37, 0x3e }, 399 { 0x38, 0x6d }, { 0x39, 0x3c }, { 0x3a, 0xfb }, { 0x3b, 0x07 } 400}; 401 402static struct urtw_pair urtw_8225v2_rf_part3[] = { 403 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 404 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x09, 0x11 }, 405 { 0x0a, 0x17 }, { 0x0b, 0x11 }, { 0x10, 0x9b }, { 0x11, 0x88 }, 406 { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, { 0x1a, 0xa0 }, 407 { 0x1b, 0x08 }, { 0x1d, 0x00 }, { 0x40, 0x86 }, { 0x41, 0x9d }, 408 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x36 }, { 0x45, 0x35 }, 409 { 0x46, 0x2e }, { 0x47, 0x25 }, { 0x48, 0x1c }, { 0x49, 0x12 }, 410 { 0x4a, 0x09 }, { 0x4b, 0x04 }, { 0x4c, 0x05 } 411}; 412 413static uint16_t urtw_8225v2_rxgain[] = { 414 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009, 415 0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141, 416 0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183, 417 0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244, 418 0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288, 419 0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345, 420 0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389, 421 0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393, 422 0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d, 423 0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9, 424 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 425 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 426}; 427 428static uint16_t urtw_8225v2b_rxgain[] = { 429 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 430 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 431 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 432 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 433 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 434 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 435 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 436 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 437 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 438 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 439 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 440 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 441}; 442 443static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = { 444 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 445 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 446 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 447 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 448 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 449 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, 450}; 451 452static uint8_t urtw_8225v2_txpwr_cck[] = { 453 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04 454}; 455 456static uint8_t urtw_8225v2_txpwr_cck_ch14[] = { 457 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00 458}; 459 460static uint8_t urtw_8225v2b_txpwr_cck[] = { 461 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04, 462 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03, 463 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03, 464 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03 465}; 466 467static uint8_t urtw_8225v2b_txpwr_cck_ch14[] = { 468 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00, 469 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 470 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 471 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00 472}; 473 474static struct urtw_pair urtw_ratetable[] = { 475 { 2, 0 }, { 4, 1 }, { 11, 2 }, { 12, 4 }, { 18, 5 }, 476 { 22, 3 }, { 24, 6 }, { 36, 7 }, { 48, 8 }, { 72, 9 }, 477 { 96, 10 }, { 108, 11 } 478}; 479 480static const uint8_t urtw_8187b_reg_table[][3] = { 481 { 0xf0, 0x32, 0 }, { 0xf1, 0x32, 0 }, { 0xf2, 0x00, 0 }, 482 { 0xf3, 0x00, 0 }, { 0xf4, 0x32, 0 }, { 0xf5, 0x43, 0 }, 483 { 0xf6, 0x00, 0 }, { 0xf7, 0x00, 0 }, { 0xf8, 0x46, 0 }, 484 { 0xf9, 0xa4, 0 }, { 0xfa, 0x00, 0 }, { 0xfb, 0x00, 0 }, 485 { 0xfc, 0x96, 0 }, { 0xfd, 0xa4, 0 }, { 0xfe, 0x00, 0 }, 486 { 0xff, 0x00, 0 }, { 0x58, 0x4b, 1 }, { 0x59, 0x00, 1 }, 487 { 0x5a, 0x4b, 1 }, { 0x5b, 0x00, 1 }, { 0x60, 0x4b, 1 }, 488 { 0x61, 0x09, 1 }, { 0x62, 0x4b, 1 }, { 0x63, 0x09, 1 }, 489 { 0xce, 0x0f, 1 }, { 0xcf, 0x00, 1 }, { 0xe0, 0xff, 1 }, 490 { 0xe1, 0x0f, 1 }, { 0xe2, 0x00, 1 }, { 0xf0, 0x4e, 1 }, 491 { 0xf1, 0x01, 1 }, { 0xf2, 0x02, 1 }, { 0xf3, 0x03, 1 }, 492 { 0xf4, 0x04, 1 }, { 0xf5, 0x05, 1 }, { 0xf6, 0x06, 1 }, 493 { 0xf7, 0x07, 1 }, { 0xf8, 0x08, 1 }, { 0x4e, 0x00, 2 }, 494 { 0x0c, 0x04, 2 }, { 0x21, 0x61, 2 }, { 0x22, 0x68, 2 }, 495 { 0x23, 0x6f, 2 }, { 0x24, 0x76, 2 }, { 0x25, 0x7d, 2 }, 496 { 0x26, 0x84, 2 }, { 0x27, 0x8d, 2 }, { 0x4d, 0x08, 2 }, 497 { 0x50, 0x05, 2 }, { 0x51, 0xf5, 2 }, { 0x52, 0x04, 2 }, 498 { 0x53, 0xa0, 2 }, { 0x54, 0x1f, 2 }, { 0x55, 0x23, 2 }, 499 { 0x56, 0x45, 2 }, { 0x57, 0x67, 2 }, { 0x58, 0x08, 2 }, 500 { 0x59, 0x08, 2 }, { 0x5a, 0x08, 2 }, { 0x5b, 0x08, 2 }, 501 { 0x60, 0x08, 2 }, { 0x61, 0x08, 2 }, { 0x62, 0x08, 2 }, 502 { 0x63, 0x08, 2 }, { 0x64, 0xcf, 2 }, { 0x72, 0x56, 2 }, 503 { 0x73, 0x9a, 2 }, { 0x34, 0xf0, 0 }, { 0x35, 0x0f, 0 }, 504 { 0x5b, 0x40, 0 }, { 0x84, 0x88, 0 }, { 0x85, 0x24, 0 }, 505 { 0x88, 0x54, 0 }, { 0x8b, 0xb8, 0 }, { 0x8c, 0x07, 0 }, 506 { 0x8d, 0x00, 0 }, { 0x94, 0x1b, 0 }, { 0x95, 0x12, 0 }, 507 { 0x96, 0x00, 0 }, { 0x97, 0x06, 0 }, { 0x9d, 0x1a, 0 }, 508 { 0x9f, 0x10, 0 }, { 0xb4, 0x22, 0 }, { 0xbe, 0x80, 0 }, 509 { 0xdb, 0x00, 0 }, { 0xee, 0x00, 0 }, { 0x91, 0x03, 0 }, 510 { 0x4c, 0x00, 2 }, { 0x9f, 0x00, 3 }, { 0x8c, 0x01, 0 }, 511 { 0x8d, 0x10, 0 }, { 0x8e, 0x08, 0 }, { 0x8f, 0x00, 0 } 512}; 513 514static usb_callback_t urtw_bulk_rx_callback; 515static usb_callback_t urtw_bulk_tx_callback; 516static usb_callback_t urtw_bulk_tx_status_callback; 517 518static const struct usb_config urtw_8187b_usbconfig[URTW_8187B_N_XFERS] = { 519 [URTW_8187B_BULK_RX] = { 520 .type = UE_BULK, 521 .endpoint = 0x83, 522 .direction = UE_DIR_IN, 523 .bufsize = MCLBYTES, 524 .flags = { 525 .ext_buffer = 1, 526 .pipe_bof = 1, 527 .short_xfer_ok = 1 528 }, 529 .callback = urtw_bulk_rx_callback 530 }, 531 [URTW_8187B_BULK_TX_STATUS] = { 532 .type = UE_BULK, 533 .endpoint = 0x89, 534 .direction = UE_DIR_IN, 535 .bufsize = MCLBYTES, 536 .flags = { 537 .ext_buffer = 1, 538 .pipe_bof = 1, 539 .short_xfer_ok = 1 540 }, 541 .callback = urtw_bulk_tx_status_callback 542 }, 543 [URTW_8187B_BULK_TX_BE] = { 544 .type = UE_BULK, 545 .endpoint = URTW_8187B_TXPIPE_BE, 546 .direction = UE_DIR_OUT, 547 .bufsize = URTW_TX_MAXSIZE, 548 .flags = { 549 .ext_buffer = 1, 550 .force_short_xfer = 1, 551 .pipe_bof = 1, 552 }, 553 .callback = urtw_bulk_tx_callback, 554 .timeout = URTW_DATA_TIMEOUT 555 }, 556 [URTW_8187B_BULK_TX_BK] = { 557 .type = UE_BULK, 558 .endpoint = URTW_8187B_TXPIPE_BK, 559 .direction = UE_DIR_OUT, 560 .bufsize = URTW_TX_MAXSIZE, 561 .flags = { 562 .ext_buffer = 1, 563 .force_short_xfer = 1, 564 .pipe_bof = 1, 565 }, 566 .callback = urtw_bulk_tx_callback, 567 .timeout = URTW_DATA_TIMEOUT 568 }, 569 [URTW_8187B_BULK_TX_VI] = { 570 .type = UE_BULK, 571 .endpoint = URTW_8187B_TXPIPE_VI, 572 .direction = UE_DIR_OUT, 573 .bufsize = URTW_TX_MAXSIZE, 574 .flags = { 575 .ext_buffer = 1, 576 .force_short_xfer = 1, 577 .pipe_bof = 1, 578 }, 579 .callback = urtw_bulk_tx_callback, 580 .timeout = URTW_DATA_TIMEOUT 581 }, 582 [URTW_8187B_BULK_TX_VO] = { 583 .type = UE_BULK, 584 .endpoint = URTW_8187B_TXPIPE_VO, 585 .direction = UE_DIR_OUT, 586 .bufsize = URTW_TX_MAXSIZE, 587 .flags = { 588 .ext_buffer = 1, 589 .force_short_xfer = 1, 590 .pipe_bof = 1, 591 }, 592 .callback = urtw_bulk_tx_callback, 593 .timeout = URTW_DATA_TIMEOUT 594 }, 595 [URTW_8187B_BULK_TX_EP12] = { 596 .type = UE_BULK, 597 .endpoint = 0xc, 598 .direction = UE_DIR_OUT, 599 .bufsize = URTW_TX_MAXSIZE, 600 .flags = { 601 .ext_buffer = 1, 602 .force_short_xfer = 1, 603 .pipe_bof = 1, 604 }, 605 .callback = urtw_bulk_tx_callback, 606 .timeout = URTW_DATA_TIMEOUT 607 } 608}; 609 610static const struct usb_config urtw_8187l_usbconfig[URTW_8187L_N_XFERS] = { 611 [URTW_8187L_BULK_RX] = { 612 .type = UE_BULK, 613 .endpoint = 0x81, 614 .direction = UE_DIR_IN, 615 .bufsize = MCLBYTES, 616 .flags = { 617 .ext_buffer = 1, 618 .pipe_bof = 1, 619 .short_xfer_ok = 1 620 }, 621 .callback = urtw_bulk_rx_callback 622 }, 623 [URTW_8187L_BULK_TX_LOW] = { 624 .type = UE_BULK, 625 .endpoint = 0x2, 626 .direction = UE_DIR_OUT, 627 .bufsize = URTW_TX_MAXSIZE, 628 .flags = { 629 .ext_buffer = 1, 630 .force_short_xfer = 1, 631 .pipe_bof = 1, 632 }, 633 .callback = urtw_bulk_tx_callback, 634 .timeout = URTW_DATA_TIMEOUT 635 }, 636 [URTW_8187L_BULK_TX_NORMAL] = { 637 .type = UE_BULK, 638 .endpoint = 0x3, 639 .direction = UE_DIR_OUT, 640 .bufsize = URTW_TX_MAXSIZE, 641 .flags = { 642 .ext_buffer = 1, 643 .force_short_xfer = 1, 644 .pipe_bof = 1, 645 }, 646 .callback = urtw_bulk_tx_callback, 647 .timeout = URTW_DATA_TIMEOUT 648 }, 649}; 650 651static struct ieee80211vap *urtw_vap_create(struct ieee80211com *, 652 const char name[IFNAMSIZ], int unit, int opmode, 653 int flags, const uint8_t bssid[IEEE80211_ADDR_LEN], 654 const uint8_t mac[IEEE80211_ADDR_LEN]); 655static void urtw_vap_delete(struct ieee80211vap *); 656static void urtw_init(void *); 657static void urtw_stop(struct ifnet *, int); 658static void urtw_stop_locked(struct ifnet *, int); 659static int urtw_ioctl(struct ifnet *, u_long, caddr_t); 660static void urtw_start(struct ifnet *); 661static int urtw_alloc_rx_data_list(struct urtw_softc *); 662static int urtw_alloc_tx_data_list(struct urtw_softc *); 663static int urtw_raw_xmit(struct ieee80211_node *, struct mbuf *, 664 const struct ieee80211_bpf_params *); 665static void urtw_scan_start(struct ieee80211com *); 666static void urtw_scan_end(struct ieee80211com *); 667static void urtw_set_channel(struct ieee80211com *); 668static void urtw_update_mcast(struct ifnet *); 669static int urtw_tx_start(struct urtw_softc *, 670 struct ieee80211_node *, struct mbuf *, 671 struct urtw_data *, int); 672static int urtw_newstate(struct ieee80211vap *, 673 enum ieee80211_state, int); 674static void urtw_led_ch(void *); 675static void urtw_ledtask(void *, int); 676static void urtw_watchdog(void *); 677static void urtw_set_multi(void *); 678static int urtw_isbmode(uint16_t); 679static uint16_t urtw_rate2rtl(int); 680static uint16_t urtw_rtl2rate(int); 681static usb_error_t urtw_set_rate(struct urtw_softc *); 682static usb_error_t urtw_update_msr(struct urtw_softc *); 683static usb_error_t urtw_read8_c(struct urtw_softc *, int, uint8_t *); 684static usb_error_t urtw_read16_c(struct urtw_softc *, int, uint16_t *); 685static usb_error_t urtw_read32_c(struct urtw_softc *, int, uint32_t *); 686static usb_error_t urtw_write8_c(struct urtw_softc *, int, uint8_t); 687static usb_error_t urtw_write16_c(struct urtw_softc *, int, uint16_t); 688static usb_error_t urtw_write32_c(struct urtw_softc *, int, uint32_t); 689static usb_error_t urtw_eprom_cs(struct urtw_softc *, int); 690static usb_error_t urtw_eprom_ck(struct urtw_softc *); 691static usb_error_t urtw_eprom_sendbits(struct urtw_softc *, int16_t *, 692 int); 693static usb_error_t urtw_eprom_read32(struct urtw_softc *, uint32_t, 694 uint32_t *); 695static usb_error_t urtw_eprom_readbit(struct urtw_softc *, int16_t *); 696static usb_error_t urtw_eprom_writebit(struct urtw_softc *, int16_t); 697static usb_error_t urtw_get_macaddr(struct urtw_softc *); 698static usb_error_t urtw_get_txpwr(struct urtw_softc *); 699static usb_error_t urtw_get_rfchip(struct urtw_softc *); 700static usb_error_t urtw_led_init(struct urtw_softc *); 701static usb_error_t urtw_8185_rf_pins_enable(struct urtw_softc *); 702static usb_error_t urtw_8185_tx_antenna(struct urtw_softc *, uint8_t); 703static usb_error_t urtw_8187_write_phy(struct urtw_softc *, uint8_t, 704 uint32_t); 705static usb_error_t urtw_8187_write_phy_ofdm_c(struct urtw_softc *, 706 uint8_t, uint32_t); 707static usb_error_t urtw_8187_write_phy_cck_c(struct urtw_softc *, uint8_t, 708 uint32_t); 709static usb_error_t urtw_8225_setgain(struct urtw_softc *, int16_t); 710static usb_error_t urtw_8225_usb_init(struct urtw_softc *); 711static usb_error_t urtw_8225_write_c(struct urtw_softc *, uint8_t, 712 uint16_t); 713static usb_error_t urtw_8225_write_s16(struct urtw_softc *, uint8_t, int, 714 uint16_t *); 715static usb_error_t urtw_8225_read(struct urtw_softc *, uint8_t, 716 uint32_t *); 717static usb_error_t urtw_8225_rf_init(struct urtw_softc *); 718static usb_error_t urtw_8225_rf_set_chan(struct urtw_softc *, int); 719static usb_error_t urtw_8225_rf_set_sens(struct urtw_softc *, int); 720static usb_error_t urtw_8225_set_txpwrlvl(struct urtw_softc *, int); 721static usb_error_t urtw_8225_rf_stop(struct urtw_softc *); 722static usb_error_t urtw_8225v2_rf_init(struct urtw_softc *); 723static usb_error_t urtw_8225v2_rf_set_chan(struct urtw_softc *, int); 724static usb_error_t urtw_8225v2_set_txpwrlvl(struct urtw_softc *, int); 725static usb_error_t urtw_8225v2_setgain(struct urtw_softc *, int16_t); 726static usb_error_t urtw_8225_isv2(struct urtw_softc *, int *); 727static usb_error_t urtw_8225v2b_rf_init(struct urtw_softc *); 728static usb_error_t urtw_8225v2b_rf_set_chan(struct urtw_softc *, int); 729static usb_error_t urtw_read8e(struct urtw_softc *, int, uint8_t *); 730static usb_error_t urtw_write8e(struct urtw_softc *, int, uint8_t); 731static usb_error_t urtw_8180_set_anaparam(struct urtw_softc *, uint32_t); 732static usb_error_t urtw_8185_set_anaparam2(struct urtw_softc *, uint32_t); 733static usb_error_t urtw_intr_enable(struct urtw_softc *); 734static usb_error_t urtw_intr_disable(struct urtw_softc *); 735static usb_error_t urtw_reset(struct urtw_softc *); 736static usb_error_t urtw_led_on(struct urtw_softc *, int); 737static usb_error_t urtw_led_ctl(struct urtw_softc *, int); 738static usb_error_t urtw_led_blink(struct urtw_softc *); 739static usb_error_t urtw_led_mode0(struct urtw_softc *, int); 740static usb_error_t urtw_led_mode1(struct urtw_softc *, int); 741static usb_error_t urtw_led_mode2(struct urtw_softc *, int); 742static usb_error_t urtw_led_mode3(struct urtw_softc *, int); 743static usb_error_t urtw_rx_setconf(struct urtw_softc *); 744static usb_error_t urtw_rx_enable(struct urtw_softc *); 745static usb_error_t urtw_tx_enable(struct urtw_softc *sc); 746static void urtw_free_tx_data_list(struct urtw_softc *); 747static void urtw_free_rx_data_list(struct urtw_softc *); 748static void urtw_free_data_list(struct urtw_softc *, 749 struct urtw_data data[], int, int); 750static usb_error_t urtw_adapter_start(struct urtw_softc *); 751static usb_error_t urtw_adapter_start_b(struct urtw_softc *); 752static usb_error_t urtw_set_mode(struct urtw_softc *, uint32_t); 753static usb_error_t urtw_8187b_cmd_reset(struct urtw_softc *); 754static usb_error_t urtw_do_request(struct urtw_softc *, 755 struct usb_device_request *, void *); 756static usb_error_t urtw_8225v2b_set_txpwrlvl(struct urtw_softc *, int); 757static usb_error_t urtw_led_off(struct urtw_softc *, int); 758static void urtw_abort_xfers(struct urtw_softc *); 759static struct urtw_data * 760 urtw_getbuf(struct urtw_softc *sc); 761static int urtw_compute_txtime(uint16_t, uint16_t, uint8_t, 762 uint8_t); 763static void urtw_updateslot(struct ifnet *); 764static void urtw_updateslottask(void *, int); 765 766static int 767urtw_match(device_t dev) 768{ 769 struct usb_attach_arg *uaa = device_get_ivars(dev); 770 771 if (uaa->usb_mode != USB_MODE_HOST) 772 return (ENXIO); 773 if (uaa->info.bConfigIndex != URTW_CONFIG_INDEX) 774 return (ENXIO); 775 if (uaa->info.bIfaceIndex != URTW_IFACE_INDEX) 776 return (ENXIO); 777 778 return (usbd_lookup_id_by_uaa(urtw_devs, sizeof(urtw_devs), uaa)); 779} 780 781static int 782urtw_attach(device_t dev) 783{ 784 const struct usb_config *setup_start; 785 int ret = ENXIO; 786 struct urtw_softc *sc = device_get_softc(dev); 787 struct usb_attach_arg *uaa = device_get_ivars(dev); 788 struct ieee80211com *ic; 789 struct ifnet *ifp; 790 uint8_t bands, iface_index = URTW_IFACE_INDEX; /* XXX */ 791 uint16_t n_setup; 792 uint32_t data; 793 usb_error_t error; 794 795 device_set_usb_desc(dev); 796 797 sc->sc_dev = dev; 798 sc->sc_udev = uaa->device; 799 if (USB_GET_DRIVER_INFO(uaa) == URTW_REV_RTL8187B) 800 sc->sc_flags |= URTW_RTL8187B; 801#ifdef URTW_DEBUG 802 sc->sc_debug = urtw_debug; 803#endif 804 805 mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), MTX_NETWORK_LOCK, 806 MTX_DEF); 807 usb_callout_init_mtx(&sc->sc_led_ch, &sc->sc_mtx, 0); 808 TASK_INIT(&sc->sc_led_task, 0, urtw_ledtask, sc); 809 TASK_INIT(&sc->sc_updateslot_task, 0, urtw_updateslottask, sc); 810 callout_init(&sc->sc_watchdog_ch, 0); 811 812 if (sc->sc_flags & URTW_RTL8187B) { 813 setup_start = urtw_8187b_usbconfig; 814 n_setup = URTW_8187B_N_XFERS; 815 } else { 816 setup_start = urtw_8187l_usbconfig; 817 n_setup = URTW_8187L_N_XFERS; 818 } 819 820 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 821 setup_start, n_setup, sc, &sc->sc_mtx); 822 if (error) { 823 device_printf(dev, "could not allocate USB transfers, " 824 "err=%s\n", usbd_errstr(error)); 825 ret = ENXIO; 826 goto fail0; 827 } 828 829 URTW_LOCK(sc); 830 831 urtw_read32_m(sc, URTW_RX, &data); 832 sc->sc_epromtype = (data & URTW_RX_9356SEL) ? URTW_EEPROM_93C56 : 833 URTW_EEPROM_93C46; 834 835 error = urtw_get_rfchip(sc); 836 if (error != 0) 837 goto fail; 838 error = urtw_get_macaddr(sc); 839 if (error != 0) 840 goto fail; 841 error = urtw_get_txpwr(sc); 842 if (error != 0) 843 goto fail; 844 error = urtw_led_init(sc); 845 if (error != 0) 846 goto fail; 847 848 URTW_UNLOCK(sc); 849 850 sc->sc_rts_retry = URTW_DEFAULT_RTS_RETRY; 851 sc->sc_tx_retry = URTW_DEFAULT_TX_RETRY; 852 sc->sc_currate = 3; 853 sc->sc_preamble_mode = urtw_preamble_mode; 854 855 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 856 if (ifp == NULL) { 857 device_printf(sc->sc_dev, "can not allocate ifnet\n"); 858 ret = ENOMEM; 859 goto fail1; 860 } 861 862 ifp->if_softc = sc; 863 if_initname(ifp, "urtw", device_get_unit(sc->sc_dev)); 864 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 865 ifp->if_init = urtw_init; 866 ifp->if_ioctl = urtw_ioctl; 867 ifp->if_start = urtw_start; 868 /* XXX URTW_TX_DATA_LIST_COUNT */ 869 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 870 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 871 IFQ_SET_READY(&ifp->if_snd); 872 873 ic = ifp->if_l2com; 874 ic->ic_ifp = ifp; 875 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 876 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 877 878 /* set device capabilities */ 879 ic->ic_caps = 880 IEEE80211_C_STA | /* station mode */ 881 IEEE80211_C_MONITOR | /* monitor mode supported */ 882 IEEE80211_C_TXPMGT | /* tx power management */ 883 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 884 IEEE80211_C_SHSLOT | /* short slot time supported */ 885 IEEE80211_C_BGSCAN | /* capable of bg scanning */ 886 IEEE80211_C_WPA; /* 802.11i */ 887 888 bands = 0; 889 setbit(&bands, IEEE80211_MODE_11B); 890 setbit(&bands, IEEE80211_MODE_11G); 891 ieee80211_init_channels(ic, NULL, &bands); 892 893 ieee80211_ifattach(ic, sc->sc_bssid); 894 ic->ic_raw_xmit = urtw_raw_xmit; 895 ic->ic_scan_start = urtw_scan_start; 896 ic->ic_scan_end = urtw_scan_end; 897 ic->ic_set_channel = urtw_set_channel; 898 ic->ic_updateslot = urtw_updateslot; 899 ic->ic_vap_create = urtw_vap_create; 900 ic->ic_vap_delete = urtw_vap_delete; 901 ic->ic_update_mcast = urtw_update_mcast; 902 903 ieee80211_radiotap_attach(ic, 904 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 905 URTW_TX_RADIOTAP_PRESENT, 906 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 907 URTW_RX_RADIOTAP_PRESENT); 908 909 if (bootverbose) 910 ieee80211_announce(ic); 911 return (0); 912 913fail: URTW_UNLOCK(sc); 914fail1: usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ? 915 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS); 916fail0: 917 return (ret); 918} 919 920static int 921urtw_detach(device_t dev) 922{ 923 struct urtw_softc *sc = device_get_softc(dev); 924 struct ifnet *ifp = sc->sc_ifp; 925 struct ieee80211com *ic = ifp->if_l2com; 926 927 if (!device_is_attached(dev)) 928 return (0); 929 930 urtw_stop(ifp, 1); 931 ieee80211_draintask(ic, &sc->sc_updateslot_task); 932 ieee80211_draintask(ic, &sc->sc_led_task); 933 934 usb_callout_drain(&sc->sc_led_ch); 935 callout_drain(&sc->sc_watchdog_ch); 936 937 usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ? 938 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS); 939 ieee80211_ifdetach(ic); 940 941 urtw_free_tx_data_list(sc); 942 urtw_free_rx_data_list(sc); 943 944 if_free(ifp); 945 mtx_destroy(&sc->sc_mtx); 946 947 return (0); 948} 949 950static void 951urtw_free_tx_data_list(struct urtw_softc *sc) 952{ 953 954 urtw_free_data_list(sc, sc->sc_tx, URTW_TX_DATA_LIST_COUNT, 0); 955} 956 957static void 958urtw_free_rx_data_list(struct urtw_softc *sc) 959{ 960 961 urtw_free_data_list(sc, sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1); 962} 963 964static void 965urtw_free_data_list(struct urtw_softc *sc, struct urtw_data data[], int ndata, 966 int fillmbuf) 967{ 968 int i; 969 970 for (i = 0; i < ndata; i++) { 971 struct urtw_data *dp = &data[i]; 972 973 if (fillmbuf == 1) { 974 if (dp->m != NULL) { 975 m_freem(dp->m); 976 dp->m = NULL; 977 dp->buf = NULL; 978 } 979 } else { 980 if (dp->buf != NULL) { 981 free(dp->buf, M_USBDEV); 982 dp->buf = NULL; 983 } 984 } 985 if (dp->ni != NULL) { 986 ieee80211_free_node(dp->ni); 987 dp->ni = NULL; 988 } 989 } 990} 991 992static struct ieee80211vap * 993urtw_vap_create(struct ieee80211com *ic, 994 const char name[IFNAMSIZ], int unit, int opmode, int flags, 995 const uint8_t bssid[IEEE80211_ADDR_LEN], 996 const uint8_t mac[IEEE80211_ADDR_LEN]) 997{ 998 struct urtw_vap *uvp; 999 struct ieee80211vap *vap; 1000 1001 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 1002 return (NULL); 1003 uvp = (struct urtw_vap *) malloc(sizeof(struct urtw_vap), 1004 M_80211_VAP, M_NOWAIT | M_ZERO); 1005 if (uvp == NULL) 1006 return (NULL); 1007 vap = &uvp->vap; 1008 /* enable s/w bmiss handling for sta mode */ 1009 ieee80211_vap_setup(ic, vap, name, unit, opmode, 1010 flags | IEEE80211_CLONE_NOBEACONS, bssid, mac); 1011 1012 /* override state transition machine */ 1013 uvp->newstate = vap->iv_newstate; 1014 vap->iv_newstate = urtw_newstate; 1015 1016 /* complete setup */ 1017 ieee80211_vap_attach(vap, ieee80211_media_change, 1018 ieee80211_media_status); 1019 ic->ic_opmode = opmode; 1020 return (vap); 1021} 1022 1023static void 1024urtw_vap_delete(struct ieee80211vap *vap) 1025{ 1026 struct urtw_vap *uvp = URTW_VAP(vap); 1027 1028 ieee80211_vap_detach(vap); 1029 free(uvp, M_80211_VAP); 1030} 1031 1032static void 1033urtw_init_locked(void *arg) 1034{ 1035 int ret; 1036 struct urtw_softc *sc = arg; 1037 struct ifnet *ifp = sc->sc_ifp; 1038 usb_error_t error; 1039 1040 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1041 urtw_stop_locked(ifp, 0); 1042 1043 error = (sc->sc_flags & URTW_RTL8187B) ? urtw_adapter_start_b(sc) : 1044 urtw_adapter_start(sc); 1045 if (error != 0) 1046 goto fail; 1047 1048 /* reset softc variables */ 1049 sc->sc_txtimer = 0; 1050 1051 if (!(sc->sc_flags & URTW_INIT_ONCE)) { 1052 ret = urtw_alloc_rx_data_list(sc); 1053 if (error != 0) 1054 goto fail; 1055 ret = urtw_alloc_tx_data_list(sc); 1056 if (error != 0) 1057 goto fail; 1058 sc->sc_flags |= URTW_INIT_ONCE; 1059 } 1060 1061 error = urtw_rx_enable(sc); 1062 if (error != 0) 1063 goto fail; 1064 error = urtw_tx_enable(sc); 1065 if (error != 0) 1066 goto fail; 1067 1068 if (sc->sc_flags & URTW_RTL8187B) 1069 usbd_transfer_start(sc->sc_xfer[URTW_8187B_BULK_TX_STATUS]); 1070 1071 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1072 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1073 1074 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1075fail: 1076 return; 1077} 1078 1079static void 1080urtw_init(void *arg) 1081{ 1082 struct urtw_softc *sc = arg; 1083 1084 URTW_LOCK(sc); 1085 urtw_init_locked(arg); 1086 URTW_UNLOCK(sc); 1087} 1088 1089static usb_error_t 1090urtw_adapter_start_b(struct urtw_softc *sc) 1091{ 1092#define N(a) (sizeof(a) / sizeof((a)[0])) 1093 uint8_t data8; 1094 usb_error_t error; 1095 1096 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1097 if (error) 1098 goto fail; 1099 1100 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1101 urtw_write8_m(sc, URTW_CONFIG3, 1102 data8 | URTW_CONFIG3_ANAPARAM_WRITE | URTW_CONFIG3_GNT_SELECT); 1103 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8187B_8225_ANAPARAM2_ON); 1104 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_ON); 1105 urtw_write8_m(sc, URTW_ANAPARAM3, URTW_8187B_8225_ANAPARAM3_ON); 1106 1107 urtw_write8_m(sc, 0x61, 0x10); 1108 urtw_read8_m(sc, 0x62, &data8); 1109 urtw_write8_m(sc, 0x62, data8 & ~(1 << 5)); 1110 urtw_write8_m(sc, 0x62, data8 | (1 << 5)); 1111 1112 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1113 data8 &= ~URTW_CONFIG3_ANAPARAM_WRITE; 1114 urtw_write8_m(sc, URTW_CONFIG3, data8); 1115 1116 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1117 if (error) 1118 goto fail; 1119 1120 error = urtw_8187b_cmd_reset(sc); 1121 if (error) 1122 goto fail; 1123 1124 error = sc->sc_rf_init(sc); 1125 if (error != 0) 1126 goto fail; 1127 urtw_write8_m(sc, URTW_CMD, URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1128 1129 /* fix RTL8187B RX stall */ 1130 error = urtw_intr_enable(sc); 1131 if (error) 1132 goto fail; 1133 1134 error = urtw_write8e(sc, 0x41, 0xf4); 1135 if (error) 1136 goto fail; 1137 error = urtw_write8e(sc, 0x40, 0x00); 1138 if (error) 1139 goto fail; 1140 error = urtw_write8e(sc, 0x42, 0x00); 1141 if (error) 1142 goto fail; 1143 error = urtw_write8e(sc, 0x42, 0x01); 1144 if (error) 1145 goto fail; 1146 error = urtw_write8e(sc, 0x40, 0x0f); 1147 if (error) 1148 goto fail; 1149 error = urtw_write8e(sc, 0x42, 0x00); 1150 if (error) 1151 goto fail; 1152 error = urtw_write8e(sc, 0x42, 0x01); 1153 if (error) 1154 goto fail; 1155 1156 urtw_read8_m(sc, 0xdb, &data8); 1157 urtw_write8_m(sc, 0xdb, data8 | (1 << 2)); 1158 urtw_write16_m(sc, 0x372, 0x59fa); 1159 urtw_write16_m(sc, 0x374, 0x59d2); 1160 urtw_write16_m(sc, 0x376, 0x59d2); 1161 urtw_write16_m(sc, 0x378, 0x19fa); 1162 urtw_write16_m(sc, 0x37a, 0x19fa); 1163 urtw_write16_m(sc, 0x37c, 0x00d0); 1164 urtw_write8_m(sc, 0x61, 0); 1165 1166 urtw_write8_m(sc, 0x180, 0x0f); 1167 urtw_write8_m(sc, 0x183, 0x03); 1168 urtw_write8_m(sc, 0xda, 0x10); 1169 urtw_write8_m(sc, 0x24d, 0x08); 1170 urtw_write32_m(sc, URTW_HSSI_PARA, 0x0600321b); 1171 1172 urtw_write16_m(sc, 0x1ec, 0x800); /* RX MAX SIZE */ 1173fail: 1174 return (error); 1175#undef N 1176} 1177 1178static usb_error_t 1179urtw_adapter_start(struct urtw_softc *sc) 1180{ 1181 usb_error_t error; 1182 1183 error = urtw_reset(sc); 1184 if (error) 1185 goto fail; 1186 1187 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 0); 1188 urtw_write8_m(sc, URTW_GPIO, 0); 1189 1190 /* for led */ 1191 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1192 error = urtw_led_ctl(sc, URTW_LED_CTL_POWER_ON); 1193 if (error != 0) 1194 goto fail; 1195 1196 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1197 if (error) 1198 goto fail; 1199 /* applying MAC address again. */ 1200 urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)sc->sc_bssid)[0]); 1201 urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)sc->sc_bssid)[1] & 0xffff); 1202 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1203 if (error) 1204 goto fail; 1205 1206 error = urtw_update_msr(sc); 1207 if (error) 1208 goto fail; 1209 1210 urtw_write32_m(sc, URTW_INT_TIMEOUT, 0); 1211 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 1212 urtw_write8_m(sc, URTW_RATE_FALLBACK, URTW_RATE_FALLBACK_ENABLE | 0x1); 1213 error = urtw_set_rate(sc); 1214 if (error != 0) 1215 goto fail; 1216 1217 error = sc->sc_rf_init(sc); 1218 if (error != 0) 1219 goto fail; 1220 if (sc->sc_rf_set_sens != NULL) 1221 sc->sc_rf_set_sens(sc, sc->sc_sens); 1222 1223 /* XXX correct? to call write16 */ 1224 urtw_write16_m(sc, URTW_PSR, 1); 1225 urtw_write16_m(sc, URTW_ADDR_MAGIC2, 0x10); 1226 urtw_write8_m(sc, URTW_TALLY_SEL, 0x80); 1227 urtw_write8_m(sc, URTW_ADDR_MAGIC3, 0x60); 1228 /* XXX correct? to call write16 */ 1229 urtw_write16_m(sc, URTW_PSR, 0); 1230 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1231 1232 error = urtw_intr_enable(sc); 1233 if (error != 0) 1234 goto fail; 1235 1236fail: 1237 return (error); 1238} 1239 1240static usb_error_t 1241urtw_set_mode(struct urtw_softc *sc, uint32_t mode) 1242{ 1243 uint8_t data; 1244 usb_error_t error; 1245 1246 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 1247 data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT); 1248 data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK); 1249 urtw_write8_m(sc, URTW_EPROM_CMD, data); 1250fail: 1251 return (error); 1252} 1253 1254static usb_error_t 1255urtw_8187b_cmd_reset(struct urtw_softc *sc) 1256{ 1257 int i; 1258 uint8_t data8; 1259 usb_error_t error; 1260 1261 /* XXX the code can be duplicate with urtw_reset(). */ 1262 urtw_read8_m(sc, URTW_CMD, &data8); 1263 data8 = (data8 & 0x2) | URTW_CMD_RST; 1264 urtw_write8_m(sc, URTW_CMD, data8); 1265 1266 for (i = 0; i < 20; i++) { 1267 usb_pause_mtx(&sc->sc_mtx, 2); 1268 urtw_read8_m(sc, URTW_CMD, &data8); 1269 if (!(data8 & URTW_CMD_RST)) 1270 break; 1271 } 1272 if (i >= 20) { 1273 device_printf(sc->sc_dev, "reset timeout\n"); 1274 goto fail; 1275 } 1276fail: 1277 return (error); 1278} 1279 1280static usb_error_t 1281urtw_do_request(struct urtw_softc *sc, 1282 struct usb_device_request *req, void *data) 1283{ 1284 usb_error_t err; 1285 int ntries = 10; 1286 1287 URTW_ASSERT_LOCKED(sc); 1288 1289 while (ntries--) { 1290 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 1291 req, data, 0, NULL, 250 /* ms */); 1292 if (err == 0) 1293 break; 1294 1295 DPRINTF(sc, URTW_DEBUG_INIT, 1296 "Control request failed, %s (retrying)\n", 1297 usbd_errstr(err)); 1298 usb_pause_mtx(&sc->sc_mtx, hz / 100); 1299 } 1300 return (err); 1301} 1302 1303static void 1304urtw_stop_locked(struct ifnet *ifp, int disable) 1305{ 1306 struct urtw_softc *sc = ifp->if_softc; 1307 uint8_t data8; 1308 usb_error_t error; 1309 1310 (void)disable; 1311 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1312 1313 error = urtw_intr_disable(sc); 1314 if (error) 1315 goto fail; 1316 urtw_read8_m(sc, URTW_CMD, &data8); 1317 data8 &= ~(URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1318 urtw_write8_m(sc, URTW_CMD, data8); 1319 1320 error = sc->sc_rf_stop(sc); 1321 if (error != 0) 1322 goto fail; 1323 1324 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1325 if (error) 1326 goto fail; 1327 urtw_read8_m(sc, URTW_CONFIG4, &data8); 1328 urtw_write8_m(sc, URTW_CONFIG4, data8 | URTW_CONFIG4_VCOOFF); 1329 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1330 if (error) 1331 goto fail; 1332fail: 1333 if (error) 1334 device_printf(sc->sc_dev, "failed to stop (%s)\n", 1335 usbd_errstr(error)); 1336 1337 usb_callout_stop(&sc->sc_led_ch); 1338 callout_stop(&sc->sc_watchdog_ch); 1339 1340 urtw_abort_xfers(sc); 1341} 1342 1343static void 1344urtw_stop(struct ifnet *ifp, int disable) 1345{ 1346 struct urtw_softc *sc = ifp->if_softc; 1347 1348 URTW_LOCK(sc); 1349 urtw_stop_locked(ifp, disable); 1350 URTW_UNLOCK(sc); 1351} 1352 1353static void 1354urtw_abort_xfers(struct urtw_softc *sc) 1355{ 1356 int i, max; 1357 1358 URTW_ASSERT_LOCKED(sc); 1359 1360 max = (sc->sc_flags & URTW_RTL8187B) ? URTW_8187B_N_XFERS : 1361 URTW_8187L_N_XFERS; 1362 1363 /* abort any pending transfers */ 1364 for (i = 0; i < max; i++) 1365 usbd_transfer_stop(sc->sc_xfer[i]); 1366} 1367 1368static int 1369urtw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1370{ 1371 struct urtw_softc *sc = ifp->if_softc; 1372 struct ieee80211com *ic = ifp->if_l2com; 1373 struct ifreq *ifr = (struct ifreq *) data; 1374 int error = 0, startall = 0; 1375 1376 switch (cmd) { 1377 case SIOCSIFFLAGS: 1378 if (ifp->if_flags & IFF_UP) { 1379 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1380 if ((ifp->if_flags ^ sc->sc_if_flags) & 1381 (IFF_ALLMULTI | IFF_PROMISC)) 1382 urtw_set_multi(sc); 1383 } else { 1384 urtw_init(ifp->if_softc); 1385 startall = 1; 1386 } 1387 } else { 1388 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1389 urtw_stop(ifp, 1); 1390 } 1391 sc->sc_if_flags = ifp->if_flags; 1392 if (startall) 1393 ieee80211_start_all(ic); 1394 break; 1395 case SIOCGIFMEDIA: 1396 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1397 break; 1398 case SIOCGIFADDR: 1399 error = ether_ioctl(ifp, cmd, data); 1400 break; 1401 default: 1402 error = EINVAL; 1403 break; 1404 } 1405 1406 return (error); 1407} 1408 1409static void 1410urtw_start(struct ifnet *ifp) 1411{ 1412 struct urtw_data *bf; 1413 struct urtw_softc *sc = ifp->if_softc; 1414 struct ieee80211_node *ni; 1415 struct mbuf *m; 1416 1417 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1418 return; 1419 1420 URTW_LOCK(sc); 1421 for (;;) { 1422 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1423 if (m == NULL) 1424 break; 1425 bf = urtw_getbuf(sc); 1426 if (bf == NULL) { 1427 IFQ_DRV_PREPEND(&ifp->if_snd, m); 1428 break; 1429 } 1430 1431 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 1432 m->m_pkthdr.rcvif = NULL; 1433 1434 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_NORMAL) != 0) { 1435 ifp->if_oerrors++; 1436 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1437 ieee80211_free_node(ni); 1438 break; 1439 } 1440 1441 sc->sc_txtimer = 5; 1442 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1443 } 1444 URTW_UNLOCK(sc); 1445} 1446 1447static int 1448urtw_alloc_data_list(struct urtw_softc *sc, struct urtw_data data[], 1449 int ndata, int maxsz, int fillmbuf) 1450{ 1451 int i, error; 1452 1453 for (i = 0; i < ndata; i++) { 1454 struct urtw_data *dp = &data[i]; 1455 1456 dp->sc = sc; 1457 if (fillmbuf) { 1458 dp->m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 1459 if (dp->m == NULL) { 1460 device_printf(sc->sc_dev, 1461 "could not allocate rx mbuf\n"); 1462 error = ENOMEM; 1463 goto fail; 1464 } 1465 dp->buf = mtod(dp->m, uint8_t *); 1466 } else { 1467 dp->m = NULL; 1468 dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 1469 if (dp->buf == NULL) { 1470 device_printf(sc->sc_dev, 1471 "could not allocate buffer\n"); 1472 error = ENOMEM; 1473 goto fail; 1474 } 1475 if (((unsigned long)dp->buf) % 4) 1476 device_printf(sc->sc_dev, 1477 "warn: unaligned buffer %p\n", dp->buf); 1478 } 1479 dp->ni = NULL; 1480 } 1481 1482 return 0; 1483 1484fail: urtw_free_data_list(sc, data, ndata, fillmbuf); 1485 return error; 1486} 1487 1488static int 1489urtw_alloc_rx_data_list(struct urtw_softc *sc) 1490{ 1491 int error, i; 1492 1493 error = urtw_alloc_data_list(sc, 1494 sc->sc_rx, URTW_RX_DATA_LIST_COUNT, MCLBYTES, 1 /* mbufs */); 1495 if (error != 0) 1496 return (error); 1497 1498 STAILQ_INIT(&sc->sc_rx_active); 1499 STAILQ_INIT(&sc->sc_rx_inactive); 1500 1501 for (i = 0; i < URTW_RX_DATA_LIST_COUNT; i++) 1502 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1503 1504 return (0); 1505} 1506 1507static int 1508urtw_alloc_tx_data_list(struct urtw_softc *sc) 1509{ 1510 int error, i; 1511 1512 error = urtw_alloc_data_list(sc, 1513 sc->sc_tx, URTW_TX_DATA_LIST_COUNT, URTW_TX_MAXSIZE, 1514 0 /* no mbufs */); 1515 if (error != 0) 1516 return (error); 1517 1518 STAILQ_INIT(&sc->sc_tx_active); 1519 STAILQ_INIT(&sc->sc_tx_inactive); 1520 STAILQ_INIT(&sc->sc_tx_pending); 1521 1522 for (i = 0; i < URTW_TX_DATA_LIST_COUNT; i++) 1523 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], 1524 next); 1525 1526 return (0); 1527} 1528 1529static int 1530urtw_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1531 const struct ieee80211_bpf_params *params) 1532{ 1533 struct ieee80211com *ic = ni->ni_ic; 1534 struct ifnet *ifp = ic->ic_ifp; 1535 struct urtw_data *bf; 1536 struct urtw_softc *sc = ifp->if_softc; 1537 1538 /* prevent management frames from being sent if we're not ready */ 1539 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1540 m_freem(m); 1541 ieee80211_free_node(ni); 1542 return ENETDOWN; 1543 } 1544 URTW_LOCK(sc); 1545 bf = urtw_getbuf(sc); 1546 if (bf == NULL) { 1547 ieee80211_free_node(ni); 1548 m_freem(m); 1549 URTW_UNLOCK(sc); 1550 return (ENOBUFS); /* XXX */ 1551 } 1552 1553 ifp->if_opackets++; 1554 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_LOW) != 0) { 1555 ieee80211_free_node(ni); 1556 ifp->if_oerrors++; 1557 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1558 URTW_UNLOCK(sc); 1559 return (EIO); 1560 } 1561 URTW_UNLOCK(sc); 1562 1563 sc->sc_txtimer = 5; 1564 return (0); 1565} 1566 1567static void 1568urtw_scan_start(struct ieee80211com *ic) 1569{ 1570 1571 /* XXX do nothing? */ 1572} 1573 1574static void 1575urtw_scan_end(struct ieee80211com *ic) 1576{ 1577 1578 /* XXX do nothing? */ 1579} 1580 1581static void 1582urtw_set_channel(struct ieee80211com *ic) 1583{ 1584 struct urtw_softc *sc = ic->ic_ifp->if_softc; 1585 struct ifnet *ifp = sc->sc_ifp; 1586 uint32_t data, orig; 1587 usb_error_t error; 1588 1589 /* 1590 * if the user set a channel explicitly using ifconfig(8) this function 1591 * can be called earlier than we're expected that in some cases the 1592 * initialization would be failed if setting a channel is called before 1593 * the init have done. 1594 */ 1595 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1596 return; 1597 1598 if (sc->sc_curchan != NULL && sc->sc_curchan == ic->ic_curchan) 1599 return; 1600 1601 URTW_LOCK(sc); 1602 1603 /* 1604 * during changing th channel we need to temporarily be disable 1605 * TX. 1606 */ 1607 urtw_read32_m(sc, URTW_TX_CONF, &orig); 1608 data = orig & ~URTW_TX_LOOPBACK_MASK; 1609 urtw_write32_m(sc, URTW_TX_CONF, data | URTW_TX_LOOPBACK_MAC); 1610 1611 error = sc->sc_rf_set_chan(sc, ieee80211_chan2ieee(ic, ic->ic_curchan)); 1612 if (error != 0) 1613 goto fail; 1614 usb_pause_mtx(&sc->sc_mtx, 10); 1615 urtw_write32_m(sc, URTW_TX_CONF, orig); 1616 1617 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1618 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1619 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 1620 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1621 1622fail: 1623 URTW_UNLOCK(sc); 1624 1625 sc->sc_curchan = ic->ic_curchan; 1626 1627 if (error != 0) 1628 device_printf(sc->sc_dev, "could not change the channel\n"); 1629} 1630 1631static void 1632urtw_update_mcast(struct ifnet *ifp) 1633{ 1634 1635 /* XXX do nothing? */ 1636} 1637 1638static int 1639urtw_tx_start(struct urtw_softc *sc, struct ieee80211_node *ni, struct mbuf *m0, 1640 struct urtw_data *data, int prior) 1641{ 1642 struct ifnet *ifp = sc->sc_ifp; 1643 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 1644 struct ieee80211_key *k; 1645 const struct ieee80211_txparam *tp; 1646 struct ieee80211com *ic = ifp->if_l2com; 1647 struct ieee80211vap *vap = ni->ni_vap; 1648 struct usb_xfer *rtl8187b_pipes[URTW_8187B_TXPIPE_MAX] = { 1649 sc->sc_xfer[URTW_8187B_BULK_TX_BE], 1650 sc->sc_xfer[URTW_8187B_BULK_TX_BK], 1651 sc->sc_xfer[URTW_8187B_BULK_TX_VI], 1652 sc->sc_xfer[URTW_8187B_BULK_TX_VO] 1653 }; 1654 struct usb_xfer *xfer; 1655 int dur = 0, rtsdur = 0, rtsenable = 0, ctsenable = 0, rate, 1656 pkttime = 0, txdur = 0, isshort = 0, xferlen; 1657 uint16_t acktime, rtstime, ctstime; 1658 uint32_t flags; 1659 usb_error_t error; 1660 1661 URTW_ASSERT_LOCKED(sc); 1662 1663 /* 1664 * Software crypto. 1665 */ 1666 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1667 k = ieee80211_crypto_encap(ni, m0); 1668 if (k == NULL) { 1669 device_printf(sc->sc_dev, 1670 "ieee80211_crypto_encap returns NULL.\n"); 1671 /* XXX we don't expect the fragmented frames */ 1672 m_freem(m0); 1673 return (ENOBUFS); 1674 } 1675 1676 /* in case packet header moved, reset pointer */ 1677 wh = mtod(m0, struct ieee80211_frame *); 1678 } 1679 1680 if (ieee80211_radiotap_active_vap(vap)) { 1681 struct urtw_tx_radiotap_header *tap = &sc->sc_txtap; 1682 1683 /* XXX Are variables correct? */ 1684 tap->wt_flags = 0; 1685 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1686 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1687 1688 ieee80211_radiotap_tx(vap, m0); 1689 } 1690 1691 if ((wh->i_fc[10] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_MGT || 1692 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_CTL) { 1693 tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)]; 1694 rate = tp->mgmtrate; 1695 } else { 1696 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1697 /* for data frames */ 1698 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1699 rate = tp->mcastrate; 1700 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 1701 rate = tp->ucastrate; 1702 else 1703 rate = urtw_rtl2rate(sc->sc_currate); 1704 } 1705 1706 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1707 txdur = pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1708 IEEE80211_CRC_LEN, rate, 0, 0); 1709 else { 1710 acktime = urtw_compute_txtime(14, 2,0, 0); 1711 if ((m0->m_pkthdr.len + 4) > vap->iv_rtsthreshold) { 1712 rtsenable = 1; 1713 ctsenable = 0; 1714 rtstime = urtw_compute_txtime(URTW_ACKCTS_LEN, 2, 0, 0); 1715 ctstime = urtw_compute_txtime(14, 2, 0, 0); 1716 pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1717 IEEE80211_CRC_LEN, rate, 0, isshort); 1718 rtsdur = ctstime + pkttime + acktime + 1719 3 * URTW_ASIFS_TIME; 1720 txdur = rtstime + rtsdur; 1721 } else { 1722 rtsenable = ctsenable = rtsdur = 0; 1723 pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1724 IEEE80211_CRC_LEN, rate, 0, isshort); 1725 txdur = pkttime + URTW_ASIFS_TIME + acktime; 1726 } 1727 1728 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1729 dur = urtw_compute_txtime(m0->m_pkthdr.len + 1730 IEEE80211_CRC_LEN, rate, 0, isshort) + 1731 3 * URTW_ASIFS_TIME + 1732 2 * acktime; 1733 else 1734 dur = URTW_ASIFS_TIME + acktime; 1735 } 1736 *(uint16_t *)wh->i_dur = htole16(dur); 1737 1738 xferlen = m0->m_pkthdr.len; 1739 xferlen += (sc->sc_flags & URTW_RTL8187B) ? (4 * 8) : (4 * 3); 1740 if ((0 == xferlen % 64) || (0 == xferlen % 512)) 1741 xferlen += 1; 1742 1743 bzero(data->buf, URTW_TX_MAXSIZE); 1744 flags = m0->m_pkthdr.len & 0xfff; 1745 flags |= URTW_TX_FLAG_NO_ENC; 1746 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1747 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE) && 1748 (sc->sc_preamble_mode == URTW_PREAMBLE_MODE_SHORT) && 1749 (sc->sc_currate != 0)) 1750 flags |= URTW_TX_FLAG_SPLCP; 1751 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1752 flags |= URTW_TX_FLAG_MOREFRAG; 1753 1754 flags |= (sc->sc_currate & 0xf) << URTW_TX_FLAG_TXRATE_SHIFT; 1755 1756 if (sc->sc_flags & URTW_RTL8187B) { 1757 struct urtw_8187b_txhdr *tx; 1758 1759 tx = (struct urtw_8187b_txhdr *)data->buf; 1760 if (ctsenable) 1761 flags |= URTW_TX_FLAG_CTS; 1762 if (rtsenable) { 1763 flags |= URTW_TX_FLAG_RTS; 1764 flags |= (urtw_rate2rtl(11) & 0xf) << 1765 URTW_TX_FLAG_RTSRATE_SHIFT; 1766 tx->rtsdur = rtsdur; 1767 } 1768 tx->flag = htole32(flags); 1769 tx->txdur = txdur; 1770 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1771 IEEE80211_FC0_TYPE_MGT && 1772 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1773 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1774 tx->retry = 1; 1775 else 1776 tx->retry = URTW_TX_MAXRETRY; 1777 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1)); 1778 } else { 1779 struct urtw_8187l_txhdr *tx; 1780 1781 tx = (struct urtw_8187l_txhdr *)data->buf; 1782 if (rtsenable) { 1783 flags |= URTW_TX_FLAG_RTS; 1784 tx->rtsdur = rtsdur; 1785 } 1786 flags |= (urtw_rate2rtl(11) & 0xf) << URTW_TX_FLAG_RTSRATE_SHIFT; 1787 tx->flag = htole32(flags); 1788 tx->retry = 3; /* CW minimum */ 1789 tx->retry = 7 << 4; /* CW maximum */ 1790 tx->retry = URTW_TX_MAXRETRY << 8; /* retry limitation */ 1791 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1)); 1792 } 1793 1794 data->buflen = xferlen; 1795 data->ni = ni; 1796 data->m = m0; 1797 1798 if (sc->sc_flags & URTW_RTL8187B) { 1799 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1800 case IEEE80211_FC0_TYPE_CTL: 1801 case IEEE80211_FC0_TYPE_MGT: 1802 xfer = sc->sc_xfer[URTW_8187B_BULK_TX_EP12]; 1803 break; 1804 default: 1805 KASSERT(M_WME_GETAC(m0) < URTW_8187B_TXPIPE_MAX, 1806 ("unsupported WME pipe %d", M_WME_GETAC(m0))); 1807 xfer = rtl8187b_pipes[M_WME_GETAC(m0)]; 1808 break; 1809 } 1810 } else 1811 xfer = (prior == URTW_PRIORITY_LOW) ? 1812 sc->sc_xfer[URTW_8187L_BULK_TX_LOW] : 1813 sc->sc_xfer[URTW_8187L_BULK_TX_NORMAL]; 1814 1815 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 1816 usbd_transfer_start(xfer); 1817 1818 error = urtw_led_ctl(sc, URTW_LED_CTL_TX); 1819 if (error != 0) 1820 device_printf(sc->sc_dev, "could not control LED (%d)\n", 1821 error); 1822 return (0); 1823} 1824 1825static int 1826urtw_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1827{ 1828 struct ieee80211_node *ni = vap->iv_bss; 1829 struct ieee80211com *ic = vap->iv_ic; 1830 struct urtw_softc *sc = ic->ic_ifp->if_softc; 1831 struct urtw_vap *uvp = URTW_VAP(vap); 1832 usb_error_t error = 0; 1833 1834 DPRINTF(sc, URTW_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1835 ieee80211_state_name[vap->iv_state], 1836 ieee80211_state_name[nstate]); 1837 1838 sc->sc_state = nstate; 1839 1840 IEEE80211_UNLOCK(ic); 1841 URTW_LOCK(sc); 1842 usb_callout_stop(&sc->sc_led_ch); 1843 callout_stop(&sc->sc_watchdog_ch); 1844 1845 switch (nstate) { 1846 case IEEE80211_S_INIT: 1847 case IEEE80211_S_SCAN: 1848 case IEEE80211_S_AUTH: 1849 case IEEE80211_S_ASSOC: 1850 break; 1851 case IEEE80211_S_RUN: 1852 /* setting bssid. */ 1853 urtw_write32_m(sc, URTW_BSSID, ((uint32_t *)ni->ni_bssid)[0]); 1854 urtw_write16_m(sc, URTW_BSSID + 4, 1855 ((uint16_t *)ni->ni_bssid)[2]); 1856 urtw_update_msr(sc); 1857 /* XXX maybe the below would be incorrect. */ 1858 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1859 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1860 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 0x64); 1861 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1862 error = urtw_led_ctl(sc, URTW_LED_CTL_LINK); 1863 if (error != 0) 1864 device_printf(sc->sc_dev, 1865 "could not control LED (%d)\n", error); 1866 break; 1867 default: 1868 break; 1869 } 1870fail: 1871 URTW_UNLOCK(sc); 1872 IEEE80211_LOCK(ic); 1873 return (uvp->newstate(vap, nstate, arg)); 1874} 1875 1876static void 1877urtw_watchdog(void *arg) 1878{ 1879 struct urtw_softc *sc = arg; 1880 struct ifnet *ifp = sc->sc_ifp; 1881 1882 if (sc->sc_txtimer > 0) { 1883 if (--sc->sc_txtimer == 0) { 1884 device_printf(sc->sc_dev, "device timeout\n"); 1885 ifp->if_oerrors++; 1886 return; 1887 } 1888 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1889 } 1890} 1891 1892static void 1893urtw_set_multi(void *arg) 1894{ 1895 struct urtw_softc *sc = arg; 1896 struct ifnet *ifp = sc->sc_ifp; 1897 1898 if (!(ifp->if_flags & IFF_UP)) 1899 return; 1900 1901 /* 1902 * XXX don't know how to set a device. Lack of docs. Just try to set 1903 * IFF_ALLMULTI flag here. 1904 */ 1905 ifp->if_flags |= IFF_ALLMULTI; 1906} 1907 1908static usb_error_t 1909urtw_set_rate(struct urtw_softc *sc) 1910{ 1911 int i, basic_rate, min_rr_rate, max_rr_rate; 1912 uint16_t data; 1913 usb_error_t error; 1914 1915 basic_rate = urtw_rate2rtl(48); 1916 min_rr_rate = urtw_rate2rtl(12); 1917 max_rr_rate = urtw_rate2rtl(48); 1918 1919 urtw_write8_m(sc, URTW_RESP_RATE, 1920 max_rr_rate << URTW_RESP_MAX_RATE_SHIFT | 1921 min_rr_rate << URTW_RESP_MIN_RATE_SHIFT); 1922 1923 urtw_read16_m(sc, URTW_BRSR, &data); 1924 data &= ~URTW_BRSR_MBR_8185; 1925 1926 for (i = 0; i <= basic_rate; i++) 1927 data |= (1 << i); 1928 1929 urtw_write16_m(sc, URTW_BRSR, data); 1930fail: 1931 return (error); 1932} 1933 1934static uint16_t 1935urtw_rate2rtl(int rate) 1936{ 1937#define N(a) (sizeof(a) / sizeof((a)[0])) 1938 int i; 1939 1940 for (i = 0; i < N(urtw_ratetable); i++) { 1941 if (rate == urtw_ratetable[i].reg) 1942 return urtw_ratetable[i].val; 1943 } 1944 1945 return (3); 1946#undef N 1947} 1948 1949static uint16_t 1950urtw_rtl2rate(int rate) 1951{ 1952#define N(a) (sizeof(a) / sizeof((a)[0])) 1953 int i; 1954 1955 for (i = 0; i < N(urtw_ratetable); i++) { 1956 if (rate == urtw_ratetable[i].val) 1957 return urtw_ratetable[i].reg; 1958 } 1959 1960 return (0); 1961#undef N 1962} 1963 1964static usb_error_t 1965urtw_update_msr(struct urtw_softc *sc) 1966{ 1967 struct ifnet *ifp = sc->sc_ifp; 1968 struct ieee80211com *ic = ifp->if_l2com; 1969 uint8_t data; 1970 usb_error_t error; 1971 1972 urtw_read8_m(sc, URTW_MSR, &data); 1973 data &= ~URTW_MSR_LINK_MASK; 1974 1975 if (sc->sc_state == IEEE80211_S_RUN) { 1976 switch (ic->ic_opmode) { 1977 case IEEE80211_M_STA: 1978 case IEEE80211_M_MONITOR: 1979 data |= URTW_MSR_LINK_STA; 1980 if (sc->sc_flags & URTW_RTL8187B) 1981 data |= URTW_MSR_LINK_ENEDCA; 1982 break; 1983 case IEEE80211_M_IBSS: 1984 data |= URTW_MSR_LINK_ADHOC; 1985 break; 1986 case IEEE80211_M_HOSTAP: 1987 data |= URTW_MSR_LINK_HOSTAP; 1988 break; 1989 default: 1990 panic("unsupported operation mode 0x%x\n", 1991 ic->ic_opmode); 1992 /* never reach */ 1993 } 1994 } else 1995 data |= URTW_MSR_LINK_NONE; 1996 1997 urtw_write8_m(sc, URTW_MSR, data); 1998fail: 1999 return (error); 2000} 2001 2002static usb_error_t 2003urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data) 2004{ 2005 struct usb_device_request req; 2006 usb_error_t error; 2007 2008 URTW_ASSERT_LOCKED(sc); 2009 2010 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2011 req.bRequest = URTW_8187_GETREGS_REQ; 2012 USETW(req.wValue, (val & 0xff) | 0xff00); 2013 USETW(req.wIndex, (val >> 8) & 0x3); 2014 USETW(req.wLength, sizeof(uint8_t)); 2015 2016 error = urtw_do_request(sc, &req, data); 2017 return (error); 2018} 2019 2020static usb_error_t 2021urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data) 2022{ 2023 struct usb_device_request req; 2024 usb_error_t error; 2025 2026 URTW_ASSERT_LOCKED(sc); 2027 2028 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2029 req.bRequest = URTW_8187_GETREGS_REQ; 2030 USETW(req.wValue, (val & 0xff) | 0xff00); 2031 USETW(req.wIndex, (val >> 8) & 0x3); 2032 USETW(req.wLength, sizeof(uint16_t)); 2033 2034 error = urtw_do_request(sc, &req, data); 2035 return (error); 2036} 2037 2038static usb_error_t 2039urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data) 2040{ 2041 struct usb_device_request req; 2042 usb_error_t error; 2043 2044 URTW_ASSERT_LOCKED(sc); 2045 2046 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2047 req.bRequest = URTW_8187_GETREGS_REQ; 2048 USETW(req.wValue, (val & 0xff) | 0xff00); 2049 USETW(req.wIndex, (val >> 8) & 0x3); 2050 USETW(req.wLength, sizeof(uint32_t)); 2051 2052 error = urtw_do_request(sc, &req, data); 2053 return (error); 2054} 2055 2056static usb_error_t 2057urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data) 2058{ 2059 struct usb_device_request req; 2060 2061 URTW_ASSERT_LOCKED(sc); 2062 2063 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2064 req.bRequest = URTW_8187_SETREGS_REQ; 2065 USETW(req.wValue, (val & 0xff) | 0xff00); 2066 USETW(req.wIndex, (val >> 8) & 0x3); 2067 USETW(req.wLength, sizeof(uint8_t)); 2068 2069 return (urtw_do_request(sc, &req, &data)); 2070} 2071 2072static usb_error_t 2073urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data) 2074{ 2075 struct usb_device_request req; 2076 2077 URTW_ASSERT_LOCKED(sc); 2078 2079 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2080 req.bRequest = URTW_8187_SETREGS_REQ; 2081 USETW(req.wValue, (val & 0xff) | 0xff00); 2082 USETW(req.wIndex, (val >> 8) & 0x3); 2083 USETW(req.wLength, sizeof(uint16_t)); 2084 2085 return (urtw_do_request(sc, &req, &data)); 2086} 2087 2088static usb_error_t 2089urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data) 2090{ 2091 struct usb_device_request req; 2092 2093 URTW_ASSERT_LOCKED(sc); 2094 2095 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2096 req.bRequest = URTW_8187_SETREGS_REQ; 2097 USETW(req.wValue, (val & 0xff) | 0xff00); 2098 USETW(req.wIndex, (val >> 8) & 0x3); 2099 USETW(req.wLength, sizeof(uint32_t)); 2100 2101 return (urtw_do_request(sc, &req, &data)); 2102} 2103 2104static usb_error_t 2105urtw_get_macaddr(struct urtw_softc *sc) 2106{ 2107 uint32_t data; 2108 usb_error_t error; 2109 2110 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data); 2111 if (error != 0) 2112 goto fail; 2113 sc->sc_bssid[0] = data & 0xff; 2114 sc->sc_bssid[1] = (data & 0xff00) >> 8; 2115 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data); 2116 if (error != 0) 2117 goto fail; 2118 sc->sc_bssid[2] = data & 0xff; 2119 sc->sc_bssid[3] = (data & 0xff00) >> 8; 2120 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data); 2121 if (error != 0) 2122 goto fail; 2123 sc->sc_bssid[4] = data & 0xff; 2124 sc->sc_bssid[5] = (data & 0xff00) >> 8; 2125fail: 2126 return (error); 2127} 2128 2129static usb_error_t 2130urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data) 2131{ 2132#define URTW_READCMD_LEN 3 2133 int addrlen, i; 2134 int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 }; 2135 usb_error_t error; 2136 2137 /* NB: make sure the buffer is initialized */ 2138 *data = 0; 2139 2140 /* enable EPROM programming */ 2141 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_PROGRAM_MODE); 2142 DELAY(URTW_EPROM_DELAY); 2143 2144 error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE); 2145 if (error != 0) 2146 goto fail; 2147 error = urtw_eprom_ck(sc); 2148 if (error != 0) 2149 goto fail; 2150 error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN); 2151 if (error != 0) 2152 goto fail; 2153 if (sc->sc_epromtype == URTW_EEPROM_93C56) { 2154 addrlen = 8; 2155 addrstr[0] = addr & (1 << 7); 2156 addrstr[1] = addr & (1 << 6); 2157 addrstr[2] = addr & (1 << 5); 2158 addrstr[3] = addr & (1 << 4); 2159 addrstr[4] = addr & (1 << 3); 2160 addrstr[5] = addr & (1 << 2); 2161 addrstr[6] = addr & (1 << 1); 2162 addrstr[7] = addr & (1 << 0); 2163 } else { 2164 addrlen=6; 2165 addrstr[0] = addr & (1 << 5); 2166 addrstr[1] = addr & (1 << 4); 2167 addrstr[2] = addr & (1 << 3); 2168 addrstr[3] = addr & (1 << 2); 2169 addrstr[4] = addr & (1 << 1); 2170 addrstr[5] = addr & (1 << 0); 2171 } 2172 error = urtw_eprom_sendbits(sc, addrstr, addrlen); 2173 if (error != 0) 2174 goto fail; 2175 2176 error = urtw_eprom_writebit(sc, 0); 2177 if (error != 0) 2178 goto fail; 2179 2180 for (i = 0; i < 16; i++) { 2181 error = urtw_eprom_ck(sc); 2182 if (error != 0) 2183 goto fail; 2184 error = urtw_eprom_readbit(sc, &data16); 2185 if (error != 0) 2186 goto fail; 2187 2188 (*data) |= (data16 << (15 - i)); 2189 } 2190 2191 error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE); 2192 if (error != 0) 2193 goto fail; 2194 error = urtw_eprom_ck(sc); 2195 if (error != 0) 2196 goto fail; 2197 2198 /* now disable EPROM programming */ 2199 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE); 2200fail: 2201 return (error); 2202#undef URTW_READCMD_LEN 2203} 2204 2205static usb_error_t 2206urtw_eprom_cs(struct urtw_softc *sc, int able) 2207{ 2208 uint8_t data; 2209 usb_error_t error; 2210 2211 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2212 if (able == URTW_EPROM_ENABLE) 2213 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CS); 2214 else 2215 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CS); 2216 DELAY(URTW_EPROM_DELAY); 2217fail: 2218 return (error); 2219} 2220 2221static usb_error_t 2222urtw_eprom_ck(struct urtw_softc *sc) 2223{ 2224 uint8_t data; 2225 usb_error_t error; 2226 2227 /* masking */ 2228 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2229 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK); 2230 DELAY(URTW_EPROM_DELAY); 2231 /* unmasking */ 2232 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2233 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK); 2234 DELAY(URTW_EPROM_DELAY); 2235fail: 2236 return (error); 2237} 2238 2239static usb_error_t 2240urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data) 2241{ 2242 uint8_t data8; 2243 usb_error_t error; 2244 2245 urtw_read8_m(sc, URTW_EPROM_CMD, &data8); 2246 *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0; 2247 DELAY(URTW_EPROM_DELAY); 2248 2249fail: 2250 return (error); 2251} 2252 2253static usb_error_t 2254urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit) 2255{ 2256 uint8_t data; 2257 usb_error_t error; 2258 2259 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2260 if (bit != 0) 2261 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_WRITEBIT); 2262 else 2263 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_WRITEBIT); 2264 DELAY(URTW_EPROM_DELAY); 2265fail: 2266 return (error); 2267} 2268 2269static usb_error_t 2270urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen) 2271{ 2272 int i = 0; 2273 usb_error_t error = 0; 2274 2275 for (i = 0; i < buflen; i++) { 2276 error = urtw_eprom_writebit(sc, buf[i]); 2277 if (error != 0) 2278 goto fail; 2279 error = urtw_eprom_ck(sc); 2280 if (error != 0) 2281 goto fail; 2282 } 2283fail: 2284 return (error); 2285} 2286 2287 2288static usb_error_t 2289urtw_get_txpwr(struct urtw_softc *sc) 2290{ 2291 int i, j; 2292 uint32_t data; 2293 usb_error_t error; 2294 2295 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW_BASE, &data); 2296 if (error != 0) 2297 goto fail; 2298 sc->sc_txpwr_cck_base = data & 0xf; 2299 sc->sc_txpwr_ofdm_base = (data >> 4) & 0xf; 2300 2301 for (i = 1, j = 0; i < 6; i += 2, j++) { 2302 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW0 + j, &data); 2303 if (error != 0) 2304 goto fail; 2305 sc->sc_txpwr_cck[i] = data & 0xf; 2306 sc->sc_txpwr_cck[i + 1] = (data & 0xf00) >> 8; 2307 sc->sc_txpwr_ofdm[i] = (data & 0xf0) >> 4; 2308 sc->sc_txpwr_ofdm[i + 1] = (data & 0xf000) >> 12; 2309 } 2310 for (i = 1, j = 0; i < 4; i += 2, j++) { 2311 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW1 + j, &data); 2312 if (error != 0) 2313 goto fail; 2314 sc->sc_txpwr_cck[i + 6] = data & 0xf; 2315 sc->sc_txpwr_cck[i + 6 + 1] = (data & 0xf00) >> 8; 2316 sc->sc_txpwr_ofdm[i + 6] = (data & 0xf0) >> 4; 2317 sc->sc_txpwr_ofdm[i + 6 + 1] = (data & 0xf000) >> 12; 2318 } 2319 if (sc->sc_flags & URTW_RTL8187B) { 2320 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2, &data); 2321 if (error != 0) 2322 goto fail; 2323 sc->sc_txpwr_cck[1 + 6 + 4] = data & 0xf; 2324 sc->sc_txpwr_ofdm[1 + 6 + 4] = (data & 0xf0) >> 4; 2325 error = urtw_eprom_read32(sc, 0x0a, &data); 2326 if (error != 0) 2327 goto fail; 2328 sc->sc_txpwr_cck[2 + 6 + 4] = data & 0xf; 2329 sc->sc_txpwr_ofdm[2 + 6 + 4] = (data & 0xf0) >> 4; 2330 error = urtw_eprom_read32(sc, 0x1c, &data); 2331 if (error != 0) 2332 goto fail; 2333 sc->sc_txpwr_cck[3 + 6 + 4] = data & 0xf; 2334 sc->sc_txpwr_cck[3 + 6 + 4 + 1] = (data & 0xf00) >> 8; 2335 sc->sc_txpwr_ofdm[3 + 6 + 4] = (data & 0xf0) >> 4; 2336 sc->sc_txpwr_ofdm[3 + 6 + 4 + 1] = (data & 0xf000) >> 12; 2337 } else { 2338 for (i = 1, j = 0; i < 4; i += 2, j++) { 2339 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2 + j, 2340 &data); 2341 if (error != 0) 2342 goto fail; 2343 sc->sc_txpwr_cck[i + 6 + 4] = data & 0xf; 2344 sc->sc_txpwr_cck[i + 6 + 4 + 1] = (data & 0xf00) >> 8; 2345 sc->sc_txpwr_ofdm[i + 6 + 4] = (data & 0xf0) >> 4; 2346 sc->sc_txpwr_ofdm[i + 6 + 4 + 1] = (data & 0xf000) >> 12; 2347 } 2348 } 2349fail: 2350 return (error); 2351} 2352 2353 2354static usb_error_t 2355urtw_get_rfchip(struct urtw_softc *sc) 2356{ 2357 int ret; 2358 uint8_t data8; 2359 uint32_t data; 2360 usb_error_t error; 2361 2362 if (sc->sc_flags & URTW_RTL8187B) { 2363 urtw_read8_m(sc, 0xe1, &data8); 2364 switch (data8) { 2365 case 0: 2366 sc->sc_flags |= URTW_RTL8187B_REV_B; 2367 break; 2368 case 1: 2369 sc->sc_flags |= URTW_RTL8187B_REV_D; 2370 break; 2371 case 2: 2372 sc->sc_flags |= URTW_RTL8187B_REV_E; 2373 break; 2374 default: 2375 device_printf(sc->sc_dev, "unknown type: %#x\n", data8); 2376 sc->sc_flags |= URTW_RTL8187B_REV_B; 2377 break; 2378 } 2379 } else { 2380 urtw_read32_m(sc, URTW_TX_CONF, &data); 2381 switch (data & URTW_TX_HWMASK) { 2382 case URTW_TX_R8187vD_B: 2383 sc->sc_flags |= URTW_RTL8187B; 2384 break; 2385 case URTW_TX_R8187vD: 2386 break; 2387 default: 2388 device_printf(sc->sc_dev, "unknown RTL8187L type: %#x\n", 2389 data & URTW_TX_HWMASK); 2390 break; 2391 } 2392 } 2393 2394 error = urtw_eprom_read32(sc, URTW_EPROM_RFCHIPID, &data); 2395 if (error != 0) 2396 goto fail; 2397 switch (data & 0xff) { 2398 case URTW_EPROM_RFCHIPID_RTL8225U: 2399 error = urtw_8225_isv2(sc, &ret); 2400 if (error != 0) 2401 goto fail; 2402 if (ret == 0) { 2403 sc->sc_rf_init = urtw_8225_rf_init; 2404 sc->sc_rf_set_sens = urtw_8225_rf_set_sens; 2405 sc->sc_rf_set_chan = urtw_8225_rf_set_chan; 2406 sc->sc_rf_stop = urtw_8225_rf_stop; 2407 } else { 2408 sc->sc_rf_init = urtw_8225v2_rf_init; 2409 sc->sc_rf_set_chan = urtw_8225v2_rf_set_chan; 2410 sc->sc_rf_stop = urtw_8225_rf_stop; 2411 } 2412 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2413 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2414 break; 2415 case URTW_EPROM_RFCHIPID_RTL8225Z2: 2416 sc->sc_rf_init = urtw_8225v2b_rf_init; 2417 sc->sc_rf_set_chan = urtw_8225v2b_rf_set_chan; 2418 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2419 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2420 sc->sc_rf_stop = urtw_8225_rf_stop; 2421 break; 2422 default: 2423 panic("unsupported RF chip %d\n", data & 0xff); 2424 /* never reach */ 2425 } 2426 2427 device_printf(sc->sc_dev, "%s rf %s hwrev %s\n", 2428 (sc->sc_flags & URTW_RTL8187B) ? "rtl8187b" : "rtl8187l", 2429 ((data & 0xff) == URTW_EPROM_RFCHIPID_RTL8225U) ? "rtl8225u" : 2430 "rtl8225z2", 2431 (sc->sc_flags & URTW_RTL8187B) ? ((data8 == 0) ? "b" : 2432 (data8 == 1) ? "d" : "e") : "none"); 2433 2434fail: 2435 return (error); 2436} 2437 2438 2439static usb_error_t 2440urtw_led_init(struct urtw_softc *sc) 2441{ 2442 uint32_t rev; 2443 usb_error_t error; 2444 2445 urtw_read8_m(sc, URTW_PSR, &sc->sc_psr); 2446 error = urtw_eprom_read32(sc, URTW_EPROM_SWREV, &rev); 2447 if (error != 0) 2448 goto fail; 2449 2450 switch (rev & URTW_EPROM_CID_MASK) { 2451 case URTW_EPROM_CID_ALPHA0: 2452 sc->sc_strategy = URTW_SW_LED_MODE1; 2453 break; 2454 case URTW_EPROM_CID_SERCOMM_PS: 2455 sc->sc_strategy = URTW_SW_LED_MODE3; 2456 break; 2457 case URTW_EPROM_CID_HW_LED: 2458 sc->sc_strategy = URTW_HW_LED; 2459 break; 2460 case URTW_EPROM_CID_RSVD0: 2461 case URTW_EPROM_CID_RSVD1: 2462 default: 2463 sc->sc_strategy = URTW_SW_LED_MODE0; 2464 break; 2465 } 2466 2467 sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0; 2468 2469fail: 2470 return (error); 2471} 2472 2473 2474static usb_error_t 2475urtw_8225_rf_init(struct urtw_softc *sc) 2476{ 2477#define N(a) (sizeof(a) / sizeof((a)[0])) 2478 int i; 2479 uint16_t data; 2480 usb_error_t error; 2481 2482 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2483 if (error) 2484 goto fail; 2485 2486 error = urtw_8225_usb_init(sc); 2487 if (error) 2488 goto fail; 2489 2490 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2491 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2492 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2493 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2494 2495 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2496 if (error) 2497 goto fail; 2498 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2499 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2500 if (error) 2501 goto fail; 2502 2503 error = urtw_8185_rf_pins_enable(sc); 2504 if (error) 2505 goto fail; 2506 usb_pause_mtx(&sc->sc_mtx, 1000); 2507 2508 for (i = 0; i < N(urtw_8225_rf_part1); i++) { 2509 urtw_8225_write(sc, urtw_8225_rf_part1[i].reg, 2510 urtw_8225_rf_part1[i].val); 2511 usb_pause_mtx(&sc->sc_mtx, 1); 2512 } 2513 usb_pause_mtx(&sc->sc_mtx, 100); 2514 urtw_8225_write(sc, 2515 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2516 usb_pause_mtx(&sc->sc_mtx, 200); 2517 urtw_8225_write(sc, 2518 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2519 usb_pause_mtx(&sc->sc_mtx, 200); 2520 urtw_8225_write(sc, 2521 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC3); 2522 2523 for (i = 0; i < 95; i++) { 2524 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2525 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, urtw_8225_rxgain[i]); 2526 } 2527 2528 urtw_8225_write(sc, 2529 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC4); 2530 urtw_8225_write(sc, 2531 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC5); 2532 2533 for (i = 0; i < 128; i++) { 2534 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2535 usb_pause_mtx(&sc->sc_mtx, 1); 2536 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2537 usb_pause_mtx(&sc->sc_mtx, 1); 2538 } 2539 2540 for (i = 0; i < N(urtw_8225_rf_part2); i++) { 2541 urtw_8187_write_phy_ofdm(sc, urtw_8225_rf_part2[i].reg, 2542 urtw_8225_rf_part2[i].val); 2543 usb_pause_mtx(&sc->sc_mtx, 1); 2544 } 2545 2546 error = urtw_8225_setgain(sc, 4); 2547 if (error) 2548 goto fail; 2549 2550 for (i = 0; i < N(urtw_8225_rf_part3); i++) { 2551 urtw_8187_write_phy_cck(sc, urtw_8225_rf_part3[i].reg, 2552 urtw_8225_rf_part3[i].val); 2553 usb_pause_mtx(&sc->sc_mtx, 1); 2554 } 2555 2556 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2557 2558 error = urtw_8225_set_txpwrlvl(sc, 1); 2559 if (error) 2560 goto fail; 2561 2562 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2563 usb_pause_mtx(&sc->sc_mtx, 1); 2564 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2565 usb_pause_mtx(&sc->sc_mtx, 1); 2566 2567 /* TX ant A, 0x0 for B */ 2568 error = urtw_8185_tx_antenna(sc, 0x3); 2569 if (error) 2570 goto fail; 2571 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2572 2573 error = urtw_8225_rf_set_chan(sc, 1); 2574fail: 2575 return (error); 2576#undef N 2577} 2578 2579static usb_error_t 2580urtw_8185_rf_pins_enable(struct urtw_softc *sc) 2581{ 2582 usb_error_t error = 0; 2583 2584 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1ff7); 2585fail: 2586 return (error); 2587} 2588 2589static usb_error_t 2590urtw_8185_tx_antenna(struct urtw_softc *sc, uint8_t ant) 2591{ 2592 usb_error_t error; 2593 2594 urtw_write8_m(sc, URTW_TX_ANTENNA, ant); 2595 usb_pause_mtx(&sc->sc_mtx, 1); 2596fail: 2597 return (error); 2598} 2599 2600static usb_error_t 2601urtw_8187_write_phy_ofdm_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2602{ 2603 2604 data = data & 0xff; 2605 return urtw_8187_write_phy(sc, addr, data); 2606} 2607 2608static usb_error_t 2609urtw_8187_write_phy_cck_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2610{ 2611 2612 data = data & 0xff; 2613 return urtw_8187_write_phy(sc, addr, data | 0x10000); 2614} 2615 2616static usb_error_t 2617urtw_8187_write_phy(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2618{ 2619 uint32_t phyw; 2620 usb_error_t error; 2621 2622 phyw = ((data << 8) | (addr | 0x80)); 2623 urtw_write8_m(sc, URTW_PHY_MAGIC4, ((phyw & 0xff000000) >> 24)); 2624 urtw_write8_m(sc, URTW_PHY_MAGIC3, ((phyw & 0x00ff0000) >> 16)); 2625 urtw_write8_m(sc, URTW_PHY_MAGIC2, ((phyw & 0x0000ff00) >> 8)); 2626 urtw_write8_m(sc, URTW_PHY_MAGIC1, ((phyw & 0x000000ff))); 2627 usb_pause_mtx(&sc->sc_mtx, 1); 2628fail: 2629 return (error); 2630} 2631 2632static usb_error_t 2633urtw_8225_setgain(struct urtw_softc *sc, int16_t gain) 2634{ 2635 usb_error_t error; 2636 2637 urtw_8187_write_phy_ofdm(sc, 0x0d, urtw_8225_gain[gain * 4]); 2638 urtw_8187_write_phy_ofdm(sc, 0x1b, urtw_8225_gain[gain * 4 + 2]); 2639 urtw_8187_write_phy_ofdm(sc, 0x1d, urtw_8225_gain[gain * 4 + 3]); 2640 urtw_8187_write_phy_ofdm(sc, 0x23, urtw_8225_gain[gain * 4 + 1]); 2641fail: 2642 return (error); 2643} 2644 2645static usb_error_t 2646urtw_8225_usb_init(struct urtw_softc *sc) 2647{ 2648 uint8_t data; 2649 usb_error_t error; 2650 2651 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 0); 2652 urtw_write8_m(sc, URTW_GPIO, 0); 2653 error = urtw_read8e(sc, 0x53, &data); 2654 if (error) 2655 goto fail; 2656 error = urtw_write8e(sc, 0x53, data | (1 << 7)); 2657 if (error) 2658 goto fail; 2659 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 4); 2660 urtw_write8_m(sc, URTW_GPIO, 0x20); 2661 urtw_write8_m(sc, URTW_GP_ENABLE, 0); 2662 2663 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x80); 2664 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x80); 2665 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x80); 2666 2667 usb_pause_mtx(&sc->sc_mtx, 500); 2668fail: 2669 return (error); 2670} 2671 2672static usb_error_t 2673urtw_8225_write_c(struct urtw_softc *sc, uint8_t addr, uint16_t data) 2674{ 2675 uint16_t d80, d82, d84; 2676 usb_error_t error; 2677 2678 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &d80); 2679 d80 &= URTW_RF_PINS_MAGIC1; 2680 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &d82); 2681 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &d84); 2682 d84 &= URTW_RF_PINS_MAGIC2; 2683 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, d82 | URTW_RF_PINS_MAGIC3); 2684 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84 | URTW_RF_PINS_MAGIC3); 2685 DELAY(10); 2686 2687 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2688 DELAY(2); 2689 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80); 2690 DELAY(10); 2691 2692 error = urtw_8225_write_s16(sc, addr, 0x8225, &data); 2693 if (error != 0) 2694 goto fail; 2695 2696 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2697 DELAY(10); 2698 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2699 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84); 2700 usb_pause_mtx(&sc->sc_mtx, 2); 2701fail: 2702 return (error); 2703} 2704 2705/* XXX why we should allocalte memory buffer instead of using memory stack? */ 2706static usb_error_t 2707urtw_8225_write_s16(struct urtw_softc *sc, uint8_t addr, int index, 2708 uint16_t *data) 2709{ 2710 uint8_t *buf; 2711 uint16_t data16; 2712 struct usb_device_request *req; 2713 usb_error_t error = 0; 2714 2715 data16 = *data; 2716 req = (usb_device_request_t *)malloc(sizeof(usb_device_request_t), 2717 M_80211_VAP, M_NOWAIT | M_ZERO); 2718 if (req == NULL) { 2719 device_printf(sc->sc_dev, "could not allocate a memory\n"); 2720 goto fail0; 2721 } 2722 buf = (uint8_t *)malloc(2, M_80211_VAP, M_NOWAIT | M_ZERO); 2723 if (req == NULL) { 2724 device_printf(sc->sc_dev, "could not allocate a memory\n"); 2725 goto fail1; 2726 } 2727 2728 req->bmRequestType = UT_WRITE_VENDOR_DEVICE; 2729 req->bRequest = URTW_8187_SETREGS_REQ; 2730 USETW(req->wValue, addr); 2731 USETW(req->wIndex, index); 2732 USETW(req->wLength, sizeof(uint16_t)); 2733 buf[0] = (data16 & 0x00ff); 2734 buf[1] = (data16 & 0xff00) >> 8; 2735 2736 error = urtw_do_request(sc, req, buf); 2737 2738 free(buf, M_80211_VAP); 2739fail1: free(req, M_80211_VAP); 2740fail0: return (error); 2741} 2742 2743static usb_error_t 2744urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan) 2745{ 2746 usb_error_t error; 2747 2748 error = urtw_8225_set_txpwrlvl(sc, chan); 2749 if (error) 2750 goto fail; 2751 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 2752 usb_pause_mtx(&sc->sc_mtx, 10); 2753fail: 2754 return (error); 2755} 2756 2757static usb_error_t 2758urtw_8225_rf_set_sens(struct urtw_softc *sc, int sens) 2759{ 2760 usb_error_t error; 2761 2762 if (sens < 0 || sens > 6) 2763 return -1; 2764 2765 if (sens > 4) 2766 urtw_8225_write(sc, 2767 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC1); 2768 else 2769 urtw_8225_write(sc, 2770 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC2); 2771 2772 sens = 6 - sens; 2773 error = urtw_8225_setgain(sc, sens); 2774 if (error) 2775 goto fail; 2776 2777 urtw_8187_write_phy_cck(sc, 0x41, urtw_8225_threshold[sens]); 2778 2779fail: 2780 return (error); 2781} 2782 2783static usb_error_t 2784urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan) 2785{ 2786 int i, idx, set; 2787 uint8_t *cck_pwltable; 2788 uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max; 2789 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 2790 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 2791 usb_error_t error; 2792 2793 cck_pwrlvl_max = 11; 2794 ofdm_pwrlvl_max = 25; /* 12 -> 25 */ 2795 ofdm_pwrlvl_min = 10; 2796 2797 /* CCK power setting */ 2798 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 2799 idx = cck_pwrlvl % 6; 2800 set = cck_pwrlvl / 6; 2801 cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 : 2802 urtw_8225_txpwr_cck; 2803 2804 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 2805 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2806 for (i = 0; i < 8; i++) { 2807 urtw_8187_write_phy_cck(sc, 0x44 + i, 2808 cck_pwltable[idx * 8 + i]); 2809 } 2810 usb_pause_mtx(&sc->sc_mtx, 1); 2811 2812 /* OFDM power setting */ 2813 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 2814 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 2815 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 2816 2817 idx = ofdm_pwrlvl % 6; 2818 set = ofdm_pwrlvl / 6; 2819 2820 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 2821 if (error) 2822 goto fail; 2823 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 2824 urtw_8187_write_phy_ofdm(sc, 6, 0); 2825 urtw_8187_write_phy_ofdm(sc, 8, 0); 2826 2827 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 2828 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2829 urtw_8187_write_phy_ofdm(sc, 0x5, urtw_8225_txpwr_ofdm[idx]); 2830 urtw_8187_write_phy_ofdm(sc, 0x7, urtw_8225_txpwr_ofdm[idx]); 2831 usb_pause_mtx(&sc->sc_mtx, 1); 2832fail: 2833 return (error); 2834} 2835 2836 2837static usb_error_t 2838urtw_8225_rf_stop(struct urtw_softc *sc) 2839{ 2840 uint8_t data; 2841 usb_error_t error; 2842 2843 urtw_8225_write(sc, 0x4, 0x1f); 2844 2845 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2846 if (error) 2847 goto fail; 2848 2849 urtw_read8_m(sc, URTW_CONFIG3, &data); 2850 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 2851 if (sc->sc_flags & URTW_RTL8187B) { 2852 urtw_write32_m(sc, URTW_ANAPARAM2, 2853 URTW_8187B_8225_ANAPARAM2_OFF); 2854 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_OFF); 2855 urtw_write32_m(sc, URTW_ANAPARAM3, 2856 URTW_8187B_8225_ANAPARAM3_OFF); 2857 } else { 2858 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8225_ANAPARAM2_OFF); 2859 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8225_ANAPARAM_OFF); 2860 } 2861 2862 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 2863 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2864 if (error) 2865 goto fail; 2866 2867fail: 2868 return (error); 2869} 2870 2871static usb_error_t 2872urtw_8225v2_rf_init(struct urtw_softc *sc) 2873{ 2874#define N(a) (sizeof(a) / sizeof((a)[0])) 2875 int i; 2876 uint16_t data; 2877 uint32_t data32; 2878 usb_error_t error; 2879 2880 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2881 if (error) 2882 goto fail; 2883 2884 error = urtw_8225_usb_init(sc); 2885 if (error) 2886 goto fail; 2887 2888 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2889 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2890 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2891 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2892 2893 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2894 if (error) 2895 goto fail; 2896 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2897 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2898 if (error) 2899 goto fail; 2900 2901 error = urtw_8185_rf_pins_enable(sc); 2902 if (error) 2903 goto fail; 2904 2905 usb_pause_mtx(&sc->sc_mtx, 500); 2906 2907 for (i = 0; i < N(urtw_8225v2_rf_part1); i++) { 2908 urtw_8225_write(sc, urtw_8225v2_rf_part1[i].reg, 2909 urtw_8225v2_rf_part1[i].val); 2910 } 2911 usb_pause_mtx(&sc->sc_mtx, 50); 2912 2913 urtw_8225_write(sc, 2914 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 2915 2916 for (i = 0; i < 95; i++) { 2917 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2918 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 2919 urtw_8225v2_rxgain[i]); 2920 } 2921 2922 urtw_8225_write(sc, 2923 URTW_8225_ADDR_3_MAGIC, URTW_8225_ADDR_3_DATA_MAGIC1); 2924 urtw_8225_write(sc, 2925 URTW_8225_ADDR_5_MAGIC, URTW_8225_ADDR_5_DATA_MAGIC1); 2926 urtw_8225_write(sc, 2927 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC2); 2928 urtw_8225_write(sc, 2929 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2930 usb_pause_mtx(&sc->sc_mtx, 100); 2931 urtw_8225_write(sc, 2932 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2933 usb_pause_mtx(&sc->sc_mtx, 100); 2934 2935 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2936 if (error != 0) 2937 goto fail; 2938 if (data32 != URTW_8225_ADDR_6_DATA_MAGIC1) 2939 device_printf(sc->sc_dev, "expect 0xe6!! (0x%x)\n", data32); 2940 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) { 2941 urtw_8225_write(sc, 2942 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2943 usb_pause_mtx(&sc->sc_mtx, 100); 2944 urtw_8225_write(sc, 2945 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2946 usb_pause_mtx(&sc->sc_mtx, 50); 2947 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2948 if (error != 0) 2949 goto fail; 2950 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) 2951 device_printf(sc->sc_dev, "RF calibration failed\n"); 2952 } 2953 usb_pause_mtx(&sc->sc_mtx, 100); 2954 2955 urtw_8225_write(sc, 2956 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC6); 2957 for (i = 0; i < 128; i++) { 2958 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2959 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2960 } 2961 2962 for (i = 0; i < N(urtw_8225v2_rf_part2); i++) { 2963 urtw_8187_write_phy_ofdm(sc, urtw_8225v2_rf_part2[i].reg, 2964 urtw_8225v2_rf_part2[i].val); 2965 } 2966 2967 error = urtw_8225v2_setgain(sc, 4); 2968 if (error) 2969 goto fail; 2970 2971 for (i = 0; i < N(urtw_8225v2_rf_part3); i++) { 2972 urtw_8187_write_phy_cck(sc, urtw_8225v2_rf_part3[i].reg, 2973 urtw_8225v2_rf_part3[i].val); 2974 } 2975 2976 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2977 2978 error = urtw_8225v2_set_txpwrlvl(sc, 1); 2979 if (error) 2980 goto fail; 2981 2982 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2983 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2984 2985 /* TX ant A, 0x0 for B */ 2986 error = urtw_8185_tx_antenna(sc, 0x3); 2987 if (error) 2988 goto fail; 2989 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2990 2991 error = urtw_8225_rf_set_chan(sc, 1); 2992fail: 2993 return (error); 2994#undef N 2995} 2996 2997static usb_error_t 2998urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan) 2999{ 3000 usb_error_t error; 3001 3002 error = urtw_8225v2_set_txpwrlvl(sc, chan); 3003 if (error) 3004 goto fail; 3005 3006 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3007 usb_pause_mtx(&sc->sc_mtx, 10); 3008fail: 3009 return (error); 3010} 3011 3012static usb_error_t 3013urtw_8225_read(struct urtw_softc *sc, uint8_t addr, uint32_t *data) 3014{ 3015 int i; 3016 int16_t bit; 3017 uint8_t rlen = 12, wlen = 6; 3018 uint16_t o1, o2, o3, tmp; 3019 uint32_t d2w = ((uint32_t)(addr & 0x1f)) << 27; 3020 uint32_t mask = 0x80000000, value = 0; 3021 usb_error_t error; 3022 3023 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &o1); 3024 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &o2); 3025 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &o3); 3026 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2 | URTW_RF_PINS_MAGIC4); 3027 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3 | URTW_RF_PINS_MAGIC4); 3028 o1 &= ~URTW_RF_PINS_MAGIC4; 3029 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN); 3030 DELAY(5); 3031 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1); 3032 DELAY(5); 3033 3034 for (i = 0; i < (wlen / 2); i++, mask = mask >> 1) { 3035 bit = ((d2w & mask) != 0) ? 1 : 0; 3036 3037 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3038 DELAY(2); 3039 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3040 URTW_BB_HOST_BANG_CLK); 3041 DELAY(2); 3042 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3043 URTW_BB_HOST_BANG_CLK); 3044 DELAY(2); 3045 mask = mask >> 1; 3046 if (i == 2) 3047 break; 3048 bit = ((d2w & mask) != 0) ? 1 : 0; 3049 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3050 URTW_BB_HOST_BANG_CLK); 3051 DELAY(2); 3052 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3053 URTW_BB_HOST_BANG_CLK); 3054 DELAY(2); 3055 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3056 DELAY(1); 3057 } 3058 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW | 3059 URTW_BB_HOST_BANG_CLK); 3060 DELAY(2); 3061 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW); 3062 DELAY(2); 3063 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_RW); 3064 DELAY(2); 3065 3066 mask = 0x800; 3067 for (i = 0; i < rlen; i++, mask = mask >> 1) { 3068 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3069 o1 | URTW_BB_HOST_BANG_RW); 3070 DELAY(2); 3071 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3072 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3073 DELAY(2); 3074 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3075 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3076 DELAY(2); 3077 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3078 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3079 DELAY(2); 3080 3081 urtw_read16_m(sc, URTW_RF_PINS_INPUT, &tmp); 3082 value |= ((tmp & URTW_BB_HOST_BANG_CLK) ? mask : 0); 3083 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3084 o1 | URTW_BB_HOST_BANG_RW); 3085 DELAY(2); 3086 } 3087 3088 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN | 3089 URTW_BB_HOST_BANG_RW); 3090 DELAY(2); 3091 3092 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2); 3093 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3); 3094 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_OUTPUT_MAGIC1); 3095 3096 if (data != NULL) 3097 *data = value; 3098fail: 3099 return (error); 3100} 3101 3102 3103static usb_error_t 3104urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan) 3105{ 3106 int i; 3107 uint8_t *cck_pwrtable; 3108 uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10; 3109 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3110 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3111 usb_error_t error; 3112 3113 /* CCK power setting */ 3114 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 3115 cck_pwrlvl += sc->sc_txpwr_cck_base; 3116 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3117 cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 : 3118 urtw_8225v2_txpwr_cck; 3119 3120 for (i = 0; i < 8; i++) 3121 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3122 3123 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3124 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl]); 3125 usb_pause_mtx(&sc->sc_mtx, 1); 3126 3127 /* OFDM power setting */ 3128 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 3129 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 3130 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3131 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3132 3133 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3134 if (error) 3135 goto fail; 3136 3137 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 3138 urtw_8187_write_phy_ofdm(sc, 5, 0x0); 3139 urtw_8187_write_phy_ofdm(sc, 6, 0x40); 3140 urtw_8187_write_phy_ofdm(sc, 7, 0x0); 3141 urtw_8187_write_phy_ofdm(sc, 8, 0x40); 3142 3143 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3144 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]); 3145 usb_pause_mtx(&sc->sc_mtx, 1); 3146fail: 3147 return (error); 3148} 3149 3150static usb_error_t 3151urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain) 3152{ 3153 uint8_t *gainp; 3154 usb_error_t error; 3155 3156 /* XXX for A? */ 3157 gainp = urtw_8225v2_gain_bg; 3158 urtw_8187_write_phy_ofdm(sc, 0x0d, gainp[gain * 3]); 3159 usb_pause_mtx(&sc->sc_mtx, 1); 3160 urtw_8187_write_phy_ofdm(sc, 0x1b, gainp[gain * 3 + 1]); 3161 usb_pause_mtx(&sc->sc_mtx, 1); 3162 urtw_8187_write_phy_ofdm(sc, 0x1d, gainp[gain * 3 + 2]); 3163 usb_pause_mtx(&sc->sc_mtx, 1); 3164 urtw_8187_write_phy_ofdm(sc, 0x21, 0x17); 3165 usb_pause_mtx(&sc->sc_mtx, 1); 3166fail: 3167 return (error); 3168} 3169 3170static usb_error_t 3171urtw_8225_isv2(struct urtw_softc *sc, int *ret) 3172{ 3173 uint32_t data; 3174 usb_error_t error; 3175 3176 *ret = 1; 3177 3178 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_MAGIC5); 3179 urtw_write16_m(sc, URTW_RF_PINS_SELECT, URTW_RF_PINS_MAGIC5); 3180 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, URTW_RF_PINS_MAGIC5); 3181 usb_pause_mtx(&sc->sc_mtx, 500); 3182 3183 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3184 URTW_8225_ADDR_0_DATA_MAGIC1); 3185 3186 error = urtw_8225_read(sc, URTW_8225_ADDR_8_MAGIC, &data); 3187 if (error != 0) 3188 goto fail; 3189 if (data != URTW_8225_ADDR_8_DATA_MAGIC1) 3190 *ret = 0; 3191 else { 3192 error = urtw_8225_read(sc, URTW_8225_ADDR_9_MAGIC, &data); 3193 if (error != 0) 3194 goto fail; 3195 if (data != URTW_8225_ADDR_9_DATA_MAGIC1) 3196 *ret = 0; 3197 } 3198 3199 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3200 URTW_8225_ADDR_0_DATA_MAGIC2); 3201fail: 3202 return (error); 3203} 3204 3205static usb_error_t 3206urtw_8225v2b_rf_init(struct urtw_softc *sc) 3207{ 3208#define N(a) (sizeof(a) / sizeof((a)[0])) 3209 int i; 3210 uint8_t data8; 3211 usb_error_t error; 3212 3213 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3214 if (error) 3215 goto fail; 3216 3217 /* 3218 * initialize extra registers on 8187 3219 */ 3220 urtw_write16_m(sc, URTW_BRSR_8187B, 0xfff); 3221 3222 /* retry limit */ 3223 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3224 data8 |= URTW_CW_CONF_PERPACKET_RETRY; 3225 urtw_write8_m(sc, URTW_CW_CONF, data8); 3226 3227 /* TX AGC */ 3228 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3229 data8 |= URTW_TX_AGC_CTL_PERPACKET_GAIN; 3230 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3231 3232 /* Auto Rate Fallback Control */ 3233#define URTW_ARFR 0x1e0 3234 urtw_write16_m(sc, URTW_ARFR, 0xfff); 3235 urtw_read8_m(sc, URTW_RATE_FALLBACK, &data8); 3236 urtw_write8_m(sc, URTW_RATE_FALLBACK, 3237 data8 | URTW_RATE_FALLBACK_ENABLE); 3238 3239 urtw_read8_m(sc, URTW_MSR, &data8); 3240 urtw_write8_m(sc, URTW_MSR, data8 & 0xf3); 3241 urtw_read8_m(sc, URTW_MSR, &data8); 3242 urtw_write8_m(sc, URTW_MSR, data8 | URTW_MSR_LINK_ENEDCA); 3243 urtw_write8_m(sc, URTW_ACM_CONTROL, sc->sc_acmctl); 3244 3245 urtw_write16_m(sc, URTW_ATIM_WND, 2); 3246 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 3247#define URTW_FEMR_FOR_8187B 0x1d4 3248 urtw_write16_m(sc, URTW_FEMR_FOR_8187B, 0xffff); 3249 3250 /* led type */ 3251 urtw_read8_m(sc, URTW_CONFIG1, &data8); 3252 data8 = (data8 & 0x3f) | 0x80; 3253 urtw_write8_m(sc, URTW_CONFIG1, data8); 3254 3255 /* applying MAC address again. */ 3256 urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)sc->sc_bssid)[0]); 3257 urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)sc->sc_bssid)[1] & 0xffff); 3258 3259 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3260 if (error) 3261 goto fail; 3262 3263 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 3264 3265 /* 3266 * MAC configuration 3267 */ 3268 for (i = 0; i < N(urtw_8225v2b_rf_part1); i++) 3269 urtw_write8_m(sc, urtw_8225v2b_rf_part1[i].reg, 3270 urtw_8225v2b_rf_part1[i].val); 3271 urtw_write16_m(sc, URTW_TID_AC_MAP, 0xfa50); 3272 urtw_write16_m(sc, URTW_INT_MIG, 0x0000); 3273 urtw_write32_m(sc, 0x1f0, 0); 3274 urtw_write32_m(sc, 0x1f4, 0); 3275 urtw_write8_m(sc, 0x1f8, 0); 3276 urtw_write32_m(sc, URTW_RF_TIMING, 0x4001); 3277 3278#define URTW_RFSW_CTRL 0x272 3279 urtw_write16_m(sc, URTW_RFSW_CTRL, 0x569a); 3280 3281 /* 3282 * initialize PHY 3283 */ 3284 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3285 if (error) 3286 goto fail; 3287 urtw_read8_m(sc, URTW_CONFIG3, &data8); 3288 urtw_write8_m(sc, URTW_CONFIG3, 3289 data8 | URTW_CONFIG3_ANAPARAM_WRITE); 3290 3291 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3292 if (error) 3293 goto fail; 3294 3295 /* setup RFE initial timing */ 3296 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x0480); 3297 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x2488); 3298 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1fff); 3299 usb_pause_mtx(&sc->sc_mtx, 1100); 3300 3301 for (i = 0; i < N(urtw_8225v2b_rf_part0); i++) { 3302 urtw_8225_write(sc, urtw_8225v2b_rf_part0[i].reg, 3303 urtw_8225v2b_rf_part0[i].val); 3304 usb_pause_mtx(&sc->sc_mtx, 1); 3305 } 3306 urtw_8225_write(sc, 0x00, 0x01b7); 3307 3308 for (i = 0; i < 95; i++) { 3309 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 3310 usb_pause_mtx(&sc->sc_mtx, 1); 3311 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 3312 urtw_8225v2b_rxgain[i]); 3313 usb_pause_mtx(&sc->sc_mtx, 1); 3314 } 3315 3316 urtw_8225_write(sc, URTW_8225_ADDR_3_MAGIC, 0x080); 3317 usb_pause_mtx(&sc->sc_mtx, 1); 3318 urtw_8225_write(sc, URTW_8225_ADDR_5_MAGIC, 0x004); 3319 usb_pause_mtx(&sc->sc_mtx, 1); 3320 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x0b7); 3321 usb_pause_mtx(&sc->sc_mtx, 1); 3322 usb_pause_mtx(&sc->sc_mtx, 3000); 3323 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0xc4d); 3324 usb_pause_mtx(&sc->sc_mtx, 2000); 3325 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0x44d); 3326 usb_pause_mtx(&sc->sc_mtx, 1); 3327 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x2bf); 3328 usb_pause_mtx(&sc->sc_mtx, 1); 3329 3330 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 0x03); 3331 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 0x07); 3332 urtw_write8_m(sc, URTW_TX_ANTENNA, 0x03); 3333 3334 urtw_8187_write_phy_ofdm(sc, 0x80, 0x12); 3335 for (i = 0; i < 128; i++) { 3336 uint32_t addr, data; 3337 3338 data = (urtw_8225z2_agc[i] << 8) | 0x0000008f; 3339 addr = ((i + 0x80) << 8) | 0x0000008e; 3340 3341 urtw_8187_write_phy_ofdm(sc, data & 0x7f, (data >> 8) & 0xff); 3342 urtw_8187_write_phy_ofdm(sc, addr & 0x7f, (addr >> 8) & 0xff); 3343 urtw_8187_write_phy_ofdm(sc, 0x0e, 0x00); 3344 } 3345 urtw_8187_write_phy_ofdm(sc, 0x80, 0x10); 3346 3347 for (i = 0; i < N(urtw_8225v2b_rf_part2); i++) 3348 urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val); 3349 3350 urtw_write32_m(sc, URTW_8187B_AC_VO, (7 << 12) | (3 << 8) | 0x1c); 3351 urtw_write32_m(sc, URTW_8187B_AC_VI, (7 << 12) | (3 << 8) | 0x1c); 3352 urtw_write32_m(sc, URTW_8187B_AC_BE, (7 << 12) | (3 << 8) | 0x1c); 3353 urtw_write32_m(sc, URTW_8187B_AC_BK, (7 << 12) | (3 << 8) | 0x1c); 3354 3355 urtw_8187_write_phy_ofdm(sc, 0x97, 0x46); 3356 urtw_8187_write_phy_ofdm(sc, 0xa4, 0xb6); 3357 urtw_8187_write_phy_ofdm(sc, 0x85, 0xfc); 3358 urtw_8187_write_phy_cck(sc, 0xc1, 0x88); 3359 3360fail: 3361 return (error); 3362#undef N 3363} 3364 3365static usb_error_t 3366urtw_8225v2b_rf_set_chan(struct urtw_softc *sc, int chan) 3367{ 3368 usb_error_t error; 3369 3370 error = urtw_8225v2b_set_txpwrlvl(sc, chan); 3371 if (error) 3372 goto fail; 3373 3374 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3375 usb_pause_mtx(&sc->sc_mtx, 10); 3376fail: 3377 return (error); 3378} 3379 3380static usb_error_t 3381urtw_8225v2b_set_txpwrlvl(struct urtw_softc *sc, int chan) 3382{ 3383 int i; 3384 uint8_t *cck_pwrtable; 3385 uint8_t cck_pwrlvl_max = 15; 3386 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3387 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3388 usb_error_t error; 3389 3390 /* CCK power setting */ 3391 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? 3392 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? cck_pwrlvl_max : 22) : 3393 (cck_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 0 : 7)); 3394 cck_pwrlvl += sc->sc_txpwr_cck_base; 3395 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3396 cck_pwrtable = (chan == 14) ? urtw_8225v2b_txpwr_cck_ch14 : 3397 urtw_8225v2b_txpwr_cck; 3398 3399 if (sc->sc_flags & URTW_RTL8187B_REV_B) 3400 cck_pwrtable += (cck_pwrlvl <= 6) ? 0 : 3401 ((cck_pwrlvl <= 11) ? 8 : 16); 3402 else 3403 cck_pwrtable += (cck_pwrlvl <= 5) ? 0 : 3404 ((cck_pwrlvl <= 11) ? 8 : ((cck_pwrlvl <= 17) ? 16 : 24)); 3405 3406 for (i = 0; i < 8; i++) 3407 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3408 3409 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3410 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl] << 1); 3411 usb_pause_mtx(&sc->sc_mtx, 1); 3412 3413 /* OFDM power setting */ 3414 ofdm_pwrlvl = (ofdm_pwrlvl > 15) ? 3415 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 17 : 25) : 3416 (ofdm_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 2 : 10)); 3417 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3418 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3419 3420 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3421 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl] << 1); 3422 3423 if (sc->sc_flags & URTW_RTL8187B_REV_B) { 3424 if (ofdm_pwrlvl <= 11) { 3425 urtw_8187_write_phy_ofdm(sc, 0x87, 0x60); 3426 urtw_8187_write_phy_ofdm(sc, 0x89, 0x60); 3427 } else { 3428 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3429 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3430 } 3431 } else { 3432 if (ofdm_pwrlvl <= 11) { 3433 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3434 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3435 } else if (ofdm_pwrlvl <= 17) { 3436 urtw_8187_write_phy_ofdm(sc, 0x87, 0x54); 3437 urtw_8187_write_phy_ofdm(sc, 0x89, 0x54); 3438 } else { 3439 urtw_8187_write_phy_ofdm(sc, 0x87, 0x50); 3440 urtw_8187_write_phy_ofdm(sc, 0x89, 0x50); 3441 } 3442 } 3443 usb_pause_mtx(&sc->sc_mtx, 1); 3444fail: 3445 return (error); 3446} 3447 3448static usb_error_t 3449urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data) 3450{ 3451 struct usb_device_request req; 3452 usb_error_t error; 3453 3454 req.bmRequestType = UT_READ_VENDOR_DEVICE; 3455 req.bRequest = URTW_8187_GETREGS_REQ; 3456 USETW(req.wValue, val | 0xfe00); 3457 USETW(req.wIndex, 0); 3458 USETW(req.wLength, sizeof(uint8_t)); 3459 3460 error = urtw_do_request(sc, &req, data); 3461 return (error); 3462} 3463 3464static usb_error_t 3465urtw_write8e(struct urtw_softc *sc, int val, uint8_t data) 3466{ 3467 struct usb_device_request req; 3468 3469 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 3470 req.bRequest = URTW_8187_SETREGS_REQ; 3471 USETW(req.wValue, val | 0xfe00); 3472 USETW(req.wIndex, 0); 3473 USETW(req.wLength, sizeof(uint8_t)); 3474 3475 return (urtw_do_request(sc, &req, &data)); 3476} 3477 3478static usb_error_t 3479urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val) 3480{ 3481 uint8_t data; 3482 usb_error_t error; 3483 3484 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3485 if (error) 3486 goto fail; 3487 3488 urtw_read8_m(sc, URTW_CONFIG3, &data); 3489 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3490 urtw_write32_m(sc, URTW_ANAPARAM, val); 3491 urtw_read8_m(sc, URTW_CONFIG3, &data); 3492 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3493 3494 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3495 if (error) 3496 goto fail; 3497fail: 3498 return (error); 3499} 3500 3501static usb_error_t 3502urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val) 3503{ 3504 uint8_t data; 3505 usb_error_t error; 3506 3507 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3508 if (error) 3509 goto fail; 3510 3511 urtw_read8_m(sc, URTW_CONFIG3, &data); 3512 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3513 urtw_write32_m(sc, URTW_ANAPARAM2, val); 3514 urtw_read8_m(sc, URTW_CONFIG3, &data); 3515 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3516 3517 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3518 if (error) 3519 goto fail; 3520fail: 3521 return (error); 3522} 3523 3524static usb_error_t 3525urtw_intr_enable(struct urtw_softc *sc) 3526{ 3527 usb_error_t error; 3528 3529 urtw_write16_m(sc, URTW_INTR_MASK, 0xffff); 3530fail: 3531 return (error); 3532} 3533 3534static usb_error_t 3535urtw_intr_disable(struct urtw_softc *sc) 3536{ 3537 usb_error_t error; 3538 3539 urtw_write16_m(sc, URTW_INTR_MASK, 0); 3540fail: 3541 return (error); 3542} 3543 3544static usb_error_t 3545urtw_reset(struct urtw_softc *sc) 3546{ 3547 uint8_t data; 3548 usb_error_t error; 3549 3550 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3551 if (error) 3552 goto fail; 3553 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3554 if (error) 3555 goto fail; 3556 3557 error = urtw_intr_disable(sc); 3558 if (error) 3559 goto fail; 3560 usb_pause_mtx(&sc->sc_mtx, 100); 3561 3562 error = urtw_write8e(sc, 0x18, 0x10); 3563 if (error != 0) 3564 goto fail; 3565 error = urtw_write8e(sc, 0x18, 0x11); 3566 if (error != 0) 3567 goto fail; 3568 error = urtw_write8e(sc, 0x18, 0x00); 3569 if (error != 0) 3570 goto fail; 3571 usb_pause_mtx(&sc->sc_mtx, 100); 3572 3573 urtw_read8_m(sc, URTW_CMD, &data); 3574 data = (data & 0x2) | URTW_CMD_RST; 3575 urtw_write8_m(sc, URTW_CMD, data); 3576 usb_pause_mtx(&sc->sc_mtx, 100); 3577 3578 urtw_read8_m(sc, URTW_CMD, &data); 3579 if (data & URTW_CMD_RST) { 3580 device_printf(sc->sc_dev, "reset timeout\n"); 3581 goto fail; 3582 } 3583 3584 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 3585 if (error) 3586 goto fail; 3587 usb_pause_mtx(&sc->sc_mtx, 100); 3588 3589 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3590 if (error) 3591 goto fail; 3592 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3593 if (error) 3594 goto fail; 3595fail: 3596 return (error); 3597} 3598 3599static usb_error_t 3600urtw_led_ctl(struct urtw_softc *sc, int mode) 3601{ 3602 usb_error_t error = 0; 3603 3604 switch (sc->sc_strategy) { 3605 case URTW_SW_LED_MODE0: 3606 error = urtw_led_mode0(sc, mode); 3607 break; 3608 case URTW_SW_LED_MODE1: 3609 error = urtw_led_mode1(sc, mode); 3610 break; 3611 case URTW_SW_LED_MODE2: 3612 error = urtw_led_mode2(sc, mode); 3613 break; 3614 case URTW_SW_LED_MODE3: 3615 error = urtw_led_mode3(sc, mode); 3616 break; 3617 default: 3618 panic("unsupported LED mode %d\n", sc->sc_strategy); 3619 /* never reach */ 3620 } 3621 3622 return (error); 3623} 3624 3625static usb_error_t 3626urtw_led_mode0(struct urtw_softc *sc, int mode) 3627{ 3628 3629 switch (mode) { 3630 case URTW_LED_CTL_POWER_ON: 3631 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK; 3632 break; 3633 case URTW_LED_CTL_TX: 3634 if (sc->sc_gpio_ledinprogress == 1) 3635 return (0); 3636 3637 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL; 3638 sc->sc_gpio_blinktime = 2; 3639 break; 3640 case URTW_LED_CTL_LINK: 3641 sc->sc_gpio_ledstate = URTW_LED_ON; 3642 break; 3643 default: 3644 panic("unsupported LED mode 0x%x", mode); 3645 /* never reach */ 3646 } 3647 3648 switch (sc->sc_gpio_ledstate) { 3649 case URTW_LED_ON: 3650 if (sc->sc_gpio_ledinprogress != 0) 3651 break; 3652 urtw_led_on(sc, URTW_LED_GPIO); 3653 break; 3654 case URTW_LED_BLINK_NORMAL: 3655 if (sc->sc_gpio_ledinprogress != 0) 3656 break; 3657 sc->sc_gpio_ledinprogress = 1; 3658 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ? 3659 URTW_LED_OFF : URTW_LED_ON; 3660 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3661 break; 3662 case URTW_LED_POWER_ON_BLINK: 3663 urtw_led_on(sc, URTW_LED_GPIO); 3664 usb_pause_mtx(&sc->sc_mtx, 100); 3665 urtw_led_off(sc, URTW_LED_GPIO); 3666 break; 3667 default: 3668 panic("unknown LED status 0x%x", sc->sc_gpio_ledstate); 3669 /* never reach */ 3670 } 3671 return (0); 3672} 3673 3674static usb_error_t 3675urtw_led_mode1(struct urtw_softc *sc, int mode) 3676{ 3677 3678 return (USB_ERR_INVAL); 3679} 3680 3681static usb_error_t 3682urtw_led_mode2(struct urtw_softc *sc, int mode) 3683{ 3684 3685 return (USB_ERR_INVAL); 3686} 3687 3688static usb_error_t 3689urtw_led_mode3(struct urtw_softc *sc, int mode) 3690{ 3691 3692 return (USB_ERR_INVAL); 3693} 3694 3695static usb_error_t 3696urtw_led_on(struct urtw_softc *sc, int type) 3697{ 3698 usb_error_t error; 3699 3700 if (type == URTW_LED_GPIO) { 3701 switch (sc->sc_gpio_ledpin) { 3702 case URTW_LED_PIN_GPIO0: 3703 urtw_write8_m(sc, URTW_GPIO, 0x01); 3704 urtw_write8_m(sc, URTW_GP_ENABLE, 0x00); 3705 break; 3706 default: 3707 panic("unsupported LED PIN type 0x%x", 3708 sc->sc_gpio_ledpin); 3709 /* never reach */ 3710 } 3711 } else { 3712 panic("unsupported LED type 0x%x", type); 3713 /* never reach */ 3714 } 3715 3716 sc->sc_gpio_ledon = 1; 3717fail: 3718 return (error); 3719} 3720 3721static usb_error_t 3722urtw_led_off(struct urtw_softc *sc, int type) 3723{ 3724 usb_error_t error; 3725 3726 if (type == URTW_LED_GPIO) { 3727 switch (sc->sc_gpio_ledpin) { 3728 case URTW_LED_PIN_GPIO0: 3729 urtw_write8_m(sc, URTW_GPIO, URTW_GPIO_DATA_MAGIC1); 3730 urtw_write8_m(sc, 3731 URTW_GP_ENABLE, URTW_GP_ENABLE_DATA_MAGIC1); 3732 break; 3733 default: 3734 panic("unsupported LED PIN type 0x%x", 3735 sc->sc_gpio_ledpin); 3736 /* never reach */ 3737 } 3738 } else { 3739 panic("unsupported LED type 0x%x", type); 3740 /* never reach */ 3741 } 3742 3743 sc->sc_gpio_ledon = 0; 3744 3745fail: 3746 return (error); 3747} 3748 3749static void 3750urtw_led_ch(void *arg) 3751{ 3752 struct urtw_softc *sc = arg; 3753 struct ifnet *ifp = sc->sc_ifp; 3754 struct ieee80211com *ic = ifp->if_l2com; 3755 3756 ieee80211_runtask(ic, &sc->sc_led_task); 3757} 3758 3759static void 3760urtw_ledtask(void *arg, int pending) 3761{ 3762 struct urtw_softc *sc = arg; 3763 3764 if (sc->sc_strategy != URTW_SW_LED_MODE0) 3765 panic("could not process a LED strategy 0x%x", sc->sc_strategy); 3766 3767 URTW_LOCK(sc); 3768 urtw_led_blink(sc); 3769 URTW_UNLOCK(sc); 3770} 3771 3772static usb_error_t 3773urtw_led_blink(struct urtw_softc *sc) 3774{ 3775 uint8_t ing = 0; 3776 usb_error_t error; 3777 3778 if (sc->sc_gpio_blinkstate == URTW_LED_ON) 3779 error = urtw_led_on(sc, URTW_LED_GPIO); 3780 else 3781 error = urtw_led_off(sc, URTW_LED_GPIO); 3782 sc->sc_gpio_blinktime--; 3783 if (sc->sc_gpio_blinktime == 0) 3784 ing = 1; 3785 else { 3786 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL && 3787 sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY && 3788 sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3) 3789 ing = 1; 3790 } 3791 if (ing == 1) { 3792 if (sc->sc_gpio_ledstate == URTW_LED_ON && 3793 sc->sc_gpio_ledon == 0) 3794 error = urtw_led_on(sc, URTW_LED_GPIO); 3795 else if (sc->sc_gpio_ledstate == URTW_LED_OFF && 3796 sc->sc_gpio_ledon == 1) 3797 error = urtw_led_off(sc, URTW_LED_GPIO); 3798 3799 sc->sc_gpio_blinktime = 0; 3800 sc->sc_gpio_ledinprogress = 0; 3801 return (0); 3802 } 3803 3804 sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ? 3805 URTW_LED_ON : URTW_LED_OFF; 3806 3807 switch (sc->sc_gpio_ledstate) { 3808 case URTW_LED_BLINK_NORMAL: 3809 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3810 break; 3811 default: 3812 panic("unknown LED status 0x%x", sc->sc_gpio_ledstate); 3813 /* never reach */ 3814 } 3815 return (0); 3816} 3817 3818static usb_error_t 3819urtw_rx_enable(struct urtw_softc *sc) 3820{ 3821 uint8_t data; 3822 usb_error_t error; 3823 3824 usbd_transfer_start((sc->sc_flags & URTW_RTL8187B) ? 3825 sc->sc_xfer[URTW_8187B_BULK_RX] : sc->sc_xfer[URTW_8187L_BULK_RX]); 3826 3827 error = urtw_rx_setconf(sc); 3828 if (error != 0) 3829 goto fail; 3830 3831 if ((sc->sc_flags & URTW_RTL8187B) == 0) { 3832 urtw_read8_m(sc, URTW_CMD, &data); 3833 urtw_write8_m(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE); 3834 } 3835fail: 3836 return (error); 3837} 3838 3839static usb_error_t 3840urtw_tx_enable(struct urtw_softc *sc) 3841{ 3842 uint8_t data8; 3843 uint32_t data; 3844 usb_error_t error; 3845 3846 if (sc->sc_flags & URTW_RTL8187B) { 3847 urtw_read32_m(sc, URTW_TX_CONF, &data); 3848 data &= ~URTW_TX_LOOPBACK_MASK; 3849 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3850 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3851 data &= ~URTW_TX_SWPLCPLEN; 3852 data |= URTW_TX_HW_SEQNUM | URTW_TX_DISREQQSIZE | 3853 (7 << 8) | /* short retry limit */ 3854 (7 << 0) | /* long retry limit */ 3855 (7 << 21); /* MAX TX DMA */ 3856 urtw_write32_m(sc, URTW_TX_CONF, data); 3857 3858 urtw_read8_m(sc, URTW_MSR, &data8); 3859 data8 |= URTW_MSR_LINK_ENEDCA; 3860 urtw_write8_m(sc, URTW_MSR, data8); 3861 return (error); 3862 } 3863 3864 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3865 data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY); 3866 urtw_write8_m(sc, URTW_CW_CONF, data8); 3867 3868 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3869 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN; 3870 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 3871 data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT; 3872 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3873 3874 urtw_read32_m(sc, URTW_TX_CONF, &data); 3875 data &= ~URTW_TX_LOOPBACK_MASK; 3876 data |= URTW_TX_LOOPBACK_NONE; 3877 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3878 data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT; 3879 data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT; 3880 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3881 data |= URTW_TX_MXDMA_2048 | URTW_TX_CWMIN | URTW_TX_DISCW; 3882 data &= ~URTW_TX_SWPLCPLEN; 3883 data |= URTW_TX_NOICV; 3884 urtw_write32_m(sc, URTW_TX_CONF, data); 3885 3886 urtw_read8_m(sc, URTW_CMD, &data8); 3887 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 3888fail: 3889 return (error); 3890} 3891 3892static usb_error_t 3893urtw_rx_setconf(struct urtw_softc *sc) 3894{ 3895 struct ifnet *ifp = sc->sc_ifp; 3896 struct ieee80211com *ic = ifp->if_l2com; 3897 uint32_t data; 3898 usb_error_t error; 3899 3900 urtw_read32_m(sc, URTW_RX, &data); 3901 data = data &~ URTW_RX_FILTER_MASK; 3902 if (sc->sc_flags & URTW_RTL8187B) { 3903 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA | 3904 URTW_RX_FILTER_MCAST | URTW_RX_FILTER_BCAST | 3905 URTW_RX_FILTER_NICMAC | URTW_RX_CHECK_BSSID | 3906 URTW_RX_FIFO_THRESHOLD_NONE | 3907 URTW_MAX_RX_DMA_2048 | 3908 URTW_RX_AUTORESETPHY | URTW_RCR_ONLYERLPKT; 3909 } else { 3910 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA; 3911 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST; 3912 3913 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 3914 data = data | URTW_RX_FILTER_ICVERR; 3915 data = data | URTW_RX_FILTER_PWR; 3916 } 3917 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR) 3918 data = data | URTW_RX_FILTER_CRCERR; 3919 3920 if (ic->ic_opmode == IEEE80211_M_MONITOR || 3921 (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) { 3922 data = data | URTW_RX_FILTER_ALLMAC; 3923 } else { 3924 data = data | URTW_RX_FILTER_NICMAC; 3925 data = data | URTW_RX_CHECK_BSSID; 3926 } 3927 3928 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK; 3929 data = data | URTW_RX_FIFO_THRESHOLD_NONE | 3930 URTW_RX_AUTORESETPHY; 3931 data = data &~ URTW_MAX_RX_DMA_MASK; 3932 data = data | URTW_MAX_RX_DMA_2048 | URTW_RCR_ONLYERLPKT; 3933 } 3934 3935 urtw_write32_m(sc, URTW_RX, data); 3936fail: 3937 return (error); 3938} 3939 3940static struct mbuf * 3941urtw_rxeof(struct usb_xfer *xfer, struct urtw_data *data, int *rssi_p, 3942 int8_t *nf_p) 3943{ 3944 int actlen, flen, rssi; 3945 struct ieee80211_frame *wh; 3946 struct mbuf *m, *mnew; 3947 struct urtw_softc *sc = data->sc; 3948 struct ifnet *ifp = sc->sc_ifp; 3949 struct ieee80211com *ic = ifp->if_l2com; 3950 uint8_t noise = 0, rate; 3951 3952 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 3953 3954 if (actlen < URTW_MIN_RXBUFSZ) { 3955 ifp->if_ierrors++; 3956 return (NULL); 3957 } 3958 3959 if (sc->sc_flags & URTW_RTL8187B) { 3960 struct urtw_8187b_rxhdr *rx; 3961 3962 rx = (struct urtw_8187b_rxhdr *)(data->buf + 3963 (actlen - (sizeof(struct urtw_8187b_rxhdr)))); 3964 flen = le32toh(rx->flag) & 0xfff; 3965 if (flen > actlen) { 3966 ifp->if_ierrors++; 3967 return (NULL); 3968 } 3969 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf; 3970 /* XXX correct? */ 3971 rssi = rx->rssi & URTW_RX_RSSI_MASK; 3972 noise = rx->noise; 3973 } else { 3974 struct urtw_8187l_rxhdr *rx; 3975 3976 rx = (struct urtw_8187l_rxhdr *)(data->buf + 3977 (actlen - (sizeof(struct urtw_8187l_rxhdr)))); 3978 flen = le32toh(rx->flag) & 0xfff; 3979 if (flen > actlen) { 3980 ifp->if_ierrors++; 3981 return (NULL); 3982 } 3983 3984 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf; 3985 /* XXX correct? */ 3986 rssi = rx->rssi & URTW_RX_8187L_RSSI_MASK; 3987 noise = rx->noise; 3988 } 3989 3990 mnew = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 3991 if (mnew == NULL) { 3992 ifp->if_ierrors++; 3993 return (NULL); 3994 } 3995 3996 m = data->m; 3997 data->m = mnew; 3998 data->buf = mtod(mnew, uint8_t *); 3999 4000 /* finalize mbuf */ 4001 m->m_pkthdr.rcvif = ifp; 4002 m->m_pkthdr.len = m->m_len = flen - IEEE80211_CRC_LEN; 4003 4004 if (ieee80211_radiotap_active(ic)) { 4005 struct urtw_rx_radiotap_header *tap = &sc->sc_rxtap; 4006 4007 /* XXX Are variables correct? */ 4008 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 4009 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 4010 tap->wr_dbm_antsignal = (int8_t)rssi; 4011 } 4012 4013 wh = mtod(m, struct ieee80211_frame *); 4014 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_DATA) 4015 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate; 4016 4017 *rssi_p = rssi; 4018 *nf_p = noise; /* XXX correct? */ 4019 4020 return (m); 4021} 4022 4023static void 4024urtw_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 4025{ 4026 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4027 struct ifnet *ifp = sc->sc_ifp; 4028 struct ieee80211com *ic = ifp->if_l2com; 4029 struct ieee80211_frame *wh; 4030 struct ieee80211_node *ni; 4031 struct mbuf *m = NULL; 4032 struct urtw_data *data; 4033 int8_t nf = -95; 4034 int rssi = 1; 4035 4036 URTW_ASSERT_LOCKED(sc); 4037 4038 switch (USB_GET_STATE(xfer)) { 4039 case USB_ST_TRANSFERRED: 4040 data = STAILQ_FIRST(&sc->sc_rx_active); 4041 if (data == NULL) 4042 goto setup; 4043 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4044 m = urtw_rxeof(xfer, data, &rssi, &nf); 4045 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4046 /* FALLTHROUGH */ 4047 case USB_ST_SETUP: 4048setup: 4049 data = STAILQ_FIRST(&sc->sc_rx_inactive); 4050 if (data == NULL) { 4051 KASSERT(m == NULL, ("mbuf isn't NULL")); 4052 return; 4053 } 4054 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 4055 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 4056 usbd_xfer_set_frame_data(xfer, 0, data->buf, 4057 usbd_xfer_max_len(xfer)); 4058 usbd_transfer_submit(xfer); 4059 4060 /* 4061 * To avoid LOR we should unlock our private mutex here to call 4062 * ieee80211_input() because here is at the end of a USB 4063 * callback and safe to unlock. 4064 */ 4065 URTW_UNLOCK(sc); 4066 if (m != NULL) { 4067 wh = mtod(m, struct ieee80211_frame *); 4068 ni = ieee80211_find_rxnode(ic, 4069 (struct ieee80211_frame_min *)wh); 4070 if (ni != NULL) { 4071 (void) ieee80211_input(ni, m, rssi, nf); 4072 /* node is no longer needed */ 4073 ieee80211_free_node(ni); 4074 } else 4075 (void) ieee80211_input_all(ic, m, rssi, nf); 4076 m = NULL; 4077 } 4078 URTW_LOCK(sc); 4079 break; 4080 default: 4081 /* needs it to the inactive queue due to a error. */ 4082 data = STAILQ_FIRST(&sc->sc_rx_active); 4083 if (data != NULL) { 4084 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4085 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4086 } 4087 if (error != USB_ERR_CANCELLED) { 4088 usbd_xfer_set_stall(xfer); 4089 ifp->if_ierrors++; 4090 goto setup; 4091 } 4092 break; 4093 } 4094} 4095 4096#define URTW_STATUS_TYPE_TXCLOSE 1 4097#define URTW_STATUS_TYPE_BEACON_INTR 0 4098 4099static void 4100urtw_txstatus_eof(struct usb_xfer *xfer) 4101{ 4102 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4103 struct ifnet *ifp = sc->sc_ifp; 4104 int actlen, type, pktretry, seq; 4105 uint64_t val; 4106 4107 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 4108 4109 if (actlen != sizeof(uint64_t)) 4110 return; 4111 4112 val = le64toh(sc->sc_txstatus); 4113 type = (val >> 30) & 0x3; 4114 if (type == URTW_STATUS_TYPE_TXCLOSE) { 4115 pktretry = val & 0xff; 4116 seq = (val >> 16) & 0xff; 4117 if (pktretry == URTW_TX_MAXRETRY) 4118 ifp->if_oerrors++; 4119 DPRINTF(sc, URTW_DEBUG_TXSTATUS, "pktretry %d seq %#x\n", 4120 pktretry, seq); 4121 } 4122} 4123 4124static void 4125urtw_bulk_tx_status_callback(struct usb_xfer *xfer, usb_error_t error) 4126{ 4127 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4128 struct ifnet *ifp = sc->sc_ifp; 4129 4130 URTW_ASSERT_LOCKED(sc); 4131 4132 switch (USB_GET_STATE(xfer)) { 4133 case USB_ST_TRANSFERRED: 4134 urtw_txstatus_eof(xfer); 4135 /* FALLTHROUGH */ 4136 case USB_ST_SETUP: 4137setup: 4138 usbd_xfer_set_frame_data(xfer, 0, &sc->sc_txstatus, 4139 sizeof(int64_t)); 4140 usbd_transfer_submit(xfer); 4141 break; 4142 default: 4143 if (error != USB_ERR_CANCELLED) { 4144 usbd_xfer_set_stall(xfer); 4145 ifp->if_ierrors++; 4146 goto setup; 4147 } 4148 break; 4149 } 4150} 4151 4152static void 4153urtw_txeof(struct usb_xfer *xfer, struct urtw_data *data) 4154{ 4155 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4156 struct ifnet *ifp = sc->sc_ifp; 4157 struct mbuf *m; 4158 4159 URTW_ASSERT_LOCKED(sc); 4160 4161 /* 4162 * Do any tx complete callback. Note this must be done before releasing 4163 * the node reference. 4164 */ 4165 if (data->m) { 4166 m = data->m; 4167 if (m->m_flags & M_TXCB) { 4168 /* XXX status? */ 4169 ieee80211_process_callback(data->ni, m, 0); 4170 } 4171 m_freem(m); 4172 data->m = NULL; 4173 } 4174 if (data->ni) { 4175 ieee80211_free_node(data->ni); 4176 data->ni = NULL; 4177 } 4178 sc->sc_txtimer = 0; 4179 ifp->if_opackets++; 4180 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 4181} 4182 4183static void 4184urtw_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 4185{ 4186 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4187 struct ifnet *ifp = sc->sc_ifp; 4188 struct urtw_data *data; 4189 4190 URTW_ASSERT_LOCKED(sc); 4191 4192 switch (USB_GET_STATE(xfer)) { 4193 case USB_ST_TRANSFERRED: 4194 data = STAILQ_FIRST(&sc->sc_tx_active); 4195 if (data == NULL) 4196 goto setup; 4197 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 4198 urtw_txeof(xfer, data); 4199 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 4200 /* FALLTHROUGH */ 4201 case USB_ST_SETUP: 4202setup: 4203 data = STAILQ_FIRST(&sc->sc_tx_pending); 4204 if (data == NULL) { 4205 DPRINTF(sc, URTW_DEBUG_XMIT, 4206 "%s: empty pending queue\n", __func__); 4207 return; 4208 } 4209 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 4210 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 4211 4212 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 4213 usbd_transfer_submit(xfer); 4214 4215 URTW_UNLOCK(sc); 4216 urtw_start(ifp); 4217 URTW_LOCK(sc); 4218 break; 4219 default: 4220 data = STAILQ_FIRST(&sc->sc_tx_active); 4221 if (data == NULL) 4222 goto setup; 4223 if (data->ni != NULL) { 4224 ieee80211_free_node(data->ni); 4225 data->ni = NULL; 4226 ifp->if_oerrors++; 4227 } 4228 if (error != USB_ERR_CANCELLED) { 4229 usbd_xfer_set_stall(xfer); 4230 goto setup; 4231 } 4232 break; 4233 } 4234} 4235 4236static struct urtw_data * 4237_urtw_getbuf(struct urtw_softc *sc) 4238{ 4239 struct urtw_data *bf; 4240 4241 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 4242 if (bf != NULL) 4243 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 4244 else 4245 bf = NULL; 4246 if (bf == NULL) 4247 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: %s\n", __func__, 4248 "out of xmit buffers"); 4249 return (bf); 4250} 4251 4252static struct urtw_data * 4253urtw_getbuf(struct urtw_softc *sc) 4254{ 4255 struct urtw_data *bf; 4256 4257 URTW_ASSERT_LOCKED(sc); 4258 4259 bf = _urtw_getbuf(sc); 4260 if (bf == NULL) { 4261 struct ifnet *ifp = sc->sc_ifp; 4262 4263 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: stop queue\n", __func__); 4264 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 4265 } 4266 return (bf); 4267} 4268 4269static int 4270urtw_isbmode(uint16_t rate) 4271{ 4272 4273 return ((rate <= 22 && rate != 12 && rate != 18) || 4274 rate == 44) ? (1) : (0); 4275} 4276 4277static uint16_t 4278urtw_rate2dbps(uint16_t rate) 4279{ 4280 4281 switch(rate) { 4282 case 12: 4283 case 18: 4284 case 24: 4285 case 36: 4286 case 48: 4287 case 72: 4288 case 96: 4289 case 108: 4290 return (rate * 2); 4291 default: 4292 break; 4293 } 4294 return (24); 4295} 4296 4297static int 4298urtw_compute_txtime(uint16_t framelen, uint16_t rate, 4299 uint8_t ismgt, uint8_t isshort) 4300{ 4301 uint16_t ceiling, frametime, n_dbps; 4302 4303 if (urtw_isbmode(rate)) { 4304 if (ismgt || !isshort || rate == 2) 4305 frametime = (uint16_t)(144 + 48 + 4306 (framelen * 8 / (rate / 2))); 4307 else 4308 frametime = (uint16_t)(72 + 24 + 4309 (framelen * 8 / (rate / 2))); 4310 if ((framelen * 8 % (rate / 2)) != 0) 4311 frametime++; 4312 } else { 4313 n_dbps = urtw_rate2dbps(rate); 4314 ceiling = (16 + 8 * framelen + 6) / n_dbps 4315 + (((16 + 8 * framelen + 6) % n_dbps) ? 1 : 0); 4316 frametime = (uint16_t)(16 + 4 + 4 * ceiling + 6); 4317 } 4318 return (frametime); 4319} 4320 4321/* 4322 * Callback from the 802.11 layer to update the 4323 * slot time based on the current setting. 4324 */ 4325static void 4326urtw_updateslot(struct ifnet *ifp) 4327{ 4328 struct urtw_softc *sc = ifp->if_softc; 4329 struct ieee80211com *ic = ifp->if_l2com; 4330 4331 ieee80211_runtask(ic, &sc->sc_updateslot_task); 4332} 4333 4334static void 4335urtw_updateslottask(void *arg, int pending) 4336{ 4337 struct urtw_softc *sc = arg; 4338 struct ifnet *ifp = sc->sc_ifp; 4339 struct ieee80211com *ic = ifp->if_l2com; 4340 int error; 4341 4342 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 4343 return; 4344 4345 URTW_LOCK(sc); 4346 if (sc->sc_flags & URTW_RTL8187B) { 4347 urtw_write8_m(sc, URTW_SIFS, 0x22); 4348 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) 4349 urtw_write8_m(sc, URTW_SLOT, 0x9); 4350 else 4351 urtw_write8_m(sc, URTW_SLOT, 0x14); 4352 urtw_write8_m(sc, URTW_8187B_EIFS, 0x5b); 4353 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 0x5b); 4354 } else { 4355 urtw_write8_m(sc, URTW_SIFS, 0x22); 4356 if (sc->sc_state == IEEE80211_S_ASSOC && 4357 ic->ic_flags & IEEE80211_F_SHSLOT) 4358 urtw_write8_m(sc, URTW_SLOT, 0x9); 4359 else 4360 urtw_write8_m(sc, URTW_SLOT, 0x14); 4361 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) { 4362 urtw_write8_m(sc, URTW_DIFS, 0x14); 4363 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14); 4364 urtw_write8_m(sc, URTW_CW_VAL, 0x73); 4365 } else { 4366 urtw_write8_m(sc, URTW_DIFS, 0x24); 4367 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24); 4368 urtw_write8_m(sc, URTW_CW_VAL, 0xa5); 4369 } 4370 } 4371fail: 4372 URTW_UNLOCK(sc); 4373} 4374 4375static device_method_t urtw_methods[] = { 4376 DEVMETHOD(device_probe, urtw_match), 4377 DEVMETHOD(device_attach, urtw_attach), 4378 DEVMETHOD(device_detach, urtw_detach), 4379 { 0, 0 } 4380}; 4381static driver_t urtw_driver = { 4382 "urtw", 4383 urtw_methods, 4384 sizeof(struct urtw_softc) 4385}; 4386static devclass_t urtw_devclass; 4387 4388DRIVER_MODULE(urtw, uhub, urtw_driver, urtw_devclass, NULL, 0); 4389MODULE_DEPEND(urtw, wlan, 1, 1, 1); 4390MODULE_DEPEND(urtw, usb, 1, 1, 1); 4391