if_rumreg.h revision 288633
1184610Salfred/* $FreeBSD: head/sys/dev/usb/wlan/if_rumreg.h 288633 2015-10-03 20:49:08Z adrian $ */ 2184610Salfred 3184610Salfred/*- 4184610Salfred * Copyright (c) 2005, 2006 Damien Bergamini <damien.bergamini@free.fr> 5184610Salfred * Copyright (c) 2006 Niall O'Higgins <niallo@openbsd.org> 6184610Salfred * 7184610Salfred * Permission to use, copy, modify, and distribute this software for any 8184610Salfred * purpose with or without fee is hereby granted, provided that the above 9184610Salfred * copyright notice and this permission notice appear in all copies. 10184610Salfred * 11184610Salfred * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12184610Salfred * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13184610Salfred * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14184610Salfred * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15184610Salfred * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16184610Salfred * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17184610Salfred * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18184610Salfred */ 19184610Salfred 20188417Sthompsa#define RT2573_NOISE_FLOOR -95 21184610Salfred 22188417Sthompsa#define RT2573_TX_DESC_SIZE (sizeof (struct rum_tx_desc)) 23188417Sthompsa#define RT2573_RX_DESC_SIZE (sizeof (struct rum_rx_desc)) 24184610Salfred 25188417Sthompsa#define RT2573_CONFIG_NO 1 26188417Sthompsa#define RT2573_IFACE_INDEX 0 27184610Salfred 28188417Sthompsa#define RT2573_MCU_CNTL 0x01 29188417Sthompsa#define RT2573_WRITE_MAC 0x02 30188417Sthompsa#define RT2573_READ_MAC 0x03 31188417Sthompsa#define RT2573_WRITE_MULTI_MAC 0x06 32188417Sthompsa#define RT2573_READ_MULTI_MAC 0x07 33188417Sthompsa#define RT2573_READ_EEPROM 0x09 34188417Sthompsa#define RT2573_WRITE_LED 0x0a 35184610Salfred 36184610Salfred/* 37288633Sadrian * WME registers. 38184610Salfred */ 39188417Sthompsa#define RT2573_AIFSN_CSR 0x0400 40188417Sthompsa#define RT2573_CWMIN_CSR 0x0404 41188417Sthompsa#define RT2573_CWMAX_CSR 0x0408 42188417Sthompsa#define RT2573_MCU_CODE_BASE 0x0800 43288633Sadrian 44288633Sadrian/* 45288633Sadrian * H/w encryption/decryption support 46288633Sadrian */ 47288633Sadrian#define KEY_SIZE (IEEE80211_KEYBUF_SIZE + IEEE80211_MICBUF_SIZE) 48288633Sadrian#define RT2573_ADDR_MAX 64 49288633Sadrian#define RT2573_SKEY_MAX 4 50288633Sadrian 51288633Sadrian#define RT2573_SKEY(vap, kidx) (0x1000 + ((vap) * RT2573_SKEY_MAX + \ 52288633Sadrian (kidx)) * KEY_SIZE) 53288633Sadrian#define RT2573_PKEY(id) (0x1200 + (id) * KEY_SIZE) 54288633Sadrian 55288633Sadrian#define RT2573_ADDR_ENTRY(id) (0x1a00 + (id) * 8) 56288633Sadrian 57288633Sadrian/* 58288633Sadrian * Shared memory area 59288633Sadrian */ 60288623Sadrian#define RT2573_HW_BCN_BASE(id) (0x2400 + (id) * 0x100) 61288633Sadrian 62288633Sadrian/* 63288633Sadrian * Control and status registers. 64288633Sadrian */ 65188417Sthompsa#define RT2573_MAC_CSR0 0x3000 66188417Sthompsa#define RT2573_MAC_CSR1 0x3004 67188417Sthompsa#define RT2573_MAC_CSR2 0x3008 68188417Sthompsa#define RT2573_MAC_CSR3 0x300c 69188417Sthompsa#define RT2573_MAC_CSR4 0x3010 70188417Sthompsa#define RT2573_MAC_CSR5 0x3014 71188417Sthompsa#define RT2573_MAC_CSR6 0x3018 72188417Sthompsa#define RT2573_MAC_CSR7 0x301c 73188417Sthompsa#define RT2573_MAC_CSR8 0x3020 74188417Sthompsa#define RT2573_MAC_CSR9 0x3024 75188417Sthompsa#define RT2573_MAC_CSR10 0x3028 76188417Sthompsa#define RT2573_MAC_CSR11 0x302c 77188417Sthompsa#define RT2573_MAC_CSR12 0x3030 78188417Sthompsa#define RT2573_MAC_CSR13 0x3034 79188417Sthompsa#define RT2573_MAC_CSR14 0x3038 80188417Sthompsa#define RT2573_MAC_CSR15 0x303c 81188417Sthompsa#define RT2573_TXRX_CSR0 0x3040 82188417Sthompsa#define RT2573_TXRX_CSR1 0x3044 83188417Sthompsa#define RT2573_TXRX_CSR2 0x3048 84188417Sthompsa#define RT2573_TXRX_CSR3 0x304c 85188417Sthompsa#define RT2573_TXRX_CSR4 0x3050 86188417Sthompsa#define RT2573_TXRX_CSR5 0x3054 87188417Sthompsa#define RT2573_TXRX_CSR6 0x3058 88188417Sthompsa#define RT2573_TXRX_CSR7 0x305c 89188417Sthompsa#define RT2573_TXRX_CSR8 0x3060 90188417Sthompsa#define RT2573_TXRX_CSR9 0x3064 91188417Sthompsa#define RT2573_TXRX_CSR10 0x3068 92188417Sthompsa#define RT2573_TXRX_CSR11 0x306c 93188417Sthompsa#define RT2573_TXRX_CSR12 0x3070 94188417Sthompsa#define RT2573_TXRX_CSR13 0x3074 95188417Sthompsa#define RT2573_TXRX_CSR14 0x3078 96188417Sthompsa#define RT2573_TXRX_CSR15 0x307c 97188417Sthompsa#define RT2573_PHY_CSR0 0x3080 98188417Sthompsa#define RT2573_PHY_CSR1 0x3084 99188417Sthompsa#define RT2573_PHY_CSR2 0x3088 100188417Sthompsa#define RT2573_PHY_CSR3 0x308c 101188417Sthompsa#define RT2573_PHY_CSR4 0x3090 102188417Sthompsa#define RT2573_PHY_CSR5 0x3094 103188417Sthompsa#define RT2573_PHY_CSR6 0x3098 104188417Sthompsa#define RT2573_PHY_CSR7 0x309c 105188417Sthompsa#define RT2573_SEC_CSR0 0x30a0 106188417Sthompsa#define RT2573_SEC_CSR1 0x30a4 107188417Sthompsa#define RT2573_SEC_CSR2 0x30a8 108188417Sthompsa#define RT2573_SEC_CSR3 0x30ac 109188417Sthompsa#define RT2573_SEC_CSR4 0x30b0 110188417Sthompsa#define RT2573_SEC_CSR5 0x30b4 111188417Sthompsa#define RT2573_STA_CSR0 0x30c0 112188417Sthompsa#define RT2573_STA_CSR1 0x30c4 113188417Sthompsa#define RT2573_STA_CSR2 0x30c8 114188417Sthompsa#define RT2573_STA_CSR3 0x30cc 115188417Sthompsa#define RT2573_STA_CSR4 0x30d0 116188417Sthompsa#define RT2573_STA_CSR5 0x30d4 117184610Salfred 118184610Salfred 119288633Sadrian/* possible values for register RT2573_ADDR_MODE */ 120288633Sadrian#define RT2573_MODE_MASK 0x7 121288633Sadrian#define RT2573_MODE_NOSEC 0 122288633Sadrian#define RT2573_MODE_WEP40 1 123288633Sadrian#define RT2573_MODE_WEP104 2 124288633Sadrian#define RT2573_MODE_TKIP 3 125288633Sadrian#define RT2573_MODE_AES_CCMP 4 126288633Sadrian#define RT2573_MODE_CKIP40 5 127288633Sadrian#define RT2573_MODE_CKIP104 6 128288633Sadrian 129184610Salfred/* possible flags for register RT2573_MAC_CSR1 */ 130188417Sthompsa#define RT2573_RESET_ASIC (1 << 0) 131188417Sthompsa#define RT2573_RESET_BBP (1 << 1) 132188417Sthompsa#define RT2573_HOST_READY (1 << 2) 133184610Salfred 134184610Salfred/* possible flags for register MAC_CSR5 */ 135288621Sadrian#define RT2573_NUM_BSSID_MSK(n) (((n * 3) & 3) << 16) 136184610Salfred 137184610Salfred/* possible flags for register TXRX_CSR0 */ 138184610Salfred/* Tx filter flags are in the low 16 bits */ 139188417Sthompsa#define RT2573_AUTO_TX_SEQ (1 << 15) 140184610Salfred/* Rx filter flags are in the high 16 bits */ 141188417Sthompsa#define RT2573_DISABLE_RX (1 << 16) 142188417Sthompsa#define RT2573_DROP_CRC_ERROR (1 << 17) 143188417Sthompsa#define RT2573_DROP_PHY_ERROR (1 << 18) 144188417Sthompsa#define RT2573_DROP_CTL (1 << 19) 145188417Sthompsa#define RT2573_DROP_NOT_TO_ME (1 << 20) 146188417Sthompsa#define RT2573_DROP_TODS (1 << 21) 147188417Sthompsa#define RT2573_DROP_VER_ERROR (1 << 22) 148188417Sthompsa#define RT2573_DROP_MULTICAST (1 << 23) 149188417Sthompsa#define RT2573_DROP_BROADCAST (1 << 24) 150188417Sthompsa#define RT2573_DROP_ACKCTS (1 << 25) 151184610Salfred 152184610Salfred/* possible flags for register TXRX_CSR4 */ 153188417Sthompsa#define RT2573_SHORT_PREAMBLE (1 << 18) 154188417Sthompsa#define RT2573_MRR_ENABLED (1 << 19) 155188417Sthompsa#define RT2573_MRR_CCK_FALLBACK (1 << 22) 156184610Salfred 157184610Salfred/* possible flags for register TXRX_CSR9 */ 158288504Sadrian#define RT2573_TSF_TIMER_EN (1 << 16) 159288504Sadrian#define RT2573_TSF_SYNC_MODE(x) (((x) & 0x3) << 17) 160288504Sadrian#define RT2573_TSF_SYNC_MODE_DIS 0 161288504Sadrian#define RT2573_TSF_SYNC_MODE_STA 1 162288504Sadrian#define RT2573_TSF_SYNC_MODE_IBSS 2 163288504Sadrian#define RT2573_TSF_SYNC_MODE_HOSTAP 3 164288504Sadrian#define RT2573_TBTT_TIMER_EN (1 << 19) 165288504Sadrian#define RT2573_BCN_TX_EN (1 << 20) 166184610Salfred 167184610Salfred/* possible flags for register PHY_CSR0 */ 168188417Sthompsa#define RT2573_PA_PE_2GHZ (1 << 16) 169188417Sthompsa#define RT2573_PA_PE_5GHZ (1 << 17) 170184610Salfred 171184610Salfred/* possible flags for register PHY_CSR3 */ 172188417Sthompsa#define RT2573_BBP_READ (1 << 15) 173188417Sthompsa#define RT2573_BBP_BUSY (1 << 16) 174184610Salfred/* possible flags for register PHY_CSR4 */ 175188417Sthompsa#define RT2573_RF_20BIT (20 << 24) 176258780Seadler#define RT2573_RF_BUSY (1U << 31) 177184610Salfred 178184610Salfred/* LED values */ 179188417Sthompsa#define RT2573_LED_RADIO (1 << 8) 180188417Sthompsa#define RT2573_LED_G (1 << 9) 181188417Sthompsa#define RT2573_LED_A (1 << 10) 182188417Sthompsa#define RT2573_LED_ON 0x1e1e 183188417Sthompsa#define RT2573_LED_OFF 0x0 184184610Salfred 185188417Sthompsa#define RT2573_MCU_RUN (1 << 3) 186184610Salfred 187188417Sthompsa#define RT2573_SMART_MODE (1 << 0) 188184610Salfred 189188417Sthompsa#define RT2573_BBPR94_DEFAULT 6 190184610Salfred 191188417Sthompsa#define RT2573_BBP_WRITE (1 << 15) 192184610Salfred 193184610Salfred/* dual-band RF */ 194188417Sthompsa#define RT2573_RF_5226 1 195188417Sthompsa#define RT2573_RF_5225 3 196184610Salfred/* single-band RF */ 197188417Sthompsa#define RT2573_RF_2528 2 198188417Sthompsa#define RT2573_RF_2527 4 199184610Salfred 200188417Sthompsa#define RT2573_BBP_VERSION 0 201184610Salfred 202184610Salfredstruct rum_tx_desc { 203188417Sthompsa uint32_t flags; 204188417Sthompsa#define RT2573_TX_BURST (1 << 0) 205188417Sthompsa#define RT2573_TX_VALID (1 << 1) 206188417Sthompsa#define RT2573_TX_MORE_FRAG (1 << 2) 207188417Sthompsa#define RT2573_TX_NEED_ACK (1 << 3) 208188417Sthompsa#define RT2573_TX_TIMESTAMP (1 << 4) 209188417Sthompsa#define RT2573_TX_OFDM (1 << 5) 210188417Sthompsa#define RT2573_TX_IFS_SIFS (1 << 6) 211188417Sthompsa#define RT2573_TX_LONG_RETRY (1 << 7) 212288633Sadrian#define RT2573_TX_TKIPMIC (1 << 8) 213288633Sadrian#define RT2573_TX_KEY_PAIR (1 << 9) 214288633Sadrian#define RT2573_TX_KEY_ID(id) (((id) & 0x3f) << 10) 215288633Sadrian#define RT2573_TX_CIP_MODE(m) ((m) << 29) 216184610Salfred 217188417Sthompsa uint16_t wme; 218188417Sthompsa#define RT2573_QID(v) (v) 219188417Sthompsa#define RT2573_AIFSN(v) ((v) << 4) 220188417Sthompsa#define RT2573_LOGCWMIN(v) ((v) << 8) 221188417Sthompsa#define RT2573_LOGCWMAX(v) ((v) << 12) 222184610Salfred 223288633Sadrian uint8_t hdrlen; 224288633Sadrian uint8_t xflags; 225288633Sadrian#define RT2573_TX_HWSEQ (1 << 4) 226184610Salfred 227188417Sthompsa uint8_t plcp_signal; 228188417Sthompsa uint8_t plcp_service; 229188417Sthompsa#define RT2573_PLCP_LENGEXT 0x80 230184610Salfred 231188417Sthompsa uint8_t plcp_length_lo; 232188417Sthompsa uint8_t plcp_length_hi; 233184610Salfred 234188417Sthompsa uint32_t iv; 235188417Sthompsa uint32_t eiv; 236184610Salfred 237188417Sthompsa uint8_t offset; 238188417Sthompsa uint8_t qid; 239188417Sthompsa uint8_t txpower; 240188417Sthompsa#define RT2573_DEFAULT_TXPOWER 0 241188417Sthompsa 242188417Sthompsa uint8_t reserved; 243184610Salfred} __packed; 244184610Salfred 245184610Salfredstruct rum_rx_desc { 246188417Sthompsa uint32_t flags; 247188417Sthompsa#define RT2573_RX_BUSY (1 << 0) 248188417Sthompsa#define RT2573_RX_DROP (1 << 1) 249288633Sadrian#define RT2573_RX_UC2ME (1 << 2) 250288633Sadrian#define RT2573_RX_MC (1 << 3) 251288633Sadrian#define RT2573_RX_BC (1 << 4) 252288633Sadrian#define RT2573_RX_MYBSS (1 << 5) 253188417Sthompsa#define RT2573_RX_CRC_ERROR (1 << 6) 254188417Sthompsa#define RT2573_RX_OFDM (1 << 7) 255184610Salfred 256288633Sadrian#define RT2573_RX_DEC_MASK (3 << 8) 257288633Sadrian#define RT2573_RX_DEC_OK (0 << 8) 258288633Sadrian 259288633Sadrian#define RT2573_RX_IV_ERROR (1 << 8) 260288633Sadrian#define RT2573_RX_MIC_ERROR (2 << 8) 261288633Sadrian#define RT2573_RX_KEY_ERROR (3 << 8) 262288633Sadrian 263288633Sadrian#define RT2573_RX_KEY_PAIR (1 << 28) 264288633Sadrian 265288633Sadrian#define RT2573_RX_CIP_MASK (7 << 29) 266288633Sadrian#define RT2573_RX_CIP_MODE(m) ((m) << 29) 267288633Sadrian 268188417Sthompsa uint8_t rate; 269188417Sthompsa uint8_t rssi; 270188417Sthompsa uint8_t reserved1; 271188417Sthompsa uint8_t offset; 272188417Sthompsa uint32_t iv; 273188417Sthompsa uint32_t eiv; 274188417Sthompsa uint32_t reserved2[2]; 275184610Salfred} __packed; 276184610Salfred 277188417Sthompsa#define RT2573_RF1 0 278188417Sthompsa#define RT2573_RF2 2 279188417Sthompsa#define RT2573_RF3 1 280188417Sthompsa#define RT2573_RF4 3 281184610Salfred 282188417Sthompsa#define RT2573_EEPROM_MACBBP 0x0000 283188417Sthompsa#define RT2573_EEPROM_ADDRESS 0x0004 284188417Sthompsa#define RT2573_EEPROM_ANTENNA 0x0020 285188417Sthompsa#define RT2573_EEPROM_CONFIG2 0x0022 286188417Sthompsa#define RT2573_EEPROM_BBP_BASE 0x0026 287188417Sthompsa#define RT2573_EEPROM_TXPOWER 0x0046 288188417Sthompsa#define RT2573_EEPROM_FREQ_OFFSET 0x005e 289188417Sthompsa#define RT2573_EEPROM_RSSI_2GHZ_OFFSET 0x009a 290188417Sthompsa#define RT2573_EEPROM_RSSI_5GHZ_OFFSET 0x009c 291