1/* $FreeBSD$ */ 2 3/*- 4 * Copyright (c) 2005, 2006 Damien Bergamini <damien.bergamini@free.fr> 5 * Copyright (c) 2006 Niall O'Higgins <niallo@openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20#define RT2573_NOISE_FLOOR -95 21 22#define RT2573_TX_DESC_SIZE (sizeof (struct rum_tx_desc)) 23#define RT2573_RX_DESC_SIZE (sizeof (struct rum_rx_desc)) 24 25#define RT2573_CONFIG_NO 1 26#define RT2573_IFACE_INDEX 0 27 28#define RT2573_MCU_CNTL 0x01 29#define RT2573_WRITE_MAC 0x02 30#define RT2573_READ_MAC 0x03 31#define RT2573_WRITE_MULTI_MAC 0x06 32#define RT2573_READ_MULTI_MAC 0x07 33#define RT2573_READ_EEPROM 0x09 34#define RT2573_WRITE_LED 0x0a 35 36/* 37 * WME registers. 38 */ 39#define RT2573_AIFSN_CSR 0x0400 40#define RT2573_CWMIN_CSR 0x0404 41#define RT2573_CWMAX_CSR 0x0408 42#define RT2573_TXOP01_CSR 0x040C 43#define RT2573_TXOP23_CSR 0x0410 44#define RT2573_MCU_CODE_BASE 0x0800 45 46/* 47 * H/w encryption/decryption support 48 */ 49#define KEY_SIZE (IEEE80211_KEYBUF_SIZE + IEEE80211_MICBUF_SIZE) 50#define RT2573_ADDR_MAX 64 51#define RT2573_SKEY_MAX 4 52 53#define RT2573_SKEY(vap, kidx) (0x1000 + ((vap) * RT2573_SKEY_MAX + \ 54 (kidx)) * KEY_SIZE) 55#define RT2573_PKEY(id) (0x1200 + (id) * KEY_SIZE) 56 57#define RT2573_ADDR_ENTRY(id) (0x1a00 + (id) * 8) 58 59/* 60 * Shared memory area 61 */ 62#define RT2573_HW_BCN_BASE(id) (0x2400 + (id) * 0x100) 63 64/* 65 * Control and status registers. 66 */ 67#define RT2573_MAC_CSR0 0x3000 68#define RT2573_MAC_CSR1 0x3004 69#define RT2573_MAC_CSR2 0x3008 70#define RT2573_MAC_CSR3 0x300c 71#define RT2573_MAC_CSR4 0x3010 72#define RT2573_MAC_CSR5 0x3014 73#define RT2573_MAC_CSR6 0x3018 74#define RT2573_MAC_CSR7 0x301c 75#define RT2573_MAC_CSR8 0x3020 76#define RT2573_MAC_CSR9 0x3024 77#define RT2573_MAC_CSR10 0x3028 78#define RT2573_MAC_CSR11 0x302c 79#define RT2573_MAC_CSR12 0x3030 80#define RT2573_MAC_CSR13 0x3034 81#define RT2573_MAC_CSR14 0x3038 82#define RT2573_MAC_CSR15 0x303c 83#define RT2573_TXRX_CSR0 0x3040 84#define RT2573_TXRX_CSR1 0x3044 85#define RT2573_TXRX_CSR2 0x3048 86#define RT2573_TXRX_CSR3 0x304c 87#define RT2573_TXRX_CSR4 0x3050 88#define RT2573_TXRX_CSR5 0x3054 89#define RT2573_TXRX_CSR6 0x3058 90#define RT2573_TXRX_CSR7 0x305c 91#define RT2573_TXRX_CSR8 0x3060 92#define RT2573_TXRX_CSR9 0x3064 93#define RT2573_TXRX_CSR10 0x3068 94#define RT2573_TXRX_CSR11 0x306c 95#define RT2573_TXRX_CSR12 0x3070 96#define RT2573_TXRX_CSR13 0x3074 97#define RT2573_TXRX_CSR14 0x3078 98#define RT2573_TXRX_CSR15 0x307c 99#define RT2573_PHY_CSR0 0x3080 100#define RT2573_PHY_CSR1 0x3084 101#define RT2573_PHY_CSR2 0x3088 102#define RT2573_PHY_CSR3 0x308c 103#define RT2573_PHY_CSR4 0x3090 104#define RT2573_PHY_CSR5 0x3094 105#define RT2573_PHY_CSR6 0x3098 106#define RT2573_PHY_CSR7 0x309c 107#define RT2573_SEC_CSR0 0x30a0 108#define RT2573_SEC_CSR1 0x30a4 109#define RT2573_SEC_CSR2 0x30a8 110#define RT2573_SEC_CSR3 0x30ac 111#define RT2573_SEC_CSR4 0x30b0 112#define RT2573_SEC_CSR5 0x30b4 113#define RT2573_STA_CSR0 0x30c0 114#define RT2573_STA_CSR1 0x30c4 115#define RT2573_STA_CSR2 0x30c8 116#define RT2573_STA_CSR3 0x30cc 117#define RT2573_STA_CSR4 0x30d0 118#define RT2573_STA_CSR5 0x30d4 119 120 121/* possible values for register RT2573_ADDR_MODE */ 122#define RT2573_MODE_MASK 0x7 123#define RT2573_MODE_NOSEC 0 124#define RT2573_MODE_WEP40 1 125#define RT2573_MODE_WEP104 2 126#define RT2573_MODE_TKIP 3 127#define RT2573_MODE_AES_CCMP 4 128#define RT2573_MODE_CKIP40 5 129#define RT2573_MODE_CKIP104 6 130 131/* possible flags for register RT2573_MAC_CSR1 */ 132#define RT2573_RESET_ASIC (1 << 0) 133#define RT2573_RESET_BBP (1 << 1) 134#define RT2573_HOST_READY (1 << 2) 135 136/* possible flags for register MAC_CSR5 */ 137#define RT2573_NUM_BSSID_MSK(n) (((n * 3) & 3) << 16) 138 139/* possible flags for register MAC_CSR11 */ 140#define RT2573_AUTO_WAKEUP (1 << 15) 141#define RT2573_TBCN_EXP(n) ((n) << 8) 142#define RT2573_TBCN_EXP_MAX 0x7f 143#define RT2573_TBCN_DELAY(t) (t) 144#define RT2573_TBCN_DELAY_MAX 0xff 145 146/* possible flags for register TXRX_CSR0 */ 147/* Tx filter flags are in the low 16 bits */ 148#define RT2573_AUTO_TX_SEQ (1 << 15) 149/* Rx filter flags are in the high 16 bits */ 150#define RT2573_DISABLE_RX (1 << 16) 151#define RT2573_DROP_CRC_ERROR (1 << 17) 152#define RT2573_DROP_PHY_ERROR (1 << 18) 153#define RT2573_DROP_CTL (1 << 19) 154#define RT2573_DROP_NOT_TO_ME (1 << 20) 155#define RT2573_DROP_TODS (1 << 21) 156#define RT2573_DROP_VER_ERROR (1 << 22) 157#define RT2573_DROP_MULTICAST (1 << 23) 158#define RT2573_DROP_BROADCAST (1 << 24) 159#define RT2573_DROP_ACKCTS (1 << 25) 160 161/* possible flags for register TXRX_CSR4 */ 162#define RT2573_ACKCTS_PWRMGT (1 << 16) 163#define RT2573_SHORT_PREAMBLE (1 << 18) 164#define RT2573_MRR_ENABLED (1 << 19) 165#define RT2573_MRR_CCK_FALLBACK (1 << 22) 166#define RT2573_LONG_RETRY(max) ((max) << 24) 167#define RT2573_LONG_RETRY_MASK (0xf << 24) 168#define RT2573_SHORT_RETRY(max) ((max) << 28) 169#define RT2573_SHORT_RETRY_MASK (0xf << 28) 170 171/* possible flags for register TXRX_CSR9 */ 172#define RT2573_TSF_TIMER_EN (1 << 16) 173#define RT2573_TSF_SYNC_MODE(x) (((x) & 0x3) << 17) 174#define RT2573_TSF_SYNC_MODE_DIS 0 175#define RT2573_TSF_SYNC_MODE_STA 1 176#define RT2573_TSF_SYNC_MODE_IBSS 2 177#define RT2573_TSF_SYNC_MODE_HOSTAP 3 178#define RT2573_TBTT_TIMER_EN (1 << 19) 179#define RT2573_BCN_TX_EN (1 << 20) 180 181/* possible flags for register PHY_CSR0 */ 182#define RT2573_PA_PE_2GHZ (1 << 16) 183#define RT2573_PA_PE_5GHZ (1 << 17) 184 185/* possible flags for register PHY_CSR3 */ 186#define RT2573_BBP_READ (1 << 15) 187#define RT2573_BBP_BUSY (1 << 16) 188/* possible flags for register PHY_CSR4 */ 189#define RT2573_RF_20BIT (20 << 24) 190#define RT2573_RF_BUSY (1U << 31) 191 192/* LED values */ 193#define RT2573_LED_RADIO (1 << 8) 194#define RT2573_LED_G (1 << 9) 195#define RT2573_LED_A (1 << 10) 196#define RT2573_LED_ON 0x1e1e 197#define RT2573_LED_OFF 0x0 198 199/* USB vendor requests */ 200#define RT2573_MCU_SLEEP 7 201#define RT2573_MCU_RUN 8 202#define RT2573_MCU_WAKEUP 9 203 204#define RT2573_SMART_MODE (1 << 0) 205 206#define RT2573_BBPR94_DEFAULT 6 207 208#define RT2573_BBP_WRITE (1 << 15) 209 210/* dual-band RF */ 211#define RT2573_RF_5226 1 212#define RT2573_RF_5225 3 213/* single-band RF */ 214#define RT2573_RF_2528 2 215#define RT2573_RF_2527 4 216 217#define RT2573_BBP_VERSION 0 218 219struct rum_tx_desc { 220 uint32_t flags; 221#define RT2573_TX_BURST (1 << 0) 222#define RT2573_TX_VALID (1 << 1) 223#define RT2573_TX_MORE_FRAG (1 << 2) 224#define RT2573_TX_NEED_ACK (1 << 3) 225#define RT2573_TX_TIMESTAMP (1 << 4) 226#define RT2573_TX_OFDM (1 << 5) 227#define RT2573_TX_IFS_SIFS (1 << 6) 228#define RT2573_TX_LONG_RETRY (1 << 7) 229#define RT2573_TX_TKIPMIC (1 << 8) 230#define RT2573_TX_KEY_PAIR (1 << 9) 231#define RT2573_TX_KEY_ID(id) (((id) & 0x3f) << 10) 232#define RT2573_TX_CIP_MODE(m) ((m) << 29) 233 234 uint16_t wme; 235#define RT2573_QID(v) (v) 236#define RT2573_AIFSN(v) ((v) << 4) 237#define RT2573_LOGCWMIN(v) ((v) << 8) 238#define RT2573_LOGCWMAX(v) ((v) << 12) 239 240 uint8_t hdrlen; 241 uint8_t xflags; 242#define RT2573_TX_HWSEQ (1 << 4) 243 244 uint8_t plcp_signal; 245 uint8_t plcp_service; 246#define RT2573_PLCP_LENGEXT 0x80 247 248 uint8_t plcp_length_lo; 249 uint8_t plcp_length_hi; 250 251 uint32_t iv; 252 uint32_t eiv; 253 254 uint8_t offset; 255 uint8_t qid; 256 uint8_t txpower; 257#define RT2573_DEFAULT_TXPOWER 0 258 259 uint8_t reserved; 260} __packed; 261 262struct rum_rx_desc { 263 uint32_t flags; 264#define RT2573_RX_BUSY (1 << 0) 265#define RT2573_RX_DROP (1 << 1) 266#define RT2573_RX_UC2ME (1 << 2) 267#define RT2573_RX_MC (1 << 3) 268#define RT2573_RX_BC (1 << 4) 269#define RT2573_RX_MYBSS (1 << 5) 270#define RT2573_RX_CRC_ERROR (1 << 6) 271#define RT2573_RX_OFDM (1 << 7) 272 273#define RT2573_RX_DEC_MASK (3 << 8) 274#define RT2573_RX_DEC_OK (0 << 8) 275 276#define RT2573_RX_IV_ERROR (1 << 8) 277#define RT2573_RX_MIC_ERROR (2 << 8) 278#define RT2573_RX_KEY_ERROR (3 << 8) 279 280#define RT2573_RX_KEY_PAIR (1 << 28) 281 282#define RT2573_RX_CIP_MASK (7 << 29) 283#define RT2573_RX_CIP_MODE(m) ((m) << 29) 284 285 uint8_t rate; 286 uint8_t rssi; 287 uint8_t reserved1; 288 uint8_t offset; 289 uint32_t iv; 290 uint32_t eiv; 291 uint32_t reserved2[2]; 292} __packed; 293 294#define RT2573_RF1 0 295#define RT2573_RF2 2 296#define RT2573_RF3 1 297#define RT2573_RF4 3 298 299#define RT2573_EEPROM_MACBBP 0x0000 300#define RT2573_EEPROM_ADDRESS 0x0004 301#define RT2573_EEPROM_ANTENNA 0x0020 302#define RT2573_EEPROM_CONFIG2 0x0022 303#define RT2573_EEPROM_BBP_BASE 0x0026 304#define RT2573_EEPROM_TXPOWER 0x0046 305#define RT2573_EEPROM_FREQ_OFFSET 0x005e 306#define RT2573_EEPROM_RSSI_2GHZ_OFFSET 0x009a 307#define RT2573_EEPROM_RSSI_5GHZ_OFFSET 0x009c 308