1184610Salfred/* $FreeBSD$ */ 2184610Salfred 3184610Salfred/*- 4184610Salfred * Copyright (c) 2005, 2006 Damien Bergamini <damien.bergamini@free.fr> 5184610Salfred * Copyright (c) 2006 Niall O'Higgins <niallo@openbsd.org> 6184610Salfred * 7184610Salfred * Permission to use, copy, modify, and distribute this software for any 8184610Salfred * purpose with or without fee is hereby granted, provided that the above 9184610Salfred * copyright notice and this permission notice appear in all copies. 10184610Salfred * 11184610Salfred * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12184610Salfred * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13184610Salfred * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14184610Salfred * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15184610Salfred * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16184610Salfred * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17184610Salfred * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18184610Salfred */ 19184610Salfred 20188417Sthompsa#define RT2573_NOISE_FLOOR -95 21184610Salfred 22188417Sthompsa#define RT2573_TX_DESC_SIZE (sizeof (struct rum_tx_desc)) 23188417Sthompsa#define RT2573_RX_DESC_SIZE (sizeof (struct rum_rx_desc)) 24184610Salfred 25188417Sthompsa#define RT2573_CONFIG_NO 1 26188417Sthompsa#define RT2573_IFACE_INDEX 0 27184610Salfred 28188417Sthompsa#define RT2573_MCU_CNTL 0x01 29188417Sthompsa#define RT2573_WRITE_MAC 0x02 30188417Sthompsa#define RT2573_READ_MAC 0x03 31188417Sthompsa#define RT2573_WRITE_MULTI_MAC 0x06 32188417Sthompsa#define RT2573_READ_MULTI_MAC 0x07 33188417Sthompsa#define RT2573_READ_EEPROM 0x09 34188417Sthompsa#define RT2573_WRITE_LED 0x0a 35184610Salfred 36184610Salfred/* 37288633Sadrian * WME registers. 38184610Salfred */ 39188417Sthompsa#define RT2573_AIFSN_CSR 0x0400 40188417Sthompsa#define RT2573_CWMIN_CSR 0x0404 41188417Sthompsa#define RT2573_CWMAX_CSR 0x0408 42288642Sadrian#define RT2573_TXOP01_CSR 0x040C 43288642Sadrian#define RT2573_TXOP23_CSR 0x0410 44188417Sthompsa#define RT2573_MCU_CODE_BASE 0x0800 45288633Sadrian 46288633Sadrian/* 47288633Sadrian * H/w encryption/decryption support 48288633Sadrian */ 49288633Sadrian#define KEY_SIZE (IEEE80211_KEYBUF_SIZE + IEEE80211_MICBUF_SIZE) 50295611Shselasky#define RT2573_ADDR_MAX 64 51288633Sadrian#define RT2573_SKEY_MAX 4 52288633Sadrian 53288633Sadrian#define RT2573_SKEY(vap, kidx) (0x1000 + ((vap) * RT2573_SKEY_MAX + \ 54288633Sadrian (kidx)) * KEY_SIZE) 55288633Sadrian#define RT2573_PKEY(id) (0x1200 + (id) * KEY_SIZE) 56288633Sadrian 57288633Sadrian#define RT2573_ADDR_ENTRY(id) (0x1a00 + (id) * 8) 58288633Sadrian 59288633Sadrian/* 60288633Sadrian * Shared memory area 61288633Sadrian */ 62288623Sadrian#define RT2573_HW_BCN_BASE(id) (0x2400 + (id) * 0x100) 63288633Sadrian 64288633Sadrian/* 65288633Sadrian * Control and status registers. 66288633Sadrian */ 67188417Sthompsa#define RT2573_MAC_CSR0 0x3000 68188417Sthompsa#define RT2573_MAC_CSR1 0x3004 69188417Sthompsa#define RT2573_MAC_CSR2 0x3008 70188417Sthompsa#define RT2573_MAC_CSR3 0x300c 71188417Sthompsa#define RT2573_MAC_CSR4 0x3010 72188417Sthompsa#define RT2573_MAC_CSR5 0x3014 73188417Sthompsa#define RT2573_MAC_CSR6 0x3018 74188417Sthompsa#define RT2573_MAC_CSR7 0x301c 75188417Sthompsa#define RT2573_MAC_CSR8 0x3020 76188417Sthompsa#define RT2573_MAC_CSR9 0x3024 77188417Sthompsa#define RT2573_MAC_CSR10 0x3028 78188417Sthompsa#define RT2573_MAC_CSR11 0x302c 79188417Sthompsa#define RT2573_MAC_CSR12 0x3030 80188417Sthompsa#define RT2573_MAC_CSR13 0x3034 81188417Sthompsa#define RT2573_MAC_CSR14 0x3038 82188417Sthompsa#define RT2573_MAC_CSR15 0x303c 83188417Sthompsa#define RT2573_TXRX_CSR0 0x3040 84188417Sthompsa#define RT2573_TXRX_CSR1 0x3044 85188417Sthompsa#define RT2573_TXRX_CSR2 0x3048 86188417Sthompsa#define RT2573_TXRX_CSR3 0x304c 87188417Sthompsa#define RT2573_TXRX_CSR4 0x3050 88188417Sthompsa#define RT2573_TXRX_CSR5 0x3054 89188417Sthompsa#define RT2573_TXRX_CSR6 0x3058 90188417Sthompsa#define RT2573_TXRX_CSR7 0x305c 91188417Sthompsa#define RT2573_TXRX_CSR8 0x3060 92188417Sthompsa#define RT2573_TXRX_CSR9 0x3064 93188417Sthompsa#define RT2573_TXRX_CSR10 0x3068 94188417Sthompsa#define RT2573_TXRX_CSR11 0x306c 95188417Sthompsa#define RT2573_TXRX_CSR12 0x3070 96188417Sthompsa#define RT2573_TXRX_CSR13 0x3074 97188417Sthompsa#define RT2573_TXRX_CSR14 0x3078 98188417Sthompsa#define RT2573_TXRX_CSR15 0x307c 99188417Sthompsa#define RT2573_PHY_CSR0 0x3080 100188417Sthompsa#define RT2573_PHY_CSR1 0x3084 101188417Sthompsa#define RT2573_PHY_CSR2 0x3088 102188417Sthompsa#define RT2573_PHY_CSR3 0x308c 103188417Sthompsa#define RT2573_PHY_CSR4 0x3090 104188417Sthompsa#define RT2573_PHY_CSR5 0x3094 105188417Sthompsa#define RT2573_PHY_CSR6 0x3098 106188417Sthompsa#define RT2573_PHY_CSR7 0x309c 107188417Sthompsa#define RT2573_SEC_CSR0 0x30a0 108188417Sthompsa#define RT2573_SEC_CSR1 0x30a4 109188417Sthompsa#define RT2573_SEC_CSR2 0x30a8 110188417Sthompsa#define RT2573_SEC_CSR3 0x30ac 111188417Sthompsa#define RT2573_SEC_CSR4 0x30b0 112188417Sthompsa#define RT2573_SEC_CSR5 0x30b4 113188417Sthompsa#define RT2573_STA_CSR0 0x30c0 114188417Sthompsa#define RT2573_STA_CSR1 0x30c4 115188417Sthompsa#define RT2573_STA_CSR2 0x30c8 116188417Sthompsa#define RT2573_STA_CSR3 0x30cc 117188417Sthompsa#define RT2573_STA_CSR4 0x30d0 118188417Sthompsa#define RT2573_STA_CSR5 0x30d4 119184610Salfred 120184610Salfred 121288633Sadrian/* possible values for register RT2573_ADDR_MODE */ 122288633Sadrian#define RT2573_MODE_MASK 0x7 123288633Sadrian#define RT2573_MODE_NOSEC 0 124288633Sadrian#define RT2573_MODE_WEP40 1 125288633Sadrian#define RT2573_MODE_WEP104 2 126288633Sadrian#define RT2573_MODE_TKIP 3 127288633Sadrian#define RT2573_MODE_AES_CCMP 4 128288633Sadrian#define RT2573_MODE_CKIP40 5 129288633Sadrian#define RT2573_MODE_CKIP104 6 130288633Sadrian 131184610Salfred/* possible flags for register RT2573_MAC_CSR1 */ 132188417Sthompsa#define RT2573_RESET_ASIC (1 << 0) 133188417Sthompsa#define RT2573_RESET_BBP (1 << 1) 134188417Sthompsa#define RT2573_HOST_READY (1 << 2) 135184610Salfred 136184610Salfred/* possible flags for register MAC_CSR5 */ 137288621Sadrian#define RT2573_NUM_BSSID_MSK(n) (((n * 3) & 3) << 16) 138184610Salfred 139297171Savos/* possible flags for register MAC_CSR11 */ 140297171Savos#define RT2573_AUTO_WAKEUP (1 << 15) 141297171Savos#define RT2573_TBCN_EXP(n) ((n) << 8) 142297171Savos#define RT2573_TBCN_EXP_MAX 0x7f 143297171Savos#define RT2573_TBCN_DELAY(t) (t) 144297171Savos#define RT2573_TBCN_DELAY_MAX 0xff 145297171Savos 146184610Salfred/* possible flags for register TXRX_CSR0 */ 147184610Salfred/* Tx filter flags are in the low 16 bits */ 148188417Sthompsa#define RT2573_AUTO_TX_SEQ (1 << 15) 149184610Salfred/* Rx filter flags are in the high 16 bits */ 150188417Sthompsa#define RT2573_DISABLE_RX (1 << 16) 151188417Sthompsa#define RT2573_DROP_CRC_ERROR (1 << 17) 152188417Sthompsa#define RT2573_DROP_PHY_ERROR (1 << 18) 153188417Sthompsa#define RT2573_DROP_CTL (1 << 19) 154188417Sthompsa#define RT2573_DROP_NOT_TO_ME (1 << 20) 155188417Sthompsa#define RT2573_DROP_TODS (1 << 21) 156188417Sthompsa#define RT2573_DROP_VER_ERROR (1 << 22) 157188417Sthompsa#define RT2573_DROP_MULTICAST (1 << 23) 158188417Sthompsa#define RT2573_DROP_BROADCAST (1 << 24) 159188417Sthompsa#define RT2573_DROP_ACKCTS (1 << 25) 160184610Salfred 161184610Salfred/* possible flags for register TXRX_CSR4 */ 162297171Savos#define RT2573_ACKCTS_PWRMGT (1 << 16) 163188417Sthompsa#define RT2573_SHORT_PREAMBLE (1 << 18) 164188417Sthompsa#define RT2573_MRR_ENABLED (1 << 19) 165188417Sthompsa#define RT2573_MRR_CCK_FALLBACK (1 << 22) 166288638Sadrian#define RT2573_LONG_RETRY(max) ((max) << 24) 167288638Sadrian#define RT2573_LONG_RETRY_MASK (0xf << 24) 168288638Sadrian#define RT2573_SHORT_RETRY(max) ((max) << 28) 169288638Sadrian#define RT2573_SHORT_RETRY_MASK (0xf << 28) 170184610Salfred 171184610Salfred/* possible flags for register TXRX_CSR9 */ 172288504Sadrian#define RT2573_TSF_TIMER_EN (1 << 16) 173288504Sadrian#define RT2573_TSF_SYNC_MODE(x) (((x) & 0x3) << 17) 174288504Sadrian#define RT2573_TSF_SYNC_MODE_DIS 0 175288504Sadrian#define RT2573_TSF_SYNC_MODE_STA 1 176288504Sadrian#define RT2573_TSF_SYNC_MODE_IBSS 2 177288504Sadrian#define RT2573_TSF_SYNC_MODE_HOSTAP 3 178288504Sadrian#define RT2573_TBTT_TIMER_EN (1 << 19) 179288504Sadrian#define RT2573_BCN_TX_EN (1 << 20) 180184610Salfred 181184610Salfred/* possible flags for register PHY_CSR0 */ 182188417Sthompsa#define RT2573_PA_PE_2GHZ (1 << 16) 183188417Sthompsa#define RT2573_PA_PE_5GHZ (1 << 17) 184184610Salfred 185184610Salfred/* possible flags for register PHY_CSR3 */ 186188417Sthompsa#define RT2573_BBP_READ (1 << 15) 187188417Sthompsa#define RT2573_BBP_BUSY (1 << 16) 188184610Salfred/* possible flags for register PHY_CSR4 */ 189188417Sthompsa#define RT2573_RF_20BIT (20 << 24) 190258780Seadler#define RT2573_RF_BUSY (1U << 31) 191184610Salfred 192184610Salfred/* LED values */ 193188417Sthompsa#define RT2573_LED_RADIO (1 << 8) 194188417Sthompsa#define RT2573_LED_G (1 << 9) 195188417Sthompsa#define RT2573_LED_A (1 << 10) 196188417Sthompsa#define RT2573_LED_ON 0x1e1e 197188417Sthompsa#define RT2573_LED_OFF 0x0 198184610Salfred 199297171Savos/* USB vendor requests */ 200297171Savos#define RT2573_MCU_SLEEP 7 201297171Savos#define RT2573_MCU_RUN 8 202297171Savos#define RT2573_MCU_WAKEUP 9 203184610Salfred 204188417Sthompsa#define RT2573_SMART_MODE (1 << 0) 205184610Salfred 206188417Sthompsa#define RT2573_BBPR94_DEFAULT 6 207184610Salfred 208188417Sthompsa#define RT2573_BBP_WRITE (1 << 15) 209184610Salfred 210184610Salfred/* dual-band RF */ 211188417Sthompsa#define RT2573_RF_5226 1 212188417Sthompsa#define RT2573_RF_5225 3 213184610Salfred/* single-band RF */ 214188417Sthompsa#define RT2573_RF_2528 2 215188417Sthompsa#define RT2573_RF_2527 4 216184610Salfred 217188417Sthompsa#define RT2573_BBP_VERSION 0 218184610Salfred 219184610Salfredstruct rum_tx_desc { 220188417Sthompsa uint32_t flags; 221188417Sthompsa#define RT2573_TX_BURST (1 << 0) 222188417Sthompsa#define RT2573_TX_VALID (1 << 1) 223188417Sthompsa#define RT2573_TX_MORE_FRAG (1 << 2) 224188417Sthompsa#define RT2573_TX_NEED_ACK (1 << 3) 225188417Sthompsa#define RT2573_TX_TIMESTAMP (1 << 4) 226188417Sthompsa#define RT2573_TX_OFDM (1 << 5) 227188417Sthompsa#define RT2573_TX_IFS_SIFS (1 << 6) 228188417Sthompsa#define RT2573_TX_LONG_RETRY (1 << 7) 229288633Sadrian#define RT2573_TX_TKIPMIC (1 << 8) 230288633Sadrian#define RT2573_TX_KEY_PAIR (1 << 9) 231288633Sadrian#define RT2573_TX_KEY_ID(id) (((id) & 0x3f) << 10) 232288633Sadrian#define RT2573_TX_CIP_MODE(m) ((m) << 29) 233184610Salfred 234188417Sthompsa uint16_t wme; 235188417Sthompsa#define RT2573_QID(v) (v) 236188417Sthompsa#define RT2573_AIFSN(v) ((v) << 4) 237188417Sthompsa#define RT2573_LOGCWMIN(v) ((v) << 8) 238188417Sthompsa#define RT2573_LOGCWMAX(v) ((v) << 12) 239184610Salfred 240288633Sadrian uint8_t hdrlen; 241288633Sadrian uint8_t xflags; 242288633Sadrian#define RT2573_TX_HWSEQ (1 << 4) 243184610Salfred 244188417Sthompsa uint8_t plcp_signal; 245188417Sthompsa uint8_t plcp_service; 246188417Sthompsa#define RT2573_PLCP_LENGEXT 0x80 247184610Salfred 248188417Sthompsa uint8_t plcp_length_lo; 249188417Sthompsa uint8_t plcp_length_hi; 250184610Salfred 251188417Sthompsa uint32_t iv; 252188417Sthompsa uint32_t eiv; 253184610Salfred 254188417Sthompsa uint8_t offset; 255188417Sthompsa uint8_t qid; 256188417Sthompsa uint8_t txpower; 257188417Sthompsa#define RT2573_DEFAULT_TXPOWER 0 258188417Sthompsa 259188417Sthompsa uint8_t reserved; 260184610Salfred} __packed; 261184610Salfred 262184610Salfredstruct rum_rx_desc { 263188417Sthompsa uint32_t flags; 264188417Sthompsa#define RT2573_RX_BUSY (1 << 0) 265188417Sthompsa#define RT2573_RX_DROP (1 << 1) 266288633Sadrian#define RT2573_RX_UC2ME (1 << 2) 267288633Sadrian#define RT2573_RX_MC (1 << 3) 268288633Sadrian#define RT2573_RX_BC (1 << 4) 269288633Sadrian#define RT2573_RX_MYBSS (1 << 5) 270188417Sthompsa#define RT2573_RX_CRC_ERROR (1 << 6) 271188417Sthompsa#define RT2573_RX_OFDM (1 << 7) 272184610Salfred 273288633Sadrian#define RT2573_RX_DEC_MASK (3 << 8) 274288633Sadrian#define RT2573_RX_DEC_OK (0 << 8) 275288633Sadrian 276288633Sadrian#define RT2573_RX_IV_ERROR (1 << 8) 277288633Sadrian#define RT2573_RX_MIC_ERROR (2 << 8) 278288633Sadrian#define RT2573_RX_KEY_ERROR (3 << 8) 279288633Sadrian 280288633Sadrian#define RT2573_RX_KEY_PAIR (1 << 28) 281288633Sadrian 282288633Sadrian#define RT2573_RX_CIP_MASK (7 << 29) 283288633Sadrian#define RT2573_RX_CIP_MODE(m) ((m) << 29) 284288633Sadrian 285188417Sthompsa uint8_t rate; 286188417Sthompsa uint8_t rssi; 287188417Sthompsa uint8_t reserved1; 288188417Sthompsa uint8_t offset; 289188417Sthompsa uint32_t iv; 290188417Sthompsa uint32_t eiv; 291188417Sthompsa uint32_t reserved2[2]; 292184610Salfred} __packed; 293184610Salfred 294188417Sthompsa#define RT2573_RF1 0 295188417Sthompsa#define RT2573_RF2 2 296188417Sthompsa#define RT2573_RF3 1 297188417Sthompsa#define RT2573_RF4 3 298184610Salfred 299188417Sthompsa#define RT2573_EEPROM_MACBBP 0x0000 300188417Sthompsa#define RT2573_EEPROM_ADDRESS 0x0004 301188417Sthompsa#define RT2573_EEPROM_ANTENNA 0x0020 302188417Sthompsa#define RT2573_EEPROM_CONFIG2 0x0022 303188417Sthompsa#define RT2573_EEPROM_BBP_BASE 0x0026 304188417Sthompsa#define RT2573_EEPROM_TXPOWER 0x0046 305188417Sthompsa#define RT2573_EEPROM_FREQ_OFFSET 0x005e 306188417Sthompsa#define RT2573_EEPROM_RSSI_2GHZ_OFFSET 0x009a 307188417Sthompsa#define RT2573_EEPROM_RSSI_5GHZ_OFFSET 0x009c 308