if_ti.c revision 99058
145386Swpaul/* 245386Swpaul * Copyright (c) 1997, 1998, 1999 345386Swpaul * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 445386Swpaul * 545386Swpaul * Redistribution and use in source and binary forms, with or without 645386Swpaul * modification, are permitted provided that the following conditions 745386Swpaul * are met: 845386Swpaul * 1. Redistributions of source code must retain the above copyright 945386Swpaul * notice, this list of conditions and the following disclaimer. 1045386Swpaul * 2. Redistributions in binary form must reproduce the above copyright 1145386Swpaul * notice, this list of conditions and the following disclaimer in the 1245386Swpaul * documentation and/or other materials provided with the distribution. 1345386Swpaul * 3. All advertising materials mentioning features or use of this software 1445386Swpaul * must display the following acknowledgement: 1545386Swpaul * This product includes software developed by Bill Paul. 1645386Swpaul * 4. Neither the name of the author nor the names of any co-contributors 1745386Swpaul * may be used to endorse or promote products derived from this software 1845386Swpaul * without specific prior written permission. 1945386Swpaul * 2045386Swpaul * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 2145386Swpaul * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2245386Swpaul * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2345386Swpaul * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 2445386Swpaul * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2545386Swpaul * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2645386Swpaul * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2745386Swpaul * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 2845386Swpaul * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 2945386Swpaul * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 3045386Swpaul * THE POSSIBILITY OF SUCH DAMAGE. 3145386Swpaul * 3250477Speter * $FreeBSD: head/sys/dev/ti/if_ti.c 99058 2002-06-29 11:26:05Z alfred $ 3345386Swpaul */ 3445386Swpaul 3545386Swpaul/* 3645386Swpaul * Alteon Networks Tigon PCI gigabit ethernet driver for FreeBSD. 3745386Swpaul * Manuals, sample driver and firmware source kits are available 3845386Swpaul * from http://www.alteon.com/support/openkits. 3945386Swpaul * 4045386Swpaul * Written by Bill Paul <wpaul@ctr.columbia.edu> 4145386Swpaul * Electrical Engineering Department 4245386Swpaul * Columbia University, New York City 4345386Swpaul */ 4445386Swpaul 4545386Swpaul/* 4645386Swpaul * The Alteon Networks Tigon chip contains an embedded R4000 CPU, 4745386Swpaul * gigabit MAC, dual DMA channels and a PCI interface unit. NICs 4845386Swpaul * using the Tigon may have anywhere from 512K to 2MB of SRAM. The 4945386Swpaul * Tigon supports hardware IP, TCP and UCP checksumming, multicast 5045386Swpaul * filtering and jumbo (9014 byte) frames. The hardware is largely 5145386Swpaul * controlled by firmware, which must be loaded into the NIC during 5245386Swpaul * initialization. 5345386Swpaul * 5445386Swpaul * The Tigon 2 contains 2 R4000 CPUs and requires a newer firmware 5545386Swpaul * revision, which supports new features such as extended commands, 5645386Swpaul * extended jumbo receive ring desciptors and a mini receive ring. 5745386Swpaul * 5845386Swpaul * Alteon Networks is to be commended for releasing such a vast amount 5945386Swpaul * of development material for the Tigon NIC without requiring an NDA 6045386Swpaul * (although they really should have done it a long time ago). With 6145386Swpaul * any luck, the other vendors will finally wise up and follow Alteon's 6245386Swpaul * stellar example. 6345386Swpaul * 6445386Swpaul * The firmware for the Tigon 1 and 2 NICs is compiled directly into 6545386Swpaul * this driver by #including it as a C header file. This bloats the 6645386Swpaul * driver somewhat, but it's the easiest method considering that the 6745386Swpaul * driver code and firmware code need to be kept in sync. The source 6845386Swpaul * for the firmware is not provided with the FreeBSD distribution since 6945386Swpaul * compiling it requires a GNU toolchain targeted for mips-sgi-irix5.3. 7045386Swpaul * 7145386Swpaul * The following people deserve special thanks: 7245386Swpaul * - Terry Murphy of 3Com, for providing a 3c985 Tigon 1 board 7345386Swpaul * for testing 7445386Swpaul * - Raymond Lee of Netgear, for providing a pair of Netgear 7545386Swpaul * GA620 Tigon 2 boards for testing 7645386Swpaul * - Ulf Zimmermann, for bringing the GA260 to my attention and 7745386Swpaul * convincing me to write this driver. 7845386Swpaul * - Andrew Gallatin for providing FreeBSD/Alpha support. 7945386Swpaul */ 8045386Swpaul 8198849Sken#include "opt_ti.h" 8298849Sken 8345386Swpaul#include <sys/param.h> 8445386Swpaul#include <sys/systm.h> 8545386Swpaul#include <sys/sockio.h> 8645386Swpaul#include <sys/mbuf.h> 8745386Swpaul#include <sys/malloc.h> 8845386Swpaul#include <sys/kernel.h> 8945386Swpaul#include <sys/socket.h> 9045386Swpaul#include <sys/queue.h> 9198849Sken#include <sys/conf.h> 9245386Swpaul 9345386Swpaul#include <net/if.h> 9445386Swpaul#include <net/if_arp.h> 9545386Swpaul#include <net/ethernet.h> 9645386Swpaul#include <net/if_dl.h> 9745386Swpaul#include <net/if_media.h> 9883115Sbrooks#include <net/if_types.h> 9983115Sbrooks#include <net/if_vlan_var.h> 10045386Swpaul 10145386Swpaul#include <net/bpf.h> 10245386Swpaul 10345386Swpaul#include <netinet/in_systm.h> 10445386Swpaul#include <netinet/in.h> 10545386Swpaul#include <netinet/ip.h> 10645386Swpaul 10745386Swpaul#include <vm/vm.h> /* for vtophys */ 10845386Swpaul#include <vm/pmap.h> /* for vtophys */ 10945386Swpaul#include <machine/bus_memio.h> 11045386Swpaul#include <machine/bus.h> 11149011Swpaul#include <machine/resource.h> 11249011Swpaul#include <sys/bus.h> 11349011Swpaul#include <sys/rman.h> 11445386Swpaul 11598849Sken/* #define TI_PRIVATE_JUMBOS */ 11698849Sken 11798849Sken#if !defined(TI_PRIVATE_JUMBOS) 11898849Sken#include <sys/sockio.h> 11998849Sken#include <sys/uio.h> 12098849Sken#include <sys/lock.h> 12198849Sken#include <vm/vm_extern.h> 12298849Sken#include <vm/pmap.h> 12398849Sken#include <vm/vm_map.h> 12498849Sken#include <vm/vm_map.h> 12598849Sken#include <vm/vm_param.h> 12698849Sken#include <vm/vm_pageout.h> 12798849Sken#include <sys/vmmeter.h> 12898849Sken#include <vm/vm_page.h> 12998849Sken#include <vm/vm_object.h> 13098849Sken#include <vm/vm_kern.h> 13198849Sken#include <sys/proc.h> 13298849Sken#include <sys/jumbo.h> 13398849Sken#endif /* !TI_PRIVATE_JUMBOS */ 13498849Sken#include <sys/vnode.h> /* for vfindev, vgone */ 13598849Sken 13645386Swpaul#include <pci/pcireg.h> 13745386Swpaul#include <pci/pcivar.h> 13845386Swpaul 13998849Sken#include <sys/tiio.h> 14045386Swpaul#include <pci/if_tireg.h> 14145386Swpaul#include <pci/ti_fw.h> 14245386Swpaul#include <pci/ti_fw2.h> 14345386Swpaul 14458698Sjlemon#define TI_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP | CSUM_IP_FRAGS) 14598849Sken/* 14698849Sken * We can only turn on header splitting if we're using extended receive 14798849Sken * BDs. 14898849Sken */ 14998849Sken#if defined(TI_JUMBO_HDRSPLIT) && defined(TI_PRIVATE_JUMBOS) 15098849Sken#error "options TI_JUMBO_HDRSPLIT and TI_PRIVATE_JUMBOS are mutually exclusive" 15198849Sken#endif /* TI_JUMBO_HDRSPLIT && TI_JUMBO_HDRSPLIT */ 15245386Swpaul 15345386Swpaul#if !defined(lint) 15445386Swpaulstatic const char rcsid[] = 15550477Speter "$FreeBSD: head/sys/dev/ti/if_ti.c 99058 2002-06-29 11:26:05Z alfred $"; 15645386Swpaul#endif 15745386Swpaul 15898849Skenstruct ti_softc *tis[8]; 15998849Sken 16098849Skentypedef enum { 16198849Sken TI_SWAP_HTON, 16298849Sken TI_SWAP_NTOH 16398849Sken} ti_swap_type; 16498849Sken 16598849Sken 16645386Swpaul/* 16745386Swpaul * Various supported device vendors/types and their names. 16845386Swpaul */ 16945386Swpaul 17045386Swpaulstatic struct ti_type ti_devs[] = { 17145386Swpaul { ALT_VENDORID, ALT_DEVICEID_ACENIC, 17263702Swpaul "Alteon AceNIC 1000baseSX Gigabit Ethernet" }, 17363699Swpaul { ALT_VENDORID, ALT_DEVICEID_ACENIC_COPPER, 17463702Swpaul "Alteon AceNIC 1000baseT Gigabit Ethernet" }, 17545386Swpaul { TC_VENDORID, TC_DEVICEID_3C985, 17645386Swpaul "3Com 3c985-SX Gigabit Ethernet" }, 17745386Swpaul { NG_VENDORID, NG_DEVICEID_GA620, 17864139Swpaul "Netgear GA620 1000baseSX Gigabit Ethernet" }, 17964139Swpaul { NG_VENDORID, NG_DEVICEID_GA620T, 18064139Swpaul "Netgear GA620 1000baseT Gigabit Ethernet" }, 18145386Swpaul { SGI_VENDORID, SGI_DEVICEID_TIGON, 18245386Swpaul "Silicon Graphics Gigabit Ethernet" }, 18356206Swpaul { DEC_VENDORID, DEC_DEVICEID_FARALLON_PN9000SX, 18456206Swpaul "Farallon PN9000SX Gigabit Ethernet" }, 18545386Swpaul { 0, 0, NULL } 18645386Swpaul}; 18745386Swpaul 18898849Sken#define TI_CDEV_MAJOR 153 18998849Sken 19098849Skenstatic d_open_t ti_open; 19198849Skenstatic d_close_t ti_close; 19298849Skenstatic d_ioctl_t ti_ioctl2; 19398849Sken 19498849Skenstatic struct cdevsw ti_cdevsw = { 19598849Sken /* open */ ti_open, 19698849Sken /* close */ ti_close, 19798849Sken /* read */ NULL, 19898849Sken /* write */ NULL, 19998849Sken /* ioctl */ ti_ioctl2, 20098849Sken /* poll */ seltrue, 20198849Sken /* mmap */ nommap, 20298849Sken /* strategy */ nostrategy, 20398849Sken /* name */ "ti", 20498849Sken /* maj */ TI_CDEV_MAJOR, 20598849Sken /* dump */ nodump, 20698849Sken /* psize */ nopsize, 20798849Sken /* flags */ 0, 20898849Sken}; 20998849Sken 21092739Salfredstatic int ti_probe (device_t); 21192739Salfredstatic int ti_attach (device_t); 21292739Salfredstatic int ti_detach (device_t); 21392739Salfredstatic void ti_txeof (struct ti_softc *); 21492739Salfredstatic void ti_rxeof (struct ti_softc *); 21545386Swpaul 21692739Salfredstatic void ti_stats_update (struct ti_softc *); 21792739Salfredstatic int ti_encap (struct ti_softc *, struct mbuf *, u_int32_t *); 21845386Swpaul 21992739Salfredstatic void ti_intr (void *); 22092739Salfredstatic void ti_start (struct ifnet *); 22192739Salfredstatic int ti_ioctl (struct ifnet *, u_long, caddr_t); 22292739Salfredstatic void ti_init (void *); 22392739Salfredstatic void ti_init2 (struct ti_softc *); 22492739Salfredstatic void ti_stop (struct ti_softc *); 22592739Salfredstatic void ti_watchdog (struct ifnet *); 22692739Salfredstatic void ti_shutdown (device_t); 22792739Salfredstatic int ti_ifmedia_upd (struct ifnet *); 22892739Salfredstatic void ti_ifmedia_sts (struct ifnet *, struct ifmediareq *); 22945386Swpaul 23092739Salfredstatic u_int32_t ti_eeprom_putbyte (struct ti_softc *, int); 23192739Salfredstatic u_int8_t ti_eeprom_getbyte (struct ti_softc *, int, u_int8_t *); 23292739Salfredstatic int ti_read_eeprom (struct ti_softc *, caddr_t, int, int); 23345386Swpaul 23492739Salfredstatic void ti_add_mcast (struct ti_softc *, struct ether_addr *); 23592739Salfredstatic void ti_del_mcast (struct ti_softc *, struct ether_addr *); 23692739Salfredstatic void ti_setmulti (struct ti_softc *); 23745386Swpaul 23892739Salfredstatic void ti_mem (struct ti_softc *, u_int32_t, 23992739Salfred u_int32_t, caddr_t); 24098849Skenstatic int ti_copy_mem (struct ti_softc *, u_int32_t, 24198849Sken u_int32_t, caddr_t, int, int); 24298849Skenstatic int ti_copy_scratch (struct ti_softc *, u_int32_t, 24398849Sken u_int32_t, caddr_t, int, int, int); 24498849Skenstatic int ti_bcopy_swap (const void *, void *, size_t, 24598849Sken ti_swap_type); 24692739Salfredstatic void ti_loadfw (struct ti_softc *); 24792739Salfredstatic void ti_cmd (struct ti_softc *, struct ti_cmd_desc *); 24892739Salfredstatic void ti_cmd_ext (struct ti_softc *, struct ti_cmd_desc *, 24992739Salfred caddr_t, int); 25092739Salfredstatic void ti_handle_events (struct ti_softc *); 25198849Sken#ifdef TI_PRIVATE_JUMBOS 25292739Salfredstatic int ti_alloc_jumbo_mem (struct ti_softc *); 25392739Salfredstatic void *ti_jalloc (struct ti_softc *); 25499058Salfredstatic void ti_jfree (void *, void *); 25598849Sken#endif /* TI_PRIVATE_JUMBOS */ 25692739Salfredstatic int ti_newbuf_std (struct ti_softc *, int, struct mbuf *); 25792739Salfredstatic int ti_newbuf_mini (struct ti_softc *, int, struct mbuf *); 25892739Salfredstatic int ti_newbuf_jumbo (struct ti_softc *, int, struct mbuf *); 25992739Salfredstatic int ti_init_rx_ring_std (struct ti_softc *); 26092739Salfredstatic void ti_free_rx_ring_std (struct ti_softc *); 26192739Salfredstatic int ti_init_rx_ring_jumbo (struct ti_softc *); 26292739Salfredstatic void ti_free_rx_ring_jumbo (struct ti_softc *); 26392739Salfredstatic int ti_init_rx_ring_mini (struct ti_softc *); 26492739Salfredstatic void ti_free_rx_ring_mini (struct ti_softc *); 26592739Salfredstatic void ti_free_tx_ring (struct ti_softc *); 26692739Salfredstatic int ti_init_tx_ring (struct ti_softc *); 26745386Swpaul 26892739Salfredstatic int ti_64bitslot_war (struct ti_softc *); 26992739Salfredstatic int ti_chipinit (struct ti_softc *); 27092739Salfredstatic int ti_gibinit (struct ti_softc *); 27145386Swpaul 27298849Sken#ifdef TI_JUMBO_HDRSPLIT 27399013Speterstatic __inline void ti_hdr_split (struct mbuf *top, int hdr_len, 27499013Speter int pkt_len, int idx); 27598849Sken#endif /* TI_JUMBO_HDRSPLIT */ 27698849Sken 27749011Swpaulstatic device_method_t ti_methods[] = { 27849011Swpaul /* Device interface */ 27949011Swpaul DEVMETHOD(device_probe, ti_probe), 28049011Swpaul DEVMETHOD(device_attach, ti_attach), 28149011Swpaul DEVMETHOD(device_detach, ti_detach), 28249011Swpaul DEVMETHOD(device_shutdown, ti_shutdown), 28349011Swpaul { 0, 0 } 28449011Swpaul}; 28549011Swpaul 28649011Swpaulstatic driver_t ti_driver = { 28751455Swpaul "ti", 28849011Swpaul ti_methods, 28949011Swpaul sizeof(struct ti_softc) 29049011Swpaul}; 29149011Swpaul 29249011Swpaulstatic devclass_t ti_devclass; 29349011Swpaul 29451533SwpaulDRIVER_MODULE(if_ti, pci, ti_driver, ti_devclass, 0, 0); 29549011Swpaul 29698849Sken/* List of Tigon softcs */ 29798849Skenstatic STAILQ_HEAD(ti_softc_list, ti_softc) ti_sc_list; 29898849Sken 29998849Skenstatic struct ti_softc * 30098849Skenti_lookup_softc(int unit) 30198849Sken{ 30298849Sken struct ti_softc *sc; 30398849Sken for (sc = STAILQ_FIRST(&ti_sc_list); sc != NULL; 30498849Sken sc = STAILQ_NEXT(sc, ti_links)) 30598849Sken if (sc->ti_unit == unit) 30698849Sken return(sc); 30798849Sken return(NULL); 30898849Sken} 30998849Sken 31045386Swpaul/* 31145386Swpaul * Send an instruction or address to the EEPROM, check for ACK. 31245386Swpaul */ 31345386Swpaulstatic u_int32_t ti_eeprom_putbyte(sc, byte) 31445386Swpaul struct ti_softc *sc; 31545386Swpaul int byte; 31645386Swpaul{ 31745386Swpaul register int i, ack = 0; 31845386Swpaul 31945386Swpaul /* 32045386Swpaul * Make sure we're in TX mode. 32145386Swpaul */ 32245386Swpaul TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); 32345386Swpaul 32445386Swpaul /* 32545386Swpaul * Feed in each bit and stobe the clock. 32645386Swpaul */ 32745386Swpaul for (i = 0x80; i; i >>= 1) { 32845386Swpaul if (byte & i) { 32945386Swpaul TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); 33045386Swpaul } else { 33145386Swpaul TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); 33245386Swpaul } 33345386Swpaul DELAY(1); 33445386Swpaul TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); 33545386Swpaul DELAY(1); 33645386Swpaul TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); 33745386Swpaul } 33845386Swpaul 33945386Swpaul /* 34045386Swpaul * Turn off TX mode. 34145386Swpaul */ 34245386Swpaul TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); 34345386Swpaul 34445386Swpaul /* 34545386Swpaul * Check for ack. 34645386Swpaul */ 34745386Swpaul TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); 34845386Swpaul ack = CSR_READ_4(sc, TI_MISC_LOCAL_CTL) & TI_MLC_EE_DIN; 34945386Swpaul TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); 35045386Swpaul 35145386Swpaul return(ack); 35245386Swpaul} 35345386Swpaul 35445386Swpaul/* 35545386Swpaul * Read a byte of data stored in the EEPROM at address 'addr.' 35645386Swpaul * We have to send two address bytes since the EEPROM can hold 35745386Swpaul * more than 256 bytes of data. 35845386Swpaul */ 35945386Swpaulstatic u_int8_t ti_eeprom_getbyte(sc, addr, dest) 36045386Swpaul struct ti_softc *sc; 36145386Swpaul int addr; 36245386Swpaul u_int8_t *dest; 36345386Swpaul{ 36445386Swpaul register int i; 36545386Swpaul u_int8_t byte = 0; 36645386Swpaul 36745386Swpaul EEPROM_START; 36845386Swpaul 36945386Swpaul /* 37045386Swpaul * Send write control code to EEPROM. 37145386Swpaul */ 37245386Swpaul if (ti_eeprom_putbyte(sc, EEPROM_CTL_WRITE)) { 37345386Swpaul printf("ti%d: failed to send write command, status: %x\n", 37445386Swpaul sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL)); 37545386Swpaul return(1); 37645386Swpaul } 37745386Swpaul 37845386Swpaul /* 37945386Swpaul * Send first byte of address of byte we want to read. 38045386Swpaul */ 38145386Swpaul if (ti_eeprom_putbyte(sc, (addr >> 8) & 0xFF)) { 38245386Swpaul printf("ti%d: failed to send address, status: %x\n", 38345386Swpaul sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL)); 38445386Swpaul return(1); 38545386Swpaul } 38645386Swpaul /* 38745386Swpaul * Send second byte address of byte we want to read. 38845386Swpaul */ 38945386Swpaul if (ti_eeprom_putbyte(sc, addr & 0xFF)) { 39045386Swpaul printf("ti%d: failed to send address, status: %x\n", 39145386Swpaul sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL)); 39245386Swpaul return(1); 39345386Swpaul } 39445386Swpaul 39545386Swpaul EEPROM_STOP; 39645386Swpaul EEPROM_START; 39745386Swpaul /* 39845386Swpaul * Send read control code to EEPROM. 39945386Swpaul */ 40045386Swpaul if (ti_eeprom_putbyte(sc, EEPROM_CTL_READ)) { 40145386Swpaul printf("ti%d: failed to send read command, status: %x\n", 40245386Swpaul sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL)); 40345386Swpaul return(1); 40445386Swpaul } 40545386Swpaul 40645386Swpaul /* 40745386Swpaul * Start reading bits from EEPROM. 40845386Swpaul */ 40945386Swpaul TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); 41045386Swpaul for (i = 0x80; i; i >>= 1) { 41145386Swpaul TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); 41245386Swpaul DELAY(1); 41345386Swpaul if (CSR_READ_4(sc, TI_MISC_LOCAL_CTL) & TI_MLC_EE_DIN) 41445386Swpaul byte |= i; 41545386Swpaul TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); 41645386Swpaul DELAY(1); 41745386Swpaul } 41845386Swpaul 41945386Swpaul EEPROM_STOP; 42045386Swpaul 42145386Swpaul /* 42245386Swpaul * No ACK generated for read, so just return byte. 42345386Swpaul */ 42445386Swpaul 42545386Swpaul *dest = byte; 42645386Swpaul 42745386Swpaul return(0); 42845386Swpaul} 42945386Swpaul 43045386Swpaul/* 43145386Swpaul * Read a sequence of bytes from the EEPROM. 43245386Swpaul */ 43345386Swpaulstatic int ti_read_eeprom(sc, dest, off, cnt) 43445386Swpaul struct ti_softc *sc; 43545386Swpaul caddr_t dest; 43645386Swpaul int off; 43745386Swpaul int cnt; 43845386Swpaul{ 43945386Swpaul int err = 0, i; 44045386Swpaul u_int8_t byte = 0; 44145386Swpaul 44245386Swpaul for (i = 0; i < cnt; i++) { 44345386Swpaul err = ti_eeprom_getbyte(sc, off + i, &byte); 44445386Swpaul if (err) 44545386Swpaul break; 44645386Swpaul *(dest + i) = byte; 44745386Swpaul } 44845386Swpaul 44945386Swpaul return(err ? 1 : 0); 45045386Swpaul} 45145386Swpaul 45245386Swpaul/* 45345386Swpaul * NIC memory access function. Can be used to either clear a section 45445386Swpaul * of NIC local memory or (if buf is non-NULL) copy data into it. 45545386Swpaul */ 45645386Swpaulstatic void ti_mem(sc, addr, len, buf) 45745386Swpaul struct ti_softc *sc; 45845386Swpaul u_int32_t addr, len; 45945386Swpaul caddr_t buf; 46045386Swpaul{ 46145386Swpaul int segptr, segsize, cnt; 46245386Swpaul caddr_t ti_winbase, ptr; 46345386Swpaul 46445386Swpaul segptr = addr; 46545386Swpaul cnt = len; 46649133Swpaul ti_winbase = (caddr_t)(sc->ti_vhandle + TI_WINDOW); 46745386Swpaul ptr = buf; 46845386Swpaul 46945386Swpaul while(cnt) { 47045386Swpaul if (cnt < TI_WINLEN) 47145386Swpaul segsize = cnt; 47245386Swpaul else 47345386Swpaul segsize = TI_WINLEN - (segptr % TI_WINLEN); 47445386Swpaul CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1))); 47545386Swpaul if (buf == NULL) 47645386Swpaul bzero((char *)ti_winbase + (segptr & 47745386Swpaul (TI_WINLEN - 1)), segsize); 47845386Swpaul else { 47945386Swpaul bcopy((char *)ptr, (char *)ti_winbase + 48045386Swpaul (segptr & (TI_WINLEN - 1)), segsize); 48145386Swpaul ptr += segsize; 48245386Swpaul } 48345386Swpaul segptr += segsize; 48445386Swpaul cnt -= segsize; 48545386Swpaul } 48645386Swpaul 48745386Swpaul return; 48845386Swpaul} 48945386Swpaul 49098849Skenstatic int 49198849Skenti_copy_mem(sc, tigon_addr, len, buf, useraddr, readdata) 49298849Sken struct ti_softc *sc; 49398849Sken u_int32_t tigon_addr, len; 49498849Sken caddr_t buf; 49598849Sken int useraddr, readdata; 49698849Sken{ 49798849Sken int segptr, segsize, cnt; 49898849Sken caddr_t ptr; 49998849Sken u_int32_t origwin; 50098849Sken u_int8_t tmparray[TI_WINLEN], tmparray2[TI_WINLEN]; 50198849Sken int resid, segresid; 50298849Sken int first_pass; 50398849Sken 50498849Sken /* 50598849Sken * At the moment, we don't handle non-aligned cases, we just bail. 50698849Sken * If this proves to be a problem, it will be fixed. 50798849Sken */ 50898849Sken if ((readdata == 0) 50998849Sken && (tigon_addr & 0x3)) { 51098849Sken printf("ti%d: ti_copy_mem: tigon address %#x isn't " 51198849Sken "word-aligned\n", sc->ti_unit, tigon_addr); 51298849Sken printf("ti%d: ti_copy_mem: unaligned writes aren't yet " 51398849Sken "supported\n", sc->ti_unit); 51498849Sken return(EINVAL); 51598849Sken } 51698849Sken 51798849Sken segptr = tigon_addr & ~0x3; 51898849Sken segresid = tigon_addr - segptr; 51998849Sken 52098849Sken /* 52198849Sken * This is the non-aligned amount left over that we'll need to 52298849Sken * copy. 52398849Sken */ 52498849Sken resid = len & 0x3; 52598849Sken 52698849Sken /* Add in the left over amount at the front of the buffer */ 52798849Sken resid += segresid; 52898849Sken 52998849Sken cnt = len & ~0x3; 53098849Sken /* 53198849Sken * If resid + segresid is >= 4, add multiples of 4 to the count and 53298849Sken * decrease the residual by that much. 53398849Sken */ 53498849Sken cnt += resid & ~0x3; 53598849Sken resid -= resid & ~0x3; 53698849Sken 53798849Sken ptr = buf; 53898849Sken 53998849Sken first_pass = 1; 54098849Sken 54198849Sken /* 54298849Sken * Make sure we aren't interrupted while we're changing the window 54398849Sken * pointer. 54498849Sken */ 54598849Sken TI_LOCK(sc); 54698849Sken 54798849Sken /* 54898849Sken * Save the old window base value. 54998849Sken */ 55098849Sken origwin = CSR_READ_4(sc, TI_WINBASE); 55198849Sken 55298849Sken while(cnt) { 55398849Sken bus_size_t ti_offset; 55498849Sken 55598849Sken if (cnt < TI_WINLEN) 55698849Sken segsize = cnt; 55798849Sken else 55898849Sken segsize = TI_WINLEN - (segptr % TI_WINLEN); 55998849Sken CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1))); 56098849Sken 56198849Sken ti_offset = TI_WINDOW + (segptr & (TI_WINLEN -1)); 56298849Sken 56398849Sken if (readdata) { 56498849Sken 56598849Sken bus_space_read_region_4(sc->ti_btag, 56698849Sken sc->ti_bhandle, ti_offset, 56798849Sken (u_int32_t *)tmparray, 56898849Sken segsize >> 2); 56998849Sken if (useraddr) { 57098849Sken /* 57198849Sken * Yeah, this is a little on the kludgy 57298849Sken * side, but at least this code is only 57398849Sken * used for debugging. 57498849Sken */ 57598849Sken ti_bcopy_swap(tmparray, tmparray2, segsize, 57698849Sken TI_SWAP_NTOH); 57798849Sken 57898849Sken if (first_pass) { 57998849Sken copyout(&tmparray2[segresid], ptr, 58098849Sken segsize - segresid); 58198849Sken first_pass = 0; 58298849Sken } else 58398849Sken copyout(tmparray2, ptr, segsize); 58498849Sken } else { 58598849Sken if (first_pass) { 58698849Sken 58798849Sken ti_bcopy_swap(tmparray, tmparray2, 58898849Sken segsize, TI_SWAP_NTOH); 58998849Sken bcopy(&tmparray2[segresid], ptr, 59098849Sken segsize - segresid); 59198849Sken first_pass = 0; 59298849Sken } else 59398849Sken ti_bcopy_swap(tmparray, ptr, segsize, 59498849Sken TI_SWAP_NTOH); 59598849Sken } 59698849Sken 59798849Sken } else { 59898849Sken if (useraddr) { 59998849Sken copyin(ptr, tmparray2, segsize); 60098849Sken ti_bcopy_swap(tmparray2, tmparray, segsize, 60198849Sken TI_SWAP_HTON); 60298849Sken } else 60398849Sken ti_bcopy_swap(ptr, tmparray, segsize, 60498849Sken TI_SWAP_HTON); 60598849Sken 60698849Sken bus_space_write_region_4(sc->ti_btag, 60798849Sken sc->ti_bhandle, ti_offset, 60898849Sken (u_int32_t *)tmparray, 60998849Sken segsize >> 2); 61098849Sken } 61198849Sken segptr += segsize; 61298849Sken ptr += segsize; 61398849Sken cnt -= segsize; 61498849Sken } 61598849Sken 61698849Sken /* 61798849Sken * Handle leftover, non-word-aligned bytes. 61898849Sken */ 61998849Sken if (resid != 0) { 62098849Sken u_int32_t tmpval, tmpval2; 62198849Sken bus_size_t ti_offset; 62298849Sken 62398849Sken /* 62498849Sken * Set the segment pointer. 62598849Sken */ 62698849Sken CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1))); 62798849Sken 62898849Sken ti_offset = TI_WINDOW + (segptr & (TI_WINLEN - 1)); 62998849Sken 63098849Sken /* 63198849Sken * First, grab whatever is in our source/destination. 63298849Sken * We'll obviously need this for reads, but also for 63398849Sken * writes, since we'll be doing read/modify/write. 63498849Sken */ 63598849Sken bus_space_read_region_4(sc->ti_btag, sc->ti_bhandle, 63698849Sken ti_offset, &tmpval, 1); 63798849Sken 63898849Sken /* 63998849Sken * Next, translate this from little-endian to big-endian 64098849Sken * (at least on i386 boxes). 64198849Sken */ 64298849Sken tmpval2 = ntohl(tmpval); 64398849Sken 64498849Sken if (readdata) { 64598849Sken /* 64698849Sken * If we're reading, just copy the leftover number 64798849Sken * of bytes from the host byte order buffer to 64898849Sken * the user's buffer. 64998849Sken */ 65098849Sken if (useraddr) 65198849Sken copyout(&tmpval2, ptr, resid); 65298849Sken else 65398849Sken bcopy(&tmpval2, ptr, resid); 65498849Sken } else { 65598849Sken /* 65698849Sken * If we're writing, first copy the bytes to be 65798849Sken * written into the network byte order buffer, 65898849Sken * leaving the rest of the buffer with whatever was 65998849Sken * originally in there. Then, swap the bytes 66098849Sken * around into host order and write them out. 66198849Sken * 66298849Sken * XXX KDM the read side of this has been verified 66398849Sken * to work, but the write side of it has not been 66498849Sken * verified. So user beware. 66598849Sken */ 66698849Sken if (useraddr) 66798849Sken copyin(ptr, &tmpval2, resid); 66898849Sken else 66998849Sken bcopy(ptr, &tmpval2, resid); 67098849Sken 67198849Sken tmpval = htonl(tmpval2); 67298849Sken 67398849Sken bus_space_write_region_4(sc->ti_btag, sc->ti_bhandle, 67498849Sken ti_offset, &tmpval, 1); 67598849Sken } 67698849Sken } 67798849Sken 67898849Sken CSR_WRITE_4(sc, TI_WINBASE, origwin); 67998849Sken 68098849Sken TI_UNLOCK(sc); 68198849Sken 68298849Sken return(0); 68398849Sken} 68498849Sken 68598849Skenstatic int 68698849Skenti_copy_scratch(sc, tigon_addr, len, buf, useraddr, readdata, cpu) 68798849Sken struct ti_softc *sc; 68898849Sken u_int32_t tigon_addr, len; 68998849Sken caddr_t buf; 69098849Sken int useraddr, readdata; 69198849Sken int cpu; 69298849Sken{ 69398849Sken u_int32_t segptr; 69498849Sken int cnt; 69598849Sken u_int32_t tmpval, tmpval2; 69698849Sken caddr_t ptr; 69798849Sken 69898849Sken /* 69998849Sken * At the moment, we don't handle non-aligned cases, we just bail. 70098849Sken * If this proves to be a problem, it will be fixed. 70198849Sken */ 70298849Sken if (tigon_addr & 0x3) { 70398849Sken printf("ti%d: ti_copy_scratch: tigon address %#x isn't " 70498849Sken "word-aligned\n", sc->ti_unit, tigon_addr); 70598849Sken return(EINVAL); 70698849Sken } 70798849Sken 70898849Sken if (len & 0x3) { 70998849Sken printf("ti%d: ti_copy_scratch: transfer length %d isn't " 71098849Sken "word-aligned\n", sc->ti_unit, len); 71198849Sken return(EINVAL); 71298849Sken } 71398849Sken 71498849Sken segptr = tigon_addr; 71598849Sken cnt = len; 71698849Sken ptr = buf; 71798849Sken 71898849Sken TI_LOCK(sc); 71998849Sken 72098849Sken while (cnt) { 72198849Sken CSR_WRITE_4(sc, CPU_REG(TI_SRAM_ADDR, cpu), segptr); 72298849Sken 72398849Sken if (readdata) { 72498849Sken tmpval2 = CSR_READ_4(sc, CPU_REG(TI_SRAM_DATA, cpu)); 72598849Sken 72698849Sken tmpval = ntohl(tmpval2); 72798849Sken 72898849Sken /* 72998849Sken * Note: I've used this debugging interface 73098849Sken * extensively with Alteon's 12.3.15 firmware, 73198849Sken * compiled with GCC 2.7.2.1 and binutils 2.9.1. 73298849Sken * 73398849Sken * When you compile the firmware without 73498849Sken * optimization, which is necessary sometimes in 73598849Sken * order to properly step through it, you sometimes 73698849Sken * read out a bogus value of 0xc0017c instead of 73798849Sken * whatever was supposed to be in that scratchpad 73898849Sken * location. That value is on the stack somewhere, 73998849Sken * but I've never been able to figure out what was 74098849Sken * causing the problem. 74198849Sken * 74298849Sken * The address seems to pop up in random places, 74398849Sken * often not in the same place on two subsequent 74498849Sken * reads. 74598849Sken * 74698849Sken * In any case, the underlying data doesn't seem 74798849Sken * to be affected, just the value read out. 74898849Sken * 74998849Sken * KDM, 3/7/2000 75098849Sken */ 75198849Sken 75298849Sken if (tmpval2 == 0xc0017c) 75398849Sken printf("ti%d: found 0xc0017c at %#x " 75498849Sken "(tmpval2)\n", sc->ti_unit, segptr); 75598849Sken 75698849Sken if (tmpval == 0xc0017c) 75798849Sken printf("ti%d: found 0xc0017c at %#x " 75898849Sken "(tmpval)\n", sc->ti_unit, segptr); 75998849Sken 76098849Sken if (useraddr) 76198849Sken copyout(&tmpval, ptr, 4); 76298849Sken else 76398849Sken bcopy(&tmpval, ptr, 4); 76498849Sken } else { 76598849Sken if (useraddr) 76698849Sken copyin(ptr, &tmpval2, 4); 76798849Sken else 76898849Sken bcopy(ptr, &tmpval2, 4); 76998849Sken 77098849Sken tmpval = htonl(tmpval2); 77198849Sken 77298849Sken CSR_WRITE_4(sc, CPU_REG(TI_SRAM_DATA, cpu), tmpval); 77398849Sken } 77498849Sken 77598849Sken cnt -= 4; 77698849Sken segptr += 4; 77798849Sken ptr += 4; 77898849Sken } 77998849Sken 78098849Sken TI_UNLOCK(sc); 78198849Sken 78298849Sken return(0); 78398849Sken} 78498849Sken 78598849Skenstatic int 78698849Skenti_bcopy_swap(src, dst, len, swap_type) 78798849Sken const void *src; 78898849Sken void *dst; 78998849Sken size_t len; 79098849Sken ti_swap_type swap_type; 79198849Sken{ 79298849Sken const u_int8_t *tmpsrc; 79398849Sken u_int8_t *tmpdst; 79498849Sken size_t tmplen; 79598849Sken 79698849Sken if (len & 0x3) { 79798849Sken printf("ti_bcopy_swap: length %d isn't 32-bit aligned\n", 79898849Sken len); 79998849Sken return(-1); 80098849Sken } 80198849Sken 80298849Sken tmpsrc = src; 80398849Sken tmpdst = dst; 80498849Sken tmplen = len; 80598849Sken 80698849Sken while (tmplen) { 80798849Sken if (swap_type == TI_SWAP_NTOH) 80898849Sken *(u_int32_t *)tmpdst = 80998849Sken ntohl(*(const u_int32_t *)tmpsrc); 81098849Sken else 81198849Sken *(u_int32_t *)tmpdst = 81298849Sken htonl(*(const u_int32_t *)tmpsrc); 81398849Sken 81498849Sken tmpsrc += 4; 81598849Sken tmpdst += 4; 81698849Sken tmplen -= 4; 81798849Sken } 81898849Sken 81998849Sken return(0); 82098849Sken} 82198849Sken 82245386Swpaul/* 82345386Swpaul * Load firmware image into the NIC. Check that the firmware revision 82445386Swpaul * is acceptable and see if we want the firmware for the Tigon 1 or 82545386Swpaul * Tigon 2. 82645386Swpaul */ 82745386Swpaulstatic void ti_loadfw(sc) 82845386Swpaul struct ti_softc *sc; 82945386Swpaul{ 83045386Swpaul switch(sc->ti_hwrev) { 83145386Swpaul case TI_HWREV_TIGON: 83245386Swpaul if (tigonFwReleaseMajor != TI_FIRMWARE_MAJOR || 83345386Swpaul tigonFwReleaseMinor != TI_FIRMWARE_MINOR || 83445386Swpaul tigonFwReleaseFix != TI_FIRMWARE_FIX) { 83545386Swpaul printf("ti%d: firmware revision mismatch; want " 83645386Swpaul "%d.%d.%d, got %d.%d.%d\n", sc->ti_unit, 83745386Swpaul TI_FIRMWARE_MAJOR, TI_FIRMWARE_MINOR, 83845386Swpaul TI_FIRMWARE_FIX, tigonFwReleaseMajor, 83945386Swpaul tigonFwReleaseMinor, tigonFwReleaseFix); 84045386Swpaul return; 84145386Swpaul } 84245386Swpaul ti_mem(sc, tigonFwTextAddr, tigonFwTextLen, 84345386Swpaul (caddr_t)tigonFwText); 84445386Swpaul ti_mem(sc, tigonFwDataAddr, tigonFwDataLen, 84545386Swpaul (caddr_t)tigonFwData); 84645386Swpaul ti_mem(sc, tigonFwRodataAddr, tigonFwRodataLen, 84745386Swpaul (caddr_t)tigonFwRodata); 84845386Swpaul ti_mem(sc, tigonFwBssAddr, tigonFwBssLen, NULL); 84945386Swpaul ti_mem(sc, tigonFwSbssAddr, tigonFwSbssLen, NULL); 85045386Swpaul CSR_WRITE_4(sc, TI_CPU_PROGRAM_COUNTER, tigonFwStartAddr); 85145386Swpaul break; 85245386Swpaul case TI_HWREV_TIGON_II: 85345386Swpaul if (tigon2FwReleaseMajor != TI_FIRMWARE_MAJOR || 85445386Swpaul tigon2FwReleaseMinor != TI_FIRMWARE_MINOR || 85545386Swpaul tigon2FwReleaseFix != TI_FIRMWARE_FIX) { 85645386Swpaul printf("ti%d: firmware revision mismatch; want " 85745386Swpaul "%d.%d.%d, got %d.%d.%d\n", sc->ti_unit, 85845386Swpaul TI_FIRMWARE_MAJOR, TI_FIRMWARE_MINOR, 85945386Swpaul TI_FIRMWARE_FIX, tigon2FwReleaseMajor, 86045386Swpaul tigon2FwReleaseMinor, tigon2FwReleaseFix); 86145386Swpaul return; 86245386Swpaul } 86345386Swpaul ti_mem(sc, tigon2FwTextAddr, tigon2FwTextLen, 86445386Swpaul (caddr_t)tigon2FwText); 86545386Swpaul ti_mem(sc, tigon2FwDataAddr, tigon2FwDataLen, 86645386Swpaul (caddr_t)tigon2FwData); 86745386Swpaul ti_mem(sc, tigon2FwRodataAddr, tigon2FwRodataLen, 86845386Swpaul (caddr_t)tigon2FwRodata); 86945386Swpaul ti_mem(sc, tigon2FwBssAddr, tigon2FwBssLen, NULL); 87045386Swpaul ti_mem(sc, tigon2FwSbssAddr, tigon2FwSbssLen, NULL); 87145386Swpaul CSR_WRITE_4(sc, TI_CPU_PROGRAM_COUNTER, tigon2FwStartAddr); 87245386Swpaul break; 87345386Swpaul default: 87445386Swpaul printf("ti%d: can't load firmware: unknown hardware rev\n", 87545386Swpaul sc->ti_unit); 87645386Swpaul break; 87745386Swpaul } 87845386Swpaul 87945386Swpaul return; 88045386Swpaul} 88145386Swpaul 88245386Swpaul/* 88345386Swpaul * Send the NIC a command via the command ring. 88445386Swpaul */ 88545386Swpaulstatic void ti_cmd(sc, cmd) 88645386Swpaul struct ti_softc *sc; 88745386Swpaul struct ti_cmd_desc *cmd; 88845386Swpaul{ 88945386Swpaul u_int32_t index; 89045386Swpaul 89145386Swpaul if (sc->ti_rdata->ti_cmd_ring == NULL) 89245386Swpaul return; 89345386Swpaul 89445386Swpaul index = sc->ti_cmd_saved_prodidx; 89545386Swpaul CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4), *(u_int32_t *)(cmd)); 89645386Swpaul TI_INC(index, TI_CMD_RING_CNT); 89745386Swpaul CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, index); 89845386Swpaul sc->ti_cmd_saved_prodidx = index; 89945386Swpaul 90045386Swpaul return; 90145386Swpaul} 90245386Swpaul 90345386Swpaul/* 90445386Swpaul * Send the NIC an extended command. The 'len' parameter specifies the 90545386Swpaul * number of command slots to include after the initial command. 90645386Swpaul */ 90745386Swpaulstatic void ti_cmd_ext(sc, cmd, arg, len) 90845386Swpaul struct ti_softc *sc; 90945386Swpaul struct ti_cmd_desc *cmd; 91045386Swpaul caddr_t arg; 91145386Swpaul int len; 91245386Swpaul{ 91345386Swpaul u_int32_t index; 91445386Swpaul register int i; 91545386Swpaul 91645386Swpaul if (sc->ti_rdata->ti_cmd_ring == NULL) 91745386Swpaul return; 91845386Swpaul 91945386Swpaul index = sc->ti_cmd_saved_prodidx; 92045386Swpaul CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4), *(u_int32_t *)(cmd)); 92145386Swpaul TI_INC(index, TI_CMD_RING_CNT); 92245386Swpaul for (i = 0; i < len; i++) { 92345386Swpaul CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4), 92445386Swpaul *(u_int32_t *)(&arg[i * 4])); 92545386Swpaul TI_INC(index, TI_CMD_RING_CNT); 92645386Swpaul } 92745386Swpaul CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, index); 92845386Swpaul sc->ti_cmd_saved_prodidx = index; 92945386Swpaul 93045386Swpaul return; 93145386Swpaul} 93245386Swpaul 93345386Swpaul/* 93445386Swpaul * Handle events that have triggered interrupts. 93545386Swpaul */ 93645386Swpaulstatic void ti_handle_events(sc) 93745386Swpaul struct ti_softc *sc; 93845386Swpaul{ 93945386Swpaul struct ti_event_desc *e; 94045386Swpaul 94145386Swpaul if (sc->ti_rdata->ti_event_ring == NULL) 94245386Swpaul return; 94345386Swpaul 94445386Swpaul while (sc->ti_ev_saved_considx != sc->ti_ev_prodidx.ti_idx) { 94545386Swpaul e = &sc->ti_rdata->ti_event_ring[sc->ti_ev_saved_considx]; 94645386Swpaul switch(e->ti_event) { 94745386Swpaul case TI_EV_LINKSTAT_CHANGED: 94845386Swpaul sc->ti_linkstat = e->ti_code; 94945386Swpaul if (e->ti_code == TI_EV_CODE_LINK_UP) 95045386Swpaul printf("ti%d: 10/100 link up\n", sc->ti_unit); 95145386Swpaul else if (e->ti_code == TI_EV_CODE_GIG_LINK_UP) 95245386Swpaul printf("ti%d: gigabit link up\n", sc->ti_unit); 95345386Swpaul else if (e->ti_code == TI_EV_CODE_LINK_DOWN) 95445386Swpaul printf("ti%d: link down\n", sc->ti_unit); 95545386Swpaul break; 95645386Swpaul case TI_EV_ERROR: 95745386Swpaul if (e->ti_code == TI_EV_CODE_ERR_INVAL_CMD) 95845386Swpaul printf("ti%d: invalid command\n", sc->ti_unit); 95945386Swpaul else if (e->ti_code == TI_EV_CODE_ERR_UNIMP_CMD) 96045386Swpaul printf("ti%d: unknown command\n", sc->ti_unit); 96145386Swpaul else if (e->ti_code == TI_EV_CODE_ERR_BADCFG) 96245386Swpaul printf("ti%d: bad config data\n", sc->ti_unit); 96345386Swpaul break; 96445386Swpaul case TI_EV_FIRMWARE_UP: 96545386Swpaul ti_init2(sc); 96645386Swpaul break; 96745386Swpaul case TI_EV_STATS_UPDATED: 96845386Swpaul ti_stats_update(sc); 96945386Swpaul break; 97045386Swpaul case TI_EV_RESET_JUMBO_RING: 97145386Swpaul case TI_EV_MCAST_UPDATED: 97245386Swpaul /* Who cares. */ 97345386Swpaul break; 97445386Swpaul default: 97545386Swpaul printf("ti%d: unknown event: %d\n", 97645386Swpaul sc->ti_unit, e->ti_event); 97745386Swpaul break; 97845386Swpaul } 97945386Swpaul /* Advance the consumer index. */ 98045386Swpaul TI_INC(sc->ti_ev_saved_considx, TI_EVENT_RING_CNT); 98145386Swpaul CSR_WRITE_4(sc, TI_GCR_EVENTCONS_IDX, sc->ti_ev_saved_considx); 98245386Swpaul } 98345386Swpaul 98445386Swpaul return; 98545386Swpaul} 98645386Swpaul 98798849Sken#ifdef TI_PRIVATE_JUMBOS 98898849Sken 98945386Swpaul/* 99045386Swpaul * Memory management for the jumbo receive ring is a pain in the 99145386Swpaul * butt. We need to allocate at least 9018 bytes of space per frame, 99245386Swpaul * _and_ it has to be contiguous (unless you use the extended 99345386Swpaul * jumbo descriptor format). Using malloc() all the time won't 99445386Swpaul * work: malloc() allocates memory in powers of two, which means we 99545386Swpaul * would end up wasting a considerable amount of space by allocating 99645386Swpaul * 9K chunks. We don't have a jumbo mbuf cluster pool. Thus, we have 99745386Swpaul * to do our own memory management. 99845386Swpaul * 99945386Swpaul * The driver needs to allocate a contiguous chunk of memory at boot 100045386Swpaul * time. We then chop this up ourselves into 9K pieces and use them 100145386Swpaul * as external mbuf storage. 100245386Swpaul * 100345386Swpaul * One issue here is how much memory to allocate. The jumbo ring has 100445386Swpaul * 256 slots in it, but at 9K per slot than can consume over 2MB of 100545386Swpaul * RAM. This is a bit much, especially considering we also need 100645386Swpaul * RAM for the standard ring and mini ring (on the Tigon 2). To 100745386Swpaul * save space, we only actually allocate enough memory for 64 slots 100845386Swpaul * by default, which works out to between 500 and 600K. This can 100945386Swpaul * be tuned by changing a #define in if_tireg.h. 101045386Swpaul */ 101145386Swpaul 101245386Swpaulstatic int ti_alloc_jumbo_mem(sc) 101345386Swpaul struct ti_softc *sc; 101445386Swpaul{ 101545386Swpaul caddr_t ptr; 101645386Swpaul register int i; 101745386Swpaul struct ti_jpool_entry *entry; 101845386Swpaul 101945386Swpaul /* Grab a big chunk o' storage. */ 102045386Swpaul sc->ti_cdata.ti_jumbo_buf = contigmalloc(TI_JMEM, M_DEVBUF, 102150548Sbde M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); 102245386Swpaul 102345386Swpaul if (sc->ti_cdata.ti_jumbo_buf == NULL) { 102445386Swpaul printf("ti%d: no memory for jumbo buffers!\n", sc->ti_unit); 102545386Swpaul return(ENOBUFS); 102645386Swpaul } 102745386Swpaul 102845386Swpaul SLIST_INIT(&sc->ti_jfree_listhead); 102945386Swpaul SLIST_INIT(&sc->ti_jinuse_listhead); 103045386Swpaul 103145386Swpaul /* 103245386Swpaul * Now divide it up into 9K pieces and save the addresses 103367405Sbmilekic * in an array. 103445386Swpaul */ 103545386Swpaul ptr = sc->ti_cdata.ti_jumbo_buf; 103645386Swpaul for (i = 0; i < TI_JSLOTS; i++) { 103767405Sbmilekic sc->ti_cdata.ti_jslots[i] = ptr; 103867405Sbmilekic ptr += TI_JLEN; 103945386Swpaul entry = malloc(sizeof(struct ti_jpool_entry), 104045386Swpaul M_DEVBUF, M_NOWAIT); 104145386Swpaul if (entry == NULL) { 104262793Sgallatin contigfree(sc->ti_cdata.ti_jumbo_buf, TI_JMEM, 104362793Sgallatin M_DEVBUF); 104445386Swpaul sc->ti_cdata.ti_jumbo_buf = NULL; 104545386Swpaul printf("ti%d: no memory for jumbo " 104645386Swpaul "buffer queue!\n", sc->ti_unit); 104745386Swpaul return(ENOBUFS); 104845386Swpaul } 104945386Swpaul entry->slot = i; 105045386Swpaul SLIST_INSERT_HEAD(&sc->ti_jfree_listhead, entry, jpool_entries); 105145386Swpaul } 105245386Swpaul 105345386Swpaul return(0); 105445386Swpaul} 105545386Swpaul 105645386Swpaul/* 105745386Swpaul * Allocate a jumbo buffer. 105845386Swpaul */ 105945386Swpaulstatic void *ti_jalloc(sc) 106045386Swpaul struct ti_softc *sc; 106145386Swpaul{ 106245386Swpaul struct ti_jpool_entry *entry; 106345386Swpaul 106445386Swpaul entry = SLIST_FIRST(&sc->ti_jfree_listhead); 106545386Swpaul 106645386Swpaul if (entry == NULL) { 106745386Swpaul printf("ti%d: no free jumbo buffers\n", sc->ti_unit); 106845386Swpaul return(NULL); 106945386Swpaul } 107045386Swpaul 107145386Swpaul SLIST_REMOVE_HEAD(&sc->ti_jfree_listhead, jpool_entries); 107245386Swpaul SLIST_INSERT_HEAD(&sc->ti_jinuse_listhead, entry, jpool_entries); 107367405Sbmilekic return(sc->ti_cdata.ti_jslots[entry->slot]); 107445386Swpaul} 107545386Swpaul 107645386Swpaul/* 107745386Swpaul * Release a jumbo buffer. 107845386Swpaul */ 107964837Sdwmalonestatic void ti_jfree(buf, args) 108099058Salfred void *buf; 108164837Sdwmalone void *args; 108245386Swpaul{ 108345386Swpaul struct ti_softc *sc; 108445386Swpaul int i; 108545386Swpaul struct ti_jpool_entry *entry; 108645386Swpaul 108745386Swpaul /* Extract the softc struct pointer. */ 108867405Sbmilekic sc = (struct ti_softc *)args; 108945386Swpaul 109045386Swpaul if (sc == NULL) 109167405Sbmilekic panic("ti_jfree: didn't get softc pointer!"); 109245386Swpaul 109345386Swpaul /* calculate the slot this buffer belongs to */ 109467405Sbmilekic i = ((vm_offset_t)buf 109545386Swpaul - (vm_offset_t)sc->ti_cdata.ti_jumbo_buf) / TI_JLEN; 109645386Swpaul 109745386Swpaul if ((i < 0) || (i >= TI_JSLOTS)) 109845386Swpaul panic("ti_jfree: asked to free buffer that we don't manage!"); 109945386Swpaul 110064837Sdwmalone entry = SLIST_FIRST(&sc->ti_jinuse_listhead); 110164837Sdwmalone if (entry == NULL) 110264837Sdwmalone panic("ti_jfree: buffer not in use!"); 110364837Sdwmalone entry->slot = i; 110464837Sdwmalone SLIST_REMOVE_HEAD(&sc->ti_jinuse_listhead, jpool_entries); 110564837Sdwmalone SLIST_INSERT_HEAD(&sc->ti_jfree_listhead, entry, jpool_entries); 110664837Sdwmalone 110745386Swpaul return; 110845386Swpaul} 110945386Swpaul 111098849Sken#endif /* TI_PRIVATE_JUMBOS */ 111145386Swpaul 111245386Swpaul/* 111345386Swpaul * Intialize a standard receive ring descriptor. 111445386Swpaul */ 111545386Swpaulstatic int ti_newbuf_std(sc, i, m) 111645386Swpaul struct ti_softc *sc; 111745386Swpaul int i; 111845386Swpaul struct mbuf *m; 111945386Swpaul{ 112045386Swpaul struct mbuf *m_new = NULL; 112145386Swpaul struct ti_rx_desc *r; 112245386Swpaul 112349036Swpaul if (m == NULL) { 112445386Swpaul MGETHDR(m_new, M_DONTWAIT, MT_DATA); 112587846Sluigi if (m_new == NULL) 112645386Swpaul return(ENOBUFS); 112745386Swpaul 112845386Swpaul MCLGET(m_new, M_DONTWAIT); 112945386Swpaul if (!(m_new->m_flags & M_EXT)) { 113045386Swpaul m_freem(m_new); 113145386Swpaul return(ENOBUFS); 113245386Swpaul } 113349036Swpaul m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; 113449036Swpaul } else { 113549036Swpaul m_new = m; 113649036Swpaul m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; 113749036Swpaul m_new->m_data = m_new->m_ext.ext_buf; 113845386Swpaul } 113945386Swpaul 114048597Swpaul m_adj(m_new, ETHER_ALIGN); 114145386Swpaul sc->ti_cdata.ti_rx_std_chain[i] = m_new; 114245386Swpaul r = &sc->ti_rdata->ti_rx_std_ring[i]; 114345386Swpaul TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t)); 114445386Swpaul r->ti_type = TI_BDTYPE_RECV_BD; 114545386Swpaul r->ti_flags = 0; 114658698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 114758698Sjlemon r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM; 114849036Swpaul r->ti_len = m_new->m_len; 114945386Swpaul r->ti_idx = i; 115045386Swpaul 115145386Swpaul return(0); 115245386Swpaul} 115345386Swpaul 115445386Swpaul/* 115545386Swpaul * Intialize a mini receive ring descriptor. This only applies to 115645386Swpaul * the Tigon 2. 115745386Swpaul */ 115845386Swpaulstatic int ti_newbuf_mini(sc, i, m) 115945386Swpaul struct ti_softc *sc; 116045386Swpaul int i; 116145386Swpaul struct mbuf *m; 116245386Swpaul{ 116345386Swpaul struct mbuf *m_new = NULL; 116445386Swpaul struct ti_rx_desc *r; 116545386Swpaul 116649036Swpaul if (m == NULL) { 116745386Swpaul MGETHDR(m_new, M_DONTWAIT, MT_DATA); 116845386Swpaul if (m_new == NULL) { 116945386Swpaul return(ENOBUFS); 117045386Swpaul } 117149036Swpaul m_new->m_len = m_new->m_pkthdr.len = MHLEN; 117249036Swpaul } else { 117349036Swpaul m_new = m; 117449036Swpaul m_new->m_data = m_new->m_pktdat; 117549036Swpaul m_new->m_len = m_new->m_pkthdr.len = MHLEN; 117645386Swpaul } 117749036Swpaul 117848597Swpaul m_adj(m_new, ETHER_ALIGN); 117945386Swpaul r = &sc->ti_rdata->ti_rx_mini_ring[i]; 118045386Swpaul sc->ti_cdata.ti_rx_mini_chain[i] = m_new; 118145386Swpaul TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t)); 118245386Swpaul r->ti_type = TI_BDTYPE_RECV_BD; 118345386Swpaul r->ti_flags = TI_BDFLAG_MINI_RING; 118458698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 118558698Sjlemon r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM; 118649036Swpaul r->ti_len = m_new->m_len; 118745386Swpaul r->ti_idx = i; 118845386Swpaul 118945386Swpaul return(0); 119045386Swpaul} 119145386Swpaul 119298849Sken#ifdef TI_PRIVATE_JUMBOS 119398849Sken 119445386Swpaul/* 119545386Swpaul * Initialize a jumbo receive ring descriptor. This allocates 119645386Swpaul * a jumbo buffer from the pool managed internally by the driver. 119745386Swpaul */ 119845386Swpaulstatic int ti_newbuf_jumbo(sc, i, m) 119945386Swpaul struct ti_softc *sc; 120045386Swpaul int i; 120145386Swpaul struct mbuf *m; 120245386Swpaul{ 120345386Swpaul struct mbuf *m_new = NULL; 120445386Swpaul struct ti_rx_desc *r; 120545386Swpaul 120649036Swpaul if (m == NULL) { 120745386Swpaul caddr_t *buf = NULL; 120845386Swpaul 120945386Swpaul /* Allocate the mbuf. */ 121045386Swpaul MGETHDR(m_new, M_DONTWAIT, MT_DATA); 121145386Swpaul if (m_new == NULL) { 121245386Swpaul return(ENOBUFS); 121345386Swpaul } 121445386Swpaul 121545386Swpaul /* Allocate the jumbo buffer */ 121645386Swpaul buf = ti_jalloc(sc); 121745386Swpaul if (buf == NULL) { 121845386Swpaul m_freem(m_new); 121945386Swpaul printf("ti%d: jumbo allocation failed " 122045386Swpaul "-- packet dropped!\n", sc->ti_unit); 122145386Swpaul return(ENOBUFS); 122245386Swpaul } 122345386Swpaul 122445386Swpaul /* Attach the buffer to the mbuf. */ 122564837Sdwmalone m_new->m_data = (void *) buf; 122664837Sdwmalone m_new->m_len = m_new->m_pkthdr.len = TI_JUMBO_FRAMELEN; 122767405Sbmilekic MEXTADD(m_new, buf, TI_JUMBO_FRAMELEN, ti_jfree, 122868621Sbmilekic (struct ti_softc *)sc, 0, EXT_NET_DRV); 122949036Swpaul } else { 123049036Swpaul m_new = m; 123149036Swpaul m_new->m_data = m_new->m_ext.ext_buf; 123249036Swpaul m_new->m_ext.ext_size = TI_JUMBO_FRAMELEN; 123345386Swpaul } 123445386Swpaul 123549780Swpaul m_adj(m_new, ETHER_ALIGN); 123645386Swpaul /* Set up the descriptor. */ 123745386Swpaul r = &sc->ti_rdata->ti_rx_jumbo_ring[i]; 123845386Swpaul sc->ti_cdata.ti_rx_jumbo_chain[i] = m_new; 123945386Swpaul TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t)); 124045386Swpaul r->ti_type = TI_BDTYPE_RECV_JUMBO_BD; 124145386Swpaul r->ti_flags = TI_BDFLAG_JUMBO_RING; 124258698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 124358698Sjlemon r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM; 124449036Swpaul r->ti_len = m_new->m_len; 124545386Swpaul r->ti_idx = i; 124645386Swpaul 124745386Swpaul return(0); 124845386Swpaul} 124945386Swpaul 125098849Sken#else 125198849Sken#include <vm/vm_page.h> 125298849Sken 125398849Sken#if (PAGE_SIZE == 4096) 125498849Sken#define NPAYLOAD 2 125598849Sken#else 125698849Sken#define NPAYLOAD 1 125798849Sken#endif 125898849Sken 125998849Sken#define TCP_HDR_LEN (52 + sizeof(struct ether_header)) 126098849Sken#define UDP_HDR_LEN (28 + sizeof(struct ether_header)) 126198849Sken#define NFS_HDR_LEN (UDP_HDR_LEN) 126298849Skenint HDR_LEN = TCP_HDR_LEN; 126398849Sken 126498849Sken 126598849Sken /* 126698849Sken * Initialize a jumbo receive ring descriptor. This allocates 126798849Sken * a jumbo buffer from the pool managed internally by the driver. 126898849Sken */ 126998849Skenstatic int 127098849Skenti_newbuf_jumbo(sc, idx, m_old) 127198849Sken struct ti_softc *sc; 127298849Sken int idx; 127398849Sken struct mbuf *m_old; 127498849Sken{ 127598849Sken struct mbuf *cur, *m_new = NULL; 127698849Sken struct mbuf *m[3] = {NULL, NULL, NULL}; 127798849Sken struct ti_rx_desc_ext *r; 127898849Sken vm_page_t frame; 127998849Sken /* 1 extra buf to make nobufs easy*/ 128098849Sken caddr_t buf[3] = {NULL, NULL, NULL}; 128198849Sken int i; 128298849Sken 128398849Sken if (m_old != NULL) { 128498849Sken m_new = m_old; 128598849Sken cur = m_old->m_next; 128698849Sken for (i = 0; i <= NPAYLOAD; i++){ 128798849Sken m[i] = cur; 128898849Sken cur = cur->m_next; 128998849Sken } 129098849Sken } else { 129198849Sken /* Allocate the mbufs. */ 129298849Sken MGETHDR(m_new, M_DONTWAIT, MT_DATA); 129398849Sken if (m_new == NULL) { 129498849Sken printf("ti%d: mbuf allocation failed " 129598849Sken "-- packet dropped!\n", sc->ti_unit); 129698849Sken goto nobufs; 129798849Sken } 129898849Sken MGET(m[NPAYLOAD], M_DONTWAIT, MT_DATA); 129998849Sken if (m[NPAYLOAD] == NULL) { 130098849Sken printf("ti%d: cluster mbuf allocation failed " 130198849Sken "-- packet dropped!\n", sc->ti_unit); 130298849Sken goto nobufs; 130398849Sken } 130498849Sken MCLGET(m[NPAYLOAD], M_DONTWAIT); 130598849Sken if ((m[NPAYLOAD]->m_flags & M_EXT) == 0) { 130698849Sken printf("ti%d: mbuf allocation failed " 130798849Sken "-- packet dropped!\n", sc->ti_unit); 130898849Sken goto nobufs; 130998849Sken } 131098849Sken m[NPAYLOAD]->m_len = MCLBYTES; 131198849Sken 131298849Sken for (i = 0; i < NPAYLOAD; i++){ 131398849Sken MGET(m[i], M_DONTWAIT, MT_DATA); 131498849Sken if (m[i] == NULL) { 131598849Sken printf("ti%d: mbuf allocation failed " 131698849Sken "-- packet dropped!\n", sc->ti_unit); 131798849Sken goto nobufs; 131898849Sken } 131998849Sken if (!(frame = jumbo_pg_alloc())){ 132098849Sken printf("ti%d: buffer allocation failed " 132198849Sken "-- packet dropped!\n", sc->ti_unit); 132298849Sken printf(" index %d page %d\n", idx, i); 132398849Sken goto nobufs; 132498849Sken } 132598849Sken buf[i] = jumbo_phys_to_kva(VM_PAGE_TO_PHYS(frame)); 132698849Sken } 132798849Sken for (i = 0; i < NPAYLOAD; i++){ 132898849Sken /* Attach the buffer to the mbuf. */ 132998849Sken m[i]->m_data = (void *)buf[i]; 133098849Sken m[i]->m_len = PAGE_SIZE; 133198849Sken MEXTADD(m[i], (void *)buf[i], PAGE_SIZE, 133298849Sken jumbo_freem, NULL, 0, EXT_DISPOSABLE); 133398849Sken m[i]->m_next = m[i+1]; 133498849Sken } 133598849Sken /* link the buffers to the header */ 133698849Sken m_new->m_next = m[0]; 133798849Sken m_new->m_data += ETHER_ALIGN; 133898849Sken if (sc->ti_hdrsplit) 133998849Sken m_new->m_len = MHLEN - ETHER_ALIGN; 134098849Sken else 134198849Sken m_new->m_len = HDR_LEN; 134298849Sken m_new->m_pkthdr.len = NPAYLOAD * PAGE_SIZE + m_new->m_len; 134398849Sken } 134498849Sken 134598849Sken /* Set up the descriptor. */ 134698849Sken r = &sc->ti_rdata->ti_rx_jumbo_ring[idx]; 134798849Sken sc->ti_cdata.ti_rx_jumbo_chain[idx] = m_new; 134898849Sken TI_HOSTADDR(r->ti_addr0) = vtophys(mtod(m_new, caddr_t)); 134998849Sken r->ti_len0 = m_new->m_len; 135098849Sken 135198849Sken TI_HOSTADDR(r->ti_addr1) = vtophys(mtod(m[0], caddr_t)); 135298849Sken r->ti_len1 = PAGE_SIZE; 135398849Sken 135498849Sken TI_HOSTADDR(r->ti_addr2) = vtophys(mtod(m[1], caddr_t)); 135598849Sken r->ti_len2 = m[1]->m_ext.ext_size; /* could be PAGE_SIZE or MCLBYTES */ 135698849Sken 135798849Sken if (PAGE_SIZE == 4096) { 135898849Sken TI_HOSTADDR(r->ti_addr3) = vtophys(mtod(m[2], caddr_t)); 135998849Sken r->ti_len3 = MCLBYTES; 136098849Sken } else { 136198849Sken r->ti_len3 = 0; 136298849Sken } 136398849Sken r->ti_type = TI_BDTYPE_RECV_JUMBO_BD; 136498849Sken 136598849Sken r->ti_flags = TI_BDFLAG_JUMBO_RING|TI_RCB_FLAG_USE_EXT_RX_BD; 136698849Sken 136798849Sken if (sc->arpcom.ac_if.if_hwassist) 136898849Sken r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM|TI_BDFLAG_IP_CKSUM; 136998849Sken 137098849Sken r->ti_idx = idx; 137198849Sken 137298849Sken return(0); 137398849Sken 137498849Sken nobufs: 137598849Sken 137698849Sken /* 137798849Sken * Warning! : 137898849Sken * This can only be called before the mbufs are strung together. 137998849Sken * If the mbufs are strung together, m_freem() will free the chain, 138098849Sken * so that the later mbufs will be freed multiple times. 138198849Sken */ 138298849Sken if (m_new) 138398849Sken m_freem(m_new); 138498849Sken 138598849Sken for(i = 0; i < 3; i++){ 138698849Sken if (m[i]) 138798849Sken m_freem(m[i]); 138898849Sken if (buf[i]) 138998849Sken jumbo_pg_free((vm_offset_t)buf[i]); 139098849Sken } 139198849Sken return ENOBUFS; 139298849Sken} 139398849Sken#endif 139498849Sken 139598849Sken 139698849Sken 139745386Swpaul/* 139845386Swpaul * The standard receive ring has 512 entries in it. At 2K per mbuf cluster, 139945386Swpaul * that's 1MB or memory, which is a lot. For now, we fill only the first 140045386Swpaul * 256 ring entries and hope that our CPU is fast enough to keep up with 140145386Swpaul * the NIC. 140245386Swpaul */ 140345386Swpaulstatic int ti_init_rx_ring_std(sc) 140445386Swpaul struct ti_softc *sc; 140545386Swpaul{ 140645386Swpaul register int i; 140745386Swpaul struct ti_cmd_desc cmd; 140845386Swpaul 140945386Swpaul for (i = 0; i < TI_SSLOTS; i++) { 141045386Swpaul if (ti_newbuf_std(sc, i, NULL) == ENOBUFS) 141145386Swpaul return(ENOBUFS); 141245386Swpaul }; 141345386Swpaul 141445386Swpaul TI_UPDATE_STDPROD(sc, i - 1); 141548597Swpaul sc->ti_std = i - 1; 141645386Swpaul 141745386Swpaul return(0); 141845386Swpaul} 141945386Swpaul 142045386Swpaulstatic void ti_free_rx_ring_std(sc) 142145386Swpaul struct ti_softc *sc; 142245386Swpaul{ 142345386Swpaul register int i; 142445386Swpaul 142545386Swpaul for (i = 0; i < TI_STD_RX_RING_CNT; i++) { 142645386Swpaul if (sc->ti_cdata.ti_rx_std_chain[i] != NULL) { 142745386Swpaul m_freem(sc->ti_cdata.ti_rx_std_chain[i]); 142845386Swpaul sc->ti_cdata.ti_rx_std_chain[i] = NULL; 142945386Swpaul } 143045386Swpaul bzero((char *)&sc->ti_rdata->ti_rx_std_ring[i], 143145386Swpaul sizeof(struct ti_rx_desc)); 143245386Swpaul } 143345386Swpaul 143445386Swpaul return; 143545386Swpaul} 143645386Swpaul 143745386Swpaulstatic int ti_init_rx_ring_jumbo(sc) 143845386Swpaul struct ti_softc *sc; 143945386Swpaul{ 144045386Swpaul register int i; 144145386Swpaul struct ti_cmd_desc cmd; 144245386Swpaul 144363699Swpaul for (i = 0; i < TI_JUMBO_RX_RING_CNT; i++) { 144445386Swpaul if (ti_newbuf_jumbo(sc, i, NULL) == ENOBUFS) 144545386Swpaul return(ENOBUFS); 144645386Swpaul }; 144745386Swpaul 144845386Swpaul TI_UPDATE_JUMBOPROD(sc, i - 1); 144948597Swpaul sc->ti_jumbo = i - 1; 145045386Swpaul 145145386Swpaul return(0); 145245386Swpaul} 145345386Swpaul 145445386Swpaulstatic void ti_free_rx_ring_jumbo(sc) 145545386Swpaul struct ti_softc *sc; 145645386Swpaul{ 145745386Swpaul register int i; 145845386Swpaul 145945386Swpaul for (i = 0; i < TI_JUMBO_RX_RING_CNT; i++) { 146045386Swpaul if (sc->ti_cdata.ti_rx_jumbo_chain[i] != NULL) { 146145386Swpaul m_freem(sc->ti_cdata.ti_rx_jumbo_chain[i]); 146245386Swpaul sc->ti_cdata.ti_rx_jumbo_chain[i] = NULL; 146345386Swpaul } 146445386Swpaul bzero((char *)&sc->ti_rdata->ti_rx_jumbo_ring[i], 146545386Swpaul sizeof(struct ti_rx_desc)); 146645386Swpaul } 146745386Swpaul 146845386Swpaul return; 146945386Swpaul} 147045386Swpaul 147145386Swpaulstatic int ti_init_rx_ring_mini(sc) 147245386Swpaul struct ti_softc *sc; 147345386Swpaul{ 147445386Swpaul register int i; 147545386Swpaul 147645386Swpaul for (i = 0; i < TI_MSLOTS; i++) { 147745386Swpaul if (ti_newbuf_mini(sc, i, NULL) == ENOBUFS) 147845386Swpaul return(ENOBUFS); 147945386Swpaul }; 148045386Swpaul 148145386Swpaul TI_UPDATE_MINIPROD(sc, i - 1); 148248597Swpaul sc->ti_mini = i - 1; 148345386Swpaul 148445386Swpaul return(0); 148545386Swpaul} 148645386Swpaul 148745386Swpaulstatic void ti_free_rx_ring_mini(sc) 148845386Swpaul struct ti_softc *sc; 148945386Swpaul{ 149045386Swpaul register int i; 149145386Swpaul 149245386Swpaul for (i = 0; i < TI_MINI_RX_RING_CNT; i++) { 149345386Swpaul if (sc->ti_cdata.ti_rx_mini_chain[i] != NULL) { 149445386Swpaul m_freem(sc->ti_cdata.ti_rx_mini_chain[i]); 149545386Swpaul sc->ti_cdata.ti_rx_mini_chain[i] = NULL; 149645386Swpaul } 149745386Swpaul bzero((char *)&sc->ti_rdata->ti_rx_mini_ring[i], 149845386Swpaul sizeof(struct ti_rx_desc)); 149945386Swpaul } 150045386Swpaul 150145386Swpaul return; 150245386Swpaul} 150345386Swpaul 150445386Swpaulstatic void ti_free_tx_ring(sc) 150545386Swpaul struct ti_softc *sc; 150645386Swpaul{ 150745386Swpaul register int i; 150845386Swpaul 150945386Swpaul if (sc->ti_rdata->ti_tx_ring == NULL) 151045386Swpaul return; 151145386Swpaul 151245386Swpaul for (i = 0; i < TI_TX_RING_CNT; i++) { 151345386Swpaul if (sc->ti_cdata.ti_tx_chain[i] != NULL) { 151445386Swpaul m_freem(sc->ti_cdata.ti_tx_chain[i]); 151545386Swpaul sc->ti_cdata.ti_tx_chain[i] = NULL; 151645386Swpaul } 151745386Swpaul bzero((char *)&sc->ti_rdata->ti_tx_ring[i], 151845386Swpaul sizeof(struct ti_tx_desc)); 151945386Swpaul } 152045386Swpaul 152145386Swpaul return; 152245386Swpaul} 152345386Swpaul 152445386Swpaulstatic int ti_init_tx_ring(sc) 152545386Swpaul struct ti_softc *sc; 152645386Swpaul{ 152748011Swpaul sc->ti_txcnt = 0; 152845386Swpaul sc->ti_tx_saved_considx = 0; 152945386Swpaul CSR_WRITE_4(sc, TI_MB_SENDPROD_IDX, 0); 153045386Swpaul return(0); 153145386Swpaul} 153245386Swpaul 153345386Swpaul/* 153445386Swpaul * The Tigon 2 firmware has a new way to add/delete multicast addresses, 153545386Swpaul * but we have to support the old way too so that Tigon 1 cards will 153645386Swpaul * work. 153745386Swpaul */ 153845386Swpaulvoid ti_add_mcast(sc, addr) 153945386Swpaul struct ti_softc *sc; 154045386Swpaul struct ether_addr *addr; 154145386Swpaul{ 154245386Swpaul struct ti_cmd_desc cmd; 154345386Swpaul u_int16_t *m; 154445386Swpaul u_int32_t ext[2] = {0, 0}; 154545386Swpaul 154645386Swpaul m = (u_int16_t *)&addr->octet[0]; 154745386Swpaul 154845386Swpaul switch(sc->ti_hwrev) { 154945386Swpaul case TI_HWREV_TIGON: 155045386Swpaul CSR_WRITE_4(sc, TI_GCR_MAR0, htons(m[0])); 155145386Swpaul CSR_WRITE_4(sc, TI_GCR_MAR1, (htons(m[1]) << 16) | htons(m[2])); 155245386Swpaul TI_DO_CMD(TI_CMD_ADD_MCAST_ADDR, 0, 0); 155345386Swpaul break; 155445386Swpaul case TI_HWREV_TIGON_II: 155545386Swpaul ext[0] = htons(m[0]); 155645386Swpaul ext[1] = (htons(m[1]) << 16) | htons(m[2]); 155745386Swpaul TI_DO_CMD_EXT(TI_CMD_EXT_ADD_MCAST, 0, 0, (caddr_t)&ext, 2); 155845386Swpaul break; 155945386Swpaul default: 156045386Swpaul printf("ti%d: unknown hwrev\n", sc->ti_unit); 156145386Swpaul break; 156245386Swpaul } 156345386Swpaul 156445386Swpaul return; 156545386Swpaul} 156645386Swpaul 156745386Swpaulvoid ti_del_mcast(sc, addr) 156845386Swpaul struct ti_softc *sc; 156945386Swpaul struct ether_addr *addr; 157045386Swpaul{ 157145386Swpaul struct ti_cmd_desc cmd; 157245386Swpaul u_int16_t *m; 157345386Swpaul u_int32_t ext[2] = {0, 0}; 157445386Swpaul 157545386Swpaul m = (u_int16_t *)&addr->octet[0]; 157645386Swpaul 157745386Swpaul switch(sc->ti_hwrev) { 157845386Swpaul case TI_HWREV_TIGON: 157945386Swpaul CSR_WRITE_4(sc, TI_GCR_MAR0, htons(m[0])); 158045386Swpaul CSR_WRITE_4(sc, TI_GCR_MAR1, (htons(m[1]) << 16) | htons(m[2])); 158145386Swpaul TI_DO_CMD(TI_CMD_DEL_MCAST_ADDR, 0, 0); 158245386Swpaul break; 158345386Swpaul case TI_HWREV_TIGON_II: 158445386Swpaul ext[0] = htons(m[0]); 158545386Swpaul ext[1] = (htons(m[1]) << 16) | htons(m[2]); 158645386Swpaul TI_DO_CMD_EXT(TI_CMD_EXT_DEL_MCAST, 0, 0, (caddr_t)&ext, 2); 158745386Swpaul break; 158845386Swpaul default: 158945386Swpaul printf("ti%d: unknown hwrev\n", sc->ti_unit); 159045386Swpaul break; 159145386Swpaul } 159245386Swpaul 159345386Swpaul return; 159445386Swpaul} 159545386Swpaul 159645386Swpaul/* 159745386Swpaul * Configure the Tigon's multicast address filter. 159845386Swpaul * 159945386Swpaul * The actual multicast table management is a bit of a pain, thanks to 160045386Swpaul * slight brain damage on the part of both Alteon and us. With our 160145386Swpaul * multicast code, we are only alerted when the multicast address table 160245386Swpaul * changes and at that point we only have the current list of addresses: 160345386Swpaul * we only know the current state, not the previous state, so we don't 160445386Swpaul * actually know what addresses were removed or added. The firmware has 160545386Swpaul * state, but we can't get our grubby mits on it, and there is no 'delete 160645386Swpaul * all multicast addresses' command. Hence, we have to maintain our own 160745386Swpaul * state so we know what addresses have been programmed into the NIC at 160845386Swpaul * any given time. 160945386Swpaul */ 161045386Swpaulstatic void ti_setmulti(sc) 161145386Swpaul struct ti_softc *sc; 161245386Swpaul{ 161345386Swpaul struct ifnet *ifp; 161445386Swpaul struct ifmultiaddr *ifma; 161545386Swpaul struct ti_cmd_desc cmd; 161645386Swpaul struct ti_mc_entry *mc; 161745386Swpaul u_int32_t intrs; 161845386Swpaul 161945386Swpaul ifp = &sc->arpcom.ac_if; 162045386Swpaul 162145386Swpaul if (ifp->if_flags & IFF_ALLMULTI) { 162245386Swpaul TI_DO_CMD(TI_CMD_SET_ALLMULTI, TI_CMD_CODE_ALLMULTI_ENB, 0); 162345386Swpaul return; 162445386Swpaul } else { 162545386Swpaul TI_DO_CMD(TI_CMD_SET_ALLMULTI, TI_CMD_CODE_ALLMULTI_DIS, 0); 162645386Swpaul } 162745386Swpaul 162845386Swpaul /* Disable interrupts. */ 162945386Swpaul intrs = CSR_READ_4(sc, TI_MB_HOSTINTR); 163045386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1); 163145386Swpaul 163245386Swpaul /* First, zot all the existing filters. */ 163371999Sphk while (SLIST_FIRST(&sc->ti_mc_listhead) != NULL) { 163471999Sphk mc = SLIST_FIRST(&sc->ti_mc_listhead); 163545386Swpaul ti_del_mcast(sc, &mc->mc_addr); 163645386Swpaul SLIST_REMOVE_HEAD(&sc->ti_mc_listhead, mc_entries); 163745386Swpaul free(mc, M_DEVBUF); 163845386Swpaul } 163945386Swpaul 164045386Swpaul /* Now program new ones. */ 164172084Sphk TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 164245386Swpaul if (ifma->ifma_addr->sa_family != AF_LINK) 164345386Swpaul continue; 164445386Swpaul mc = malloc(sizeof(struct ti_mc_entry), M_DEVBUF, M_NOWAIT); 164545386Swpaul bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 164645386Swpaul (char *)&mc->mc_addr, ETHER_ADDR_LEN); 164745386Swpaul SLIST_INSERT_HEAD(&sc->ti_mc_listhead, mc, mc_entries); 164845386Swpaul ti_add_mcast(sc, &mc->mc_addr); 164945386Swpaul } 165045386Swpaul 165145386Swpaul /* Re-enable interrupts. */ 165245386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, intrs); 165345386Swpaul 165445386Swpaul return; 165545386Swpaul} 165645386Swpaul 165745386Swpaul/* 165845386Swpaul * Check to see if the BIOS has configured us for a 64 bit slot when 165945386Swpaul * we aren't actually in one. If we detect this condition, we can work 166045386Swpaul * around it on the Tigon 2 by setting a bit in the PCI state register, 166145386Swpaul * but for the Tigon 1 we must give up and abort the interface attach. 166245386Swpaul */ 166345386Swpaulstatic int ti_64bitslot_war(sc) 166445386Swpaul struct ti_softc *sc; 166545386Swpaul{ 166645386Swpaul if (!(CSR_READ_4(sc, TI_PCI_STATE) & TI_PCISTATE_32BIT_BUS)) { 166745386Swpaul CSR_WRITE_4(sc, 0x600, 0); 166845386Swpaul CSR_WRITE_4(sc, 0x604, 0); 166945386Swpaul CSR_WRITE_4(sc, 0x600, 0x5555AAAA); 167045386Swpaul if (CSR_READ_4(sc, 0x604) == 0x5555AAAA) { 167145386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) 167245386Swpaul return(EINVAL); 167345386Swpaul else { 167445386Swpaul TI_SETBIT(sc, TI_PCI_STATE, 167545386Swpaul TI_PCISTATE_32BIT_BUS); 167645386Swpaul return(0); 167745386Swpaul } 167845386Swpaul } 167945386Swpaul } 168045386Swpaul 168145386Swpaul return(0); 168245386Swpaul} 168345386Swpaul 168445386Swpaul/* 168545386Swpaul * Do endian, PCI and DMA initialization. Also check the on-board ROM 168645386Swpaul * self-test results. 168745386Swpaul */ 168845386Swpaulstatic int ti_chipinit(sc) 168945386Swpaul struct ti_softc *sc; 169045386Swpaul{ 169145386Swpaul u_int32_t cacheline; 169245386Swpaul u_int32_t pci_writemax = 0; 169398849Sken u_int32_t hdrsplit; 169445386Swpaul 169545386Swpaul /* Initialize link to down state. */ 169645386Swpaul sc->ti_linkstat = TI_EV_CODE_LINK_DOWN; 169745386Swpaul 169883630Sjlemon if (sc->arpcom.ac_if.if_capenable & IFCAP_HWCSUM) 169983630Sjlemon sc->arpcom.ac_if.if_hwassist = TI_CSUM_FEATURES; 170083630Sjlemon else 170183630Sjlemon sc->arpcom.ac_if.if_hwassist = 0; 170258698Sjlemon 170345386Swpaul /* Set endianness before we access any non-PCI registers. */ 170445386Swpaul#if BYTE_ORDER == BIG_ENDIAN 170545386Swpaul CSR_WRITE_4(sc, TI_MISC_HOST_CTL, 170645386Swpaul TI_MHC_BIGENDIAN_INIT | (TI_MHC_BIGENDIAN_INIT << 24)); 170745386Swpaul#else 170845386Swpaul CSR_WRITE_4(sc, TI_MISC_HOST_CTL, 170945386Swpaul TI_MHC_LITTLEENDIAN_INIT | (TI_MHC_LITTLEENDIAN_INIT << 24)); 171045386Swpaul#endif 171145386Swpaul 171245386Swpaul /* Check the ROM failed bit to see if self-tests passed. */ 171345386Swpaul if (CSR_READ_4(sc, TI_CPU_STATE) & TI_CPUSTATE_ROMFAIL) { 171445386Swpaul printf("ti%d: board self-diagnostics failed!\n", sc->ti_unit); 171545386Swpaul return(ENODEV); 171645386Swpaul } 171745386Swpaul 171845386Swpaul /* Halt the CPU. */ 171945386Swpaul TI_SETBIT(sc, TI_CPU_STATE, TI_CPUSTATE_HALT); 172045386Swpaul 172145386Swpaul /* Figure out the hardware revision. */ 172245386Swpaul switch(CSR_READ_4(sc, TI_MISC_HOST_CTL) & TI_MHC_CHIP_REV_MASK) { 172345386Swpaul case TI_REV_TIGON_I: 172445386Swpaul sc->ti_hwrev = TI_HWREV_TIGON; 172545386Swpaul break; 172645386Swpaul case TI_REV_TIGON_II: 172745386Swpaul sc->ti_hwrev = TI_HWREV_TIGON_II; 172845386Swpaul break; 172945386Swpaul default: 173045386Swpaul printf("ti%d: unsupported chip revision\n", sc->ti_unit); 173145386Swpaul return(ENODEV); 173245386Swpaul } 173345386Swpaul 173445386Swpaul /* Do special setup for Tigon 2. */ 173545386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON_II) { 173645386Swpaul TI_SETBIT(sc, TI_CPU_CTL_B, TI_CPUSTATE_HALT); 173776033Swpaul TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_SRAM_BANK_512K); 173845386Swpaul TI_SETBIT(sc, TI_MISC_CONF, TI_MCR_SRAM_SYNCHRONOUS); 173945386Swpaul } 174045386Swpaul 174198849Sken /* 174298849Sken * We don't have firmware source for the Tigon 1, so Tigon 1 boards 174398849Sken * can't do header splitting. 174498849Sken */ 174598849Sken#ifdef TI_JUMBO_HDRSPLIT 174698849Sken if (sc->ti_hwrev != TI_HWREV_TIGON) 174798849Sken sc->ti_hdrsplit = 1; 174898849Sken else 174998849Sken printf("ti%d: can't do header splitting on a Tigon I board\n", 175098849Sken sc->ti_unit); 175198849Sken#endif /* TI_JUMBO_HDRSPLIT */ 175298849Sken 175345386Swpaul /* Set up the PCI state register. */ 175445386Swpaul CSR_WRITE_4(sc, TI_PCI_STATE, TI_PCI_READ_CMD|TI_PCI_WRITE_CMD); 175545386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON_II) { 175645386Swpaul TI_SETBIT(sc, TI_PCI_STATE, TI_PCISTATE_USE_MEM_RD_MULT); 175745386Swpaul } 175845386Swpaul 175945386Swpaul /* Clear the read/write max DMA parameters. */ 176045386Swpaul TI_CLRBIT(sc, TI_PCI_STATE, (TI_PCISTATE_WRITE_MAXDMA| 176145386Swpaul TI_PCISTATE_READ_MAXDMA)); 176245386Swpaul 176345386Swpaul /* Get cache line size. */ 176445386Swpaul cacheline = CSR_READ_4(sc, TI_PCI_BIST) & 0xFF; 176545386Swpaul 176645386Swpaul /* 176745386Swpaul * If the system has set enabled the PCI memory write 176845386Swpaul * and invalidate command in the command register, set 176945386Swpaul * the write max parameter accordingly. This is necessary 177045386Swpaul * to use MWI with the Tigon 2. 177145386Swpaul */ 177245386Swpaul if (CSR_READ_4(sc, TI_PCI_CMDSTAT) & PCIM_CMD_MWIEN) { 177345386Swpaul switch(cacheline) { 177445386Swpaul case 1: 177545386Swpaul case 4: 177645386Swpaul case 8: 177745386Swpaul case 16: 177845386Swpaul case 32: 177945386Swpaul case 64: 178045386Swpaul break; 178145386Swpaul default: 178245386Swpaul /* Disable PCI memory write and invalidate. */ 178345386Swpaul if (bootverbose) 178445386Swpaul printf("ti%d: cache line size %d not " 178545386Swpaul "supported; disabling PCI MWI\n", 178645386Swpaul sc->ti_unit, cacheline); 178745386Swpaul CSR_WRITE_4(sc, TI_PCI_CMDSTAT, CSR_READ_4(sc, 178845386Swpaul TI_PCI_CMDSTAT) & ~PCIM_CMD_MWIEN); 178945386Swpaul break; 179045386Swpaul } 179145386Swpaul } 179245386Swpaul 179345386Swpaul#ifdef __brokenalpha__ 179445386Swpaul /* 179545386Swpaul * From the Alteon sample driver: 179645386Swpaul * Must insure that we do not cross an 8K (bytes) boundary 179745386Swpaul * for DMA reads. Our highest limit is 1K bytes. This is a 179845386Swpaul * restriction on some ALPHA platforms with early revision 179945386Swpaul * 21174 PCI chipsets, such as the AlphaPC 164lx 180045386Swpaul */ 180145386Swpaul TI_SETBIT(sc, TI_PCI_STATE, pci_writemax|TI_PCI_READMAX_1024); 180245386Swpaul#else 180345386Swpaul TI_SETBIT(sc, TI_PCI_STATE, pci_writemax); 180445386Swpaul#endif 180545386Swpaul 180645386Swpaul /* This sets the min dma param all the way up (0xff). */ 180745386Swpaul TI_SETBIT(sc, TI_PCI_STATE, TI_PCISTATE_MINDMA); 180845386Swpaul 180998849Sken if (sc->ti_hdrsplit) 181098849Sken hdrsplit = TI_OPMODE_JUMBO_HDRSPLIT; 181198849Sken else 181298849Sken hdrsplit = 0; 181398849Sken 181445386Swpaul /* Configure DMA variables. */ 181545386Swpaul#if BYTE_ORDER == BIG_ENDIAN 181645386Swpaul CSR_WRITE_4(sc, TI_GCR_OPMODE, TI_OPMODE_BYTESWAP_BD | 181745386Swpaul TI_OPMODE_BYTESWAP_DATA | TI_OPMODE_WORDSWAP_BD | 181845386Swpaul TI_OPMODE_WARN_ENB | TI_OPMODE_FATAL_ENB | 181998849Sken TI_OPMODE_DONT_FRAG_JUMBO | hdrsplit); 182098849Sken#else /* BYTE_ORDER */ 182145386Swpaul CSR_WRITE_4(sc, TI_GCR_OPMODE, TI_OPMODE_BYTESWAP_DATA| 182245386Swpaul TI_OPMODE_WORDSWAP_BD|TI_OPMODE_DONT_FRAG_JUMBO| 182398849Sken TI_OPMODE_WARN_ENB|TI_OPMODE_FATAL_ENB | hdrsplit); 182498849Sken#endif /* BYTE_ORDER */ 182545386Swpaul 182645386Swpaul /* 182745386Swpaul * Only allow 1 DMA channel to be active at a time. 182845386Swpaul * I don't think this is a good idea, but without it 182945386Swpaul * the firmware racks up lots of nicDmaReadRingFull 183058698Sjlemon * errors. This is not compatible with hardware checksums. 183145386Swpaul */ 183258698Sjlemon if (sc->arpcom.ac_if.if_hwassist == 0) 183358698Sjlemon TI_SETBIT(sc, TI_GCR_OPMODE, TI_OPMODE_1_DMA_ACTIVE); 183445386Swpaul 183545386Swpaul /* Recommended settings from Tigon manual. */ 183645386Swpaul CSR_WRITE_4(sc, TI_GCR_DMA_WRITECFG, TI_DMA_STATE_THRESH_8W); 183745386Swpaul CSR_WRITE_4(sc, TI_GCR_DMA_READCFG, TI_DMA_STATE_THRESH_8W); 183845386Swpaul 183945386Swpaul if (ti_64bitslot_war(sc)) { 184045386Swpaul printf("ti%d: bios thinks we're in a 64 bit slot, " 184145386Swpaul "but we aren't", sc->ti_unit); 184245386Swpaul return(EINVAL); 184345386Swpaul } 184445386Swpaul 184545386Swpaul return(0); 184645386Swpaul} 184745386Swpaul 184845386Swpaul/* 184945386Swpaul * Initialize the general information block and firmware, and 185045386Swpaul * start the CPU(s) running. 185145386Swpaul */ 185245386Swpaulstatic int ti_gibinit(sc) 185345386Swpaul struct ti_softc *sc; 185445386Swpaul{ 185545386Swpaul struct ti_rcb *rcb; 185645386Swpaul int i; 185745386Swpaul struct ifnet *ifp; 185845386Swpaul 185945386Swpaul ifp = &sc->arpcom.ac_if; 186045386Swpaul 186145386Swpaul /* Disable interrupts for now. */ 186245386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1); 186345386Swpaul 186445386Swpaul /* Tell the chip where to find the general information block. */ 186545386Swpaul CSR_WRITE_4(sc, TI_GCR_GENINFO_HI, 0); 186645386Swpaul CSR_WRITE_4(sc, TI_GCR_GENINFO_LO, vtophys(&sc->ti_rdata->ti_info)); 186745386Swpaul 186845386Swpaul /* Load the firmware into SRAM. */ 186945386Swpaul ti_loadfw(sc); 187045386Swpaul 187145386Swpaul /* Set up the contents of the general info and ring control blocks. */ 187245386Swpaul 187345386Swpaul /* Set up the event ring and producer pointer. */ 187445386Swpaul rcb = &sc->ti_rdata->ti_info.ti_ev_rcb; 187545386Swpaul 187645386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = vtophys(&sc->ti_rdata->ti_event_ring); 187745386Swpaul rcb->ti_flags = 0; 187845386Swpaul TI_HOSTADDR(sc->ti_rdata->ti_info.ti_ev_prodidx_ptr) = 187945386Swpaul vtophys(&sc->ti_ev_prodidx); 188045386Swpaul sc->ti_ev_prodidx.ti_idx = 0; 188145386Swpaul CSR_WRITE_4(sc, TI_GCR_EVENTCONS_IDX, 0); 188245386Swpaul sc->ti_ev_saved_considx = 0; 188345386Swpaul 188445386Swpaul /* Set up the command ring and producer mailbox. */ 188545386Swpaul rcb = &sc->ti_rdata->ti_info.ti_cmd_rcb; 188645386Swpaul 188745386Swpaul sc->ti_rdata->ti_cmd_ring = 188849133Swpaul (struct ti_cmd_desc *)(sc->ti_vhandle + TI_GCR_CMDRING); 188945386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = TI_GCR_NIC_ADDR(TI_GCR_CMDRING); 189045386Swpaul rcb->ti_flags = 0; 189145386Swpaul rcb->ti_max_len = 0; 189245386Swpaul for (i = 0; i < TI_CMD_RING_CNT; i++) { 189345386Swpaul CSR_WRITE_4(sc, TI_GCR_CMDRING + (i * 4), 0); 189445386Swpaul } 189545386Swpaul CSR_WRITE_4(sc, TI_GCR_CMDCONS_IDX, 0); 189645386Swpaul CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, 0); 189745386Swpaul sc->ti_cmd_saved_prodidx = 0; 189845386Swpaul 189945386Swpaul /* 190045386Swpaul * Assign the address of the stats refresh buffer. 190145386Swpaul * We re-use the current stats buffer for this to 190245386Swpaul * conserve memory. 190345386Swpaul */ 190445386Swpaul TI_HOSTADDR(sc->ti_rdata->ti_info.ti_refresh_stats_ptr) = 190545386Swpaul vtophys(&sc->ti_rdata->ti_info.ti_stats); 190645386Swpaul 190745386Swpaul /* Set up the standard receive ring. */ 190845386Swpaul rcb = &sc->ti_rdata->ti_info.ti_std_rx_rcb; 190945386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = vtophys(&sc->ti_rdata->ti_rx_std_ring); 191045386Swpaul rcb->ti_max_len = TI_FRAMELEN; 191145386Swpaul rcb->ti_flags = 0; 191258698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 191358698Sjlemon rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM | 191458698Sjlemon TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; 191545386Swpaul rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; 191645386Swpaul 191745386Swpaul /* Set up the jumbo receive ring. */ 191845386Swpaul rcb = &sc->ti_rdata->ti_info.ti_jumbo_rx_rcb; 191945386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = 192045386Swpaul vtophys(&sc->ti_rdata->ti_rx_jumbo_ring); 192198849Sken 192298849Sken#ifdef TI_PRIVATE_JUMBOS 192349036Swpaul rcb->ti_max_len = TI_JUMBO_FRAMELEN; 192445386Swpaul rcb->ti_flags = 0; 192598849Sken#else 192698849Sken rcb->ti_max_len = PAGE_SIZE; 192798849Sken rcb->ti_flags = TI_RCB_FLAG_USE_EXT_RX_BD; 192898849Sken#endif 192958698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 193058698Sjlemon rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM | 193158698Sjlemon TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; 193245386Swpaul rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; 193345386Swpaul 193445386Swpaul /* 193545386Swpaul * Set up the mini ring. Only activated on the 193645386Swpaul * Tigon 2 but the slot in the config block is 193745386Swpaul * still there on the Tigon 1. 193845386Swpaul */ 193945386Swpaul rcb = &sc->ti_rdata->ti_info.ti_mini_rx_rcb; 194045386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = 194145386Swpaul vtophys(&sc->ti_rdata->ti_rx_mini_ring); 194251352Swpaul rcb->ti_max_len = MHLEN - ETHER_ALIGN; 194345386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) 194445386Swpaul rcb->ti_flags = TI_RCB_FLAG_RING_DISABLED; 194545386Swpaul else 194645386Swpaul rcb->ti_flags = 0; 194758698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 194858698Sjlemon rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM | 194958698Sjlemon TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; 195045386Swpaul rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; 195145386Swpaul 195245386Swpaul /* 195345386Swpaul * Set up the receive return ring. 195445386Swpaul */ 195545386Swpaul rcb = &sc->ti_rdata->ti_info.ti_return_rcb; 195645386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = 195745386Swpaul vtophys(&sc->ti_rdata->ti_rx_return_ring); 195845386Swpaul rcb->ti_flags = 0; 195945386Swpaul rcb->ti_max_len = TI_RETURN_RING_CNT; 196045386Swpaul TI_HOSTADDR(sc->ti_rdata->ti_info.ti_return_prodidx_ptr) = 196145386Swpaul vtophys(&sc->ti_return_prodidx); 196245386Swpaul 196345386Swpaul /* 196445386Swpaul * Set up the tx ring. Note: for the Tigon 2, we have the option 196545386Swpaul * of putting the transmit ring in the host's address space and 196645386Swpaul * letting the chip DMA it instead of leaving the ring in the NIC's 196745386Swpaul * memory and accessing it through the shared memory region. We 196845386Swpaul * do this for the Tigon 2, but it doesn't work on the Tigon 1, 196945386Swpaul * so we have to revert to the shared memory scheme if we detect 197045386Swpaul * a Tigon 1 chip. 197145386Swpaul */ 197245386Swpaul CSR_WRITE_4(sc, TI_WINBASE, TI_TX_RING_BASE); 197345386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) { 197445386Swpaul sc->ti_rdata->ti_tx_ring_nic = 197549133Swpaul (struct ti_tx_desc *)(sc->ti_vhandle + TI_WINDOW); 197645386Swpaul } 197745386Swpaul bzero((char *)sc->ti_rdata->ti_tx_ring, 197845386Swpaul TI_TX_RING_CNT * sizeof(struct ti_tx_desc)); 197945386Swpaul rcb = &sc->ti_rdata->ti_info.ti_tx_rcb; 198045386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) 198145386Swpaul rcb->ti_flags = 0; 198245386Swpaul else 198345386Swpaul rcb->ti_flags = TI_RCB_FLAG_HOST_RING; 198445386Swpaul rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; 198558698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 198658698Sjlemon rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM | 198758698Sjlemon TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; 198845386Swpaul rcb->ti_max_len = TI_TX_RING_CNT; 198945386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) 199045386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = TI_TX_RING_BASE; 199145386Swpaul else 199245386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = 199345386Swpaul vtophys(&sc->ti_rdata->ti_tx_ring); 199445386Swpaul TI_HOSTADDR(sc->ti_rdata->ti_info.ti_tx_considx_ptr) = 199545386Swpaul vtophys(&sc->ti_tx_considx); 199645386Swpaul 199745386Swpaul /* Set up tuneables */ 199898849Sken#if 0 199945386Swpaul if (ifp->if_mtu > (ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN)) 200045386Swpaul CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS, 200145386Swpaul (sc->ti_rx_coal_ticks / 10)); 200245386Swpaul else 200398849Sken#endif 200445386Swpaul CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS, sc->ti_rx_coal_ticks); 200545386Swpaul CSR_WRITE_4(sc, TI_GCR_TX_COAL_TICKS, sc->ti_tx_coal_ticks); 200645386Swpaul CSR_WRITE_4(sc, TI_GCR_STAT_TICKS, sc->ti_stat_ticks); 200745386Swpaul CSR_WRITE_4(sc, TI_GCR_RX_MAX_COAL_BD, sc->ti_rx_max_coal_bds); 200845386Swpaul CSR_WRITE_4(sc, TI_GCR_TX_MAX_COAL_BD, sc->ti_tx_max_coal_bds); 200945386Swpaul CSR_WRITE_4(sc, TI_GCR_TX_BUFFER_RATIO, sc->ti_tx_buf_ratio); 201045386Swpaul 201145386Swpaul /* Turn interrupts on. */ 201245386Swpaul CSR_WRITE_4(sc, TI_GCR_MASK_INTRS, 0); 201345386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0); 201445386Swpaul 201545386Swpaul /* Start CPU. */ 201645386Swpaul TI_CLRBIT(sc, TI_CPU_STATE, (TI_CPUSTATE_HALT|TI_CPUSTATE_STEP)); 201745386Swpaul 201845386Swpaul return(0); 201945386Swpaul} 202045386Swpaul 202145386Swpaul/* 202245386Swpaul * Probe for a Tigon chip. Check the PCI vendor and device IDs 202345386Swpaul * against our list and return its name if we find a match. 202445386Swpaul */ 202549011Swpaulstatic int ti_probe(dev) 202649011Swpaul device_t dev; 202745386Swpaul{ 202845386Swpaul struct ti_type *t; 202945386Swpaul 203045386Swpaul t = ti_devs; 203145386Swpaul 203245386Swpaul while(t->ti_name != NULL) { 203349011Swpaul if ((pci_get_vendor(dev) == t->ti_vid) && 203449011Swpaul (pci_get_device(dev) == t->ti_did)) { 203549011Swpaul device_set_desc(dev, t->ti_name); 203649011Swpaul return(0); 203749011Swpaul } 203845386Swpaul t++; 203945386Swpaul } 204045386Swpaul 204149011Swpaul return(ENXIO); 204245386Swpaul} 204345386Swpaul 204498849Sken#ifdef KLD_MODULE 204598849Skenstatic int 204698849Skenlog2rndup(int len) 204798849Sken{ 204898849Sken int log2size = 0, t = len; 204998849Sken while (t > 1) { 205098849Sken log2size++; 205198849Sken t >>= 1; 205298849Sken } 205398849Sken if (len != (1 << log2size)) 205498849Sken log2size++; 205598849Sken return log2size; 205698849Sken} 205798849Sken 205898849Skenstatic int 205998849Skenti_mbuf_sanity(device_t dev) 206098849Sken{ 206198849Sken if ((mbstat.m_msize != MSIZE) || mbstat.m_mclbytes != MCLBYTES){ 206298849Sken device_printf(dev, "\n"); 206398849Sken device_printf(dev, "This module was compiled with " 206498849Sken "-DMCLSHIFT=%d -DMSIZE=%d\n", MCLSHIFT, 206598849Sken MSIZE); 206698849Sken device_printf(dev, "The kernel was compiled with MCLSHIFT=%d," 206798849Sken " MSIZE=%d\n", log2rndup(mbstat.m_mclbytes), 206898849Sken (int)mbstat.m_msize); 206998849Sken return(EINVAL); 207098849Sken } 207198849Sken return(0); 207298849Sken} 207398849Sken#endif 207498849Sken 207598849Sken 207649011Swpaulstatic int ti_attach(dev) 207749011Swpaul device_t dev; 207845386Swpaul{ 207945386Swpaul u_int32_t command; 208045386Swpaul struct ifnet *ifp; 208145386Swpaul struct ti_softc *sc; 208249011Swpaul int unit, error = 0, rid; 208345386Swpaul 208498849Sken sc = NULL; 208598849Sken 208698849Sken#ifdef KLD_MODULE 208798849Sken if (ti_mbuf_sanity(dev)){ 208898849Sken device_printf(dev, "Module mbuf constants do not match " 208998849Sken "kernel constants!\n"); 209098849Sken device_printf(dev, "Rebuild the module or the kernel so " 209198849Sken "they match\n"); 209298849Sken device_printf(dev, "\n"); 209398849Sken error = EINVAL; 209498849Sken goto fail; 209598849Sken } 209698849Sken#endif 209798849Sken 209849011Swpaul sc = device_get_softc(dev); 209949011Swpaul unit = device_get_unit(dev); 210045386Swpaul bzero(sc, sizeof(struct ti_softc)); 210145386Swpaul 210293818Sjhb mtx_init(&sc->ti_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 210393818Sjhb MTX_DEF | MTX_RECURSE); 210483630Sjlemon sc->arpcom.ac_if.if_capabilities = IFCAP_HWCSUM; 210583630Sjlemon sc->arpcom.ac_if.if_capenable = sc->arpcom.ac_if.if_capabilities; 210669583Swpaul 210745386Swpaul /* 210845386Swpaul * Map control/status registers. 210945386Swpaul */ 211072813Swpaul pci_enable_busmaster(dev); 211179472Swpaul pci_enable_io(dev, SYS_RES_MEMORY); 211261041Speter command = pci_read_config(dev, PCIR_COMMAND, 4); 211345386Swpaul 211445386Swpaul if (!(command & PCIM_CMD_MEMEN)) { 211545386Swpaul printf("ti%d: failed to enable memory mapping!\n", unit); 211649011Swpaul error = ENXIO; 211745386Swpaul goto fail; 211845386Swpaul } 211945386Swpaul 212049011Swpaul rid = TI_PCI_LOMEM; 212149011Swpaul sc->ti_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 212265176Sdfr 0, ~0, 1, RF_ACTIVE|PCI_RF_DENSE); 212349011Swpaul 212449011Swpaul if (sc->ti_res == NULL) { 212545386Swpaul printf ("ti%d: couldn't map memory\n", unit); 212649011Swpaul error = ENXIO; 212745386Swpaul goto fail; 212845386Swpaul } 212945386Swpaul 213049035Swpaul sc->ti_btag = rman_get_bustag(sc->ti_res); 213149035Swpaul sc->ti_bhandle = rman_get_bushandle(sc->ti_res); 213249133Swpaul sc->ti_vhandle = (vm_offset_t)rman_get_virtual(sc->ti_res); 213349035Swpaul 213449011Swpaul /* Allocate interrupt */ 213549011Swpaul rid = 0; 213649133Swpaul 213749011Swpaul sc->ti_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1, 213849011Swpaul RF_SHAREABLE | RF_ACTIVE); 213945386Swpaul 214049011Swpaul if (sc->ti_irq == NULL) { 214149011Swpaul printf("ti%d: couldn't map interrupt\n", unit); 214249011Swpaul error = ENXIO; 214345386Swpaul goto fail; 214445386Swpaul } 214545386Swpaul 214649011Swpaul error = bus_setup_intr(dev, sc->ti_irq, INTR_TYPE_NET, 214749011Swpaul ti_intr, sc, &sc->ti_intrhand); 214849011Swpaul 214949011Swpaul if (error) { 215049011Swpaul bus_release_resource(dev, SYS_RES_IRQ, 0, sc->ti_irq); 215149011Swpaul bus_release_resource(dev, SYS_RES_MEMORY, 215249011Swpaul TI_PCI_LOMEM, sc->ti_res); 215349011Swpaul printf("ti%d: couldn't set up irq\n", unit); 215445386Swpaul goto fail; 215545386Swpaul } 215645386Swpaul 215745386Swpaul sc->ti_unit = unit; 215845386Swpaul 215945386Swpaul if (ti_chipinit(sc)) { 216045386Swpaul printf("ti%d: chip initialization failed\n", sc->ti_unit); 216149011Swpaul bus_teardown_intr(dev, sc->ti_irq, sc->ti_intrhand); 216249011Swpaul bus_release_resource(dev, SYS_RES_IRQ, 0, sc->ti_irq); 216349011Swpaul bus_release_resource(dev, SYS_RES_MEMORY, 216449011Swpaul TI_PCI_LOMEM, sc->ti_res); 216549011Swpaul error = ENXIO; 216645386Swpaul goto fail; 216745386Swpaul } 216845386Swpaul 216945386Swpaul /* Zero out the NIC's on-board SRAM. */ 217045386Swpaul ti_mem(sc, 0x2000, 0x100000 - 0x2000, NULL); 217145386Swpaul 217245386Swpaul /* Init again -- zeroing memory may have clobbered some registers. */ 217345386Swpaul if (ti_chipinit(sc)) { 217445386Swpaul printf("ti%d: chip initialization failed\n", sc->ti_unit); 217549011Swpaul bus_teardown_intr(dev, sc->ti_irq, sc->ti_intrhand); 217649011Swpaul bus_release_resource(dev, SYS_RES_IRQ, 0, sc->ti_irq); 217749011Swpaul bus_release_resource(dev, SYS_RES_MEMORY, 217849011Swpaul TI_PCI_LOMEM, sc->ti_res); 217949011Swpaul error = ENXIO; 218045386Swpaul goto fail; 218145386Swpaul } 218245386Swpaul 218345386Swpaul /* 218445386Swpaul * Get station address from the EEPROM. Note: the manual states 218545386Swpaul * that the MAC address is at offset 0x8c, however the data is 218645386Swpaul * stored as two longwords (since that's how it's loaded into 218772645Sasmodai * the NIC). This means the MAC address is actually preceded 218845386Swpaul * by two zero bytes. We need to skip over those. 218945386Swpaul */ 219045386Swpaul if (ti_read_eeprom(sc, (caddr_t)&sc->arpcom.ac_enaddr, 219145386Swpaul TI_EE_MAC_OFFSET + 2, ETHER_ADDR_LEN)) { 219245386Swpaul printf("ti%d: failed to read station address\n", unit); 219349011Swpaul bus_teardown_intr(dev, sc->ti_irq, sc->ti_intrhand); 219449011Swpaul bus_release_resource(dev, SYS_RES_IRQ, 0, sc->ti_irq); 219549011Swpaul bus_release_resource(dev, SYS_RES_MEMORY, 219649011Swpaul TI_PCI_LOMEM, sc->ti_res); 219749011Swpaul error = ENXIO; 219845386Swpaul goto fail; 219945386Swpaul } 220045386Swpaul 220145386Swpaul /* 220245386Swpaul * A Tigon chip was detected. Inform the world. 220345386Swpaul */ 220445386Swpaul printf("ti%d: Ethernet address: %6D\n", unit, 220545386Swpaul sc->arpcom.ac_enaddr, ":"); 220645386Swpaul 220745386Swpaul /* Allocate the general information block and ring buffers. */ 220849011Swpaul sc->ti_rdata = contigmalloc(sizeof(struct ti_ring_data), M_DEVBUF, 220950548Sbde M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); 221045386Swpaul 221149011Swpaul if (sc->ti_rdata == NULL) { 221249011Swpaul bus_teardown_intr(dev, sc->ti_irq, sc->ti_intrhand); 221349011Swpaul bus_release_resource(dev, SYS_RES_IRQ, 0, sc->ti_irq); 221449011Swpaul bus_release_resource(dev, SYS_RES_MEMORY, 221549011Swpaul TI_PCI_LOMEM, sc->ti_res); 221649011Swpaul error = ENXIO; 221745386Swpaul printf("ti%d: no memory for list buffers!\n", sc->ti_unit); 221845386Swpaul goto fail; 221945386Swpaul } 222045386Swpaul 222145386Swpaul bzero(sc->ti_rdata, sizeof(struct ti_ring_data)); 222245386Swpaul 222345386Swpaul /* Try to allocate memory for jumbo buffers. */ 222498849Sken#ifdef TI_PRIVATE_JUMBOS 222545386Swpaul if (ti_alloc_jumbo_mem(sc)) { 222645386Swpaul printf("ti%d: jumbo buffer allocation failed\n", sc->ti_unit); 222749011Swpaul bus_teardown_intr(dev, sc->ti_irq, sc->ti_intrhand); 222849011Swpaul bus_release_resource(dev, SYS_RES_IRQ, 0, sc->ti_irq); 222949011Swpaul bus_release_resource(dev, SYS_RES_MEMORY, 223049011Swpaul TI_PCI_LOMEM, sc->ti_res); 223162793Sgallatin contigfree(sc->ti_rdata, sizeof(struct ti_ring_data), 223262793Sgallatin M_DEVBUF); 223349011Swpaul error = ENXIO; 223445386Swpaul goto fail; 223545386Swpaul } 223698849Sken#else 223798849Sken if (!jumbo_vm_init()) { 223898849Sken printf("ti%d: VM initialization failed!\n", sc->ti_unit); 223998849Sken bus_teardown_intr(dev, sc->ti_irq, sc->ti_intrhand); 224098849Sken bus_release_resource(dev, SYS_RES_IRQ, 0, sc->ti_irq); 224198849Sken bus_release_resource(dev, SYS_RES_MEMORY, 224298849Sken TI_PCI_LOMEM, sc->ti_res); 224398849Sken free(sc->ti_rdata, M_DEVBUF); 224498849Sken error = ENOMEM; 224598849Sken goto fail; 224698849Sken } 224798849Sken#endif 224845386Swpaul 224963699Swpaul /* 225063699Swpaul * We really need a better way to tell a 1000baseTX card 225163699Swpaul * from a 1000baseSX one, since in theory there could be 225263699Swpaul * OEMed 1000baseTX cards from lame vendors who aren't 225363699Swpaul * clever enough to change the PCI ID. For the moment 225463699Swpaul * though, the AceNIC is the only copper card available. 225563699Swpaul */ 225663699Swpaul if (pci_get_vendor(dev) == ALT_VENDORID && 225763699Swpaul pci_get_device(dev) == ALT_DEVICEID_ACENIC_COPPER) 225863699Swpaul sc->ti_copper = 1; 225964139Swpaul /* Ok, it's not the only copper card available. */ 226064139Swpaul if (pci_get_vendor(dev) == NG_VENDORID && 226164139Swpaul pci_get_device(dev) == NG_DEVICEID_GA620T) 226264139Swpaul sc->ti_copper = 1; 226363699Swpaul 226445386Swpaul /* Set default tuneable values. */ 226545386Swpaul sc->ti_stat_ticks = 2 * TI_TICKS_PER_SEC; 226698849Sken#if 0 226745386Swpaul sc->ti_rx_coal_ticks = TI_TICKS_PER_SEC / 5000; 226898849Sken#endif 226998849Sken sc->ti_rx_coal_ticks = 170; 227045386Swpaul sc->ti_tx_coal_ticks = TI_TICKS_PER_SEC / 500; 227145386Swpaul sc->ti_rx_max_coal_bds = 64; 227298849Sken#if 0 227345386Swpaul sc->ti_tx_max_coal_bds = 128; 227498849Sken#endif 227598849Sken sc->ti_tx_max_coal_bds = 32; 227645386Swpaul sc->ti_tx_buf_ratio = 21; 227745386Swpaul 227845386Swpaul /* Set up ifnet structure */ 227945386Swpaul ifp = &sc->arpcom.ac_if; 228045386Swpaul ifp->if_softc = sc; 228145386Swpaul ifp->if_unit = sc->ti_unit; 228245386Swpaul ifp->if_name = "ti"; 228345386Swpaul ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 228498849Sken tis[unit] = sc; 228545386Swpaul ifp->if_ioctl = ti_ioctl; 228645386Swpaul ifp->if_output = ether_output; 228745386Swpaul ifp->if_start = ti_start; 228845386Swpaul ifp->if_watchdog = ti_watchdog; 228945386Swpaul ifp->if_init = ti_init; 229045386Swpaul ifp->if_mtu = ETHERMTU; 229145386Swpaul ifp->if_snd.ifq_maxlen = TI_TX_RING_CNT - 1; 229245386Swpaul 229345386Swpaul /* Set up ifmedia support. */ 229445386Swpaul ifmedia_init(&sc->ifmedia, IFM_IMASK, ti_ifmedia_upd, ti_ifmedia_sts); 229563699Swpaul if (sc->ti_copper) { 229663699Swpaul /* 229763699Swpaul * Copper cards allow manual 10/100 mode selection, 229863699Swpaul * but not manual 1000baseTX mode selection. Why? 229963699Swpaul * Becuase currently there's no way to specify the 230063699Swpaul * master/slave setting through the firmware interface, 230163699Swpaul * so Alteon decided to just bag it and handle it 230263699Swpaul * via autonegotiation. 230363699Swpaul */ 230463699Swpaul ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T, 0, NULL); 230563699Swpaul ifmedia_add(&sc->ifmedia, 230663699Swpaul IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); 230763699Swpaul ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL); 230863699Swpaul ifmedia_add(&sc->ifmedia, 230963699Swpaul IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL); 231095673Sphk ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_1000_T, 0, NULL); 231163699Swpaul ifmedia_add(&sc->ifmedia, 231295673Sphk IFM_ETHER|IFM_1000_T|IFM_FDX, 0, NULL); 231363699Swpaul } else { 231463699Swpaul /* Fiber cards don't support 10/100 modes. */ 231563699Swpaul ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_1000_SX, 0, NULL); 231663699Swpaul ifmedia_add(&sc->ifmedia, 231763699Swpaul IFM_ETHER|IFM_1000_SX|IFM_FDX, 0, NULL); 231863699Swpaul } 231945386Swpaul ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL); 232045386Swpaul ifmedia_set(&sc->ifmedia, IFM_ETHER|IFM_AUTO); 232145386Swpaul 232245386Swpaul /* 232398849Sken * We're assuming here that card initialization is a sequential 232498849Sken * thing. If it isn't, multiple cards probing at the same time 232598849Sken * could stomp on the list of softcs here. 232698849Sken */ 232798849Sken /* 232898849Sken * If this is the first card to be initialized, initialize the 232998849Sken * softc queue. 233098849Sken */ 233198849Sken if (unit == 0) 233298849Sken STAILQ_INIT(&ti_sc_list); 233398849Sken 233498849Sken STAILQ_INSERT_TAIL(&ti_sc_list, sc, ti_links); 233598849Sken 233698849Sken /* Register the device */ 233798849Sken sc->dev = make_dev(&ti_cdevsw, sc->ti_unit, UID_ROOT, GID_OPERATOR, 233898849Sken 0600, "ti%d", sc->ti_unit); 233998849Sken 234098849Sken /* 234163090Sarchie * Call MI attach routine. 234245386Swpaul */ 234363090Sarchie ether_ifattach(ifp, ETHER_BPF_SUPPORTED); 234467087Swpaul return(0); 234545386Swpaul 234645386Swpaulfail: 234767087Swpaul mtx_destroy(&sc->ti_mtx); 234849011Swpaul return(error); 234945386Swpaul} 235045386Swpaul 235198849Sken/* 235298849Sken * Verify that our character special device is not currently 235398849Sken * open. Also track down any cached vnodes & kill them before 235498849Sken * the module is unloaded 235598849Sken */ 235698849Skenstatic int 235798849Skenti_unref_special(device_t dev) 235898849Sken{ 235998849Sken struct vnode *ti_vn; 236098849Sken int count; 236198849Sken struct ti_softc *sc = sc = device_get_softc(dev); 236298849Sken 236398849Sken if (!vfinddev(sc->dev, VCHR, &ti_vn)) { 236498849Sken return 0; 236598849Sken } 236698849Sken 236798849Sken if ((count = vcount(ti_vn))) { 236898849Sken device_printf(dev, "%d refs to special device, " 236998849Sken "denying unload\n", count); 237098849Sken return count; 237198849Sken } 237298849Sken /* now we know that there's a vnode in the cache. We hunt it 237398849Sken down and kill it now, before unloading */ 237498849Sken vgone(ti_vn); 237598849Sken return(0); 237698849Sken} 237798849Sken 237898849Sken 237949011Swpaulstatic int ti_detach(dev) 238049011Swpaul device_t dev; 238149011Swpaul{ 238249011Swpaul struct ti_softc *sc; 238349011Swpaul struct ifnet *ifp; 238449011Swpaul 238598849Sken if (ti_unref_special(dev)) 238698849Sken return EBUSY; 238749011Swpaul 238849011Swpaul sc = device_get_softc(dev); 238967087Swpaul TI_LOCK(sc); 239049011Swpaul ifp = &sc->arpcom.ac_if; 239149011Swpaul 239263090Sarchie ether_ifdetach(ifp, ETHER_BPF_SUPPORTED); 239349011Swpaul ti_stop(sc); 239449011Swpaul 239549011Swpaul bus_teardown_intr(dev, sc->ti_irq, sc->ti_intrhand); 239649011Swpaul bus_release_resource(dev, SYS_RES_IRQ, 0, sc->ti_irq); 239749011Swpaul bus_release_resource(dev, SYS_RES_MEMORY, TI_PCI_LOMEM, sc->ti_res); 239849011Swpaul 239998849Sken#ifdef TI_PRIVATE_JUMBOS 240062793Sgallatin contigfree(sc->ti_cdata.ti_jumbo_buf, TI_JMEM, M_DEVBUF); 240198849Sken#endif 240262793Sgallatin contigfree(sc->ti_rdata, sizeof(struct ti_ring_data), M_DEVBUF); 240349011Swpaul ifmedia_removeall(&sc->ifmedia); 240449011Swpaul 240567087Swpaul TI_UNLOCK(sc); 240667087Swpaul mtx_destroy(&sc->ti_mtx); 240749011Swpaul 240849011Swpaul return(0); 240949011Swpaul} 241049011Swpaul 241198849Sken#ifdef TI_JUMBO_HDRSPLIT 241245386Swpaul/* 241398849Sken * If hdr_len is 0, that means that header splitting wasn't done on 241498849Sken * this packet for some reason. The two most likely reasons are that 241598849Sken * the protocol isn't a supported protocol for splitting, or this 241698849Sken * packet had a fragment offset that wasn't 0. 241798849Sken * 241898849Sken * The header length, if it is non-zero, will always be the length of 241998849Sken * the headers on the packet, but that length could be longer than the 242098849Sken * first mbuf. So we take the minimum of the two as the actual 242198849Sken * length. 242298849Sken */ 242398849Skenstatic __inline void 242498849Skenti_hdr_split(struct mbuf *top, int hdr_len, int pkt_len, int idx) 242598849Sken{ 242698849Sken int i = 0; 242798849Sken int lengths[4] = {0, 0, 0, 0}; 242898849Sken struct mbuf *m, *mp; 242998849Sken 243098849Sken if (hdr_len != 0) 243198849Sken top->m_len = min(hdr_len, top->m_len); 243298849Sken pkt_len -= top->m_len; 243398849Sken lengths[i++] = top->m_len; 243498849Sken 243598849Sken mp = top; 243698849Sken for (m = top->m_next; m && pkt_len; m = m->m_next) { 243798849Sken m->m_len = m->m_ext.ext_size = min(m->m_len, pkt_len); 243898849Sken pkt_len -= m->m_len; 243998849Sken lengths[i++] = m->m_len; 244098849Sken mp = m; 244198849Sken } 244298849Sken 244398849Sken#if 0 244498849Sken if (hdr_len != 0) 244598849Sken printf("got split packet: "); 244698849Sken else 244798849Sken printf("got non-split packet: "); 244898849Sken 244998849Sken printf("%d,%d,%d,%d = %d\n", lengths[0], 245098849Sken lengths[1], lengths[2], lengths[3], 245198849Sken lengths[0] + lengths[1] + lengths[2] + 245298849Sken lengths[3]); 245398849Sken#endif 245498849Sken 245598849Sken if (pkt_len) 245698849Sken panic("header splitting didn't"); 245798849Sken 245898849Sken if (m) { 245998849Sken m_freem(m); 246098849Sken mp->m_next = NULL; 246198849Sken 246298849Sken } 246398849Sken if (mp->m_next != NULL) 246498849Sken panic("ti_hdr_split: last mbuf in chain should be null"); 246598849Sken} 246698849Sken#endif /* TI_JUMBO_HDRSPLIT */ 246798849Sken 246898849Sken/* 246945386Swpaul * Frame reception handling. This is called if there's a frame 247045386Swpaul * on the receive return list. 247145386Swpaul * 247245386Swpaul * Note: we have to be able to handle three possibilities here: 247345386Swpaul * 1) the frame is from the mini receive ring (can only happen) 247445386Swpaul * on Tigon 2 boards) 247545386Swpaul * 2) the frame is from the jumbo recieve ring 247645386Swpaul * 3) the frame is from the standard receive ring 247745386Swpaul */ 247845386Swpaul 247945386Swpaulstatic void ti_rxeof(sc) 248045386Swpaul struct ti_softc *sc; 248145386Swpaul{ 248245386Swpaul struct ifnet *ifp; 248348597Swpaul struct ti_cmd_desc cmd; 248445386Swpaul 248545386Swpaul ifp = &sc->arpcom.ac_if; 248645386Swpaul 248745386Swpaul while(sc->ti_rx_saved_considx != sc->ti_return_prodidx.ti_idx) { 248845386Swpaul struct ti_rx_desc *cur_rx; 248945386Swpaul u_int32_t rxidx; 249045386Swpaul struct ether_header *eh; 249145386Swpaul struct mbuf *m = NULL; 249245386Swpaul u_int16_t vlan_tag = 0; 249345386Swpaul int have_tag = 0; 249445386Swpaul 249545386Swpaul cur_rx = 249645386Swpaul &sc->ti_rdata->ti_rx_return_ring[sc->ti_rx_saved_considx]; 249745386Swpaul rxidx = cur_rx->ti_idx; 249845386Swpaul TI_INC(sc->ti_rx_saved_considx, TI_RETURN_RING_CNT); 249945386Swpaul 250045386Swpaul if (cur_rx->ti_flags & TI_BDFLAG_VLAN_TAG) { 250145386Swpaul have_tag = 1; 250277058Sphk vlan_tag = cur_rx->ti_vlan_tag & 0xfff; 250345386Swpaul } 250445386Swpaul 250545386Swpaul if (cur_rx->ti_flags & TI_BDFLAG_JUMBO_RING) { 250698849Sken 250745386Swpaul TI_INC(sc->ti_jumbo, TI_JUMBO_RX_RING_CNT); 250845386Swpaul m = sc->ti_cdata.ti_rx_jumbo_chain[rxidx]; 250945386Swpaul sc->ti_cdata.ti_rx_jumbo_chain[rxidx] = NULL; 251045386Swpaul if (cur_rx->ti_flags & TI_BDFLAG_ERROR) { 251145386Swpaul ifp->if_ierrors++; 251245386Swpaul ti_newbuf_jumbo(sc, sc->ti_jumbo, m); 251345386Swpaul continue; 251445386Swpaul } 251548597Swpaul if (ti_newbuf_jumbo(sc, sc->ti_jumbo, NULL) == ENOBUFS) { 251648597Swpaul ifp->if_ierrors++; 251748597Swpaul ti_newbuf_jumbo(sc, sc->ti_jumbo, m); 251848597Swpaul continue; 251948597Swpaul } 252098849Sken#ifdef TI_PRIVATE_JUMBOS 252198849Sken m->m_len = cur_rx->ti_len; 252298849Sken#else /* TI_PRIVATE_JUMBOS */ 252398849Sken#ifdef TI_JUMBO_HDRSPLIT 252498849Sken if (sc->ti_hdrsplit) 252598849Sken ti_hdr_split(m, TI_HOSTADDR(cur_rx->ti_addr), 252698849Sken cur_rx->ti_len, rxidx); 252798849Sken else 252898849Sken#endif /* TI_JUMBO_HDRSPLIT */ 252998849Sken m_adj(m, cur_rx->ti_len - m->m_pkthdr.len); 253098849Sken#endif /* TI_PRIVATE_JUMBOS */ 253145386Swpaul } else if (cur_rx->ti_flags & TI_BDFLAG_MINI_RING) { 253245386Swpaul TI_INC(sc->ti_mini, TI_MINI_RX_RING_CNT); 253345386Swpaul m = sc->ti_cdata.ti_rx_mini_chain[rxidx]; 253445386Swpaul sc->ti_cdata.ti_rx_mini_chain[rxidx] = NULL; 253545386Swpaul if (cur_rx->ti_flags & TI_BDFLAG_ERROR) { 253645386Swpaul ifp->if_ierrors++; 253745386Swpaul ti_newbuf_mini(sc, sc->ti_mini, m); 253845386Swpaul continue; 253945386Swpaul } 254048597Swpaul if (ti_newbuf_mini(sc, sc->ti_mini, NULL) == ENOBUFS) { 254148597Swpaul ifp->if_ierrors++; 254248597Swpaul ti_newbuf_mini(sc, sc->ti_mini, m); 254348597Swpaul continue; 254448597Swpaul } 254598849Sken m->m_len = cur_rx->ti_len; 254645386Swpaul } else { 254745386Swpaul TI_INC(sc->ti_std, TI_STD_RX_RING_CNT); 254845386Swpaul m = sc->ti_cdata.ti_rx_std_chain[rxidx]; 254945386Swpaul sc->ti_cdata.ti_rx_std_chain[rxidx] = NULL; 255045386Swpaul if (cur_rx->ti_flags & TI_BDFLAG_ERROR) { 255145386Swpaul ifp->if_ierrors++; 255245386Swpaul ti_newbuf_std(sc, sc->ti_std, m); 255345386Swpaul continue; 255445386Swpaul } 255548597Swpaul if (ti_newbuf_std(sc, sc->ti_std, NULL) == ENOBUFS) { 255648597Swpaul ifp->if_ierrors++; 255748597Swpaul ti_newbuf_std(sc, sc->ti_std, m); 255848597Swpaul continue; 255948597Swpaul } 256098849Sken m->m_len = cur_rx->ti_len; 256145386Swpaul } 256245386Swpaul 256398849Sken m->m_pkthdr.len = cur_rx->ti_len; 256445386Swpaul ifp->if_ipackets++; 256545386Swpaul eh = mtod(m, struct ether_header *); 256645386Swpaul m->m_pkthdr.rcvif = ifp; 256745386Swpaul 256845386Swpaul /* Remove header from mbuf and pass it on. */ 256945386Swpaul m_adj(m, sizeof(struct ether_header)); 257045386Swpaul 257158698Sjlemon if (ifp->if_hwassist) { 257258698Sjlemon m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | 257358698Sjlemon CSUM_DATA_VALID; 257458698Sjlemon if ((cur_rx->ti_ip_cksum ^ 0xffff) == 0) 257558698Sjlemon m->m_pkthdr.csum_flags |= CSUM_IP_VALID; 257658698Sjlemon m->m_pkthdr.csum_data = cur_rx->ti_tcp_udp_cksum; 257758698Sjlemon } 257845386Swpaul 257945386Swpaul /* 258045386Swpaul * If we received a packet with a vlan tag, pass it 258145386Swpaul * to vlan_input() instead of ether_input(). 258245386Swpaul */ 258345386Swpaul if (have_tag) { 258487276Sbrooks VLAN_INPUT_TAG(eh, m, vlan_tag); 258545386Swpaul have_tag = vlan_tag = 0; 258645386Swpaul continue; 258745386Swpaul } 258845386Swpaul ether_input(ifp, eh, m); 258945386Swpaul } 259045386Swpaul 259145386Swpaul /* Only necessary on the Tigon 1. */ 259245386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) 259345386Swpaul CSR_WRITE_4(sc, TI_GCR_RXRETURNCONS_IDX, 259445386Swpaul sc->ti_rx_saved_considx); 259545386Swpaul 259648597Swpaul TI_UPDATE_STDPROD(sc, sc->ti_std); 259748597Swpaul TI_UPDATE_MINIPROD(sc, sc->ti_mini); 259848597Swpaul TI_UPDATE_JUMBOPROD(sc, sc->ti_jumbo); 259945386Swpaul 260045386Swpaul return; 260145386Swpaul} 260245386Swpaul 260345386Swpaulstatic void ti_txeof(sc) 260445386Swpaul struct ti_softc *sc; 260545386Swpaul{ 260645386Swpaul struct ti_tx_desc *cur_tx = NULL; 260745386Swpaul struct ifnet *ifp; 260845386Swpaul 260945386Swpaul ifp = &sc->arpcom.ac_if; 261045386Swpaul 261145386Swpaul /* 261245386Swpaul * Go through our tx ring and free mbufs for those 261345386Swpaul * frames that have been sent. 261445386Swpaul */ 261545386Swpaul while (sc->ti_tx_saved_considx != sc->ti_tx_considx.ti_idx) { 261645386Swpaul u_int32_t idx = 0; 261745386Swpaul 261845386Swpaul idx = sc->ti_tx_saved_considx; 261945386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) { 262045386Swpaul if (idx > 383) 262145386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 262245386Swpaul TI_TX_RING_BASE + 6144); 262345386Swpaul else if (idx > 255) 262445386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 262545386Swpaul TI_TX_RING_BASE + 4096); 262645386Swpaul else if (idx > 127) 262745386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 262845386Swpaul TI_TX_RING_BASE + 2048); 262945386Swpaul else 263045386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 263145386Swpaul TI_TX_RING_BASE); 263245386Swpaul cur_tx = &sc->ti_rdata->ti_tx_ring_nic[idx % 128]; 263345386Swpaul } else 263445386Swpaul cur_tx = &sc->ti_rdata->ti_tx_ring[idx]; 263545386Swpaul if (cur_tx->ti_flags & TI_BDFLAG_END) 263645386Swpaul ifp->if_opackets++; 263745386Swpaul if (sc->ti_cdata.ti_tx_chain[idx] != NULL) { 263845386Swpaul m_freem(sc->ti_cdata.ti_tx_chain[idx]); 263945386Swpaul sc->ti_cdata.ti_tx_chain[idx] = NULL; 264045386Swpaul } 264148011Swpaul sc->ti_txcnt--; 264245386Swpaul TI_INC(sc->ti_tx_saved_considx, TI_TX_RING_CNT); 264345386Swpaul ifp->if_timer = 0; 264445386Swpaul } 264545386Swpaul 264645386Swpaul if (cur_tx != NULL) 264745386Swpaul ifp->if_flags &= ~IFF_OACTIVE; 264845386Swpaul 264945386Swpaul return; 265045386Swpaul} 265145386Swpaul 265245386Swpaulstatic void ti_intr(xsc) 265345386Swpaul void *xsc; 265445386Swpaul{ 265545386Swpaul struct ti_softc *sc; 265645386Swpaul struct ifnet *ifp; 265745386Swpaul 265845386Swpaul sc = xsc; 265967087Swpaul TI_LOCK(sc); 266045386Swpaul ifp = &sc->arpcom.ac_if; 266145386Swpaul 266298849Sken/*#ifdef notdef*/ 266345386Swpaul /* Avoid this for now -- checking this register is expensive. */ 266445386Swpaul /* Make sure this is really our interrupt. */ 266567087Swpaul if (!(CSR_READ_4(sc, TI_MISC_HOST_CTL) & TI_MHC_INTSTATE)) { 266667087Swpaul TI_UNLOCK(sc); 266745386Swpaul return; 266867087Swpaul } 266998849Sken/*#endif*/ 267045386Swpaul 267145386Swpaul /* Ack interrupt and stop others from occuring. */ 267245386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1); 267345386Swpaul 267445386Swpaul if (ifp->if_flags & IFF_RUNNING) { 267545386Swpaul /* Check RX return ring producer/consumer */ 267645386Swpaul ti_rxeof(sc); 267745386Swpaul 267845386Swpaul /* Check TX ring producer/consumer */ 267945386Swpaul ti_txeof(sc); 268045386Swpaul } 268145386Swpaul 268245386Swpaul ti_handle_events(sc); 268345386Swpaul 268445386Swpaul /* Re-enable interrupts. */ 268545386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0); 268645386Swpaul 268745386Swpaul if (ifp->if_flags & IFF_RUNNING && ifp->if_snd.ifq_head != NULL) 268845386Swpaul ti_start(ifp); 268945386Swpaul 269067087Swpaul TI_UNLOCK(sc); 269167087Swpaul 269245386Swpaul return; 269345386Swpaul} 269445386Swpaul 269545386Swpaulstatic void ti_stats_update(sc) 269645386Swpaul struct ti_softc *sc; 269745386Swpaul{ 269845386Swpaul struct ifnet *ifp; 269945386Swpaul 270045386Swpaul ifp = &sc->arpcom.ac_if; 270145386Swpaul 270245386Swpaul ifp->if_collisions += 270345386Swpaul (sc->ti_rdata->ti_info.ti_stats.dot3StatsSingleCollisionFrames + 270445386Swpaul sc->ti_rdata->ti_info.ti_stats.dot3StatsMultipleCollisionFrames + 270545386Swpaul sc->ti_rdata->ti_info.ti_stats.dot3StatsExcessiveCollisions + 270645386Swpaul sc->ti_rdata->ti_info.ti_stats.dot3StatsLateCollisions) - 270745386Swpaul ifp->if_collisions; 270845386Swpaul 270945386Swpaul return; 271045386Swpaul} 271145386Swpaul 271245386Swpaul/* 271345386Swpaul * Encapsulate an mbuf chain in the tx ring by coupling the mbuf data 271445386Swpaul * pointers to descriptors. 271545386Swpaul */ 271645386Swpaulstatic int ti_encap(sc, m_head, txidx) 271745386Swpaul struct ti_softc *sc; 271845386Swpaul struct mbuf *m_head; 271945386Swpaul u_int32_t *txidx; 272045386Swpaul{ 272145386Swpaul struct ti_tx_desc *f = NULL; 272245386Swpaul struct mbuf *m; 272348011Swpaul u_int32_t frag, cur, cnt = 0; 272458698Sjlemon u_int16_t csum_flags = 0; 272545386Swpaul struct ifvlan *ifv = NULL; 272645386Swpaul 272745386Swpaul if ((m_head->m_flags & (M_PROTO1|M_PKTHDR)) == (M_PROTO1|M_PKTHDR) && 272845386Swpaul m_head->m_pkthdr.rcvif != NULL && 272980307Sbrooks m_head->m_pkthdr.rcvif->if_type == IFT_L2VLAN) 273045386Swpaul ifv = m_head->m_pkthdr.rcvif->if_softc; 273145386Swpaul 273245386Swpaul m = m_head; 273345386Swpaul cur = frag = *txidx; 273445386Swpaul 273558698Sjlemon if (m_head->m_pkthdr.csum_flags) { 273658698Sjlemon if (m_head->m_pkthdr.csum_flags & CSUM_IP) 273758698Sjlemon csum_flags |= TI_BDFLAG_IP_CKSUM; 273858698Sjlemon if (m_head->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP)) 273958698Sjlemon csum_flags |= TI_BDFLAG_TCP_UDP_CKSUM; 274058698Sjlemon if (m_head->m_flags & M_LASTFRAG) 274158698Sjlemon csum_flags |= TI_BDFLAG_IP_FRAG_END; 274258698Sjlemon else if (m_head->m_flags & M_FRAG) 274358698Sjlemon csum_flags |= TI_BDFLAG_IP_FRAG; 274458698Sjlemon } 274545386Swpaul /* 274645386Swpaul * Start packing the mbufs in this chain into 274745386Swpaul * the fragment pointers. Stop when we run out 274845386Swpaul * of fragments or hit the end of the mbuf chain. 274945386Swpaul */ 275045386Swpaul for (m = m_head; m != NULL; m = m->m_next) { 275145386Swpaul if (m->m_len != 0) { 275245386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) { 275345386Swpaul if (frag > 383) 275445386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 275545386Swpaul TI_TX_RING_BASE + 6144); 275645386Swpaul else if (frag > 255) 275745386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 275845386Swpaul TI_TX_RING_BASE + 4096); 275945386Swpaul else if (frag > 127) 276045386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 276145386Swpaul TI_TX_RING_BASE + 2048); 276245386Swpaul else 276345386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 276445386Swpaul TI_TX_RING_BASE); 276545386Swpaul f = &sc->ti_rdata->ti_tx_ring_nic[frag % 128]; 276645386Swpaul } else 276745386Swpaul f = &sc->ti_rdata->ti_tx_ring[frag]; 276845386Swpaul if (sc->ti_cdata.ti_tx_chain[frag] != NULL) 276945386Swpaul break; 277045386Swpaul TI_HOSTADDR(f->ti_addr) = vtophys(mtod(m, vm_offset_t)); 277145386Swpaul f->ti_len = m->m_len; 277258698Sjlemon f->ti_flags = csum_flags; 277383115Sbrooks 277445386Swpaul if (ifv != NULL) { 277545386Swpaul f->ti_flags |= TI_BDFLAG_VLAN_TAG; 277677058Sphk f->ti_vlan_tag = ifv->ifv_tag & 0xfff; 277745386Swpaul } else { 277845386Swpaul f->ti_vlan_tag = 0; 277945386Swpaul } 278083115Sbrooks 278148011Swpaul /* 278248011Swpaul * Sanity check: avoid coming within 16 descriptors 278348011Swpaul * of the end of the ring. 278448011Swpaul */ 278548011Swpaul if ((TI_TX_RING_CNT - (sc->ti_txcnt + cnt)) < 16) 278648011Swpaul return(ENOBUFS); 278745386Swpaul cur = frag; 278845386Swpaul TI_INC(frag, TI_TX_RING_CNT); 278948011Swpaul cnt++; 279045386Swpaul } 279145386Swpaul } 279245386Swpaul 279345386Swpaul if (m != NULL) 279445386Swpaul return(ENOBUFS); 279545386Swpaul 279646177Swpaul if (frag == sc->ti_tx_saved_considx) 279746177Swpaul return(ENOBUFS); 279846177Swpaul 279945386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) 280045386Swpaul sc->ti_rdata->ti_tx_ring_nic[cur % 128].ti_flags |= 280198849Sken TI_BDFLAG_END; 280245386Swpaul else 280345386Swpaul sc->ti_rdata->ti_tx_ring[cur].ti_flags |= TI_BDFLAG_END; 280447458Swpaul sc->ti_cdata.ti_tx_chain[cur] = m_head; 280548011Swpaul sc->ti_txcnt += cnt; 280645386Swpaul 280745386Swpaul *txidx = frag; 280845386Swpaul 280945386Swpaul return(0); 281045386Swpaul} 281145386Swpaul 281245386Swpaul/* 281345386Swpaul * Main transmit routine. To avoid having to do mbuf copies, we put pointers 281445386Swpaul * to the mbuf data regions directly in the transmit descriptors. 281545386Swpaul */ 281645386Swpaulstatic void ti_start(ifp) 281745386Swpaul struct ifnet *ifp; 281845386Swpaul{ 281945386Swpaul struct ti_softc *sc; 282045386Swpaul struct mbuf *m_head = NULL; 282145386Swpaul u_int32_t prodidx = 0; 282245386Swpaul 282345386Swpaul sc = ifp->if_softc; 282467087Swpaul TI_LOCK(sc); 282545386Swpaul 282645386Swpaul prodidx = CSR_READ_4(sc, TI_MB_SENDPROD_IDX); 282745386Swpaul 282845386Swpaul while(sc->ti_cdata.ti_tx_chain[prodidx] == NULL) { 282945386Swpaul IF_DEQUEUE(&ifp->if_snd, m_head); 283045386Swpaul if (m_head == NULL) 283145386Swpaul break; 283245386Swpaul 283345386Swpaul /* 283458698Sjlemon * XXX 283558698Sjlemon * safety overkill. If this is a fragmented packet chain 283658698Sjlemon * with delayed TCP/UDP checksums, then only encapsulate 283758698Sjlemon * it if we have enough descriptors to handle the entire 283858698Sjlemon * chain at once. 283958698Sjlemon * (paranoia -- may not actually be needed) 284058698Sjlemon */ 284158698Sjlemon if (m_head->m_flags & M_FIRSTFRAG && 284258698Sjlemon m_head->m_pkthdr.csum_flags & (CSUM_DELAY_DATA)) { 284358698Sjlemon if ((TI_TX_RING_CNT - sc->ti_txcnt) < 284458698Sjlemon m_head->m_pkthdr.csum_data + 16) { 284558698Sjlemon IF_PREPEND(&ifp->if_snd, m_head); 284658698Sjlemon ifp->if_flags |= IFF_OACTIVE; 284758698Sjlemon break; 284858698Sjlemon } 284958698Sjlemon } 285058698Sjlemon 285158698Sjlemon /* 285245386Swpaul * Pack the data into the transmit ring. If we 285345386Swpaul * don't have room, set the OACTIVE flag and wait 285445386Swpaul * for the NIC to drain the ring. 285545386Swpaul */ 285645386Swpaul if (ti_encap(sc, m_head, &prodidx)) { 285745386Swpaul IF_PREPEND(&ifp->if_snd, m_head); 285845386Swpaul ifp->if_flags |= IFF_OACTIVE; 285945386Swpaul break; 286045386Swpaul } 286145386Swpaul 286245386Swpaul /* 286345386Swpaul * If there's a BPF listener, bounce a copy of this frame 286445386Swpaul * to him. 286545386Swpaul */ 286645386Swpaul if (ifp->if_bpf) 286745386Swpaul bpf_mtap(ifp, m_head); 286845386Swpaul } 286945386Swpaul 287045386Swpaul /* Transmit */ 287145386Swpaul CSR_WRITE_4(sc, TI_MB_SENDPROD_IDX, prodidx); 287245386Swpaul 287345386Swpaul /* 287445386Swpaul * Set a timeout in case the chip goes out to lunch. 287545386Swpaul */ 287645386Swpaul ifp->if_timer = 5; 287767087Swpaul TI_UNLOCK(sc); 287845386Swpaul 287945386Swpaul return; 288045386Swpaul} 288145386Swpaul 288245386Swpaulstatic void ti_init(xsc) 288345386Swpaul void *xsc; 288445386Swpaul{ 288545386Swpaul struct ti_softc *sc = xsc; 288645386Swpaul 288745386Swpaul /* Cancel pending I/O and flush buffers. */ 288845386Swpaul ti_stop(sc); 288945386Swpaul 289067087Swpaul TI_LOCK(sc); 289145386Swpaul /* Init the gen info block, ring control blocks and firmware. */ 289245386Swpaul if (ti_gibinit(sc)) { 289345386Swpaul printf("ti%d: initialization failure\n", sc->ti_unit); 289467087Swpaul TI_UNLOCK(sc); 289545386Swpaul return; 289645386Swpaul } 289745386Swpaul 289867087Swpaul TI_UNLOCK(sc); 289945386Swpaul 290045386Swpaul return; 290145386Swpaul} 290245386Swpaul 290345386Swpaulstatic void ti_init2(sc) 290445386Swpaul struct ti_softc *sc; 290545386Swpaul{ 290645386Swpaul struct ti_cmd_desc cmd; 290745386Swpaul struct ifnet *ifp; 290845386Swpaul u_int16_t *m; 290945386Swpaul struct ifmedia *ifm; 291045386Swpaul int tmp; 291145386Swpaul 291245386Swpaul ifp = &sc->arpcom.ac_if; 291345386Swpaul 291445386Swpaul /* Specify MTU and interface index. */ 291545386Swpaul CSR_WRITE_4(sc, TI_GCR_IFINDEX, ifp->if_unit); 291645386Swpaul CSR_WRITE_4(sc, TI_GCR_IFMTU, ifp->if_mtu + 291745386Swpaul ETHER_HDR_LEN + ETHER_CRC_LEN); 291845386Swpaul TI_DO_CMD(TI_CMD_UPDATE_GENCOM, 0, 0); 291945386Swpaul 292045386Swpaul /* Load our MAC address. */ 292145386Swpaul m = (u_int16_t *)&sc->arpcom.ac_enaddr[0]; 292245386Swpaul CSR_WRITE_4(sc, TI_GCR_PAR0, htons(m[0])); 292345386Swpaul CSR_WRITE_4(sc, TI_GCR_PAR1, (htons(m[1]) << 16) | htons(m[2])); 292445386Swpaul TI_DO_CMD(TI_CMD_SET_MAC_ADDR, 0, 0); 292545386Swpaul 292645386Swpaul /* Enable or disable promiscuous mode as needed. */ 292745386Swpaul if (ifp->if_flags & IFF_PROMISC) { 292845386Swpaul TI_DO_CMD(TI_CMD_SET_PROMISC_MODE, TI_CMD_CODE_PROMISC_ENB, 0); 292945386Swpaul } else { 293045386Swpaul TI_DO_CMD(TI_CMD_SET_PROMISC_MODE, TI_CMD_CODE_PROMISC_DIS, 0); 293145386Swpaul } 293245386Swpaul 293345386Swpaul /* Program multicast filter. */ 293445386Swpaul ti_setmulti(sc); 293545386Swpaul 293645386Swpaul /* 293745386Swpaul * If this is a Tigon 1, we should tell the 293845386Swpaul * firmware to use software packet filtering. 293945386Swpaul */ 294045386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) { 294145386Swpaul TI_DO_CMD(TI_CMD_FDR_FILTERING, TI_CMD_CODE_FILT_ENB, 0); 294245386Swpaul } 294345386Swpaul 294445386Swpaul /* Init RX ring. */ 294545386Swpaul ti_init_rx_ring_std(sc); 294645386Swpaul 294745386Swpaul /* Init jumbo RX ring. */ 294845386Swpaul if (ifp->if_mtu > (ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN)) 294945386Swpaul ti_init_rx_ring_jumbo(sc); 295045386Swpaul 295145386Swpaul /* 295245386Swpaul * If this is a Tigon 2, we can also configure the 295345386Swpaul * mini ring. 295445386Swpaul */ 295545386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON_II) 295645386Swpaul ti_init_rx_ring_mini(sc); 295745386Swpaul 295845386Swpaul CSR_WRITE_4(sc, TI_GCR_RXRETURNCONS_IDX, 0); 295945386Swpaul sc->ti_rx_saved_considx = 0; 296045386Swpaul 296145386Swpaul /* Init TX ring. */ 296245386Swpaul ti_init_tx_ring(sc); 296345386Swpaul 296445386Swpaul /* Tell firmware we're alive. */ 296545386Swpaul TI_DO_CMD(TI_CMD_HOST_STATE, TI_CMD_CODE_STACK_UP, 0); 296645386Swpaul 296745386Swpaul /* Enable host interrupts. */ 296845386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0); 296945386Swpaul 297045386Swpaul ifp->if_flags |= IFF_RUNNING; 297145386Swpaul ifp->if_flags &= ~IFF_OACTIVE; 297245386Swpaul 297345386Swpaul /* 297445386Swpaul * Make sure to set media properly. We have to do this 297545386Swpaul * here since we have to issue commands in order to set 297645386Swpaul * the link negotiation and we can't issue commands until 297745386Swpaul * the firmware is running. 297845386Swpaul */ 297945386Swpaul ifm = &sc->ifmedia; 298045386Swpaul tmp = ifm->ifm_media; 298145386Swpaul ifm->ifm_media = ifm->ifm_cur->ifm_media; 298245386Swpaul ti_ifmedia_upd(ifp); 298345386Swpaul ifm->ifm_media = tmp; 298445386Swpaul 298545386Swpaul return; 298645386Swpaul} 298745386Swpaul 298845386Swpaul/* 298945386Swpaul * Set media options. 299045386Swpaul */ 299145386Swpaulstatic int ti_ifmedia_upd(ifp) 299245386Swpaul struct ifnet *ifp; 299345386Swpaul{ 299445386Swpaul struct ti_softc *sc; 299545386Swpaul struct ifmedia *ifm; 299645386Swpaul struct ti_cmd_desc cmd; 299798849Sken u_int32_t flowctl; 299845386Swpaul 299945386Swpaul sc = ifp->if_softc; 300045386Swpaul ifm = &sc->ifmedia; 300145386Swpaul 300245386Swpaul if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 300345386Swpaul return(EINVAL); 300445386Swpaul 300598849Sken flowctl = 0; 300698849Sken 300745386Swpaul switch(IFM_SUBTYPE(ifm->ifm_media)) { 300845386Swpaul case IFM_AUTO: 300998849Sken /* 301098849Sken * Transmit flow control doesn't work on the Tigon 1. 301198849Sken */ 301298849Sken flowctl = TI_GLNK_RX_FLOWCTL_Y; 301398849Sken 301498849Sken /* 301598849Sken * Transmit flow control can also cause problems on the 301698849Sken * Tigon 2, apparantly with both the copper and fiber 301798849Sken * boards. The symptom is that the interface will just 301898849Sken * hang. This was reproduced with Alteon 180 switches. 301998849Sken */ 302098849Sken#if 0 302198849Sken if (sc->ti_hwrev != TI_HWREV_TIGON) 302298849Sken flowctl |= TI_GLNK_TX_FLOWCTL_Y; 302398849Sken#endif 302498849Sken 302545386Swpaul CSR_WRITE_4(sc, TI_GCR_GLINK, TI_GLNK_PREF|TI_GLNK_1000MB| 302698849Sken TI_GLNK_FULL_DUPLEX| flowctl | 302745386Swpaul TI_GLNK_AUTONEGENB|TI_GLNK_ENB); 302898849Sken 302998849Sken flowctl = TI_LNK_RX_FLOWCTL_Y; 303098849Sken#if 0 303198849Sken if (sc->ti_hwrev != TI_HWREV_TIGON) 303298849Sken flowctl |= TI_LNK_TX_FLOWCTL_Y; 303398849Sken#endif 303498849Sken 303545386Swpaul CSR_WRITE_4(sc, TI_GCR_LINK, TI_LNK_100MB|TI_LNK_10MB| 303698849Sken TI_LNK_FULL_DUPLEX|TI_LNK_HALF_DUPLEX| flowctl | 303745386Swpaul TI_LNK_AUTONEGENB|TI_LNK_ENB); 303845386Swpaul TI_DO_CMD(TI_CMD_LINK_NEGOTIATION, 303945386Swpaul TI_CMD_CODE_NEGOTIATE_BOTH, 0); 304045386Swpaul break; 304145386Swpaul case IFM_1000_SX: 304295673Sphk case IFM_1000_T: 304398849Sken flowctl = TI_GLNK_RX_FLOWCTL_Y; 304498849Sken#if 0 304598849Sken if (sc->ti_hwrev != TI_HWREV_TIGON) 304698849Sken flowctl |= TI_GLNK_TX_FLOWCTL_Y; 304798849Sken#endif 304898849Sken 304945386Swpaul CSR_WRITE_4(sc, TI_GCR_GLINK, TI_GLNK_PREF|TI_GLNK_1000MB| 305098849Sken flowctl |TI_GLNK_ENB); 305145386Swpaul CSR_WRITE_4(sc, TI_GCR_LINK, 0); 305263699Swpaul if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) { 305363699Swpaul TI_SETBIT(sc, TI_GCR_GLINK, TI_GLNK_FULL_DUPLEX); 305463699Swpaul } 305545386Swpaul TI_DO_CMD(TI_CMD_LINK_NEGOTIATION, 305645386Swpaul TI_CMD_CODE_NEGOTIATE_GIGABIT, 0); 305745386Swpaul break; 305845386Swpaul case IFM_100_FX: 305945386Swpaul case IFM_10_FL: 306063699Swpaul case IFM_100_TX: 306163699Swpaul case IFM_10_T: 306298849Sken flowctl = TI_LNK_RX_FLOWCTL_Y; 306398849Sken#if 0 306498849Sken if (sc->ti_hwrev != TI_HWREV_TIGON) 306598849Sken flowctl |= TI_LNK_TX_FLOWCTL_Y; 306698849Sken#endif 306798849Sken 306845386Swpaul CSR_WRITE_4(sc, TI_GCR_GLINK, 0); 306998849Sken CSR_WRITE_4(sc, TI_GCR_LINK, TI_LNK_ENB|TI_LNK_PREF|flowctl); 307063699Swpaul if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_FX || 307163699Swpaul IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) { 307245386Swpaul TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_100MB); 307345386Swpaul } else { 307445386Swpaul TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_10MB); 307545386Swpaul } 307645386Swpaul if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) { 307745386Swpaul TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_FULL_DUPLEX); 307845386Swpaul } else { 307945386Swpaul TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_HALF_DUPLEX); 308045386Swpaul } 308145386Swpaul TI_DO_CMD(TI_CMD_LINK_NEGOTIATION, 308245386Swpaul TI_CMD_CODE_NEGOTIATE_10_100, 0); 308345386Swpaul break; 308445386Swpaul } 308545386Swpaul 308645386Swpaul return(0); 308745386Swpaul} 308845386Swpaul 308945386Swpaul/* 309045386Swpaul * Report current media status. 309145386Swpaul */ 309245386Swpaulstatic void ti_ifmedia_sts(ifp, ifmr) 309345386Swpaul struct ifnet *ifp; 309445386Swpaul struct ifmediareq *ifmr; 309545386Swpaul{ 309645386Swpaul struct ti_softc *sc; 309763699Swpaul u_int32_t media = 0; 309845386Swpaul 309945386Swpaul sc = ifp->if_softc; 310045386Swpaul 310145386Swpaul ifmr->ifm_status = IFM_AVALID; 310245386Swpaul ifmr->ifm_active = IFM_ETHER; 310345386Swpaul 310445386Swpaul if (sc->ti_linkstat == TI_EV_CODE_LINK_DOWN) 310545386Swpaul return; 310645386Swpaul 310745386Swpaul ifmr->ifm_status |= IFM_ACTIVE; 310845386Swpaul 310963699Swpaul if (sc->ti_linkstat == TI_EV_CODE_GIG_LINK_UP) { 311063699Swpaul media = CSR_READ_4(sc, TI_GCR_GLINK_STAT); 311163699Swpaul if (sc->ti_copper) 311295673Sphk ifmr->ifm_active |= IFM_1000_T; 311363699Swpaul else 311463699Swpaul ifmr->ifm_active |= IFM_1000_SX; 311563699Swpaul if (media & TI_GLNK_FULL_DUPLEX) 311663699Swpaul ifmr->ifm_active |= IFM_FDX; 311763699Swpaul else 311863699Swpaul ifmr->ifm_active |= IFM_HDX; 311963699Swpaul } else if (sc->ti_linkstat == TI_EV_CODE_LINK_UP) { 312045386Swpaul media = CSR_READ_4(sc, TI_GCR_LINK_STAT); 312163699Swpaul if (sc->ti_copper) { 312263699Swpaul if (media & TI_LNK_100MB) 312363699Swpaul ifmr->ifm_active |= IFM_100_TX; 312463699Swpaul if (media & TI_LNK_10MB) 312563699Swpaul ifmr->ifm_active |= IFM_10_T; 312663699Swpaul } else { 312763699Swpaul if (media & TI_LNK_100MB) 312863699Swpaul ifmr->ifm_active |= IFM_100_FX; 312963699Swpaul if (media & TI_LNK_10MB) 313063699Swpaul ifmr->ifm_active |= IFM_10_FL; 313163699Swpaul } 313245386Swpaul if (media & TI_LNK_FULL_DUPLEX) 313345386Swpaul ifmr->ifm_active |= IFM_FDX; 313445386Swpaul if (media & TI_LNK_HALF_DUPLEX) 313545386Swpaul ifmr->ifm_active |= IFM_HDX; 313645386Swpaul } 313745386Swpaul 313845386Swpaul return; 313945386Swpaul} 314045386Swpaul 314145386Swpaulstatic int ti_ioctl(ifp, command, data) 314245386Swpaul struct ifnet *ifp; 314345386Swpaul u_long command; 314445386Swpaul caddr_t data; 314545386Swpaul{ 314645386Swpaul struct ti_softc *sc = ifp->if_softc; 314745386Swpaul struct ifreq *ifr = (struct ifreq *) data; 314883630Sjlemon int mask, error = 0; 314945386Swpaul struct ti_cmd_desc cmd; 315045386Swpaul 315167087Swpaul TI_LOCK(sc); 315245386Swpaul 315345386Swpaul switch(command) { 315445386Swpaul case SIOCSIFADDR: 315545386Swpaul case SIOCGIFADDR: 315645386Swpaul error = ether_ioctl(ifp, command, data); 315745386Swpaul break; 315845386Swpaul case SIOCSIFMTU: 315945386Swpaul if (ifr->ifr_mtu > TI_JUMBO_MTU) 316045386Swpaul error = EINVAL; 316145386Swpaul else { 316245386Swpaul ifp->if_mtu = ifr->ifr_mtu; 316345386Swpaul ti_init(sc); 316445386Swpaul } 316545386Swpaul break; 316645386Swpaul case SIOCSIFFLAGS: 316745386Swpaul if (ifp->if_flags & IFF_UP) { 316845386Swpaul /* 316945386Swpaul * If only the state of the PROMISC flag changed, 317045386Swpaul * then just use the 'set promisc mode' command 317145386Swpaul * instead of reinitializing the entire NIC. Doing 317245386Swpaul * a full re-init means reloading the firmware and 317345386Swpaul * waiting for it to start up, which may take a 317445386Swpaul * second or two. 317545386Swpaul */ 317645386Swpaul if (ifp->if_flags & IFF_RUNNING && 317745386Swpaul ifp->if_flags & IFF_PROMISC && 317845386Swpaul !(sc->ti_if_flags & IFF_PROMISC)) { 317945386Swpaul TI_DO_CMD(TI_CMD_SET_PROMISC_MODE, 318045386Swpaul TI_CMD_CODE_PROMISC_ENB, 0); 318145386Swpaul } else if (ifp->if_flags & IFF_RUNNING && 318245386Swpaul !(ifp->if_flags & IFF_PROMISC) && 318345386Swpaul sc->ti_if_flags & IFF_PROMISC) { 318445386Swpaul TI_DO_CMD(TI_CMD_SET_PROMISC_MODE, 318545386Swpaul TI_CMD_CODE_PROMISC_DIS, 0); 318645386Swpaul } else 318745386Swpaul ti_init(sc); 318845386Swpaul } else { 318945386Swpaul if (ifp->if_flags & IFF_RUNNING) { 319045386Swpaul ti_stop(sc); 319145386Swpaul } 319245386Swpaul } 319345386Swpaul sc->ti_if_flags = ifp->if_flags; 319445386Swpaul error = 0; 319545386Swpaul break; 319645386Swpaul case SIOCADDMULTI: 319745386Swpaul case SIOCDELMULTI: 319845386Swpaul if (ifp->if_flags & IFF_RUNNING) { 319945386Swpaul ti_setmulti(sc); 320045386Swpaul error = 0; 320145386Swpaul } 320245386Swpaul break; 320345386Swpaul case SIOCSIFMEDIA: 320445386Swpaul case SIOCGIFMEDIA: 320545386Swpaul error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, command); 320645386Swpaul break; 320783630Sjlemon case SIOCSIFCAP: 320883630Sjlemon mask = ifr->ifr_reqcap ^ ifp->if_capenable; 320983630Sjlemon if (mask & IFCAP_HWCSUM) { 321083630Sjlemon if (IFCAP_HWCSUM & ifp->if_capenable) 321183630Sjlemon ifp->if_capenable &= ~IFCAP_HWCSUM; 321283630Sjlemon else 321383630Sjlemon ifp->if_capenable |= IFCAP_HWCSUM; 321483630Sjlemon if (ifp->if_flags & IFF_RUNNING) 321583630Sjlemon ti_init(sc); 321683630Sjlemon } 321783630Sjlemon error = 0; 321883630Sjlemon break; 321945386Swpaul default: 322045386Swpaul error = EINVAL; 322145386Swpaul break; 322245386Swpaul } 322345386Swpaul 322467087Swpaul TI_UNLOCK(sc); 322545386Swpaul 322645386Swpaul return(error); 322745386Swpaul} 322845386Swpaul 322998849Skenstatic int 323098849Skenti_open(dev_t dev, int flags, int fmt, struct thread *td) 323198849Sken{ 323298849Sken int unit; 323398849Sken struct ti_softc *sc; 323498849Sken 323598849Sken unit = minor(dev) & 0xff; 323698849Sken 323798849Sken sc = ti_lookup_softc(unit); 323898849Sken 323998849Sken if (sc == NULL) 324098849Sken return(ENODEV); 324198849Sken 324298849Sken TI_LOCK(sc); 324398849Sken sc->ti_flags |= TI_FLAG_DEBUGING; 324498849Sken TI_UNLOCK(sc); 324598849Sken 324698849Sken return(0); 324798849Sken} 324898849Sken 324998849Skenstatic int 325098849Skenti_close(dev_t dev, int flag, int fmt, struct thread *td) 325198849Sken{ 325298849Sken int unit; 325398849Sken struct ti_softc *sc; 325498849Sken 325598849Sken unit = minor(dev) & 0xff; 325698849Sken 325798849Sken sc = ti_lookup_softc(unit); 325898849Sken 325998849Sken if (sc == NULL) 326098849Sken return(ENODEV); 326198849Sken 326298849Sken TI_LOCK(sc); 326398849Sken sc->ti_flags &= ~TI_FLAG_DEBUGING; 326498849Sken TI_UNLOCK(sc); 326598849Sken 326698849Sken return(0); 326798849Sken} 326898849Sken 326998849Sken/* 327098849Sken * This ioctl routine goes along with the Tigon character device. 327198849Sken */ 327298849Skenstatic int 327398849Skenti_ioctl2(dev_t dev, u_long cmd, caddr_t addr, int flag, struct thread *td) 327498849Sken{ 327598849Sken int unit, error; 327698849Sken struct ti_softc *sc; 327798849Sken 327898849Sken unit = minor(dev) & 0xff; 327998849Sken 328098849Sken sc = ti_lookup_softc(unit); 328198849Sken 328298849Sken if (sc == NULL) 328398849Sken return(ENODEV); 328498849Sken 328598849Sken error = 0; 328698849Sken 328798849Sken switch(cmd) { 328898849Sken case TIIOCGETSTATS: 328998849Sken { 329098849Sken struct ti_stats *outstats; 329198849Sken 329298849Sken outstats = (struct ti_stats *)addr; 329398849Sken 329498849Sken bcopy(&sc->ti_rdata->ti_info.ti_stats, outstats, 329598849Sken sizeof(struct ti_stats)); 329698849Sken break; 329798849Sken } 329898849Sken case TIIOCGETPARAMS: 329998849Sken { 330098849Sken struct ti_params *params; 330198849Sken 330298849Sken params = (struct ti_params *)addr; 330398849Sken 330498849Sken params->ti_stat_ticks = sc->ti_stat_ticks; 330598849Sken params->ti_rx_coal_ticks = sc->ti_rx_coal_ticks; 330698849Sken params->ti_tx_coal_ticks = sc->ti_tx_coal_ticks; 330798849Sken params->ti_rx_max_coal_bds = sc->ti_rx_max_coal_bds; 330898849Sken params->ti_tx_max_coal_bds = sc->ti_tx_max_coal_bds; 330998849Sken params->ti_tx_buf_ratio = sc->ti_tx_buf_ratio; 331098849Sken params->param_mask = TI_PARAM_ALL; 331198849Sken 331298849Sken error = 0; 331398849Sken 331498849Sken break; 331598849Sken } 331698849Sken case TIIOCSETPARAMS: 331798849Sken { 331898849Sken struct ti_params *params; 331998849Sken 332098849Sken params = (struct ti_params *)addr; 332198849Sken 332298849Sken if (params->param_mask & TI_PARAM_STAT_TICKS) { 332398849Sken sc->ti_stat_ticks = params->ti_stat_ticks; 332498849Sken CSR_WRITE_4(sc, TI_GCR_STAT_TICKS, sc->ti_stat_ticks); 332598849Sken } 332698849Sken 332798849Sken if (params->param_mask & TI_PARAM_RX_COAL_TICKS) { 332898849Sken sc->ti_rx_coal_ticks = params->ti_rx_coal_ticks; 332998849Sken CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS, 333098849Sken sc->ti_rx_coal_ticks); 333198849Sken } 333298849Sken 333398849Sken if (params->param_mask & TI_PARAM_TX_COAL_TICKS) { 333498849Sken sc->ti_tx_coal_ticks = params->ti_tx_coal_ticks; 333598849Sken CSR_WRITE_4(sc, TI_GCR_TX_COAL_TICKS, 333698849Sken sc->ti_tx_coal_ticks); 333798849Sken } 333898849Sken 333998849Sken if (params->param_mask & TI_PARAM_RX_COAL_BDS) { 334098849Sken sc->ti_rx_max_coal_bds = params->ti_rx_max_coal_bds; 334198849Sken CSR_WRITE_4(sc, TI_GCR_RX_MAX_COAL_BD, 334298849Sken sc->ti_rx_max_coal_bds); 334398849Sken } 334498849Sken 334598849Sken if (params->param_mask & TI_PARAM_TX_COAL_BDS) { 334698849Sken sc->ti_tx_max_coal_bds = params->ti_tx_max_coal_bds; 334798849Sken CSR_WRITE_4(sc, TI_GCR_TX_MAX_COAL_BD, 334898849Sken sc->ti_tx_max_coal_bds); 334998849Sken } 335098849Sken 335198849Sken if (params->param_mask & TI_PARAM_TX_BUF_RATIO) { 335298849Sken sc->ti_tx_buf_ratio = params->ti_tx_buf_ratio; 335398849Sken CSR_WRITE_4(sc, TI_GCR_TX_BUFFER_RATIO, 335498849Sken sc->ti_tx_buf_ratio); 335598849Sken } 335698849Sken 335798849Sken error = 0; 335898849Sken 335998849Sken break; 336098849Sken } 336198849Sken case TIIOCSETTRACE: { 336298849Sken ti_trace_type trace_type; 336398849Sken 336498849Sken trace_type = *(ti_trace_type *)addr; 336598849Sken 336698849Sken /* 336798849Sken * Set tracing to whatever the user asked for. Setting 336898849Sken * this register to 0 should have the effect of disabling 336998849Sken * tracing. 337098849Sken */ 337198849Sken CSR_WRITE_4(sc, TI_GCR_NIC_TRACING, trace_type); 337298849Sken 337398849Sken error = 0; 337498849Sken 337598849Sken break; 337698849Sken } 337798849Sken case TIIOCGETTRACE: { 337898849Sken struct ti_trace_buf *trace_buf; 337998849Sken u_int32_t trace_start, cur_trace_ptr, trace_len; 338098849Sken 338198849Sken trace_buf = (struct ti_trace_buf *)addr; 338298849Sken 338398849Sken trace_start = CSR_READ_4(sc, TI_GCR_NICTRACE_START); 338498849Sken cur_trace_ptr = CSR_READ_4(sc, TI_GCR_NICTRACE_PTR); 338598849Sken trace_len = CSR_READ_4(sc, TI_GCR_NICTRACE_LEN); 338698849Sken 338798849Sken#if 0 338898849Sken printf("ti%d: trace_start = %#x, cur_trace_ptr = %#x, " 338998849Sken "trace_len = %d\n", sc->ti_unit, trace_start, 339098849Sken cur_trace_ptr, trace_len); 339198849Sken printf("ti%d: trace_buf->buf_len = %d\n", sc->ti_unit, 339298849Sken trace_buf->buf_len); 339398849Sken#endif 339498849Sken 339598849Sken error = ti_copy_mem(sc, trace_start, min(trace_len, 339698849Sken trace_buf->buf_len), 339798849Sken (caddr_t)trace_buf->buf, 1, 1); 339898849Sken 339998849Sken if (error == 0) { 340098849Sken trace_buf->fill_len = min(trace_len, 340198849Sken trace_buf->buf_len); 340298849Sken if (cur_trace_ptr < trace_start) 340398849Sken trace_buf->cur_trace_ptr = 340498849Sken trace_start - cur_trace_ptr; 340598849Sken else 340698849Sken trace_buf->cur_trace_ptr = 340798849Sken cur_trace_ptr - trace_start; 340898849Sken } else 340998849Sken trace_buf->fill_len = 0; 341098849Sken 341198849Sken 341298849Sken break; 341398849Sken } 341498849Sken 341598849Sken /* 341698849Sken * For debugging, five ioctls are needed: 341798849Sken * ALT_ATTACH 341898849Sken * ALT_READ_TG_REG 341998849Sken * ALT_WRITE_TG_REG 342098849Sken * ALT_READ_TG_MEM 342198849Sken * ALT_WRITE_TG_MEM 342298849Sken */ 342398849Sken case ALT_ATTACH: 342498849Sken /* 342598849Sken * From what I can tell, Alteon's Solaris Tigon driver 342698849Sken * only has one character device, so you have to attach 342798849Sken * to the Tigon board you're interested in. This seems 342898849Sken * like a not-so-good way to do things, since unless you 342998849Sken * subsequently specify the unit number of the device 343098849Sken * you're interested in in every ioctl, you'll only be 343198849Sken * able to debug one board at a time. 343298849Sken */ 343398849Sken error = 0; 343498849Sken break; 343598849Sken case ALT_READ_TG_MEM: 343698849Sken case ALT_WRITE_TG_MEM: 343798849Sken { 343898849Sken struct tg_mem *mem_param; 343998849Sken u_int32_t sram_end, scratch_end; 344098849Sken 344198849Sken mem_param = (struct tg_mem *)addr; 344298849Sken 344398849Sken if (sc->ti_hwrev == TI_HWREV_TIGON) { 344498849Sken sram_end = TI_END_SRAM_I; 344598849Sken scratch_end = TI_END_SCRATCH_I; 344698849Sken } else { 344798849Sken sram_end = TI_END_SRAM_II; 344898849Sken scratch_end = TI_END_SCRATCH_II; 344998849Sken } 345098849Sken 345198849Sken /* 345298849Sken * For now, we'll only handle accessing regular SRAM, 345398849Sken * nothing else. 345498849Sken */ 345598849Sken if ((mem_param->tgAddr >= TI_BEG_SRAM) 345698849Sken && ((mem_param->tgAddr + mem_param->len) <= sram_end)) { 345798849Sken /* 345898849Sken * In this instance, we always copy to/from user 345998849Sken * space, so the user space argument is set to 1. 346098849Sken */ 346198849Sken error = ti_copy_mem(sc, mem_param->tgAddr, 346298849Sken mem_param->len, 346398849Sken mem_param->userAddr, 1, 346498849Sken (cmd == ALT_READ_TG_MEM) ? 1 : 0); 346598849Sken } else if ((mem_param->tgAddr >= TI_BEG_SCRATCH) 346698849Sken && (mem_param->tgAddr <= scratch_end)) { 346798849Sken error = ti_copy_scratch(sc, mem_param->tgAddr, 346898849Sken mem_param->len, 346998849Sken mem_param->userAddr, 1, 347098849Sken (cmd == ALT_READ_TG_MEM) ? 347198849Sken 1 : 0, TI_PROCESSOR_A); 347298849Sken } else if ((mem_param->tgAddr >= TI_BEG_SCRATCH_B_DEBUG) 347398849Sken && (mem_param->tgAddr <= TI_BEG_SCRATCH_B_DEBUG)) { 347498849Sken if (sc->ti_hwrev == TI_HWREV_TIGON) { 347598849Sken printf("ti%d: invalid memory range for " 347698849Sken "Tigon I\n", sc->ti_unit); 347798849Sken error = EINVAL; 347898849Sken break; 347998849Sken } 348098849Sken error = ti_copy_scratch(sc, mem_param->tgAddr - 348198849Sken TI_SCRATCH_DEBUG_OFF, 348298849Sken mem_param->len, 348398849Sken mem_param->userAddr, 1, 348498849Sken (cmd == ALT_READ_TG_MEM) ? 348598849Sken 1 : 0, TI_PROCESSOR_B); 348698849Sken } else { 348798849Sken printf("ti%d: memory address %#x len %d is out of " 348898849Sken "supported range\n", sc->ti_unit, 348998849Sken mem_param->tgAddr, mem_param->len); 349098849Sken error = EINVAL; 349198849Sken } 349298849Sken 349398849Sken break; 349498849Sken } 349598849Sken case ALT_READ_TG_REG: 349698849Sken case ALT_WRITE_TG_REG: 349798849Sken { 349898849Sken struct tg_reg *regs; 349998849Sken u_int32_t tmpval; 350098849Sken 350198849Sken regs = (struct tg_reg *)addr; 350298849Sken 350398849Sken /* 350498849Sken * Make sure the address in question isn't out of range. 350598849Sken */ 350698849Sken if (regs->addr > TI_REG_MAX) { 350798849Sken error = EINVAL; 350898849Sken break; 350998849Sken } 351098849Sken if (cmd == ALT_READ_TG_REG) { 351198849Sken bus_space_read_region_4(sc->ti_btag, sc->ti_bhandle, 351298849Sken regs->addr, &tmpval, 1); 351398849Sken regs->data = ntohl(tmpval); 351498849Sken#if 0 351598849Sken if ((regs->addr == TI_CPU_STATE) 351698849Sken || (regs->addr == TI_CPU_CTL_B)) { 351798849Sken printf("ti%d: register %#x = %#x\n", 351898849Sken sc->ti_unit, regs->addr, tmpval); 351998849Sken } 352098849Sken#endif 352198849Sken } else { 352298849Sken tmpval = htonl(regs->data); 352398849Sken bus_space_write_region_4(sc->ti_btag, sc->ti_bhandle, 352498849Sken regs->addr, &tmpval, 1); 352598849Sken } 352698849Sken 352798849Sken break; 352898849Sken } 352998849Sken default: 353098849Sken error = ENOTTY; 353198849Sken break; 353298849Sken } 353398849Sken return(error); 353498849Sken} 353598849Sken 353645386Swpaulstatic void ti_watchdog(ifp) 353745386Swpaul struct ifnet *ifp; 353845386Swpaul{ 353945386Swpaul struct ti_softc *sc; 354045386Swpaul 354145386Swpaul sc = ifp->if_softc; 354267087Swpaul TI_LOCK(sc); 354345386Swpaul 354498849Sken /* 354598849Sken * When we're debugging, the chip is often stopped for long periods 354698849Sken * of time, and that would normally cause the watchdog timer to fire. 354798849Sken * Since that impedes debugging, we don't want to do that. 354898849Sken */ 354998849Sken if (sc->ti_flags & TI_FLAG_DEBUGING) { 355098849Sken TI_UNLOCK(sc); 355198849Sken return; 355298849Sken } 355398849Sken 355445386Swpaul printf("ti%d: watchdog timeout -- resetting\n", sc->ti_unit); 355545386Swpaul ti_stop(sc); 355645386Swpaul ti_init(sc); 355745386Swpaul 355845386Swpaul ifp->if_oerrors++; 355967087Swpaul TI_UNLOCK(sc); 356045386Swpaul 356145386Swpaul return; 356245386Swpaul} 356345386Swpaul 356445386Swpaul/* 356545386Swpaul * Stop the adapter and free any mbufs allocated to the 356645386Swpaul * RX and TX lists. 356745386Swpaul */ 356845386Swpaulstatic void ti_stop(sc) 356945386Swpaul struct ti_softc *sc; 357045386Swpaul{ 357145386Swpaul struct ifnet *ifp; 357245386Swpaul struct ti_cmd_desc cmd; 357345386Swpaul 357467087Swpaul TI_LOCK(sc); 357567087Swpaul 357645386Swpaul ifp = &sc->arpcom.ac_if; 357745386Swpaul 357845386Swpaul /* Disable host interrupts. */ 357945386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1); 358045386Swpaul /* 358145386Swpaul * Tell firmware we're shutting down. 358245386Swpaul */ 358345386Swpaul TI_DO_CMD(TI_CMD_HOST_STATE, TI_CMD_CODE_STACK_DOWN, 0); 358445386Swpaul 358545386Swpaul /* Halt and reinitialize. */ 358645386Swpaul ti_chipinit(sc); 358745386Swpaul ti_mem(sc, 0x2000, 0x100000 - 0x2000, NULL); 358845386Swpaul ti_chipinit(sc); 358945386Swpaul 359045386Swpaul /* Free the RX lists. */ 359145386Swpaul ti_free_rx_ring_std(sc); 359245386Swpaul 359345386Swpaul /* Free jumbo RX list. */ 359445386Swpaul ti_free_rx_ring_jumbo(sc); 359545386Swpaul 359645386Swpaul /* Free mini RX list. */ 359745386Swpaul ti_free_rx_ring_mini(sc); 359845386Swpaul 359945386Swpaul /* Free TX buffers. */ 360045386Swpaul ti_free_tx_ring(sc); 360145386Swpaul 360245386Swpaul sc->ti_ev_prodidx.ti_idx = 0; 360345386Swpaul sc->ti_return_prodidx.ti_idx = 0; 360445386Swpaul sc->ti_tx_considx.ti_idx = 0; 360545386Swpaul sc->ti_tx_saved_considx = TI_TXCONS_UNSET; 360645386Swpaul 360745386Swpaul ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 360867087Swpaul TI_UNLOCK(sc); 360945386Swpaul 361045386Swpaul return; 361145386Swpaul} 361245386Swpaul 361345386Swpaul/* 361445386Swpaul * Stop all chip I/O so that the kernel's probe routines don't 361545386Swpaul * get confused by errant DMAs when rebooting. 361645386Swpaul */ 361749011Swpaulstatic void ti_shutdown(dev) 361849011Swpaul device_t dev; 361945386Swpaul{ 362045386Swpaul struct ti_softc *sc; 362145386Swpaul 362249011Swpaul sc = device_get_softc(dev); 362367087Swpaul TI_LOCK(sc); 362445386Swpaul ti_chipinit(sc); 362567087Swpaul TI_UNLOCK(sc); 362645386Swpaul 362745386Swpaul return; 362845386Swpaul} 3629