if_ti.c revision 127135
145386Swpaul/* 245386Swpaul * Copyright (c) 1997, 1998, 1999 345386Swpaul * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 445386Swpaul * 545386Swpaul * Redistribution and use in source and binary forms, with or without 645386Swpaul * modification, are permitted provided that the following conditions 745386Swpaul * are met: 845386Swpaul * 1. Redistributions of source code must retain the above copyright 945386Swpaul * notice, this list of conditions and the following disclaimer. 1045386Swpaul * 2. Redistributions in binary form must reproduce the above copyright 1145386Swpaul * notice, this list of conditions and the following disclaimer in the 1245386Swpaul * documentation and/or other materials provided with the distribution. 1345386Swpaul * 3. All advertising materials mentioning features or use of this software 1445386Swpaul * must display the following acknowledgement: 1545386Swpaul * This product includes software developed by Bill Paul. 1645386Swpaul * 4. Neither the name of the author nor the names of any co-contributors 1745386Swpaul * may be used to endorse or promote products derived from this software 1845386Swpaul * without specific prior written permission. 1945386Swpaul * 2045386Swpaul * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 2145386Swpaul * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2245386Swpaul * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2345386Swpaul * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 2445386Swpaul * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2545386Swpaul * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2645386Swpaul * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2745386Swpaul * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 2845386Swpaul * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 2945386Swpaul * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 3045386Swpaul * THE POSSIBILITY OF SUCH DAMAGE. 3145386Swpaul */ 3245386Swpaul 3345386Swpaul/* 3445386Swpaul * Alteon Networks Tigon PCI gigabit ethernet driver for FreeBSD. 3545386Swpaul * Manuals, sample driver and firmware source kits are available 3645386Swpaul * from http://www.alteon.com/support/openkits. 3745386Swpaul * 3845386Swpaul * Written by Bill Paul <wpaul@ctr.columbia.edu> 3945386Swpaul * Electrical Engineering Department 4045386Swpaul * Columbia University, New York City 4145386Swpaul */ 4245386Swpaul 4345386Swpaul/* 4445386Swpaul * The Alteon Networks Tigon chip contains an embedded R4000 CPU, 4545386Swpaul * gigabit MAC, dual DMA channels and a PCI interface unit. NICs 4645386Swpaul * using the Tigon may have anywhere from 512K to 2MB of SRAM. The 4745386Swpaul * Tigon supports hardware IP, TCP and UCP checksumming, multicast 4845386Swpaul * filtering and jumbo (9014 byte) frames. The hardware is largely 4945386Swpaul * controlled by firmware, which must be loaded into the NIC during 5045386Swpaul * initialization. 5145386Swpaul * 5245386Swpaul * The Tigon 2 contains 2 R4000 CPUs and requires a newer firmware 5345386Swpaul * revision, which supports new features such as extended commands, 5445386Swpaul * extended jumbo receive ring desciptors and a mini receive ring. 5545386Swpaul * 5645386Swpaul * Alteon Networks is to be commended for releasing such a vast amount 5745386Swpaul * of development material for the Tigon NIC without requiring an NDA 5845386Swpaul * (although they really should have done it a long time ago). With 5945386Swpaul * any luck, the other vendors will finally wise up and follow Alteon's 6045386Swpaul * stellar example. 6145386Swpaul * 6245386Swpaul * The firmware for the Tigon 1 and 2 NICs is compiled directly into 6345386Swpaul * this driver by #including it as a C header file. This bloats the 6445386Swpaul * driver somewhat, but it's the easiest method considering that the 6545386Swpaul * driver code and firmware code need to be kept in sync. The source 6645386Swpaul * for the firmware is not provided with the FreeBSD distribution since 6745386Swpaul * compiling it requires a GNU toolchain targeted for mips-sgi-irix5.3. 6845386Swpaul * 6945386Swpaul * The following people deserve special thanks: 7045386Swpaul * - Terry Murphy of 3Com, for providing a 3c985 Tigon 1 board 7145386Swpaul * for testing 7245386Swpaul * - Raymond Lee of Netgear, for providing a pair of Netgear 7345386Swpaul * GA620 Tigon 2 boards for testing 7445386Swpaul * - Ulf Zimmermann, for bringing the GA260 to my attention and 7545386Swpaul * convincing me to write this driver. 7645386Swpaul * - Andrew Gallatin for providing FreeBSD/Alpha support. 7745386Swpaul */ 7845386Swpaul 79113038Sobrien#include <sys/cdefs.h> 80113038Sobrien__FBSDID("$FreeBSD: head/sys/dev/ti/if_ti.c 127135 2004-03-17 17:50:55Z njl $"); 81113038Sobrien 8298849Sken#include "opt_ti.h" 8398849Sken 8445386Swpaul#include <sys/param.h> 8545386Swpaul#include <sys/systm.h> 8645386Swpaul#include <sys/sockio.h> 8745386Swpaul#include <sys/mbuf.h> 8845386Swpaul#include <sys/malloc.h> 8945386Swpaul#include <sys/kernel.h> 9045386Swpaul#include <sys/socket.h> 9145386Swpaul#include <sys/queue.h> 9298849Sken#include <sys/conf.h> 9345386Swpaul 9445386Swpaul#include <net/if.h> 9545386Swpaul#include <net/if_arp.h> 9645386Swpaul#include <net/ethernet.h> 9745386Swpaul#include <net/if_dl.h> 9845386Swpaul#include <net/if_media.h> 9983115Sbrooks#include <net/if_types.h> 10083115Sbrooks#include <net/if_vlan_var.h> 10145386Swpaul 10245386Swpaul#include <net/bpf.h> 10345386Swpaul 10445386Swpaul#include <netinet/in_systm.h> 10545386Swpaul#include <netinet/in.h> 10645386Swpaul#include <netinet/ip.h> 10745386Swpaul 10845386Swpaul#include <vm/vm.h> /* for vtophys */ 10945386Swpaul#include <vm/pmap.h> /* for vtophys */ 11045386Swpaul#include <machine/bus_memio.h> 11145386Swpaul#include <machine/bus.h> 11249011Swpaul#include <machine/resource.h> 11349011Swpaul#include <sys/bus.h> 11449011Swpaul#include <sys/rman.h> 11545386Swpaul 11698849Sken/* #define TI_PRIVATE_JUMBOS */ 11798849Sken 11898849Sken#if !defined(TI_PRIVATE_JUMBOS) 11998849Sken#include <sys/sockio.h> 12098849Sken#include <sys/uio.h> 12198849Sken#include <sys/lock.h> 12298849Sken#include <vm/vm_extern.h> 12398849Sken#include <vm/pmap.h> 12498849Sken#include <vm/vm_map.h> 12598849Sken#include <vm/vm_map.h> 12698849Sken#include <vm/vm_param.h> 12798849Sken#include <vm/vm_pageout.h> 12898849Sken#include <sys/vmmeter.h> 12998849Sken#include <vm/vm_page.h> 13098849Sken#include <vm/vm_object.h> 13198849Sken#include <vm/vm_kern.h> 13298849Sken#include <sys/proc.h> 13398849Sken#include <sys/jumbo.h> 13498849Sken#endif /* !TI_PRIVATE_JUMBOS */ 13598849Sken 136119288Simp#include <dev/pci/pcireg.h> 137119288Simp#include <dev/pci/pcivar.h> 13845386Swpaul 13998849Sken#include <sys/tiio.h> 14045386Swpaul#include <pci/if_tireg.h> 14145386Swpaul#include <pci/ti_fw.h> 14245386Swpaul#include <pci/ti_fw2.h> 14345386Swpaul 14458698Sjlemon#define TI_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP | CSUM_IP_FRAGS) 14598849Sken/* 14698849Sken * We can only turn on header splitting if we're using extended receive 14798849Sken * BDs. 14898849Sken */ 14998849Sken#if defined(TI_JUMBO_HDRSPLIT) && defined(TI_PRIVATE_JUMBOS) 15098849Sken#error "options TI_JUMBO_HDRSPLIT and TI_PRIVATE_JUMBOS are mutually exclusive" 15198849Sken#endif /* TI_JUMBO_HDRSPLIT && TI_JUMBO_HDRSPLIT */ 15245386Swpaul 15398849Skenstruct ti_softc *tis[8]; 15498849Sken 15598849Skentypedef enum { 15698849Sken TI_SWAP_HTON, 15798849Sken TI_SWAP_NTOH 15898849Sken} ti_swap_type; 15998849Sken 16098849Sken 16145386Swpaul/* 16245386Swpaul * Various supported device vendors/types and their names. 16345386Swpaul */ 16445386Swpaul 16545386Swpaulstatic struct ti_type ti_devs[] = { 16645386Swpaul { ALT_VENDORID, ALT_DEVICEID_ACENIC, 16763702Swpaul "Alteon AceNIC 1000baseSX Gigabit Ethernet" }, 16863699Swpaul { ALT_VENDORID, ALT_DEVICEID_ACENIC_COPPER, 16963702Swpaul "Alteon AceNIC 1000baseT Gigabit Ethernet" }, 17045386Swpaul { TC_VENDORID, TC_DEVICEID_3C985, 17145386Swpaul "3Com 3c985-SX Gigabit Ethernet" }, 17245386Swpaul { NG_VENDORID, NG_DEVICEID_GA620, 17364139Swpaul "Netgear GA620 1000baseSX Gigabit Ethernet" }, 17464139Swpaul { NG_VENDORID, NG_DEVICEID_GA620T, 17564139Swpaul "Netgear GA620 1000baseT Gigabit Ethernet" }, 17645386Swpaul { SGI_VENDORID, SGI_DEVICEID_TIGON, 17745386Swpaul "Silicon Graphics Gigabit Ethernet" }, 17856206Swpaul { DEC_VENDORID, DEC_DEVICEID_FARALLON_PN9000SX, 17956206Swpaul "Farallon PN9000SX Gigabit Ethernet" }, 18045386Swpaul { 0, 0, NULL } 18145386Swpaul}; 18245386Swpaul 18398849Sken 18498849Skenstatic d_open_t ti_open; 18598849Skenstatic d_close_t ti_close; 18698849Skenstatic d_ioctl_t ti_ioctl2; 18798849Sken 18898849Skenstatic struct cdevsw ti_cdevsw = { 189126080Sphk .d_version = D_VERSION, 190126080Sphk .d_flags = D_NEEDGIANT, 191111815Sphk .d_open = ti_open, 192111815Sphk .d_close = ti_close, 193111815Sphk .d_ioctl = ti_ioctl2, 194111815Sphk .d_name = "ti", 19598849Sken}; 19698849Sken 19792739Salfredstatic int ti_probe (device_t); 19892739Salfredstatic int ti_attach (device_t); 19992739Salfredstatic int ti_detach (device_t); 20092739Salfredstatic void ti_txeof (struct ti_softc *); 20192739Salfredstatic void ti_rxeof (struct ti_softc *); 20245386Swpaul 20392739Salfredstatic void ti_stats_update (struct ti_softc *); 20492739Salfredstatic int ti_encap (struct ti_softc *, struct mbuf *, u_int32_t *); 20545386Swpaul 20692739Salfredstatic void ti_intr (void *); 20792739Salfredstatic void ti_start (struct ifnet *); 20892739Salfredstatic int ti_ioctl (struct ifnet *, u_long, caddr_t); 20992739Salfredstatic void ti_init (void *); 21092739Salfredstatic void ti_init2 (struct ti_softc *); 21192739Salfredstatic void ti_stop (struct ti_softc *); 21292739Salfredstatic void ti_watchdog (struct ifnet *); 21392739Salfredstatic void ti_shutdown (device_t); 21492739Salfredstatic int ti_ifmedia_upd (struct ifnet *); 21592739Salfredstatic void ti_ifmedia_sts (struct ifnet *, struct ifmediareq *); 21645386Swpaul 21792739Salfredstatic u_int32_t ti_eeprom_putbyte (struct ti_softc *, int); 21892739Salfredstatic u_int8_t ti_eeprom_getbyte (struct ti_softc *, int, u_int8_t *); 21992739Salfredstatic int ti_read_eeprom (struct ti_softc *, caddr_t, int, int); 22045386Swpaul 22192739Salfredstatic void ti_add_mcast (struct ti_softc *, struct ether_addr *); 22292739Salfredstatic void ti_del_mcast (struct ti_softc *, struct ether_addr *); 22392739Salfredstatic void ti_setmulti (struct ti_softc *); 22445386Swpaul 22592739Salfredstatic void ti_mem (struct ti_softc *, u_int32_t, 22692739Salfred u_int32_t, caddr_t); 22798849Skenstatic int ti_copy_mem (struct ti_softc *, u_int32_t, 22898849Sken u_int32_t, caddr_t, int, int); 22998849Skenstatic int ti_copy_scratch (struct ti_softc *, u_int32_t, 23098849Sken u_int32_t, caddr_t, int, int, int); 23198849Skenstatic int ti_bcopy_swap (const void *, void *, size_t, 23298849Sken ti_swap_type); 23392739Salfredstatic void ti_loadfw (struct ti_softc *); 23492739Salfredstatic void ti_cmd (struct ti_softc *, struct ti_cmd_desc *); 23592739Salfredstatic void ti_cmd_ext (struct ti_softc *, struct ti_cmd_desc *, 23692739Salfred caddr_t, int); 23792739Salfredstatic void ti_handle_events (struct ti_softc *); 23898849Sken#ifdef TI_PRIVATE_JUMBOS 23992739Salfredstatic int ti_alloc_jumbo_mem (struct ti_softc *); 24092739Salfredstatic void *ti_jalloc (struct ti_softc *); 24199058Salfredstatic void ti_jfree (void *, void *); 24298849Sken#endif /* TI_PRIVATE_JUMBOS */ 24392739Salfredstatic int ti_newbuf_std (struct ti_softc *, int, struct mbuf *); 24492739Salfredstatic int ti_newbuf_mini (struct ti_softc *, int, struct mbuf *); 24592739Salfredstatic int ti_newbuf_jumbo (struct ti_softc *, int, struct mbuf *); 24692739Salfredstatic int ti_init_rx_ring_std (struct ti_softc *); 24792739Salfredstatic void ti_free_rx_ring_std (struct ti_softc *); 24892739Salfredstatic int ti_init_rx_ring_jumbo (struct ti_softc *); 24992739Salfredstatic void ti_free_rx_ring_jumbo (struct ti_softc *); 25092739Salfredstatic int ti_init_rx_ring_mini (struct ti_softc *); 25192739Salfredstatic void ti_free_rx_ring_mini (struct ti_softc *); 25292739Salfredstatic void ti_free_tx_ring (struct ti_softc *); 25392739Salfredstatic int ti_init_tx_ring (struct ti_softc *); 25445386Swpaul 25592739Salfredstatic int ti_64bitslot_war (struct ti_softc *); 25692739Salfredstatic int ti_chipinit (struct ti_softc *); 25792739Salfredstatic int ti_gibinit (struct ti_softc *); 25845386Swpaul 25998849Sken#ifdef TI_JUMBO_HDRSPLIT 26099013Speterstatic __inline void ti_hdr_split (struct mbuf *top, int hdr_len, 26199013Speter int pkt_len, int idx); 26298849Sken#endif /* TI_JUMBO_HDRSPLIT */ 26398849Sken 26449011Swpaulstatic device_method_t ti_methods[] = { 26549011Swpaul /* Device interface */ 26649011Swpaul DEVMETHOD(device_probe, ti_probe), 26749011Swpaul DEVMETHOD(device_attach, ti_attach), 26849011Swpaul DEVMETHOD(device_detach, ti_detach), 26949011Swpaul DEVMETHOD(device_shutdown, ti_shutdown), 27049011Swpaul { 0, 0 } 27149011Swpaul}; 27249011Swpaul 27349011Swpaulstatic driver_t ti_driver = { 27451455Swpaul "ti", 27549011Swpaul ti_methods, 27649011Swpaul sizeof(struct ti_softc) 27749011Swpaul}; 27849011Swpaul 27949011Swpaulstatic devclass_t ti_devclass; 28049011Swpaul 281113506SmdoddDRIVER_MODULE(ti, pci, ti_driver, ti_devclass, 0, 0); 282113506SmdoddMODULE_DEPEND(ti, pci, 1, 1, 1); 283113506SmdoddMODULE_DEPEND(ti, ether, 1, 1, 1); 28449011Swpaul 28545386Swpaul/* 28645386Swpaul * Send an instruction or address to the EEPROM, check for ACK. 28745386Swpaul */ 28845386Swpaulstatic u_int32_t ti_eeprom_putbyte(sc, byte) 28945386Swpaul struct ti_softc *sc; 29045386Swpaul int byte; 29145386Swpaul{ 29245386Swpaul register int i, ack = 0; 29345386Swpaul 29445386Swpaul /* 29545386Swpaul * Make sure we're in TX mode. 29645386Swpaul */ 29745386Swpaul TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); 29845386Swpaul 29945386Swpaul /* 30045386Swpaul * Feed in each bit and stobe the clock. 30145386Swpaul */ 30245386Swpaul for (i = 0x80; i; i >>= 1) { 30345386Swpaul if (byte & i) { 30445386Swpaul TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); 30545386Swpaul } else { 30645386Swpaul TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); 30745386Swpaul } 30845386Swpaul DELAY(1); 30945386Swpaul TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); 31045386Swpaul DELAY(1); 31145386Swpaul TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); 31245386Swpaul } 31345386Swpaul 31445386Swpaul /* 31545386Swpaul * Turn off TX mode. 31645386Swpaul */ 31745386Swpaul TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); 31845386Swpaul 31945386Swpaul /* 32045386Swpaul * Check for ack. 32145386Swpaul */ 32245386Swpaul TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); 32345386Swpaul ack = CSR_READ_4(sc, TI_MISC_LOCAL_CTL) & TI_MLC_EE_DIN; 32445386Swpaul TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); 32545386Swpaul 32645386Swpaul return(ack); 32745386Swpaul} 32845386Swpaul 32945386Swpaul/* 33045386Swpaul * Read a byte of data stored in the EEPROM at address 'addr.' 33145386Swpaul * We have to send two address bytes since the EEPROM can hold 33245386Swpaul * more than 256 bytes of data. 33345386Swpaul */ 33445386Swpaulstatic u_int8_t ti_eeprom_getbyte(sc, addr, dest) 33545386Swpaul struct ti_softc *sc; 33645386Swpaul int addr; 33745386Swpaul u_int8_t *dest; 33845386Swpaul{ 33945386Swpaul register int i; 34045386Swpaul u_int8_t byte = 0; 34145386Swpaul 34245386Swpaul EEPROM_START; 34345386Swpaul 34445386Swpaul /* 34545386Swpaul * Send write control code to EEPROM. 34645386Swpaul */ 34745386Swpaul if (ti_eeprom_putbyte(sc, EEPROM_CTL_WRITE)) { 34845386Swpaul printf("ti%d: failed to send write command, status: %x\n", 34945386Swpaul sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL)); 35045386Swpaul return(1); 35145386Swpaul } 35245386Swpaul 35345386Swpaul /* 35445386Swpaul * Send first byte of address of byte we want to read. 35545386Swpaul */ 35645386Swpaul if (ti_eeprom_putbyte(sc, (addr >> 8) & 0xFF)) { 35745386Swpaul printf("ti%d: failed to send address, status: %x\n", 35845386Swpaul sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL)); 35945386Swpaul return(1); 36045386Swpaul } 36145386Swpaul /* 36245386Swpaul * Send second byte address of byte we want to read. 36345386Swpaul */ 36445386Swpaul if (ti_eeprom_putbyte(sc, addr & 0xFF)) { 36545386Swpaul printf("ti%d: failed to send address, status: %x\n", 36645386Swpaul sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL)); 36745386Swpaul return(1); 36845386Swpaul } 36945386Swpaul 37045386Swpaul EEPROM_STOP; 37145386Swpaul EEPROM_START; 37245386Swpaul /* 37345386Swpaul * Send read control code to EEPROM. 37445386Swpaul */ 37545386Swpaul if (ti_eeprom_putbyte(sc, EEPROM_CTL_READ)) { 37645386Swpaul printf("ti%d: failed to send read command, status: %x\n", 37745386Swpaul sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL)); 37845386Swpaul return(1); 37945386Swpaul } 38045386Swpaul 38145386Swpaul /* 38245386Swpaul * Start reading bits from EEPROM. 38345386Swpaul */ 38445386Swpaul TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); 38545386Swpaul for (i = 0x80; i; i >>= 1) { 38645386Swpaul TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); 38745386Swpaul DELAY(1); 38845386Swpaul if (CSR_READ_4(sc, TI_MISC_LOCAL_CTL) & TI_MLC_EE_DIN) 38945386Swpaul byte |= i; 39045386Swpaul TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); 39145386Swpaul DELAY(1); 39245386Swpaul } 39345386Swpaul 39445386Swpaul EEPROM_STOP; 39545386Swpaul 39645386Swpaul /* 39745386Swpaul * No ACK generated for read, so just return byte. 39845386Swpaul */ 39945386Swpaul 40045386Swpaul *dest = byte; 40145386Swpaul 40245386Swpaul return(0); 40345386Swpaul} 40445386Swpaul 40545386Swpaul/* 40645386Swpaul * Read a sequence of bytes from the EEPROM. 40745386Swpaul */ 408102336Salfredstatic int 409102336Salfredti_read_eeprom(sc, dest, off, cnt) 41045386Swpaul struct ti_softc *sc; 41145386Swpaul caddr_t dest; 41245386Swpaul int off; 41345386Swpaul int cnt; 41445386Swpaul{ 41545386Swpaul int err = 0, i; 41645386Swpaul u_int8_t byte = 0; 41745386Swpaul 41845386Swpaul for (i = 0; i < cnt; i++) { 41945386Swpaul err = ti_eeprom_getbyte(sc, off + i, &byte); 42045386Swpaul if (err) 42145386Swpaul break; 42245386Swpaul *(dest + i) = byte; 42345386Swpaul } 42445386Swpaul 42545386Swpaul return(err ? 1 : 0); 42645386Swpaul} 42745386Swpaul 42845386Swpaul/* 42945386Swpaul * NIC memory access function. Can be used to either clear a section 43045386Swpaul * of NIC local memory or (if buf is non-NULL) copy data into it. 43145386Swpaul */ 432102336Salfredstatic void 433102336Salfredti_mem(sc, addr, len, buf) 43445386Swpaul struct ti_softc *sc; 43545386Swpaul u_int32_t addr, len; 43645386Swpaul caddr_t buf; 43745386Swpaul{ 43845386Swpaul int segptr, segsize, cnt; 43945386Swpaul caddr_t ti_winbase, ptr; 44045386Swpaul 44145386Swpaul segptr = addr; 44245386Swpaul cnt = len; 44349133Swpaul ti_winbase = (caddr_t)(sc->ti_vhandle + TI_WINDOW); 44445386Swpaul ptr = buf; 44545386Swpaul 44645386Swpaul while(cnt) { 44745386Swpaul if (cnt < TI_WINLEN) 44845386Swpaul segsize = cnt; 44945386Swpaul else 45045386Swpaul segsize = TI_WINLEN - (segptr % TI_WINLEN); 45145386Swpaul CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1))); 45245386Swpaul if (buf == NULL) 45345386Swpaul bzero((char *)ti_winbase + (segptr & 45445386Swpaul (TI_WINLEN - 1)), segsize); 45545386Swpaul else { 45645386Swpaul bcopy((char *)ptr, (char *)ti_winbase + 45745386Swpaul (segptr & (TI_WINLEN - 1)), segsize); 45845386Swpaul ptr += segsize; 45945386Swpaul } 46045386Swpaul segptr += segsize; 46145386Swpaul cnt -= segsize; 46245386Swpaul } 46345386Swpaul 46445386Swpaul return; 46545386Swpaul} 46645386Swpaul 46798849Skenstatic int 46898849Skenti_copy_mem(sc, tigon_addr, len, buf, useraddr, readdata) 46998849Sken struct ti_softc *sc; 47098849Sken u_int32_t tigon_addr, len; 47198849Sken caddr_t buf; 47298849Sken int useraddr, readdata; 47398849Sken{ 47498849Sken int segptr, segsize, cnt; 47598849Sken caddr_t ptr; 47698849Sken u_int32_t origwin; 47798849Sken u_int8_t tmparray[TI_WINLEN], tmparray2[TI_WINLEN]; 47898849Sken int resid, segresid; 47998849Sken int first_pass; 48098849Sken 48198849Sken /* 48298849Sken * At the moment, we don't handle non-aligned cases, we just bail. 48398849Sken * If this proves to be a problem, it will be fixed. 48498849Sken */ 48598849Sken if ((readdata == 0) 48698849Sken && (tigon_addr & 0x3)) { 48798849Sken printf("ti%d: ti_copy_mem: tigon address %#x isn't " 48898849Sken "word-aligned\n", sc->ti_unit, tigon_addr); 48998849Sken printf("ti%d: ti_copy_mem: unaligned writes aren't yet " 49098849Sken "supported\n", sc->ti_unit); 49198849Sken return(EINVAL); 49298849Sken } 49398849Sken 49498849Sken segptr = tigon_addr & ~0x3; 49598849Sken segresid = tigon_addr - segptr; 49698849Sken 49798849Sken /* 49898849Sken * This is the non-aligned amount left over that we'll need to 49998849Sken * copy. 50098849Sken */ 50198849Sken resid = len & 0x3; 50298849Sken 50398849Sken /* Add in the left over amount at the front of the buffer */ 50498849Sken resid += segresid; 50598849Sken 50698849Sken cnt = len & ~0x3; 50798849Sken /* 50898849Sken * If resid + segresid is >= 4, add multiples of 4 to the count and 50998849Sken * decrease the residual by that much. 51098849Sken */ 51198849Sken cnt += resid & ~0x3; 51298849Sken resid -= resid & ~0x3; 51398849Sken 51498849Sken ptr = buf; 51598849Sken 51698849Sken first_pass = 1; 51798849Sken 51898849Sken /* 51998849Sken * Make sure we aren't interrupted while we're changing the window 52098849Sken * pointer. 52198849Sken */ 52298849Sken TI_LOCK(sc); 52398849Sken 52498849Sken /* 52598849Sken * Save the old window base value. 52698849Sken */ 52798849Sken origwin = CSR_READ_4(sc, TI_WINBASE); 52898849Sken 52998849Sken while(cnt) { 53098849Sken bus_size_t ti_offset; 53198849Sken 53298849Sken if (cnt < TI_WINLEN) 53398849Sken segsize = cnt; 53498849Sken else 53598849Sken segsize = TI_WINLEN - (segptr % TI_WINLEN); 53698849Sken CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1))); 53798849Sken 53898849Sken ti_offset = TI_WINDOW + (segptr & (TI_WINLEN -1)); 53998849Sken 54098849Sken if (readdata) { 54198849Sken 54298849Sken bus_space_read_region_4(sc->ti_btag, 54398849Sken sc->ti_bhandle, ti_offset, 54498849Sken (u_int32_t *)tmparray, 54598849Sken segsize >> 2); 54698849Sken if (useraddr) { 54798849Sken /* 54898849Sken * Yeah, this is a little on the kludgy 54998849Sken * side, but at least this code is only 55098849Sken * used for debugging. 55198849Sken */ 55298849Sken ti_bcopy_swap(tmparray, tmparray2, segsize, 55398849Sken TI_SWAP_NTOH); 55498849Sken 55598849Sken if (first_pass) { 55698849Sken copyout(&tmparray2[segresid], ptr, 55798849Sken segsize - segresid); 55898849Sken first_pass = 0; 55998849Sken } else 56098849Sken copyout(tmparray2, ptr, segsize); 56198849Sken } else { 56298849Sken if (first_pass) { 56398849Sken 56498849Sken ti_bcopy_swap(tmparray, tmparray2, 56598849Sken segsize, TI_SWAP_NTOH); 56698849Sken bcopy(&tmparray2[segresid], ptr, 56798849Sken segsize - segresid); 56898849Sken first_pass = 0; 56998849Sken } else 57098849Sken ti_bcopy_swap(tmparray, ptr, segsize, 57198849Sken TI_SWAP_NTOH); 57298849Sken } 57398849Sken 57498849Sken } else { 57598849Sken if (useraddr) { 57698849Sken copyin(ptr, tmparray2, segsize); 57798849Sken ti_bcopy_swap(tmparray2, tmparray, segsize, 57898849Sken TI_SWAP_HTON); 57998849Sken } else 58098849Sken ti_bcopy_swap(ptr, tmparray, segsize, 58198849Sken TI_SWAP_HTON); 58298849Sken 58398849Sken bus_space_write_region_4(sc->ti_btag, 58498849Sken sc->ti_bhandle, ti_offset, 58598849Sken (u_int32_t *)tmparray, 58698849Sken segsize >> 2); 58798849Sken } 58898849Sken segptr += segsize; 58998849Sken ptr += segsize; 59098849Sken cnt -= segsize; 59198849Sken } 59298849Sken 59398849Sken /* 59498849Sken * Handle leftover, non-word-aligned bytes. 59598849Sken */ 59698849Sken if (resid != 0) { 59798849Sken u_int32_t tmpval, tmpval2; 59898849Sken bus_size_t ti_offset; 59998849Sken 60098849Sken /* 60198849Sken * Set the segment pointer. 60298849Sken */ 60398849Sken CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1))); 60498849Sken 60598849Sken ti_offset = TI_WINDOW + (segptr & (TI_WINLEN - 1)); 60698849Sken 60798849Sken /* 60898849Sken * First, grab whatever is in our source/destination. 60998849Sken * We'll obviously need this for reads, but also for 61098849Sken * writes, since we'll be doing read/modify/write. 61198849Sken */ 61298849Sken bus_space_read_region_4(sc->ti_btag, sc->ti_bhandle, 61398849Sken ti_offset, &tmpval, 1); 61498849Sken 61598849Sken /* 61698849Sken * Next, translate this from little-endian to big-endian 61798849Sken * (at least on i386 boxes). 61898849Sken */ 61998849Sken tmpval2 = ntohl(tmpval); 62098849Sken 62198849Sken if (readdata) { 62298849Sken /* 62398849Sken * If we're reading, just copy the leftover number 62498849Sken * of bytes from the host byte order buffer to 62598849Sken * the user's buffer. 62698849Sken */ 62798849Sken if (useraddr) 62898849Sken copyout(&tmpval2, ptr, resid); 62998849Sken else 63098849Sken bcopy(&tmpval2, ptr, resid); 63198849Sken } else { 63298849Sken /* 63398849Sken * If we're writing, first copy the bytes to be 63498849Sken * written into the network byte order buffer, 63598849Sken * leaving the rest of the buffer with whatever was 63698849Sken * originally in there. Then, swap the bytes 63798849Sken * around into host order and write them out. 63898849Sken * 63998849Sken * XXX KDM the read side of this has been verified 64098849Sken * to work, but the write side of it has not been 64198849Sken * verified. So user beware. 64298849Sken */ 64398849Sken if (useraddr) 64498849Sken copyin(ptr, &tmpval2, resid); 64598849Sken else 64698849Sken bcopy(ptr, &tmpval2, resid); 64798849Sken 64898849Sken tmpval = htonl(tmpval2); 64998849Sken 65098849Sken bus_space_write_region_4(sc->ti_btag, sc->ti_bhandle, 65198849Sken ti_offset, &tmpval, 1); 65298849Sken } 65398849Sken } 65498849Sken 65598849Sken CSR_WRITE_4(sc, TI_WINBASE, origwin); 65698849Sken 65798849Sken TI_UNLOCK(sc); 65898849Sken 65998849Sken return(0); 66098849Sken} 66198849Sken 66298849Skenstatic int 66398849Skenti_copy_scratch(sc, tigon_addr, len, buf, useraddr, readdata, cpu) 66498849Sken struct ti_softc *sc; 66598849Sken u_int32_t tigon_addr, len; 66698849Sken caddr_t buf; 66798849Sken int useraddr, readdata; 66898849Sken int cpu; 66998849Sken{ 67098849Sken u_int32_t segptr; 67198849Sken int cnt; 67298849Sken u_int32_t tmpval, tmpval2; 67398849Sken caddr_t ptr; 67498849Sken 67598849Sken /* 67698849Sken * At the moment, we don't handle non-aligned cases, we just bail. 67798849Sken * If this proves to be a problem, it will be fixed. 67898849Sken */ 67998849Sken if (tigon_addr & 0x3) { 68098849Sken printf("ti%d: ti_copy_scratch: tigon address %#x isn't " 68198849Sken "word-aligned\n", sc->ti_unit, tigon_addr); 68298849Sken return(EINVAL); 68398849Sken } 68498849Sken 68598849Sken if (len & 0x3) { 68698849Sken printf("ti%d: ti_copy_scratch: transfer length %d isn't " 68798849Sken "word-aligned\n", sc->ti_unit, len); 68898849Sken return(EINVAL); 68998849Sken } 69098849Sken 69198849Sken segptr = tigon_addr; 69298849Sken cnt = len; 69398849Sken ptr = buf; 69498849Sken 69598849Sken TI_LOCK(sc); 69698849Sken 69798849Sken while (cnt) { 69898849Sken CSR_WRITE_4(sc, CPU_REG(TI_SRAM_ADDR, cpu), segptr); 69998849Sken 70098849Sken if (readdata) { 70198849Sken tmpval2 = CSR_READ_4(sc, CPU_REG(TI_SRAM_DATA, cpu)); 70298849Sken 70398849Sken tmpval = ntohl(tmpval2); 70498849Sken 70598849Sken /* 70698849Sken * Note: I've used this debugging interface 70798849Sken * extensively with Alteon's 12.3.15 firmware, 70898849Sken * compiled with GCC 2.7.2.1 and binutils 2.9.1. 70998849Sken * 71098849Sken * When you compile the firmware without 71198849Sken * optimization, which is necessary sometimes in 71298849Sken * order to properly step through it, you sometimes 71398849Sken * read out a bogus value of 0xc0017c instead of 71498849Sken * whatever was supposed to be in that scratchpad 71598849Sken * location. That value is on the stack somewhere, 71698849Sken * but I've never been able to figure out what was 71798849Sken * causing the problem. 71898849Sken * 71998849Sken * The address seems to pop up in random places, 72098849Sken * often not in the same place on two subsequent 72198849Sken * reads. 72298849Sken * 72398849Sken * In any case, the underlying data doesn't seem 72498849Sken * to be affected, just the value read out. 72598849Sken * 72698849Sken * KDM, 3/7/2000 72798849Sken */ 72898849Sken 72998849Sken if (tmpval2 == 0xc0017c) 73098849Sken printf("ti%d: found 0xc0017c at %#x " 73198849Sken "(tmpval2)\n", sc->ti_unit, segptr); 73298849Sken 73398849Sken if (tmpval == 0xc0017c) 73498849Sken printf("ti%d: found 0xc0017c at %#x " 73598849Sken "(tmpval)\n", sc->ti_unit, segptr); 73698849Sken 73798849Sken if (useraddr) 73898849Sken copyout(&tmpval, ptr, 4); 73998849Sken else 74098849Sken bcopy(&tmpval, ptr, 4); 74198849Sken } else { 74298849Sken if (useraddr) 74398849Sken copyin(ptr, &tmpval2, 4); 74498849Sken else 74598849Sken bcopy(ptr, &tmpval2, 4); 74698849Sken 74798849Sken tmpval = htonl(tmpval2); 74898849Sken 74998849Sken CSR_WRITE_4(sc, CPU_REG(TI_SRAM_DATA, cpu), tmpval); 75098849Sken } 75198849Sken 75298849Sken cnt -= 4; 75398849Sken segptr += 4; 75498849Sken ptr += 4; 75598849Sken } 75698849Sken 75798849Sken TI_UNLOCK(sc); 75898849Sken 75998849Sken return(0); 76098849Sken} 76198849Sken 76298849Skenstatic int 76398849Skenti_bcopy_swap(src, dst, len, swap_type) 76498849Sken const void *src; 76598849Sken void *dst; 76698849Sken size_t len; 76798849Sken ti_swap_type swap_type; 76898849Sken{ 76998849Sken const u_int8_t *tmpsrc; 77098849Sken u_int8_t *tmpdst; 77198849Sken size_t tmplen; 77298849Sken 77398849Sken if (len & 0x3) { 774106627Sjhb printf("ti_bcopy_swap: length %zd isn't 32-bit aligned\n", 77598849Sken len); 77698849Sken return(-1); 77798849Sken } 77898849Sken 77998849Sken tmpsrc = src; 78098849Sken tmpdst = dst; 78198849Sken tmplen = len; 78298849Sken 78398849Sken while (tmplen) { 78498849Sken if (swap_type == TI_SWAP_NTOH) 78598849Sken *(u_int32_t *)tmpdst = 78698849Sken ntohl(*(const u_int32_t *)tmpsrc); 78798849Sken else 78898849Sken *(u_int32_t *)tmpdst = 78998849Sken htonl(*(const u_int32_t *)tmpsrc); 79098849Sken 79198849Sken tmpsrc += 4; 79298849Sken tmpdst += 4; 79398849Sken tmplen -= 4; 79498849Sken } 79598849Sken 79698849Sken return(0); 79798849Sken} 79898849Sken 79945386Swpaul/* 80045386Swpaul * Load firmware image into the NIC. Check that the firmware revision 80145386Swpaul * is acceptable and see if we want the firmware for the Tigon 1 or 80245386Swpaul * Tigon 2. 80345386Swpaul */ 804102336Salfredstatic void 805102336Salfredti_loadfw(sc) 80645386Swpaul struct ti_softc *sc; 80745386Swpaul{ 80845386Swpaul switch(sc->ti_hwrev) { 80945386Swpaul case TI_HWREV_TIGON: 81045386Swpaul if (tigonFwReleaseMajor != TI_FIRMWARE_MAJOR || 81145386Swpaul tigonFwReleaseMinor != TI_FIRMWARE_MINOR || 81245386Swpaul tigonFwReleaseFix != TI_FIRMWARE_FIX) { 81345386Swpaul printf("ti%d: firmware revision mismatch; want " 81445386Swpaul "%d.%d.%d, got %d.%d.%d\n", sc->ti_unit, 81545386Swpaul TI_FIRMWARE_MAJOR, TI_FIRMWARE_MINOR, 81645386Swpaul TI_FIRMWARE_FIX, tigonFwReleaseMajor, 81745386Swpaul tigonFwReleaseMinor, tigonFwReleaseFix); 81845386Swpaul return; 81945386Swpaul } 82045386Swpaul ti_mem(sc, tigonFwTextAddr, tigonFwTextLen, 82145386Swpaul (caddr_t)tigonFwText); 82245386Swpaul ti_mem(sc, tigonFwDataAddr, tigonFwDataLen, 82345386Swpaul (caddr_t)tigonFwData); 82445386Swpaul ti_mem(sc, tigonFwRodataAddr, tigonFwRodataLen, 82545386Swpaul (caddr_t)tigonFwRodata); 82645386Swpaul ti_mem(sc, tigonFwBssAddr, tigonFwBssLen, NULL); 82745386Swpaul ti_mem(sc, tigonFwSbssAddr, tigonFwSbssLen, NULL); 82845386Swpaul CSR_WRITE_4(sc, TI_CPU_PROGRAM_COUNTER, tigonFwStartAddr); 82945386Swpaul break; 83045386Swpaul case TI_HWREV_TIGON_II: 83145386Swpaul if (tigon2FwReleaseMajor != TI_FIRMWARE_MAJOR || 83245386Swpaul tigon2FwReleaseMinor != TI_FIRMWARE_MINOR || 83345386Swpaul tigon2FwReleaseFix != TI_FIRMWARE_FIX) { 83445386Swpaul printf("ti%d: firmware revision mismatch; want " 83545386Swpaul "%d.%d.%d, got %d.%d.%d\n", sc->ti_unit, 83645386Swpaul TI_FIRMWARE_MAJOR, TI_FIRMWARE_MINOR, 83745386Swpaul TI_FIRMWARE_FIX, tigon2FwReleaseMajor, 83845386Swpaul tigon2FwReleaseMinor, tigon2FwReleaseFix); 83945386Swpaul return; 84045386Swpaul } 84145386Swpaul ti_mem(sc, tigon2FwTextAddr, tigon2FwTextLen, 84245386Swpaul (caddr_t)tigon2FwText); 84345386Swpaul ti_mem(sc, tigon2FwDataAddr, tigon2FwDataLen, 84445386Swpaul (caddr_t)tigon2FwData); 84545386Swpaul ti_mem(sc, tigon2FwRodataAddr, tigon2FwRodataLen, 84645386Swpaul (caddr_t)tigon2FwRodata); 84745386Swpaul ti_mem(sc, tigon2FwBssAddr, tigon2FwBssLen, NULL); 84845386Swpaul ti_mem(sc, tigon2FwSbssAddr, tigon2FwSbssLen, NULL); 84945386Swpaul CSR_WRITE_4(sc, TI_CPU_PROGRAM_COUNTER, tigon2FwStartAddr); 85045386Swpaul break; 85145386Swpaul default: 85245386Swpaul printf("ti%d: can't load firmware: unknown hardware rev\n", 85345386Swpaul sc->ti_unit); 85445386Swpaul break; 85545386Swpaul } 85645386Swpaul 85745386Swpaul return; 85845386Swpaul} 85945386Swpaul 86045386Swpaul/* 86145386Swpaul * Send the NIC a command via the command ring. 86245386Swpaul */ 863102336Salfredstatic void 864102336Salfredti_cmd(sc, cmd) 86545386Swpaul struct ti_softc *sc; 86645386Swpaul struct ti_cmd_desc *cmd; 86745386Swpaul{ 86845386Swpaul u_int32_t index; 86945386Swpaul 87045386Swpaul if (sc->ti_rdata->ti_cmd_ring == NULL) 87145386Swpaul return; 87245386Swpaul 87345386Swpaul index = sc->ti_cmd_saved_prodidx; 87445386Swpaul CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4), *(u_int32_t *)(cmd)); 87545386Swpaul TI_INC(index, TI_CMD_RING_CNT); 87645386Swpaul CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, index); 87745386Swpaul sc->ti_cmd_saved_prodidx = index; 87845386Swpaul 87945386Swpaul return; 88045386Swpaul} 88145386Swpaul 88245386Swpaul/* 88345386Swpaul * Send the NIC an extended command. The 'len' parameter specifies the 88445386Swpaul * number of command slots to include after the initial command. 88545386Swpaul */ 886102336Salfredstatic void 887102336Salfredti_cmd_ext(sc, cmd, arg, len) 88845386Swpaul struct ti_softc *sc; 88945386Swpaul struct ti_cmd_desc *cmd; 89045386Swpaul caddr_t arg; 89145386Swpaul int len; 89245386Swpaul{ 89345386Swpaul u_int32_t index; 89445386Swpaul register int i; 89545386Swpaul 89645386Swpaul if (sc->ti_rdata->ti_cmd_ring == NULL) 89745386Swpaul return; 89845386Swpaul 89945386Swpaul index = sc->ti_cmd_saved_prodidx; 90045386Swpaul CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4), *(u_int32_t *)(cmd)); 90145386Swpaul TI_INC(index, TI_CMD_RING_CNT); 90245386Swpaul for (i = 0; i < len; i++) { 90345386Swpaul CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4), 90445386Swpaul *(u_int32_t *)(&arg[i * 4])); 90545386Swpaul TI_INC(index, TI_CMD_RING_CNT); 90645386Swpaul } 90745386Swpaul CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, index); 90845386Swpaul sc->ti_cmd_saved_prodidx = index; 90945386Swpaul 91045386Swpaul return; 91145386Swpaul} 91245386Swpaul 91345386Swpaul/* 91445386Swpaul * Handle events that have triggered interrupts. 91545386Swpaul */ 916102336Salfredstatic void 917102336Salfredti_handle_events(sc) 91845386Swpaul struct ti_softc *sc; 91945386Swpaul{ 92045386Swpaul struct ti_event_desc *e; 92145386Swpaul 92245386Swpaul if (sc->ti_rdata->ti_event_ring == NULL) 92345386Swpaul return; 92445386Swpaul 92545386Swpaul while (sc->ti_ev_saved_considx != sc->ti_ev_prodidx.ti_idx) { 92645386Swpaul e = &sc->ti_rdata->ti_event_ring[sc->ti_ev_saved_considx]; 92745386Swpaul switch(e->ti_event) { 92845386Swpaul case TI_EV_LINKSTAT_CHANGED: 92945386Swpaul sc->ti_linkstat = e->ti_code; 93045386Swpaul if (e->ti_code == TI_EV_CODE_LINK_UP) 93145386Swpaul printf("ti%d: 10/100 link up\n", sc->ti_unit); 93245386Swpaul else if (e->ti_code == TI_EV_CODE_GIG_LINK_UP) 93345386Swpaul printf("ti%d: gigabit link up\n", sc->ti_unit); 93445386Swpaul else if (e->ti_code == TI_EV_CODE_LINK_DOWN) 93545386Swpaul printf("ti%d: link down\n", sc->ti_unit); 93645386Swpaul break; 93745386Swpaul case TI_EV_ERROR: 93845386Swpaul if (e->ti_code == TI_EV_CODE_ERR_INVAL_CMD) 93945386Swpaul printf("ti%d: invalid command\n", sc->ti_unit); 94045386Swpaul else if (e->ti_code == TI_EV_CODE_ERR_UNIMP_CMD) 94145386Swpaul printf("ti%d: unknown command\n", sc->ti_unit); 94245386Swpaul else if (e->ti_code == TI_EV_CODE_ERR_BADCFG) 94345386Swpaul printf("ti%d: bad config data\n", sc->ti_unit); 94445386Swpaul break; 94545386Swpaul case TI_EV_FIRMWARE_UP: 94645386Swpaul ti_init2(sc); 94745386Swpaul break; 94845386Swpaul case TI_EV_STATS_UPDATED: 94945386Swpaul ti_stats_update(sc); 95045386Swpaul break; 95145386Swpaul case TI_EV_RESET_JUMBO_RING: 95245386Swpaul case TI_EV_MCAST_UPDATED: 95345386Swpaul /* Who cares. */ 95445386Swpaul break; 95545386Swpaul default: 95645386Swpaul printf("ti%d: unknown event: %d\n", 95745386Swpaul sc->ti_unit, e->ti_event); 95845386Swpaul break; 95945386Swpaul } 96045386Swpaul /* Advance the consumer index. */ 96145386Swpaul TI_INC(sc->ti_ev_saved_considx, TI_EVENT_RING_CNT); 96245386Swpaul CSR_WRITE_4(sc, TI_GCR_EVENTCONS_IDX, sc->ti_ev_saved_considx); 96345386Swpaul } 96445386Swpaul 96545386Swpaul return; 96645386Swpaul} 96745386Swpaul 96898849Sken#ifdef TI_PRIVATE_JUMBOS 96998849Sken 97045386Swpaul/* 97145386Swpaul * Memory management for the jumbo receive ring is a pain in the 97245386Swpaul * butt. We need to allocate at least 9018 bytes of space per frame, 97345386Swpaul * _and_ it has to be contiguous (unless you use the extended 97445386Swpaul * jumbo descriptor format). Using malloc() all the time won't 97545386Swpaul * work: malloc() allocates memory in powers of two, which means we 97645386Swpaul * would end up wasting a considerable amount of space by allocating 97745386Swpaul * 9K chunks. We don't have a jumbo mbuf cluster pool. Thus, we have 97845386Swpaul * to do our own memory management. 97945386Swpaul * 98045386Swpaul * The driver needs to allocate a contiguous chunk of memory at boot 98145386Swpaul * time. We then chop this up ourselves into 9K pieces and use them 98245386Swpaul * as external mbuf storage. 98345386Swpaul * 98445386Swpaul * One issue here is how much memory to allocate. The jumbo ring has 98545386Swpaul * 256 slots in it, but at 9K per slot than can consume over 2MB of 98645386Swpaul * RAM. This is a bit much, especially considering we also need 98745386Swpaul * RAM for the standard ring and mini ring (on the Tigon 2). To 98845386Swpaul * save space, we only actually allocate enough memory for 64 slots 98945386Swpaul * by default, which works out to between 500 and 600K. This can 99045386Swpaul * be tuned by changing a #define in if_tireg.h. 99145386Swpaul */ 99245386Swpaul 993102336Salfredstatic int 994102336Salfredti_alloc_jumbo_mem(sc) 99545386Swpaul struct ti_softc *sc; 99645386Swpaul{ 99745386Swpaul caddr_t ptr; 99845386Swpaul register int i; 99945386Swpaul struct ti_jpool_entry *entry; 100045386Swpaul 100145386Swpaul /* Grab a big chunk o' storage. */ 100245386Swpaul sc->ti_cdata.ti_jumbo_buf = contigmalloc(TI_JMEM, M_DEVBUF, 100350548Sbde M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); 100445386Swpaul 100545386Swpaul if (sc->ti_cdata.ti_jumbo_buf == NULL) { 100645386Swpaul printf("ti%d: no memory for jumbo buffers!\n", sc->ti_unit); 100745386Swpaul return(ENOBUFS); 100845386Swpaul } 100945386Swpaul 101045386Swpaul SLIST_INIT(&sc->ti_jfree_listhead); 101145386Swpaul SLIST_INIT(&sc->ti_jinuse_listhead); 101245386Swpaul 101345386Swpaul /* 101445386Swpaul * Now divide it up into 9K pieces and save the addresses 101567405Sbmilekic * in an array. 101645386Swpaul */ 101745386Swpaul ptr = sc->ti_cdata.ti_jumbo_buf; 101845386Swpaul for (i = 0; i < TI_JSLOTS; i++) { 101967405Sbmilekic sc->ti_cdata.ti_jslots[i] = ptr; 102067405Sbmilekic ptr += TI_JLEN; 102145386Swpaul entry = malloc(sizeof(struct ti_jpool_entry), 102245386Swpaul M_DEVBUF, M_NOWAIT); 102345386Swpaul if (entry == NULL) { 102462793Sgallatin contigfree(sc->ti_cdata.ti_jumbo_buf, TI_JMEM, 102562793Sgallatin M_DEVBUF); 102645386Swpaul sc->ti_cdata.ti_jumbo_buf = NULL; 102745386Swpaul printf("ti%d: no memory for jumbo " 102845386Swpaul "buffer queue!\n", sc->ti_unit); 102945386Swpaul return(ENOBUFS); 103045386Swpaul } 103145386Swpaul entry->slot = i; 103245386Swpaul SLIST_INSERT_HEAD(&sc->ti_jfree_listhead, entry, jpool_entries); 103345386Swpaul } 103445386Swpaul 103545386Swpaul return(0); 103645386Swpaul} 103745386Swpaul 103845386Swpaul/* 103945386Swpaul * Allocate a jumbo buffer. 104045386Swpaul */ 104145386Swpaulstatic void *ti_jalloc(sc) 104245386Swpaul struct ti_softc *sc; 104345386Swpaul{ 104445386Swpaul struct ti_jpool_entry *entry; 104545386Swpaul 104645386Swpaul entry = SLIST_FIRST(&sc->ti_jfree_listhead); 104745386Swpaul 104845386Swpaul if (entry == NULL) { 104945386Swpaul printf("ti%d: no free jumbo buffers\n", sc->ti_unit); 105045386Swpaul return(NULL); 105145386Swpaul } 105245386Swpaul 105345386Swpaul SLIST_REMOVE_HEAD(&sc->ti_jfree_listhead, jpool_entries); 105445386Swpaul SLIST_INSERT_HEAD(&sc->ti_jinuse_listhead, entry, jpool_entries); 105567405Sbmilekic return(sc->ti_cdata.ti_jslots[entry->slot]); 105645386Swpaul} 105745386Swpaul 105845386Swpaul/* 105945386Swpaul * Release a jumbo buffer. 106045386Swpaul */ 1061102336Salfredstatic void 1062102336Salfredti_jfree(buf, args) 106399058Salfred void *buf; 106464837Sdwmalone void *args; 106545386Swpaul{ 106645386Swpaul struct ti_softc *sc; 106745386Swpaul int i; 106845386Swpaul struct ti_jpool_entry *entry; 106945386Swpaul 107045386Swpaul /* Extract the softc struct pointer. */ 107167405Sbmilekic sc = (struct ti_softc *)args; 107245386Swpaul 107345386Swpaul if (sc == NULL) 107467405Sbmilekic panic("ti_jfree: didn't get softc pointer!"); 107545386Swpaul 107645386Swpaul /* calculate the slot this buffer belongs to */ 107767405Sbmilekic i = ((vm_offset_t)buf 107845386Swpaul - (vm_offset_t)sc->ti_cdata.ti_jumbo_buf) / TI_JLEN; 107945386Swpaul 108045386Swpaul if ((i < 0) || (i >= TI_JSLOTS)) 108145386Swpaul panic("ti_jfree: asked to free buffer that we don't manage!"); 108245386Swpaul 108364837Sdwmalone entry = SLIST_FIRST(&sc->ti_jinuse_listhead); 108464837Sdwmalone if (entry == NULL) 108564837Sdwmalone panic("ti_jfree: buffer not in use!"); 108664837Sdwmalone entry->slot = i; 108764837Sdwmalone SLIST_REMOVE_HEAD(&sc->ti_jinuse_listhead, jpool_entries); 108864837Sdwmalone SLIST_INSERT_HEAD(&sc->ti_jfree_listhead, entry, jpool_entries); 108964837Sdwmalone 109045386Swpaul return; 109145386Swpaul} 109245386Swpaul 109398849Sken#endif /* TI_PRIVATE_JUMBOS */ 109445386Swpaul 109545386Swpaul/* 109645386Swpaul * Intialize a standard receive ring descriptor. 109745386Swpaul */ 1098102336Salfredstatic int 1099102336Salfredti_newbuf_std(sc, i, m) 110045386Swpaul struct ti_softc *sc; 110145386Swpaul int i; 110245386Swpaul struct mbuf *m; 110345386Swpaul{ 110445386Swpaul struct mbuf *m_new = NULL; 110545386Swpaul struct ti_rx_desc *r; 110645386Swpaul 110749036Swpaul if (m == NULL) { 1108111119Simp MGETHDR(m_new, M_DONTWAIT, MT_DATA); 110987846Sluigi if (m_new == NULL) 111045386Swpaul return(ENOBUFS); 111145386Swpaul 1112111119Simp MCLGET(m_new, M_DONTWAIT); 111345386Swpaul if (!(m_new->m_flags & M_EXT)) { 111445386Swpaul m_freem(m_new); 111545386Swpaul return(ENOBUFS); 111645386Swpaul } 111749036Swpaul m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; 111849036Swpaul } else { 111949036Swpaul m_new = m; 112049036Swpaul m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; 112149036Swpaul m_new->m_data = m_new->m_ext.ext_buf; 112245386Swpaul } 112345386Swpaul 112448597Swpaul m_adj(m_new, ETHER_ALIGN); 112545386Swpaul sc->ti_cdata.ti_rx_std_chain[i] = m_new; 112645386Swpaul r = &sc->ti_rdata->ti_rx_std_ring[i]; 112745386Swpaul TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t)); 112845386Swpaul r->ti_type = TI_BDTYPE_RECV_BD; 112945386Swpaul r->ti_flags = 0; 113058698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 113158698Sjlemon r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM; 113249036Swpaul r->ti_len = m_new->m_len; 113345386Swpaul r->ti_idx = i; 113445386Swpaul 113545386Swpaul return(0); 113645386Swpaul} 113745386Swpaul 113845386Swpaul/* 113945386Swpaul * Intialize a mini receive ring descriptor. This only applies to 114045386Swpaul * the Tigon 2. 114145386Swpaul */ 1142102336Salfredstatic int 1143102336Salfredti_newbuf_mini(sc, i, m) 114445386Swpaul struct ti_softc *sc; 114545386Swpaul int i; 114645386Swpaul struct mbuf *m; 114745386Swpaul{ 114845386Swpaul struct mbuf *m_new = NULL; 114945386Swpaul struct ti_rx_desc *r; 115045386Swpaul 115149036Swpaul if (m == NULL) { 1152111119Simp MGETHDR(m_new, M_DONTWAIT, MT_DATA); 115345386Swpaul if (m_new == NULL) { 115445386Swpaul return(ENOBUFS); 115545386Swpaul } 115649036Swpaul m_new->m_len = m_new->m_pkthdr.len = MHLEN; 115749036Swpaul } else { 115849036Swpaul m_new = m; 115949036Swpaul m_new->m_data = m_new->m_pktdat; 116049036Swpaul m_new->m_len = m_new->m_pkthdr.len = MHLEN; 116145386Swpaul } 116249036Swpaul 116348597Swpaul m_adj(m_new, ETHER_ALIGN); 116445386Swpaul r = &sc->ti_rdata->ti_rx_mini_ring[i]; 116545386Swpaul sc->ti_cdata.ti_rx_mini_chain[i] = m_new; 116645386Swpaul TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t)); 116745386Swpaul r->ti_type = TI_BDTYPE_RECV_BD; 116845386Swpaul r->ti_flags = TI_BDFLAG_MINI_RING; 116958698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 117058698Sjlemon r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM; 117149036Swpaul r->ti_len = m_new->m_len; 117245386Swpaul r->ti_idx = i; 117345386Swpaul 117445386Swpaul return(0); 117545386Swpaul} 117645386Swpaul 117798849Sken#ifdef TI_PRIVATE_JUMBOS 117898849Sken 117945386Swpaul/* 118045386Swpaul * Initialize a jumbo receive ring descriptor. This allocates 118145386Swpaul * a jumbo buffer from the pool managed internally by the driver. 118245386Swpaul */ 1183102336Salfredstatic int 1184102336Salfredti_newbuf_jumbo(sc, i, m) 118545386Swpaul struct ti_softc *sc; 118645386Swpaul int i; 118745386Swpaul struct mbuf *m; 118845386Swpaul{ 118945386Swpaul struct mbuf *m_new = NULL; 119045386Swpaul struct ti_rx_desc *r; 119145386Swpaul 119249036Swpaul if (m == NULL) { 119345386Swpaul caddr_t *buf = NULL; 119445386Swpaul 119545386Swpaul /* Allocate the mbuf. */ 1196111119Simp MGETHDR(m_new, M_DONTWAIT, MT_DATA); 119745386Swpaul if (m_new == NULL) { 119845386Swpaul return(ENOBUFS); 119945386Swpaul } 120045386Swpaul 120145386Swpaul /* Allocate the jumbo buffer */ 120245386Swpaul buf = ti_jalloc(sc); 120345386Swpaul if (buf == NULL) { 120445386Swpaul m_freem(m_new); 120545386Swpaul printf("ti%d: jumbo allocation failed " 120645386Swpaul "-- packet dropped!\n", sc->ti_unit); 120745386Swpaul return(ENOBUFS); 120845386Swpaul } 120945386Swpaul 121045386Swpaul /* Attach the buffer to the mbuf. */ 121164837Sdwmalone m_new->m_data = (void *) buf; 121264837Sdwmalone m_new->m_len = m_new->m_pkthdr.len = TI_JUMBO_FRAMELEN; 121367405Sbmilekic MEXTADD(m_new, buf, TI_JUMBO_FRAMELEN, ti_jfree, 121468621Sbmilekic (struct ti_softc *)sc, 0, EXT_NET_DRV); 121549036Swpaul } else { 121649036Swpaul m_new = m; 121749036Swpaul m_new->m_data = m_new->m_ext.ext_buf; 121849036Swpaul m_new->m_ext.ext_size = TI_JUMBO_FRAMELEN; 121945386Swpaul } 122045386Swpaul 122149780Swpaul m_adj(m_new, ETHER_ALIGN); 122245386Swpaul /* Set up the descriptor. */ 122345386Swpaul r = &sc->ti_rdata->ti_rx_jumbo_ring[i]; 122445386Swpaul sc->ti_cdata.ti_rx_jumbo_chain[i] = m_new; 122545386Swpaul TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t)); 122645386Swpaul r->ti_type = TI_BDTYPE_RECV_JUMBO_BD; 122745386Swpaul r->ti_flags = TI_BDFLAG_JUMBO_RING; 122858698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 122958698Sjlemon r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM; 123049036Swpaul r->ti_len = m_new->m_len; 123145386Swpaul r->ti_idx = i; 123245386Swpaul 123345386Swpaul return(0); 123445386Swpaul} 123545386Swpaul 123698849Sken#else 123798849Sken#include <vm/vm_page.h> 123898849Sken 123998849Sken#if (PAGE_SIZE == 4096) 124098849Sken#define NPAYLOAD 2 124198849Sken#else 124298849Sken#define NPAYLOAD 1 124398849Sken#endif 124498849Sken 124598849Sken#define TCP_HDR_LEN (52 + sizeof(struct ether_header)) 124698849Sken#define UDP_HDR_LEN (28 + sizeof(struct ether_header)) 124798849Sken#define NFS_HDR_LEN (UDP_HDR_LEN) 1248104401Salfredstatic int HDR_LEN = TCP_HDR_LEN; 124998849Sken 125098849Sken 125198849Sken /* 125298849Sken * Initialize a jumbo receive ring descriptor. This allocates 125398849Sken * a jumbo buffer from the pool managed internally by the driver. 125498849Sken */ 125598849Skenstatic int 125698849Skenti_newbuf_jumbo(sc, idx, m_old) 125798849Sken struct ti_softc *sc; 125898849Sken int idx; 125998849Sken struct mbuf *m_old; 126098849Sken{ 126198849Sken struct mbuf *cur, *m_new = NULL; 126298849Sken struct mbuf *m[3] = {NULL, NULL, NULL}; 126398849Sken struct ti_rx_desc_ext *r; 126498849Sken vm_page_t frame; 126598849Sken /* 1 extra buf to make nobufs easy*/ 126698849Sken caddr_t buf[3] = {NULL, NULL, NULL}; 126798849Sken int i; 126898849Sken 126998849Sken if (m_old != NULL) { 127098849Sken m_new = m_old; 127198849Sken cur = m_old->m_next; 127298849Sken for (i = 0; i <= NPAYLOAD; i++){ 127398849Sken m[i] = cur; 127498849Sken cur = cur->m_next; 127598849Sken } 127698849Sken } else { 127798849Sken /* Allocate the mbufs. */ 1278111119Simp MGETHDR(m_new, M_DONTWAIT, MT_DATA); 127998849Sken if (m_new == NULL) { 128098849Sken printf("ti%d: mbuf allocation failed " 128198849Sken "-- packet dropped!\n", sc->ti_unit); 128298849Sken goto nobufs; 128398849Sken } 1284111119Simp MGET(m[NPAYLOAD], M_DONTWAIT, MT_DATA); 128598849Sken if (m[NPAYLOAD] == NULL) { 128698849Sken printf("ti%d: cluster mbuf allocation failed " 128798849Sken "-- packet dropped!\n", sc->ti_unit); 128898849Sken goto nobufs; 128998849Sken } 1290111119Simp MCLGET(m[NPAYLOAD], M_DONTWAIT); 129198849Sken if ((m[NPAYLOAD]->m_flags & M_EXT) == 0) { 129298849Sken printf("ti%d: mbuf allocation failed " 129398849Sken "-- packet dropped!\n", sc->ti_unit); 129498849Sken goto nobufs; 129598849Sken } 129698849Sken m[NPAYLOAD]->m_len = MCLBYTES; 129798849Sken 129898849Sken for (i = 0; i < NPAYLOAD; i++){ 1299111119Simp MGET(m[i], M_DONTWAIT, MT_DATA); 130098849Sken if (m[i] == NULL) { 130198849Sken printf("ti%d: mbuf allocation failed " 130298849Sken "-- packet dropped!\n", sc->ti_unit); 130398849Sken goto nobufs; 130498849Sken } 130598849Sken if (!(frame = jumbo_pg_alloc())){ 130698849Sken printf("ti%d: buffer allocation failed " 130798849Sken "-- packet dropped!\n", sc->ti_unit); 130898849Sken printf(" index %d page %d\n", idx, i); 130998849Sken goto nobufs; 131098849Sken } 131198849Sken buf[i] = jumbo_phys_to_kva(VM_PAGE_TO_PHYS(frame)); 131298849Sken } 131398849Sken for (i = 0; i < NPAYLOAD; i++){ 131498849Sken /* Attach the buffer to the mbuf. */ 131598849Sken m[i]->m_data = (void *)buf[i]; 131698849Sken m[i]->m_len = PAGE_SIZE; 131798849Sken MEXTADD(m[i], (void *)buf[i], PAGE_SIZE, 131898849Sken jumbo_freem, NULL, 0, EXT_DISPOSABLE); 131998849Sken m[i]->m_next = m[i+1]; 132098849Sken } 132198849Sken /* link the buffers to the header */ 132298849Sken m_new->m_next = m[0]; 132398849Sken m_new->m_data += ETHER_ALIGN; 132498849Sken if (sc->ti_hdrsplit) 132598849Sken m_new->m_len = MHLEN - ETHER_ALIGN; 132698849Sken else 132798849Sken m_new->m_len = HDR_LEN; 132898849Sken m_new->m_pkthdr.len = NPAYLOAD * PAGE_SIZE + m_new->m_len; 132998849Sken } 133098849Sken 133198849Sken /* Set up the descriptor. */ 133298849Sken r = &sc->ti_rdata->ti_rx_jumbo_ring[idx]; 133398849Sken sc->ti_cdata.ti_rx_jumbo_chain[idx] = m_new; 133498849Sken TI_HOSTADDR(r->ti_addr0) = vtophys(mtod(m_new, caddr_t)); 133598849Sken r->ti_len0 = m_new->m_len; 133698849Sken 133798849Sken TI_HOSTADDR(r->ti_addr1) = vtophys(mtod(m[0], caddr_t)); 133898849Sken r->ti_len1 = PAGE_SIZE; 133998849Sken 134098849Sken TI_HOSTADDR(r->ti_addr2) = vtophys(mtod(m[1], caddr_t)); 134198849Sken r->ti_len2 = m[1]->m_ext.ext_size; /* could be PAGE_SIZE or MCLBYTES */ 134298849Sken 134398849Sken if (PAGE_SIZE == 4096) { 134498849Sken TI_HOSTADDR(r->ti_addr3) = vtophys(mtod(m[2], caddr_t)); 134598849Sken r->ti_len3 = MCLBYTES; 134698849Sken } else { 134798849Sken r->ti_len3 = 0; 134898849Sken } 134998849Sken r->ti_type = TI_BDTYPE_RECV_JUMBO_BD; 135098849Sken 135198849Sken r->ti_flags = TI_BDFLAG_JUMBO_RING|TI_RCB_FLAG_USE_EXT_RX_BD; 135298849Sken 135398849Sken if (sc->arpcom.ac_if.if_hwassist) 135498849Sken r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM|TI_BDFLAG_IP_CKSUM; 135598849Sken 135698849Sken r->ti_idx = idx; 135798849Sken 135898849Sken return(0); 135998849Sken 136098849Sken nobufs: 136198849Sken 136298849Sken /* 136398849Sken * Warning! : 136498849Sken * This can only be called before the mbufs are strung together. 136598849Sken * If the mbufs are strung together, m_freem() will free the chain, 136698849Sken * so that the later mbufs will be freed multiple times. 136798849Sken */ 136898849Sken if (m_new) 136998849Sken m_freem(m_new); 137098849Sken 137198849Sken for(i = 0; i < 3; i++){ 137298849Sken if (m[i]) 137398849Sken m_freem(m[i]); 137498849Sken if (buf[i]) 137598849Sken jumbo_pg_free((vm_offset_t)buf[i]); 137698849Sken } 137798849Sken return ENOBUFS; 137898849Sken} 137998849Sken#endif 138098849Sken 138198849Sken 138298849Sken 138345386Swpaul/* 138445386Swpaul * The standard receive ring has 512 entries in it. At 2K per mbuf cluster, 138545386Swpaul * that's 1MB or memory, which is a lot. For now, we fill only the first 138645386Swpaul * 256 ring entries and hope that our CPU is fast enough to keep up with 138745386Swpaul * the NIC. 138845386Swpaul */ 1389102336Salfredstatic int 1390102336Salfredti_init_rx_ring_std(sc) 139145386Swpaul struct ti_softc *sc; 139245386Swpaul{ 139345386Swpaul register int i; 139445386Swpaul struct ti_cmd_desc cmd; 139545386Swpaul 139645386Swpaul for (i = 0; i < TI_SSLOTS; i++) { 139745386Swpaul if (ti_newbuf_std(sc, i, NULL) == ENOBUFS) 139845386Swpaul return(ENOBUFS); 139945386Swpaul }; 140045386Swpaul 140145386Swpaul TI_UPDATE_STDPROD(sc, i - 1); 140248597Swpaul sc->ti_std = i - 1; 140345386Swpaul 140445386Swpaul return(0); 140545386Swpaul} 140645386Swpaul 1407102336Salfredstatic void 1408102336Salfredti_free_rx_ring_std(sc) 140945386Swpaul struct ti_softc *sc; 141045386Swpaul{ 141145386Swpaul register int i; 141245386Swpaul 141345386Swpaul for (i = 0; i < TI_STD_RX_RING_CNT; i++) { 141445386Swpaul if (sc->ti_cdata.ti_rx_std_chain[i] != NULL) { 141545386Swpaul m_freem(sc->ti_cdata.ti_rx_std_chain[i]); 141645386Swpaul sc->ti_cdata.ti_rx_std_chain[i] = NULL; 141745386Swpaul } 141845386Swpaul bzero((char *)&sc->ti_rdata->ti_rx_std_ring[i], 141945386Swpaul sizeof(struct ti_rx_desc)); 142045386Swpaul } 142145386Swpaul 142245386Swpaul return; 142345386Swpaul} 142445386Swpaul 1425102336Salfredstatic int 1426102336Salfredti_init_rx_ring_jumbo(sc) 142745386Swpaul struct ti_softc *sc; 142845386Swpaul{ 142945386Swpaul register int i; 143045386Swpaul struct ti_cmd_desc cmd; 143145386Swpaul 143263699Swpaul for (i = 0; i < TI_JUMBO_RX_RING_CNT; i++) { 143345386Swpaul if (ti_newbuf_jumbo(sc, i, NULL) == ENOBUFS) 143445386Swpaul return(ENOBUFS); 143545386Swpaul }; 143645386Swpaul 143745386Swpaul TI_UPDATE_JUMBOPROD(sc, i - 1); 143848597Swpaul sc->ti_jumbo = i - 1; 143945386Swpaul 144045386Swpaul return(0); 144145386Swpaul} 144245386Swpaul 1443102336Salfredstatic void 1444102336Salfredti_free_rx_ring_jumbo(sc) 144545386Swpaul struct ti_softc *sc; 144645386Swpaul{ 144745386Swpaul register int i; 144845386Swpaul 144945386Swpaul for (i = 0; i < TI_JUMBO_RX_RING_CNT; i++) { 145045386Swpaul if (sc->ti_cdata.ti_rx_jumbo_chain[i] != NULL) { 145145386Swpaul m_freem(sc->ti_cdata.ti_rx_jumbo_chain[i]); 145245386Swpaul sc->ti_cdata.ti_rx_jumbo_chain[i] = NULL; 145345386Swpaul } 145445386Swpaul bzero((char *)&sc->ti_rdata->ti_rx_jumbo_ring[i], 145545386Swpaul sizeof(struct ti_rx_desc)); 145645386Swpaul } 145745386Swpaul 145845386Swpaul return; 145945386Swpaul} 146045386Swpaul 1461102336Salfredstatic int 1462102336Salfredti_init_rx_ring_mini(sc) 146345386Swpaul struct ti_softc *sc; 146445386Swpaul{ 146545386Swpaul register int i; 146645386Swpaul 146745386Swpaul for (i = 0; i < TI_MSLOTS; i++) { 146845386Swpaul if (ti_newbuf_mini(sc, i, NULL) == ENOBUFS) 146945386Swpaul return(ENOBUFS); 147045386Swpaul }; 147145386Swpaul 147245386Swpaul TI_UPDATE_MINIPROD(sc, i - 1); 147348597Swpaul sc->ti_mini = i - 1; 147445386Swpaul 147545386Swpaul return(0); 147645386Swpaul} 147745386Swpaul 1478102336Salfredstatic void 1479102336Salfredti_free_rx_ring_mini(sc) 148045386Swpaul struct ti_softc *sc; 148145386Swpaul{ 148245386Swpaul register int i; 148345386Swpaul 148445386Swpaul for (i = 0; i < TI_MINI_RX_RING_CNT; i++) { 148545386Swpaul if (sc->ti_cdata.ti_rx_mini_chain[i] != NULL) { 148645386Swpaul m_freem(sc->ti_cdata.ti_rx_mini_chain[i]); 148745386Swpaul sc->ti_cdata.ti_rx_mini_chain[i] = NULL; 148845386Swpaul } 148945386Swpaul bzero((char *)&sc->ti_rdata->ti_rx_mini_ring[i], 149045386Swpaul sizeof(struct ti_rx_desc)); 149145386Swpaul } 149245386Swpaul 149345386Swpaul return; 149445386Swpaul} 149545386Swpaul 1496102336Salfredstatic void 1497102336Salfredti_free_tx_ring(sc) 149845386Swpaul struct ti_softc *sc; 149945386Swpaul{ 150045386Swpaul register int i; 150145386Swpaul 150245386Swpaul if (sc->ti_rdata->ti_tx_ring == NULL) 150345386Swpaul return; 150445386Swpaul 150545386Swpaul for (i = 0; i < TI_TX_RING_CNT; i++) { 150645386Swpaul if (sc->ti_cdata.ti_tx_chain[i] != NULL) { 150745386Swpaul m_freem(sc->ti_cdata.ti_tx_chain[i]); 150845386Swpaul sc->ti_cdata.ti_tx_chain[i] = NULL; 150945386Swpaul } 151045386Swpaul bzero((char *)&sc->ti_rdata->ti_tx_ring[i], 151145386Swpaul sizeof(struct ti_tx_desc)); 151245386Swpaul } 151345386Swpaul 151445386Swpaul return; 151545386Swpaul} 151645386Swpaul 1517102336Salfredstatic int 1518102336Salfredti_init_tx_ring(sc) 151945386Swpaul struct ti_softc *sc; 152045386Swpaul{ 152148011Swpaul sc->ti_txcnt = 0; 152245386Swpaul sc->ti_tx_saved_considx = 0; 152345386Swpaul CSR_WRITE_4(sc, TI_MB_SENDPROD_IDX, 0); 152445386Swpaul return(0); 152545386Swpaul} 152645386Swpaul 152745386Swpaul/* 152845386Swpaul * The Tigon 2 firmware has a new way to add/delete multicast addresses, 152945386Swpaul * but we have to support the old way too so that Tigon 1 cards will 153045386Swpaul * work. 153145386Swpaul */ 1532105219Sphkstatic void 1533102336Salfredti_add_mcast(sc, addr) 153445386Swpaul struct ti_softc *sc; 153545386Swpaul struct ether_addr *addr; 153645386Swpaul{ 153745386Swpaul struct ti_cmd_desc cmd; 153845386Swpaul u_int16_t *m; 153945386Swpaul u_int32_t ext[2] = {0, 0}; 154045386Swpaul 154145386Swpaul m = (u_int16_t *)&addr->octet[0]; 154245386Swpaul 154345386Swpaul switch(sc->ti_hwrev) { 154445386Swpaul case TI_HWREV_TIGON: 154545386Swpaul CSR_WRITE_4(sc, TI_GCR_MAR0, htons(m[0])); 154645386Swpaul CSR_WRITE_4(sc, TI_GCR_MAR1, (htons(m[1]) << 16) | htons(m[2])); 154745386Swpaul TI_DO_CMD(TI_CMD_ADD_MCAST_ADDR, 0, 0); 154845386Swpaul break; 154945386Swpaul case TI_HWREV_TIGON_II: 155045386Swpaul ext[0] = htons(m[0]); 155145386Swpaul ext[1] = (htons(m[1]) << 16) | htons(m[2]); 155245386Swpaul TI_DO_CMD_EXT(TI_CMD_EXT_ADD_MCAST, 0, 0, (caddr_t)&ext, 2); 155345386Swpaul break; 155445386Swpaul default: 155545386Swpaul printf("ti%d: unknown hwrev\n", sc->ti_unit); 155645386Swpaul break; 155745386Swpaul } 155845386Swpaul 155945386Swpaul return; 156045386Swpaul} 156145386Swpaul 1562105219Sphkstatic void 1563102336Salfredti_del_mcast(sc, addr) 156445386Swpaul struct ti_softc *sc; 156545386Swpaul struct ether_addr *addr; 156645386Swpaul{ 156745386Swpaul struct ti_cmd_desc cmd; 156845386Swpaul u_int16_t *m; 156945386Swpaul u_int32_t ext[2] = {0, 0}; 157045386Swpaul 157145386Swpaul m = (u_int16_t *)&addr->octet[0]; 157245386Swpaul 157345386Swpaul switch(sc->ti_hwrev) { 157445386Swpaul case TI_HWREV_TIGON: 157545386Swpaul CSR_WRITE_4(sc, TI_GCR_MAR0, htons(m[0])); 157645386Swpaul CSR_WRITE_4(sc, TI_GCR_MAR1, (htons(m[1]) << 16) | htons(m[2])); 157745386Swpaul TI_DO_CMD(TI_CMD_DEL_MCAST_ADDR, 0, 0); 157845386Swpaul break; 157945386Swpaul case TI_HWREV_TIGON_II: 158045386Swpaul ext[0] = htons(m[0]); 158145386Swpaul ext[1] = (htons(m[1]) << 16) | htons(m[2]); 158245386Swpaul TI_DO_CMD_EXT(TI_CMD_EXT_DEL_MCAST, 0, 0, (caddr_t)&ext, 2); 158345386Swpaul break; 158445386Swpaul default: 158545386Swpaul printf("ti%d: unknown hwrev\n", sc->ti_unit); 158645386Swpaul break; 158745386Swpaul } 158845386Swpaul 158945386Swpaul return; 159045386Swpaul} 159145386Swpaul 159245386Swpaul/* 159345386Swpaul * Configure the Tigon's multicast address filter. 159445386Swpaul * 159545386Swpaul * The actual multicast table management is a bit of a pain, thanks to 159645386Swpaul * slight brain damage on the part of both Alteon and us. With our 159745386Swpaul * multicast code, we are only alerted when the multicast address table 159845386Swpaul * changes and at that point we only have the current list of addresses: 159945386Swpaul * we only know the current state, not the previous state, so we don't 160045386Swpaul * actually know what addresses were removed or added. The firmware has 160145386Swpaul * state, but we can't get our grubby mits on it, and there is no 'delete 160245386Swpaul * all multicast addresses' command. Hence, we have to maintain our own 160345386Swpaul * state so we know what addresses have been programmed into the NIC at 160445386Swpaul * any given time. 160545386Swpaul */ 1606102336Salfredstatic void 1607102336Salfredti_setmulti(sc) 160845386Swpaul struct ti_softc *sc; 160945386Swpaul{ 161045386Swpaul struct ifnet *ifp; 161145386Swpaul struct ifmultiaddr *ifma; 161245386Swpaul struct ti_cmd_desc cmd; 161345386Swpaul struct ti_mc_entry *mc; 161445386Swpaul u_int32_t intrs; 161545386Swpaul 161645386Swpaul ifp = &sc->arpcom.ac_if; 161745386Swpaul 161845386Swpaul if (ifp->if_flags & IFF_ALLMULTI) { 161945386Swpaul TI_DO_CMD(TI_CMD_SET_ALLMULTI, TI_CMD_CODE_ALLMULTI_ENB, 0); 162045386Swpaul return; 162145386Swpaul } else { 162245386Swpaul TI_DO_CMD(TI_CMD_SET_ALLMULTI, TI_CMD_CODE_ALLMULTI_DIS, 0); 162345386Swpaul } 162445386Swpaul 162545386Swpaul /* Disable interrupts. */ 162645386Swpaul intrs = CSR_READ_4(sc, TI_MB_HOSTINTR); 162745386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1); 162845386Swpaul 162945386Swpaul /* First, zot all the existing filters. */ 163071999Sphk while (SLIST_FIRST(&sc->ti_mc_listhead) != NULL) { 163171999Sphk mc = SLIST_FIRST(&sc->ti_mc_listhead); 163245386Swpaul ti_del_mcast(sc, &mc->mc_addr); 163345386Swpaul SLIST_REMOVE_HEAD(&sc->ti_mc_listhead, mc_entries); 163445386Swpaul free(mc, M_DEVBUF); 163545386Swpaul } 163645386Swpaul 163745386Swpaul /* Now program new ones. */ 163872084Sphk TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 163945386Swpaul if (ifma->ifma_addr->sa_family != AF_LINK) 164045386Swpaul continue; 164145386Swpaul mc = malloc(sizeof(struct ti_mc_entry), M_DEVBUF, M_NOWAIT); 164245386Swpaul bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 164345386Swpaul (char *)&mc->mc_addr, ETHER_ADDR_LEN); 164445386Swpaul SLIST_INSERT_HEAD(&sc->ti_mc_listhead, mc, mc_entries); 164545386Swpaul ti_add_mcast(sc, &mc->mc_addr); 164645386Swpaul } 164745386Swpaul 164845386Swpaul /* Re-enable interrupts. */ 164945386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, intrs); 165045386Swpaul 165145386Swpaul return; 165245386Swpaul} 165345386Swpaul 165445386Swpaul/* 165545386Swpaul * Check to see if the BIOS has configured us for a 64 bit slot when 165645386Swpaul * we aren't actually in one. If we detect this condition, we can work 165745386Swpaul * around it on the Tigon 2 by setting a bit in the PCI state register, 165845386Swpaul * but for the Tigon 1 we must give up and abort the interface attach. 165945386Swpaul */ 166045386Swpaulstatic int ti_64bitslot_war(sc) 166145386Swpaul struct ti_softc *sc; 166245386Swpaul{ 166345386Swpaul if (!(CSR_READ_4(sc, TI_PCI_STATE) & TI_PCISTATE_32BIT_BUS)) { 166445386Swpaul CSR_WRITE_4(sc, 0x600, 0); 166545386Swpaul CSR_WRITE_4(sc, 0x604, 0); 166645386Swpaul CSR_WRITE_4(sc, 0x600, 0x5555AAAA); 166745386Swpaul if (CSR_READ_4(sc, 0x604) == 0x5555AAAA) { 166845386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) 166945386Swpaul return(EINVAL); 167045386Swpaul else { 167145386Swpaul TI_SETBIT(sc, TI_PCI_STATE, 167245386Swpaul TI_PCISTATE_32BIT_BUS); 167345386Swpaul return(0); 167445386Swpaul } 167545386Swpaul } 167645386Swpaul } 167745386Swpaul 167845386Swpaul return(0); 167945386Swpaul} 168045386Swpaul 168145386Swpaul/* 168245386Swpaul * Do endian, PCI and DMA initialization. Also check the on-board ROM 168345386Swpaul * self-test results. 168445386Swpaul */ 1685102336Salfredstatic int 1686102336Salfredti_chipinit(sc) 168745386Swpaul struct ti_softc *sc; 168845386Swpaul{ 168945386Swpaul u_int32_t cacheline; 169045386Swpaul u_int32_t pci_writemax = 0; 169198849Sken u_int32_t hdrsplit; 169245386Swpaul 169345386Swpaul /* Initialize link to down state. */ 169445386Swpaul sc->ti_linkstat = TI_EV_CODE_LINK_DOWN; 169545386Swpaul 169683630Sjlemon if (sc->arpcom.ac_if.if_capenable & IFCAP_HWCSUM) 169783630Sjlemon sc->arpcom.ac_if.if_hwassist = TI_CSUM_FEATURES; 169883630Sjlemon else 169983630Sjlemon sc->arpcom.ac_if.if_hwassist = 0; 170058698Sjlemon 170145386Swpaul /* Set endianness before we access any non-PCI registers. */ 170245386Swpaul#if BYTE_ORDER == BIG_ENDIAN 170345386Swpaul CSR_WRITE_4(sc, TI_MISC_HOST_CTL, 170445386Swpaul TI_MHC_BIGENDIAN_INIT | (TI_MHC_BIGENDIAN_INIT << 24)); 170545386Swpaul#else 170645386Swpaul CSR_WRITE_4(sc, TI_MISC_HOST_CTL, 170745386Swpaul TI_MHC_LITTLEENDIAN_INIT | (TI_MHC_LITTLEENDIAN_INIT << 24)); 170845386Swpaul#endif 170945386Swpaul 171045386Swpaul /* Check the ROM failed bit to see if self-tests passed. */ 171145386Swpaul if (CSR_READ_4(sc, TI_CPU_STATE) & TI_CPUSTATE_ROMFAIL) { 171245386Swpaul printf("ti%d: board self-diagnostics failed!\n", sc->ti_unit); 171345386Swpaul return(ENODEV); 171445386Swpaul } 171545386Swpaul 171645386Swpaul /* Halt the CPU. */ 171745386Swpaul TI_SETBIT(sc, TI_CPU_STATE, TI_CPUSTATE_HALT); 171845386Swpaul 171945386Swpaul /* Figure out the hardware revision. */ 172045386Swpaul switch(CSR_READ_4(sc, TI_MISC_HOST_CTL) & TI_MHC_CHIP_REV_MASK) { 172145386Swpaul case TI_REV_TIGON_I: 172245386Swpaul sc->ti_hwrev = TI_HWREV_TIGON; 172345386Swpaul break; 172445386Swpaul case TI_REV_TIGON_II: 172545386Swpaul sc->ti_hwrev = TI_HWREV_TIGON_II; 172645386Swpaul break; 172745386Swpaul default: 172845386Swpaul printf("ti%d: unsupported chip revision\n", sc->ti_unit); 172945386Swpaul return(ENODEV); 173045386Swpaul } 173145386Swpaul 173245386Swpaul /* Do special setup for Tigon 2. */ 173345386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON_II) { 173445386Swpaul TI_SETBIT(sc, TI_CPU_CTL_B, TI_CPUSTATE_HALT); 173576033Swpaul TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_SRAM_BANK_512K); 173645386Swpaul TI_SETBIT(sc, TI_MISC_CONF, TI_MCR_SRAM_SYNCHRONOUS); 173745386Swpaul } 173845386Swpaul 173998849Sken /* 174098849Sken * We don't have firmware source for the Tigon 1, so Tigon 1 boards 174198849Sken * can't do header splitting. 174298849Sken */ 174398849Sken#ifdef TI_JUMBO_HDRSPLIT 174498849Sken if (sc->ti_hwrev != TI_HWREV_TIGON) 174598849Sken sc->ti_hdrsplit = 1; 174698849Sken else 174798849Sken printf("ti%d: can't do header splitting on a Tigon I board\n", 174898849Sken sc->ti_unit); 174998849Sken#endif /* TI_JUMBO_HDRSPLIT */ 175098849Sken 175145386Swpaul /* Set up the PCI state register. */ 175245386Swpaul CSR_WRITE_4(sc, TI_PCI_STATE, TI_PCI_READ_CMD|TI_PCI_WRITE_CMD); 175345386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON_II) { 175445386Swpaul TI_SETBIT(sc, TI_PCI_STATE, TI_PCISTATE_USE_MEM_RD_MULT); 175545386Swpaul } 175645386Swpaul 175745386Swpaul /* Clear the read/write max DMA parameters. */ 175845386Swpaul TI_CLRBIT(sc, TI_PCI_STATE, (TI_PCISTATE_WRITE_MAXDMA| 175945386Swpaul TI_PCISTATE_READ_MAXDMA)); 176045386Swpaul 176145386Swpaul /* Get cache line size. */ 176245386Swpaul cacheline = CSR_READ_4(sc, TI_PCI_BIST) & 0xFF; 176345386Swpaul 176445386Swpaul /* 176545386Swpaul * If the system has set enabled the PCI memory write 176645386Swpaul * and invalidate command in the command register, set 176745386Swpaul * the write max parameter accordingly. This is necessary 176845386Swpaul * to use MWI with the Tigon 2. 176945386Swpaul */ 177045386Swpaul if (CSR_READ_4(sc, TI_PCI_CMDSTAT) & PCIM_CMD_MWIEN) { 177145386Swpaul switch(cacheline) { 177245386Swpaul case 1: 177345386Swpaul case 4: 177445386Swpaul case 8: 177545386Swpaul case 16: 177645386Swpaul case 32: 177745386Swpaul case 64: 177845386Swpaul break; 177945386Swpaul default: 178045386Swpaul /* Disable PCI memory write and invalidate. */ 178145386Swpaul if (bootverbose) 178245386Swpaul printf("ti%d: cache line size %d not " 178345386Swpaul "supported; disabling PCI MWI\n", 178445386Swpaul sc->ti_unit, cacheline); 178545386Swpaul CSR_WRITE_4(sc, TI_PCI_CMDSTAT, CSR_READ_4(sc, 178645386Swpaul TI_PCI_CMDSTAT) & ~PCIM_CMD_MWIEN); 178745386Swpaul break; 178845386Swpaul } 178945386Swpaul } 179045386Swpaul 179145386Swpaul#ifdef __brokenalpha__ 179245386Swpaul /* 179345386Swpaul * From the Alteon sample driver: 179445386Swpaul * Must insure that we do not cross an 8K (bytes) boundary 179545386Swpaul * for DMA reads. Our highest limit is 1K bytes. This is a 179645386Swpaul * restriction on some ALPHA platforms with early revision 179745386Swpaul * 21174 PCI chipsets, such as the AlphaPC 164lx 179845386Swpaul */ 179945386Swpaul TI_SETBIT(sc, TI_PCI_STATE, pci_writemax|TI_PCI_READMAX_1024); 180045386Swpaul#else 180145386Swpaul TI_SETBIT(sc, TI_PCI_STATE, pci_writemax); 180245386Swpaul#endif 180345386Swpaul 180445386Swpaul /* This sets the min dma param all the way up (0xff). */ 180545386Swpaul TI_SETBIT(sc, TI_PCI_STATE, TI_PCISTATE_MINDMA); 180645386Swpaul 180798849Sken if (sc->ti_hdrsplit) 180898849Sken hdrsplit = TI_OPMODE_JUMBO_HDRSPLIT; 180998849Sken else 181098849Sken hdrsplit = 0; 181198849Sken 181245386Swpaul /* Configure DMA variables. */ 181345386Swpaul#if BYTE_ORDER == BIG_ENDIAN 181445386Swpaul CSR_WRITE_4(sc, TI_GCR_OPMODE, TI_OPMODE_BYTESWAP_BD | 181545386Swpaul TI_OPMODE_BYTESWAP_DATA | TI_OPMODE_WORDSWAP_BD | 181645386Swpaul TI_OPMODE_WARN_ENB | TI_OPMODE_FATAL_ENB | 181798849Sken TI_OPMODE_DONT_FRAG_JUMBO | hdrsplit); 181898849Sken#else /* BYTE_ORDER */ 181945386Swpaul CSR_WRITE_4(sc, TI_GCR_OPMODE, TI_OPMODE_BYTESWAP_DATA| 182045386Swpaul TI_OPMODE_WORDSWAP_BD|TI_OPMODE_DONT_FRAG_JUMBO| 182198849Sken TI_OPMODE_WARN_ENB|TI_OPMODE_FATAL_ENB | hdrsplit); 182298849Sken#endif /* BYTE_ORDER */ 182345386Swpaul 182445386Swpaul /* 182545386Swpaul * Only allow 1 DMA channel to be active at a time. 182645386Swpaul * I don't think this is a good idea, but without it 182745386Swpaul * the firmware racks up lots of nicDmaReadRingFull 182858698Sjlemon * errors. This is not compatible with hardware checksums. 182945386Swpaul */ 183058698Sjlemon if (sc->arpcom.ac_if.if_hwassist == 0) 183158698Sjlemon TI_SETBIT(sc, TI_GCR_OPMODE, TI_OPMODE_1_DMA_ACTIVE); 183245386Swpaul 183345386Swpaul /* Recommended settings from Tigon manual. */ 183445386Swpaul CSR_WRITE_4(sc, TI_GCR_DMA_WRITECFG, TI_DMA_STATE_THRESH_8W); 183545386Swpaul CSR_WRITE_4(sc, TI_GCR_DMA_READCFG, TI_DMA_STATE_THRESH_8W); 183645386Swpaul 183745386Swpaul if (ti_64bitslot_war(sc)) { 183845386Swpaul printf("ti%d: bios thinks we're in a 64 bit slot, " 183945386Swpaul "but we aren't", sc->ti_unit); 184045386Swpaul return(EINVAL); 184145386Swpaul } 184245386Swpaul 184345386Swpaul return(0); 184445386Swpaul} 184545386Swpaul 184645386Swpaul/* 184745386Swpaul * Initialize the general information block and firmware, and 184845386Swpaul * start the CPU(s) running. 184945386Swpaul */ 1850102336Salfredstatic int 1851102336Salfredti_gibinit(sc) 185245386Swpaul struct ti_softc *sc; 185345386Swpaul{ 185445386Swpaul struct ti_rcb *rcb; 185545386Swpaul int i; 185645386Swpaul struct ifnet *ifp; 185745386Swpaul 185845386Swpaul ifp = &sc->arpcom.ac_if; 185945386Swpaul 186045386Swpaul /* Disable interrupts for now. */ 186145386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1); 186245386Swpaul 186345386Swpaul /* Tell the chip where to find the general information block. */ 186445386Swpaul CSR_WRITE_4(sc, TI_GCR_GENINFO_HI, 0); 186545386Swpaul CSR_WRITE_4(sc, TI_GCR_GENINFO_LO, vtophys(&sc->ti_rdata->ti_info)); 186645386Swpaul 186745386Swpaul /* Load the firmware into SRAM. */ 186845386Swpaul ti_loadfw(sc); 186945386Swpaul 187045386Swpaul /* Set up the contents of the general info and ring control blocks. */ 187145386Swpaul 187245386Swpaul /* Set up the event ring and producer pointer. */ 187345386Swpaul rcb = &sc->ti_rdata->ti_info.ti_ev_rcb; 187445386Swpaul 187545386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = vtophys(&sc->ti_rdata->ti_event_ring); 187645386Swpaul rcb->ti_flags = 0; 187745386Swpaul TI_HOSTADDR(sc->ti_rdata->ti_info.ti_ev_prodidx_ptr) = 187845386Swpaul vtophys(&sc->ti_ev_prodidx); 187945386Swpaul sc->ti_ev_prodidx.ti_idx = 0; 188045386Swpaul CSR_WRITE_4(sc, TI_GCR_EVENTCONS_IDX, 0); 188145386Swpaul sc->ti_ev_saved_considx = 0; 188245386Swpaul 188345386Swpaul /* Set up the command ring and producer mailbox. */ 188445386Swpaul rcb = &sc->ti_rdata->ti_info.ti_cmd_rcb; 188545386Swpaul 188645386Swpaul sc->ti_rdata->ti_cmd_ring = 188749133Swpaul (struct ti_cmd_desc *)(sc->ti_vhandle + TI_GCR_CMDRING); 188845386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = TI_GCR_NIC_ADDR(TI_GCR_CMDRING); 188945386Swpaul rcb->ti_flags = 0; 189045386Swpaul rcb->ti_max_len = 0; 189145386Swpaul for (i = 0; i < TI_CMD_RING_CNT; i++) { 189245386Swpaul CSR_WRITE_4(sc, TI_GCR_CMDRING + (i * 4), 0); 189345386Swpaul } 189445386Swpaul CSR_WRITE_4(sc, TI_GCR_CMDCONS_IDX, 0); 189545386Swpaul CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, 0); 189645386Swpaul sc->ti_cmd_saved_prodidx = 0; 189745386Swpaul 189845386Swpaul /* 189945386Swpaul * Assign the address of the stats refresh buffer. 190045386Swpaul * We re-use the current stats buffer for this to 190145386Swpaul * conserve memory. 190245386Swpaul */ 190345386Swpaul TI_HOSTADDR(sc->ti_rdata->ti_info.ti_refresh_stats_ptr) = 190445386Swpaul vtophys(&sc->ti_rdata->ti_info.ti_stats); 190545386Swpaul 190645386Swpaul /* Set up the standard receive ring. */ 190745386Swpaul rcb = &sc->ti_rdata->ti_info.ti_std_rx_rcb; 190845386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = vtophys(&sc->ti_rdata->ti_rx_std_ring); 190945386Swpaul rcb->ti_max_len = TI_FRAMELEN; 191045386Swpaul rcb->ti_flags = 0; 191158698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 191258698Sjlemon rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM | 191358698Sjlemon TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; 191445386Swpaul rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; 191545386Swpaul 191645386Swpaul /* Set up the jumbo receive ring. */ 191745386Swpaul rcb = &sc->ti_rdata->ti_info.ti_jumbo_rx_rcb; 191845386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = 191945386Swpaul vtophys(&sc->ti_rdata->ti_rx_jumbo_ring); 192098849Sken 192198849Sken#ifdef TI_PRIVATE_JUMBOS 192249036Swpaul rcb->ti_max_len = TI_JUMBO_FRAMELEN; 192345386Swpaul rcb->ti_flags = 0; 192498849Sken#else 192598849Sken rcb->ti_max_len = PAGE_SIZE; 192698849Sken rcb->ti_flags = TI_RCB_FLAG_USE_EXT_RX_BD; 192798849Sken#endif 192858698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 192958698Sjlemon rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM | 193058698Sjlemon TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; 193145386Swpaul rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; 193245386Swpaul 193345386Swpaul /* 193445386Swpaul * Set up the mini ring. Only activated on the 193545386Swpaul * Tigon 2 but the slot in the config block is 193645386Swpaul * still there on the Tigon 1. 193745386Swpaul */ 193845386Swpaul rcb = &sc->ti_rdata->ti_info.ti_mini_rx_rcb; 193945386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = 194045386Swpaul vtophys(&sc->ti_rdata->ti_rx_mini_ring); 194151352Swpaul rcb->ti_max_len = MHLEN - ETHER_ALIGN; 194245386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) 194345386Swpaul rcb->ti_flags = TI_RCB_FLAG_RING_DISABLED; 194445386Swpaul else 194545386Swpaul rcb->ti_flags = 0; 194658698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 194758698Sjlemon rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM | 194858698Sjlemon TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; 194945386Swpaul rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; 195045386Swpaul 195145386Swpaul /* 195245386Swpaul * Set up the receive return ring. 195345386Swpaul */ 195445386Swpaul rcb = &sc->ti_rdata->ti_info.ti_return_rcb; 195545386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = 195645386Swpaul vtophys(&sc->ti_rdata->ti_rx_return_ring); 195745386Swpaul rcb->ti_flags = 0; 195845386Swpaul rcb->ti_max_len = TI_RETURN_RING_CNT; 195945386Swpaul TI_HOSTADDR(sc->ti_rdata->ti_info.ti_return_prodidx_ptr) = 196045386Swpaul vtophys(&sc->ti_return_prodidx); 196145386Swpaul 196245386Swpaul /* 196345386Swpaul * Set up the tx ring. Note: for the Tigon 2, we have the option 196445386Swpaul * of putting the transmit ring in the host's address space and 196545386Swpaul * letting the chip DMA it instead of leaving the ring in the NIC's 196645386Swpaul * memory and accessing it through the shared memory region. We 196745386Swpaul * do this for the Tigon 2, but it doesn't work on the Tigon 1, 196845386Swpaul * so we have to revert to the shared memory scheme if we detect 196945386Swpaul * a Tigon 1 chip. 197045386Swpaul */ 197145386Swpaul CSR_WRITE_4(sc, TI_WINBASE, TI_TX_RING_BASE); 197245386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) { 197345386Swpaul sc->ti_rdata->ti_tx_ring_nic = 197449133Swpaul (struct ti_tx_desc *)(sc->ti_vhandle + TI_WINDOW); 197545386Swpaul } 197645386Swpaul bzero((char *)sc->ti_rdata->ti_tx_ring, 197745386Swpaul TI_TX_RING_CNT * sizeof(struct ti_tx_desc)); 197845386Swpaul rcb = &sc->ti_rdata->ti_info.ti_tx_rcb; 197945386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) 198045386Swpaul rcb->ti_flags = 0; 198145386Swpaul else 198245386Swpaul rcb->ti_flags = TI_RCB_FLAG_HOST_RING; 198345386Swpaul rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; 198458698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 198558698Sjlemon rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM | 198658698Sjlemon TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; 198745386Swpaul rcb->ti_max_len = TI_TX_RING_CNT; 198845386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) 198945386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = TI_TX_RING_BASE; 199045386Swpaul else 199145386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = 199245386Swpaul vtophys(&sc->ti_rdata->ti_tx_ring); 199345386Swpaul TI_HOSTADDR(sc->ti_rdata->ti_info.ti_tx_considx_ptr) = 199445386Swpaul vtophys(&sc->ti_tx_considx); 199545386Swpaul 199645386Swpaul /* Set up tuneables */ 199798849Sken#if 0 199845386Swpaul if (ifp->if_mtu > (ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN)) 199945386Swpaul CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS, 200045386Swpaul (sc->ti_rx_coal_ticks / 10)); 200145386Swpaul else 200298849Sken#endif 200345386Swpaul CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS, sc->ti_rx_coal_ticks); 200445386Swpaul CSR_WRITE_4(sc, TI_GCR_TX_COAL_TICKS, sc->ti_tx_coal_ticks); 200545386Swpaul CSR_WRITE_4(sc, TI_GCR_STAT_TICKS, sc->ti_stat_ticks); 200645386Swpaul CSR_WRITE_4(sc, TI_GCR_RX_MAX_COAL_BD, sc->ti_rx_max_coal_bds); 200745386Swpaul CSR_WRITE_4(sc, TI_GCR_TX_MAX_COAL_BD, sc->ti_tx_max_coal_bds); 200845386Swpaul CSR_WRITE_4(sc, TI_GCR_TX_BUFFER_RATIO, sc->ti_tx_buf_ratio); 200945386Swpaul 201045386Swpaul /* Turn interrupts on. */ 201145386Swpaul CSR_WRITE_4(sc, TI_GCR_MASK_INTRS, 0); 201245386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0); 201345386Swpaul 201445386Swpaul /* Start CPU. */ 201545386Swpaul TI_CLRBIT(sc, TI_CPU_STATE, (TI_CPUSTATE_HALT|TI_CPUSTATE_STEP)); 201645386Swpaul 201745386Swpaul return(0); 201845386Swpaul} 201945386Swpaul 202045386Swpaul/* 202145386Swpaul * Probe for a Tigon chip. Check the PCI vendor and device IDs 202245386Swpaul * against our list and return its name if we find a match. 202345386Swpaul */ 2024102336Salfredstatic int 2025102336Salfredti_probe(dev) 202649011Swpaul device_t dev; 202745386Swpaul{ 202845386Swpaul struct ti_type *t; 202945386Swpaul 203045386Swpaul t = ti_devs; 203145386Swpaul 203245386Swpaul while(t->ti_name != NULL) { 203349011Swpaul if ((pci_get_vendor(dev) == t->ti_vid) && 203449011Swpaul (pci_get_device(dev) == t->ti_did)) { 203549011Swpaul device_set_desc(dev, t->ti_name); 203649011Swpaul return(0); 203749011Swpaul } 203845386Swpaul t++; 203945386Swpaul } 204045386Swpaul 204149011Swpaul return(ENXIO); 204245386Swpaul} 204345386Swpaul 204498849Skenstatic int 2045102336Salfredti_attach(dev) 204649011Swpaul device_t dev; 204745386Swpaul{ 204845386Swpaul struct ifnet *ifp; 204945386Swpaul struct ti_softc *sc; 205049011Swpaul int unit, error = 0, rid; 205145386Swpaul 205249011Swpaul sc = device_get_softc(dev); 205349011Swpaul unit = device_get_unit(dev); 205445386Swpaul 205593818Sjhb mtx_init(&sc->ti_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 205693818Sjhb MTX_DEF | MTX_RECURSE); 2057113609Snjl ifmedia_init(&sc->ifmedia, IFM_IMASK, ti_ifmedia_upd, ti_ifmedia_sts); 2058118454Ssimokawa sc->arpcom.ac_if.if_capabilities = IFCAP_HWCSUM | 2059118454Ssimokawa IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU; 206083630Sjlemon sc->arpcom.ac_if.if_capenable = sc->arpcom.ac_if.if_capabilities; 206169583Swpaul 206245386Swpaul /* 206345386Swpaul * Map control/status registers. 206445386Swpaul */ 206572813Swpaul pci_enable_busmaster(dev); 206645386Swpaul 206749011Swpaul rid = TI_PCI_LOMEM; 2068127135Snjl sc->ti_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 2069127135Snjl RF_ACTIVE|PCI_RF_DENSE); 207049011Swpaul 207149011Swpaul if (sc->ti_res == NULL) { 207245386Swpaul printf ("ti%d: couldn't map memory\n", unit); 207349011Swpaul error = ENXIO; 207445386Swpaul goto fail; 207545386Swpaul } 207645386Swpaul 207749035Swpaul sc->ti_btag = rman_get_bustag(sc->ti_res); 207849035Swpaul sc->ti_bhandle = rman_get_bushandle(sc->ti_res); 207949133Swpaul sc->ti_vhandle = (vm_offset_t)rman_get_virtual(sc->ti_res); 208049035Swpaul 208149011Swpaul /* Allocate interrupt */ 208249011Swpaul rid = 0; 208349133Swpaul 2084127135Snjl sc->ti_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 208549011Swpaul RF_SHAREABLE | RF_ACTIVE); 208645386Swpaul 208749011Swpaul if (sc->ti_irq == NULL) { 208849011Swpaul printf("ti%d: couldn't map interrupt\n", unit); 208949011Swpaul error = ENXIO; 209045386Swpaul goto fail; 209145386Swpaul } 209245386Swpaul 209345386Swpaul sc->ti_unit = unit; 209445386Swpaul 209545386Swpaul if (ti_chipinit(sc)) { 209645386Swpaul printf("ti%d: chip initialization failed\n", sc->ti_unit); 209749011Swpaul error = ENXIO; 209845386Swpaul goto fail; 209945386Swpaul } 210045386Swpaul 210145386Swpaul /* Zero out the NIC's on-board SRAM. */ 210245386Swpaul ti_mem(sc, 0x2000, 0x100000 - 0x2000, NULL); 210345386Swpaul 210445386Swpaul /* Init again -- zeroing memory may have clobbered some registers. */ 210545386Swpaul if (ti_chipinit(sc)) { 210645386Swpaul printf("ti%d: chip initialization failed\n", sc->ti_unit); 210749011Swpaul error = ENXIO; 210845386Swpaul goto fail; 210945386Swpaul } 211045386Swpaul 211145386Swpaul /* 211245386Swpaul * Get station address from the EEPROM. Note: the manual states 211345386Swpaul * that the MAC address is at offset 0x8c, however the data is 211445386Swpaul * stored as two longwords (since that's how it's loaded into 211572645Sasmodai * the NIC). This means the MAC address is actually preceded 211645386Swpaul * by two zero bytes. We need to skip over those. 211745386Swpaul */ 211845386Swpaul if (ti_read_eeprom(sc, (caddr_t)&sc->arpcom.ac_enaddr, 211945386Swpaul TI_EE_MAC_OFFSET + 2, ETHER_ADDR_LEN)) { 212045386Swpaul printf("ti%d: failed to read station address\n", unit); 212149011Swpaul error = ENXIO; 212245386Swpaul goto fail; 212345386Swpaul } 212445386Swpaul 212545386Swpaul /* Allocate the general information block and ring buffers. */ 212649011Swpaul sc->ti_rdata = contigmalloc(sizeof(struct ti_ring_data), M_DEVBUF, 212750548Sbde M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); 212845386Swpaul 212949011Swpaul if (sc->ti_rdata == NULL) { 2130112872Snjl printf("ti%d: no memory for list buffers!\n", sc->ti_unit); 213149011Swpaul error = ENXIO; 213245386Swpaul goto fail; 213345386Swpaul } 213445386Swpaul 213545386Swpaul bzero(sc->ti_rdata, sizeof(struct ti_ring_data)); 213645386Swpaul 213745386Swpaul /* Try to allocate memory for jumbo buffers. */ 213898849Sken#ifdef TI_PRIVATE_JUMBOS 213945386Swpaul if (ti_alloc_jumbo_mem(sc)) { 214045386Swpaul printf("ti%d: jumbo buffer allocation failed\n", sc->ti_unit); 214149011Swpaul error = ENXIO; 214245386Swpaul goto fail; 214345386Swpaul } 214498849Sken#else 214598849Sken if (!jumbo_vm_init()) { 214698849Sken printf("ti%d: VM initialization failed!\n", sc->ti_unit); 214798849Sken error = ENOMEM; 214898849Sken goto fail; 214998849Sken } 215098849Sken#endif 215145386Swpaul 215263699Swpaul /* 215363699Swpaul * We really need a better way to tell a 1000baseTX card 215463699Swpaul * from a 1000baseSX one, since in theory there could be 215563699Swpaul * OEMed 1000baseTX cards from lame vendors who aren't 215663699Swpaul * clever enough to change the PCI ID. For the moment 215763699Swpaul * though, the AceNIC is the only copper card available. 215863699Swpaul */ 215963699Swpaul if (pci_get_vendor(dev) == ALT_VENDORID && 216063699Swpaul pci_get_device(dev) == ALT_DEVICEID_ACENIC_COPPER) 216163699Swpaul sc->ti_copper = 1; 216264139Swpaul /* Ok, it's not the only copper card available. */ 216364139Swpaul if (pci_get_vendor(dev) == NG_VENDORID && 216464139Swpaul pci_get_device(dev) == NG_DEVICEID_GA620T) 216564139Swpaul sc->ti_copper = 1; 216663699Swpaul 216745386Swpaul /* Set default tuneable values. */ 216845386Swpaul sc->ti_stat_ticks = 2 * TI_TICKS_PER_SEC; 216998849Sken#if 0 217045386Swpaul sc->ti_rx_coal_ticks = TI_TICKS_PER_SEC / 5000; 217198849Sken#endif 217298849Sken sc->ti_rx_coal_ticks = 170; 217345386Swpaul sc->ti_tx_coal_ticks = TI_TICKS_PER_SEC / 500; 217445386Swpaul sc->ti_rx_max_coal_bds = 64; 217598849Sken#if 0 217645386Swpaul sc->ti_tx_max_coal_bds = 128; 217798849Sken#endif 217898849Sken sc->ti_tx_max_coal_bds = 32; 217945386Swpaul sc->ti_tx_buf_ratio = 21; 218045386Swpaul 218145386Swpaul /* Set up ifnet structure */ 218245386Swpaul ifp = &sc->arpcom.ac_if; 218345386Swpaul ifp->if_softc = sc; 2184121816Sbrooks if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 218545386Swpaul ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 218698849Sken tis[unit] = sc; 218745386Swpaul ifp->if_ioctl = ti_ioctl; 218845386Swpaul ifp->if_start = ti_start; 218945386Swpaul ifp->if_watchdog = ti_watchdog; 219045386Swpaul ifp->if_init = ti_init; 219145386Swpaul ifp->if_mtu = ETHERMTU; 219245386Swpaul ifp->if_snd.ifq_maxlen = TI_TX_RING_CNT - 1; 219345386Swpaul 219445386Swpaul /* Set up ifmedia support. */ 219563699Swpaul if (sc->ti_copper) { 219663699Swpaul /* 219763699Swpaul * Copper cards allow manual 10/100 mode selection, 219863699Swpaul * but not manual 1000baseTX mode selection. Why? 219963699Swpaul * Becuase currently there's no way to specify the 220063699Swpaul * master/slave setting through the firmware interface, 220163699Swpaul * so Alteon decided to just bag it and handle it 220263699Swpaul * via autonegotiation. 220363699Swpaul */ 220463699Swpaul ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T, 0, NULL); 220563699Swpaul ifmedia_add(&sc->ifmedia, 220663699Swpaul IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); 220763699Swpaul ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL); 220863699Swpaul ifmedia_add(&sc->ifmedia, 220963699Swpaul IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL); 221095673Sphk ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_1000_T, 0, NULL); 221163699Swpaul ifmedia_add(&sc->ifmedia, 221295673Sphk IFM_ETHER|IFM_1000_T|IFM_FDX, 0, NULL); 221363699Swpaul } else { 221463699Swpaul /* Fiber cards don't support 10/100 modes. */ 221563699Swpaul ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_1000_SX, 0, NULL); 221663699Swpaul ifmedia_add(&sc->ifmedia, 221763699Swpaul IFM_ETHER|IFM_1000_SX|IFM_FDX, 0, NULL); 221863699Swpaul } 221945386Swpaul ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL); 222045386Swpaul ifmedia_set(&sc->ifmedia, IFM_ETHER|IFM_AUTO); 222145386Swpaul 222245386Swpaul /* 222398849Sken * We're assuming here that card initialization is a sequential 222498849Sken * thing. If it isn't, multiple cards probing at the same time 222598849Sken * could stomp on the list of softcs here. 222698849Sken */ 222798849Sken 222898849Sken /* Register the device */ 222998849Sken sc->dev = make_dev(&ti_cdevsw, sc->ti_unit, UID_ROOT, GID_OPERATOR, 223098849Sken 0600, "ti%d", sc->ti_unit); 2231120980Sphk sc->dev->si_drv1 = sc; 223298849Sken 223398849Sken /* 223463090Sarchie * Call MI attach routine. 223545386Swpaul */ 2236106936Ssam ether_ifattach(ifp, sc->arpcom.ac_enaddr); 223745386Swpaul 2238113609Snjl /* Hook interrupt last to avoid having to lock softc */ 2239112872Snjl error = bus_setup_intr(dev, sc->ti_irq, INTR_TYPE_NET, 2240112872Snjl ti_intr, sc, &sc->ti_intrhand); 2241112872Snjl 2242112872Snjl if (error) { 2243112872Snjl printf("ti%d: couldn't set up irq\n", unit); 2244113609Snjl ether_ifdetach(ifp); 2245112872Snjl goto fail; 2246112872Snjl } 2247112872Snjl 224845386Swpaulfail: 2249112872Snjl if (sc && error) 2250112872Snjl ti_detach(dev); 2251112872Snjl 225249011Swpaul return(error); 225345386Swpaul} 225445386Swpaul 225598849Sken/* 2256113609Snjl * Shutdown hardware and free up resources. This can be called any 2257113609Snjl * time after the mutex has been initialized. It is called in both 2258113609Snjl * the error case in attach and the normal detach case so it needs 2259113609Snjl * to be careful about only freeing resources that have actually been 2260113609Snjl * allocated. 2261113609Snjl */ 2262102336Salfredstatic int 2263102336Salfredti_detach(dev) 226449011Swpaul device_t dev; 226549011Swpaul{ 226649011Swpaul struct ti_softc *sc; 226749011Swpaul struct ifnet *ifp; 226849011Swpaul 226949011Swpaul sc = device_get_softc(dev); 2270120980Sphk destroy_dev(sc->dev); 2271112930Sphk KASSERT(mtx_initialized(&sc->ti_mtx), ("ti mutex not initialized")); 227267087Swpaul TI_LOCK(sc); 227349011Swpaul ifp = &sc->arpcom.ac_if; 227449011Swpaul 2275113609Snjl /* These should only be active if attach succeeded */ 2276113812Simp if (device_is_attached(dev)) { 2277113609Snjl ti_stop(sc); 2278112872Snjl ether_ifdetach(ifp); 2279112872Snjl bus_generic_detach(dev); 2280112872Snjl } 2281113609Snjl ifmedia_removeall(&sc->ifmedia); 228249011Swpaul 2283112872Snjl if (sc->ti_intrhand) 2284112872Snjl bus_teardown_intr(dev, sc->ti_irq, sc->ti_intrhand); 2285112872Snjl if (sc->ti_irq) 2286112872Snjl bus_release_resource(dev, SYS_RES_IRQ, 0, sc->ti_irq); 2287112872Snjl if (sc->ti_res) { 2288112872Snjl bus_release_resource(dev, SYS_RES_MEMORY, TI_PCI_LOMEM, 2289112872Snjl sc->ti_res); 2290112872Snjl } 229149011Swpaul 229298849Sken#ifdef TI_PRIVATE_JUMBOS 2293112872Snjl if (sc->ti_cdata.ti_jumbo_buf) 2294112872Snjl contigfree(sc->ti_cdata.ti_jumbo_buf, TI_JMEM, M_DEVBUF); 229598849Sken#endif 2296112872Snjl if (sc->ti_rdata) 2297112872Snjl contigfree(sc->ti_rdata, sizeof(struct ti_ring_data), M_DEVBUF); 229849011Swpaul 229967087Swpaul TI_UNLOCK(sc); 230067087Swpaul mtx_destroy(&sc->ti_mtx); 230149011Swpaul 230249011Swpaul return(0); 230349011Swpaul} 230449011Swpaul 230598849Sken#ifdef TI_JUMBO_HDRSPLIT 230645386Swpaul/* 230798849Sken * If hdr_len is 0, that means that header splitting wasn't done on 230898849Sken * this packet for some reason. The two most likely reasons are that 230998849Sken * the protocol isn't a supported protocol for splitting, or this 231098849Sken * packet had a fragment offset that wasn't 0. 231198849Sken * 231298849Sken * The header length, if it is non-zero, will always be the length of 231398849Sken * the headers on the packet, but that length could be longer than the 231498849Sken * first mbuf. So we take the minimum of the two as the actual 231598849Sken * length. 231698849Sken */ 231798849Skenstatic __inline void 231898849Skenti_hdr_split(struct mbuf *top, int hdr_len, int pkt_len, int idx) 231998849Sken{ 232098849Sken int i = 0; 232198849Sken int lengths[4] = {0, 0, 0, 0}; 232298849Sken struct mbuf *m, *mp; 232398849Sken 232498849Sken if (hdr_len != 0) 232598849Sken top->m_len = min(hdr_len, top->m_len); 232698849Sken pkt_len -= top->m_len; 232798849Sken lengths[i++] = top->m_len; 232898849Sken 232998849Sken mp = top; 233098849Sken for (m = top->m_next; m && pkt_len; m = m->m_next) { 233198849Sken m->m_len = m->m_ext.ext_size = min(m->m_len, pkt_len); 233298849Sken pkt_len -= m->m_len; 233398849Sken lengths[i++] = m->m_len; 233498849Sken mp = m; 233598849Sken } 233698849Sken 233798849Sken#if 0 233898849Sken if (hdr_len != 0) 233998849Sken printf("got split packet: "); 234098849Sken else 234198849Sken printf("got non-split packet: "); 234298849Sken 234398849Sken printf("%d,%d,%d,%d = %d\n", lengths[0], 234498849Sken lengths[1], lengths[2], lengths[3], 234598849Sken lengths[0] + lengths[1] + lengths[2] + 234698849Sken lengths[3]); 234798849Sken#endif 234898849Sken 234998849Sken if (pkt_len) 235098849Sken panic("header splitting didn't"); 235198849Sken 235298849Sken if (m) { 235398849Sken m_freem(m); 235498849Sken mp->m_next = NULL; 235598849Sken 235698849Sken } 235798849Sken if (mp->m_next != NULL) 235898849Sken panic("ti_hdr_split: last mbuf in chain should be null"); 235998849Sken} 236098849Sken#endif /* TI_JUMBO_HDRSPLIT */ 236198849Sken 236298849Sken/* 236345386Swpaul * Frame reception handling. This is called if there's a frame 236445386Swpaul * on the receive return list. 236545386Swpaul * 236645386Swpaul * Note: we have to be able to handle three possibilities here: 236745386Swpaul * 1) the frame is from the mini receive ring (can only happen) 236845386Swpaul * on Tigon 2 boards) 236945386Swpaul * 2) the frame is from the jumbo recieve ring 237045386Swpaul * 3) the frame is from the standard receive ring 237145386Swpaul */ 237245386Swpaul 2373102336Salfredstatic void 2374102336Salfredti_rxeof(sc) 237545386Swpaul struct ti_softc *sc; 237645386Swpaul{ 237745386Swpaul struct ifnet *ifp; 237848597Swpaul struct ti_cmd_desc cmd; 237945386Swpaul 2380122689Ssam TI_LOCK_ASSERT(sc); 2381122689Ssam 238245386Swpaul ifp = &sc->arpcom.ac_if; 238345386Swpaul 238445386Swpaul while(sc->ti_rx_saved_considx != sc->ti_return_prodidx.ti_idx) { 238545386Swpaul struct ti_rx_desc *cur_rx; 238645386Swpaul u_int32_t rxidx; 238745386Swpaul struct mbuf *m = NULL; 238845386Swpaul u_int16_t vlan_tag = 0; 238945386Swpaul int have_tag = 0; 239045386Swpaul 239145386Swpaul cur_rx = 239245386Swpaul &sc->ti_rdata->ti_rx_return_ring[sc->ti_rx_saved_considx]; 239345386Swpaul rxidx = cur_rx->ti_idx; 239445386Swpaul TI_INC(sc->ti_rx_saved_considx, TI_RETURN_RING_CNT); 239545386Swpaul 239645386Swpaul if (cur_rx->ti_flags & TI_BDFLAG_VLAN_TAG) { 239745386Swpaul have_tag = 1; 239877058Sphk vlan_tag = cur_rx->ti_vlan_tag & 0xfff; 239945386Swpaul } 240045386Swpaul 240145386Swpaul if (cur_rx->ti_flags & TI_BDFLAG_JUMBO_RING) { 240298849Sken 240345386Swpaul TI_INC(sc->ti_jumbo, TI_JUMBO_RX_RING_CNT); 240445386Swpaul m = sc->ti_cdata.ti_rx_jumbo_chain[rxidx]; 240545386Swpaul sc->ti_cdata.ti_rx_jumbo_chain[rxidx] = NULL; 240645386Swpaul if (cur_rx->ti_flags & TI_BDFLAG_ERROR) { 240745386Swpaul ifp->if_ierrors++; 240845386Swpaul ti_newbuf_jumbo(sc, sc->ti_jumbo, m); 240945386Swpaul continue; 241045386Swpaul } 241148597Swpaul if (ti_newbuf_jumbo(sc, sc->ti_jumbo, NULL) == ENOBUFS) { 241248597Swpaul ifp->if_ierrors++; 241348597Swpaul ti_newbuf_jumbo(sc, sc->ti_jumbo, m); 241448597Swpaul continue; 241548597Swpaul } 241698849Sken#ifdef TI_PRIVATE_JUMBOS 241798849Sken m->m_len = cur_rx->ti_len; 241898849Sken#else /* TI_PRIVATE_JUMBOS */ 241998849Sken#ifdef TI_JUMBO_HDRSPLIT 242098849Sken if (sc->ti_hdrsplit) 242198849Sken ti_hdr_split(m, TI_HOSTADDR(cur_rx->ti_addr), 242298849Sken cur_rx->ti_len, rxidx); 242398849Sken else 242498849Sken#endif /* TI_JUMBO_HDRSPLIT */ 242598849Sken m_adj(m, cur_rx->ti_len - m->m_pkthdr.len); 242698849Sken#endif /* TI_PRIVATE_JUMBOS */ 242745386Swpaul } else if (cur_rx->ti_flags & TI_BDFLAG_MINI_RING) { 242845386Swpaul TI_INC(sc->ti_mini, TI_MINI_RX_RING_CNT); 242945386Swpaul m = sc->ti_cdata.ti_rx_mini_chain[rxidx]; 243045386Swpaul sc->ti_cdata.ti_rx_mini_chain[rxidx] = NULL; 243145386Swpaul if (cur_rx->ti_flags & TI_BDFLAG_ERROR) { 243245386Swpaul ifp->if_ierrors++; 243345386Swpaul ti_newbuf_mini(sc, sc->ti_mini, m); 243445386Swpaul continue; 243545386Swpaul } 243648597Swpaul if (ti_newbuf_mini(sc, sc->ti_mini, NULL) == ENOBUFS) { 243748597Swpaul ifp->if_ierrors++; 243848597Swpaul ti_newbuf_mini(sc, sc->ti_mini, m); 243948597Swpaul continue; 244048597Swpaul } 244198849Sken m->m_len = cur_rx->ti_len; 244245386Swpaul } else { 244345386Swpaul TI_INC(sc->ti_std, TI_STD_RX_RING_CNT); 244445386Swpaul m = sc->ti_cdata.ti_rx_std_chain[rxidx]; 244545386Swpaul sc->ti_cdata.ti_rx_std_chain[rxidx] = NULL; 244645386Swpaul if (cur_rx->ti_flags & TI_BDFLAG_ERROR) { 244745386Swpaul ifp->if_ierrors++; 244845386Swpaul ti_newbuf_std(sc, sc->ti_std, m); 244945386Swpaul continue; 245045386Swpaul } 245148597Swpaul if (ti_newbuf_std(sc, sc->ti_std, NULL) == ENOBUFS) { 245248597Swpaul ifp->if_ierrors++; 245348597Swpaul ti_newbuf_std(sc, sc->ti_std, m); 245448597Swpaul continue; 245548597Swpaul } 245698849Sken m->m_len = cur_rx->ti_len; 245745386Swpaul } 245845386Swpaul 245998849Sken m->m_pkthdr.len = cur_rx->ti_len; 246045386Swpaul ifp->if_ipackets++; 246145386Swpaul m->m_pkthdr.rcvif = ifp; 246245386Swpaul 246358698Sjlemon if (ifp->if_hwassist) { 246458698Sjlemon m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | 246558698Sjlemon CSUM_DATA_VALID; 246658698Sjlemon if ((cur_rx->ti_ip_cksum ^ 0xffff) == 0) 246758698Sjlemon m->m_pkthdr.csum_flags |= CSUM_IP_VALID; 246858698Sjlemon m->m_pkthdr.csum_data = cur_rx->ti_tcp_udp_cksum; 246958698Sjlemon } 247045386Swpaul 247145386Swpaul /* 2472106936Ssam * If we received a packet with a vlan tag, 2473106936Ssam * tag it before passing the packet upward. 247445386Swpaul */ 2475106936Ssam if (have_tag) 2476106936Ssam VLAN_INPUT_TAG(ifp, m, vlan_tag, continue); 2477122689Ssam TI_UNLOCK(sc); 2478106936Ssam (*ifp->if_input)(ifp, m); 2479122689Ssam TI_LOCK(sc); 248045386Swpaul } 248145386Swpaul 248245386Swpaul /* Only necessary on the Tigon 1. */ 248345386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) 248445386Swpaul CSR_WRITE_4(sc, TI_GCR_RXRETURNCONS_IDX, 248545386Swpaul sc->ti_rx_saved_considx); 248645386Swpaul 248748597Swpaul TI_UPDATE_STDPROD(sc, sc->ti_std); 248848597Swpaul TI_UPDATE_MINIPROD(sc, sc->ti_mini); 248948597Swpaul TI_UPDATE_JUMBOPROD(sc, sc->ti_jumbo); 249045386Swpaul 249145386Swpaul return; 249245386Swpaul} 249345386Swpaul 2494102336Salfredstatic void 2495102336Salfredti_txeof(sc) 249645386Swpaul struct ti_softc *sc; 249745386Swpaul{ 249845386Swpaul struct ti_tx_desc *cur_tx = NULL; 249945386Swpaul struct ifnet *ifp; 250045386Swpaul 250145386Swpaul ifp = &sc->arpcom.ac_if; 250245386Swpaul 250345386Swpaul /* 250445386Swpaul * Go through our tx ring and free mbufs for those 250545386Swpaul * frames that have been sent. 250645386Swpaul */ 250745386Swpaul while (sc->ti_tx_saved_considx != sc->ti_tx_considx.ti_idx) { 250845386Swpaul u_int32_t idx = 0; 250945386Swpaul 251045386Swpaul idx = sc->ti_tx_saved_considx; 251145386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) { 251245386Swpaul if (idx > 383) 251345386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 251445386Swpaul TI_TX_RING_BASE + 6144); 251545386Swpaul else if (idx > 255) 251645386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 251745386Swpaul TI_TX_RING_BASE + 4096); 251845386Swpaul else if (idx > 127) 251945386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 252045386Swpaul TI_TX_RING_BASE + 2048); 252145386Swpaul else 252245386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 252345386Swpaul TI_TX_RING_BASE); 252445386Swpaul cur_tx = &sc->ti_rdata->ti_tx_ring_nic[idx % 128]; 252545386Swpaul } else 252645386Swpaul cur_tx = &sc->ti_rdata->ti_tx_ring[idx]; 252745386Swpaul if (cur_tx->ti_flags & TI_BDFLAG_END) 252845386Swpaul ifp->if_opackets++; 252945386Swpaul if (sc->ti_cdata.ti_tx_chain[idx] != NULL) { 253045386Swpaul m_freem(sc->ti_cdata.ti_tx_chain[idx]); 253145386Swpaul sc->ti_cdata.ti_tx_chain[idx] = NULL; 253245386Swpaul } 253348011Swpaul sc->ti_txcnt--; 253445386Swpaul TI_INC(sc->ti_tx_saved_considx, TI_TX_RING_CNT); 253545386Swpaul ifp->if_timer = 0; 253645386Swpaul } 253745386Swpaul 253845386Swpaul if (cur_tx != NULL) 253945386Swpaul ifp->if_flags &= ~IFF_OACTIVE; 254045386Swpaul 254145386Swpaul return; 254245386Swpaul} 254345386Swpaul 2544102336Salfredstatic void 2545102336Salfredti_intr(xsc) 254645386Swpaul void *xsc; 254745386Swpaul{ 254845386Swpaul struct ti_softc *sc; 254945386Swpaul struct ifnet *ifp; 255045386Swpaul 255145386Swpaul sc = xsc; 255267087Swpaul TI_LOCK(sc); 255345386Swpaul ifp = &sc->arpcom.ac_if; 255445386Swpaul 255598849Sken/*#ifdef notdef*/ 255645386Swpaul /* Avoid this for now -- checking this register is expensive. */ 255745386Swpaul /* Make sure this is really our interrupt. */ 255867087Swpaul if (!(CSR_READ_4(sc, TI_MISC_HOST_CTL) & TI_MHC_INTSTATE)) { 255967087Swpaul TI_UNLOCK(sc); 256045386Swpaul return; 256167087Swpaul } 256298849Sken/*#endif*/ 256345386Swpaul 256445386Swpaul /* Ack interrupt and stop others from occuring. */ 256545386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1); 256645386Swpaul 256745386Swpaul if (ifp->if_flags & IFF_RUNNING) { 256845386Swpaul /* Check RX return ring producer/consumer */ 256945386Swpaul ti_rxeof(sc); 257045386Swpaul 257145386Swpaul /* Check TX ring producer/consumer */ 257245386Swpaul ti_txeof(sc); 257345386Swpaul } 257445386Swpaul 257545386Swpaul ti_handle_events(sc); 257645386Swpaul 257745386Swpaul /* Re-enable interrupts. */ 257845386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0); 257945386Swpaul 258045386Swpaul if (ifp->if_flags & IFF_RUNNING && ifp->if_snd.ifq_head != NULL) 258145386Swpaul ti_start(ifp); 258245386Swpaul 258367087Swpaul TI_UNLOCK(sc); 258467087Swpaul 258545386Swpaul return; 258645386Swpaul} 258745386Swpaul 2588102336Salfredstatic void 2589102336Salfredti_stats_update(sc) 259045386Swpaul struct ti_softc *sc; 259145386Swpaul{ 259245386Swpaul struct ifnet *ifp; 259345386Swpaul 259445386Swpaul ifp = &sc->arpcom.ac_if; 259545386Swpaul 259645386Swpaul ifp->if_collisions += 259745386Swpaul (sc->ti_rdata->ti_info.ti_stats.dot3StatsSingleCollisionFrames + 259845386Swpaul sc->ti_rdata->ti_info.ti_stats.dot3StatsMultipleCollisionFrames + 259945386Swpaul sc->ti_rdata->ti_info.ti_stats.dot3StatsExcessiveCollisions + 260045386Swpaul sc->ti_rdata->ti_info.ti_stats.dot3StatsLateCollisions) - 260145386Swpaul ifp->if_collisions; 260245386Swpaul 260345386Swpaul return; 260445386Swpaul} 260545386Swpaul 260645386Swpaul/* 260745386Swpaul * Encapsulate an mbuf chain in the tx ring by coupling the mbuf data 260845386Swpaul * pointers to descriptors. 260945386Swpaul */ 2610102336Salfredstatic int 2611102336Salfredti_encap(sc, m_head, txidx) 261245386Swpaul struct ti_softc *sc; 261345386Swpaul struct mbuf *m_head; 261445386Swpaul u_int32_t *txidx; 261545386Swpaul{ 261645386Swpaul struct ti_tx_desc *f = NULL; 261745386Swpaul struct mbuf *m; 261848011Swpaul u_int32_t frag, cur, cnt = 0; 261958698Sjlemon u_int16_t csum_flags = 0; 2620106936Ssam struct m_tag *mtag; 262145386Swpaul 262245386Swpaul m = m_head; 262345386Swpaul cur = frag = *txidx; 262445386Swpaul 262558698Sjlemon if (m_head->m_pkthdr.csum_flags) { 262658698Sjlemon if (m_head->m_pkthdr.csum_flags & CSUM_IP) 262758698Sjlemon csum_flags |= TI_BDFLAG_IP_CKSUM; 262858698Sjlemon if (m_head->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP)) 262958698Sjlemon csum_flags |= TI_BDFLAG_TCP_UDP_CKSUM; 263058698Sjlemon if (m_head->m_flags & M_LASTFRAG) 263158698Sjlemon csum_flags |= TI_BDFLAG_IP_FRAG_END; 263258698Sjlemon else if (m_head->m_flags & M_FRAG) 263358698Sjlemon csum_flags |= TI_BDFLAG_IP_FRAG; 263458698Sjlemon } 2635106936Ssam 2636106936Ssam mtag = VLAN_OUTPUT_TAG(&sc->arpcom.ac_if, m); 2637106936Ssam 263845386Swpaul /* 263945386Swpaul * Start packing the mbufs in this chain into 264045386Swpaul * the fragment pointers. Stop when we run out 264145386Swpaul * of fragments or hit the end of the mbuf chain. 264245386Swpaul */ 264345386Swpaul for (m = m_head; m != NULL; m = m->m_next) { 264445386Swpaul if (m->m_len != 0) { 264545386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) { 264645386Swpaul if (frag > 383) 264745386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 264845386Swpaul TI_TX_RING_BASE + 6144); 264945386Swpaul else if (frag > 255) 265045386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 265145386Swpaul TI_TX_RING_BASE + 4096); 265245386Swpaul else if (frag > 127) 265345386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 265445386Swpaul TI_TX_RING_BASE + 2048); 265545386Swpaul else 265645386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 265745386Swpaul TI_TX_RING_BASE); 265845386Swpaul f = &sc->ti_rdata->ti_tx_ring_nic[frag % 128]; 265945386Swpaul } else 266045386Swpaul f = &sc->ti_rdata->ti_tx_ring[frag]; 266145386Swpaul if (sc->ti_cdata.ti_tx_chain[frag] != NULL) 266245386Swpaul break; 266345386Swpaul TI_HOSTADDR(f->ti_addr) = vtophys(mtod(m, vm_offset_t)); 266445386Swpaul f->ti_len = m->m_len; 266558698Sjlemon f->ti_flags = csum_flags; 266683115Sbrooks 2667106936Ssam if (mtag != NULL) { 266845386Swpaul f->ti_flags |= TI_BDFLAG_VLAN_TAG; 2669106936Ssam f->ti_vlan_tag = VLAN_TAG_VALUE(mtag) & 0xfff; 267045386Swpaul } else { 267145386Swpaul f->ti_vlan_tag = 0; 267245386Swpaul } 267383115Sbrooks 267448011Swpaul /* 267548011Swpaul * Sanity check: avoid coming within 16 descriptors 267648011Swpaul * of the end of the ring. 267748011Swpaul */ 267848011Swpaul if ((TI_TX_RING_CNT - (sc->ti_txcnt + cnt)) < 16) 267948011Swpaul return(ENOBUFS); 268045386Swpaul cur = frag; 268145386Swpaul TI_INC(frag, TI_TX_RING_CNT); 268248011Swpaul cnt++; 268345386Swpaul } 268445386Swpaul } 268545386Swpaul 268645386Swpaul if (m != NULL) 268745386Swpaul return(ENOBUFS); 268845386Swpaul 268946177Swpaul if (frag == sc->ti_tx_saved_considx) 269046177Swpaul return(ENOBUFS); 269146177Swpaul 269245386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) 269345386Swpaul sc->ti_rdata->ti_tx_ring_nic[cur % 128].ti_flags |= 269498849Sken TI_BDFLAG_END; 269545386Swpaul else 269645386Swpaul sc->ti_rdata->ti_tx_ring[cur].ti_flags |= TI_BDFLAG_END; 269747458Swpaul sc->ti_cdata.ti_tx_chain[cur] = m_head; 269848011Swpaul sc->ti_txcnt += cnt; 269945386Swpaul 270045386Swpaul *txidx = frag; 270145386Swpaul 270245386Swpaul return(0); 270345386Swpaul} 270445386Swpaul 270545386Swpaul/* 270645386Swpaul * Main transmit routine. To avoid having to do mbuf copies, we put pointers 270745386Swpaul * to the mbuf data regions directly in the transmit descriptors. 270845386Swpaul */ 2709102336Salfredstatic void 2710102336Salfredti_start(ifp) 271145386Swpaul struct ifnet *ifp; 271245386Swpaul{ 271345386Swpaul struct ti_softc *sc; 271445386Swpaul struct mbuf *m_head = NULL; 271545386Swpaul u_int32_t prodidx = 0; 271645386Swpaul 271745386Swpaul sc = ifp->if_softc; 271867087Swpaul TI_LOCK(sc); 271945386Swpaul 272045386Swpaul prodidx = CSR_READ_4(sc, TI_MB_SENDPROD_IDX); 272145386Swpaul 272245386Swpaul while(sc->ti_cdata.ti_tx_chain[prodidx] == NULL) { 272345386Swpaul IF_DEQUEUE(&ifp->if_snd, m_head); 272445386Swpaul if (m_head == NULL) 272545386Swpaul break; 272645386Swpaul 272745386Swpaul /* 272858698Sjlemon * XXX 272958698Sjlemon * safety overkill. If this is a fragmented packet chain 273058698Sjlemon * with delayed TCP/UDP checksums, then only encapsulate 273158698Sjlemon * it if we have enough descriptors to handle the entire 273258698Sjlemon * chain at once. 273358698Sjlemon * (paranoia -- may not actually be needed) 273458698Sjlemon */ 273558698Sjlemon if (m_head->m_flags & M_FIRSTFRAG && 273658698Sjlemon m_head->m_pkthdr.csum_flags & (CSUM_DELAY_DATA)) { 273758698Sjlemon if ((TI_TX_RING_CNT - sc->ti_txcnt) < 273858698Sjlemon m_head->m_pkthdr.csum_data + 16) { 273958698Sjlemon IF_PREPEND(&ifp->if_snd, m_head); 274058698Sjlemon ifp->if_flags |= IFF_OACTIVE; 274158698Sjlemon break; 274258698Sjlemon } 274358698Sjlemon } 274458698Sjlemon 274558698Sjlemon /* 274645386Swpaul * Pack the data into the transmit ring. If we 274745386Swpaul * don't have room, set the OACTIVE flag and wait 274845386Swpaul * for the NIC to drain the ring. 274945386Swpaul */ 275045386Swpaul if (ti_encap(sc, m_head, &prodidx)) { 275145386Swpaul IF_PREPEND(&ifp->if_snd, m_head); 275245386Swpaul ifp->if_flags |= IFF_OACTIVE; 275345386Swpaul break; 275445386Swpaul } 275545386Swpaul 275645386Swpaul /* 275745386Swpaul * If there's a BPF listener, bounce a copy of this frame 275845386Swpaul * to him. 275945386Swpaul */ 2760106936Ssam BPF_MTAP(ifp, m_head); 276145386Swpaul } 276245386Swpaul 276345386Swpaul /* Transmit */ 276445386Swpaul CSR_WRITE_4(sc, TI_MB_SENDPROD_IDX, prodidx); 276545386Swpaul 276645386Swpaul /* 276745386Swpaul * Set a timeout in case the chip goes out to lunch. 276845386Swpaul */ 276945386Swpaul ifp->if_timer = 5; 277067087Swpaul TI_UNLOCK(sc); 277145386Swpaul 277245386Swpaul return; 277345386Swpaul} 277445386Swpaul 2775102336Salfredstatic void 2776102336Salfredti_init(xsc) 277745386Swpaul void *xsc; 277845386Swpaul{ 277945386Swpaul struct ti_softc *sc = xsc; 278045386Swpaul 278145386Swpaul /* Cancel pending I/O and flush buffers. */ 278245386Swpaul ti_stop(sc); 278345386Swpaul 278467087Swpaul TI_LOCK(sc); 278545386Swpaul /* Init the gen info block, ring control blocks and firmware. */ 278645386Swpaul if (ti_gibinit(sc)) { 278745386Swpaul printf("ti%d: initialization failure\n", sc->ti_unit); 278867087Swpaul TI_UNLOCK(sc); 278945386Swpaul return; 279045386Swpaul } 279145386Swpaul 279267087Swpaul TI_UNLOCK(sc); 279345386Swpaul 279445386Swpaul return; 279545386Swpaul} 279645386Swpaul 279745386Swpaulstatic void ti_init2(sc) 279845386Swpaul struct ti_softc *sc; 279945386Swpaul{ 280045386Swpaul struct ti_cmd_desc cmd; 280145386Swpaul struct ifnet *ifp; 280245386Swpaul u_int16_t *m; 280345386Swpaul struct ifmedia *ifm; 280445386Swpaul int tmp; 280545386Swpaul 280645386Swpaul ifp = &sc->arpcom.ac_if; 280745386Swpaul 280845386Swpaul /* Specify MTU and interface index. */ 2809121816Sbrooks CSR_WRITE_4(sc, TI_GCR_IFINDEX, sc->ti_unit); 281045386Swpaul CSR_WRITE_4(sc, TI_GCR_IFMTU, ifp->if_mtu + 2811118454Ssimokawa ETHER_HDR_LEN + ETHER_CRC_LEN + ETHER_VLAN_ENCAP_LEN); 281245386Swpaul TI_DO_CMD(TI_CMD_UPDATE_GENCOM, 0, 0); 281345386Swpaul 281445386Swpaul /* Load our MAC address. */ 281545386Swpaul m = (u_int16_t *)&sc->arpcom.ac_enaddr[0]; 281645386Swpaul CSR_WRITE_4(sc, TI_GCR_PAR0, htons(m[0])); 281745386Swpaul CSR_WRITE_4(sc, TI_GCR_PAR1, (htons(m[1]) << 16) | htons(m[2])); 281845386Swpaul TI_DO_CMD(TI_CMD_SET_MAC_ADDR, 0, 0); 281945386Swpaul 282045386Swpaul /* Enable or disable promiscuous mode as needed. */ 282145386Swpaul if (ifp->if_flags & IFF_PROMISC) { 282245386Swpaul TI_DO_CMD(TI_CMD_SET_PROMISC_MODE, TI_CMD_CODE_PROMISC_ENB, 0); 282345386Swpaul } else { 282445386Swpaul TI_DO_CMD(TI_CMD_SET_PROMISC_MODE, TI_CMD_CODE_PROMISC_DIS, 0); 282545386Swpaul } 282645386Swpaul 282745386Swpaul /* Program multicast filter. */ 282845386Swpaul ti_setmulti(sc); 282945386Swpaul 283045386Swpaul /* 283145386Swpaul * If this is a Tigon 1, we should tell the 283245386Swpaul * firmware to use software packet filtering. 283345386Swpaul */ 283445386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) { 283545386Swpaul TI_DO_CMD(TI_CMD_FDR_FILTERING, TI_CMD_CODE_FILT_ENB, 0); 283645386Swpaul } 283745386Swpaul 283845386Swpaul /* Init RX ring. */ 283945386Swpaul ti_init_rx_ring_std(sc); 284045386Swpaul 284145386Swpaul /* Init jumbo RX ring. */ 284245386Swpaul if (ifp->if_mtu > (ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN)) 284345386Swpaul ti_init_rx_ring_jumbo(sc); 284445386Swpaul 284545386Swpaul /* 284645386Swpaul * If this is a Tigon 2, we can also configure the 284745386Swpaul * mini ring. 284845386Swpaul */ 284945386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON_II) 285045386Swpaul ti_init_rx_ring_mini(sc); 285145386Swpaul 285245386Swpaul CSR_WRITE_4(sc, TI_GCR_RXRETURNCONS_IDX, 0); 285345386Swpaul sc->ti_rx_saved_considx = 0; 285445386Swpaul 285545386Swpaul /* Init TX ring. */ 285645386Swpaul ti_init_tx_ring(sc); 285745386Swpaul 285845386Swpaul /* Tell firmware we're alive. */ 285945386Swpaul TI_DO_CMD(TI_CMD_HOST_STATE, TI_CMD_CODE_STACK_UP, 0); 286045386Swpaul 286145386Swpaul /* Enable host interrupts. */ 286245386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0); 286345386Swpaul 286445386Swpaul ifp->if_flags |= IFF_RUNNING; 286545386Swpaul ifp->if_flags &= ~IFF_OACTIVE; 286645386Swpaul 286745386Swpaul /* 286845386Swpaul * Make sure to set media properly. We have to do this 286945386Swpaul * here since we have to issue commands in order to set 287045386Swpaul * the link negotiation and we can't issue commands until 287145386Swpaul * the firmware is running. 287245386Swpaul */ 287345386Swpaul ifm = &sc->ifmedia; 287445386Swpaul tmp = ifm->ifm_media; 287545386Swpaul ifm->ifm_media = ifm->ifm_cur->ifm_media; 287645386Swpaul ti_ifmedia_upd(ifp); 287745386Swpaul ifm->ifm_media = tmp; 287845386Swpaul 287945386Swpaul return; 288045386Swpaul} 288145386Swpaul 288245386Swpaul/* 288345386Swpaul * Set media options. 288445386Swpaul */ 2885102336Salfredstatic int 2886102336Salfredti_ifmedia_upd(ifp) 288745386Swpaul struct ifnet *ifp; 288845386Swpaul{ 288945386Swpaul struct ti_softc *sc; 289045386Swpaul struct ifmedia *ifm; 289145386Swpaul struct ti_cmd_desc cmd; 289298849Sken u_int32_t flowctl; 289345386Swpaul 289445386Swpaul sc = ifp->if_softc; 289545386Swpaul ifm = &sc->ifmedia; 289645386Swpaul 289745386Swpaul if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 289845386Swpaul return(EINVAL); 289945386Swpaul 290098849Sken flowctl = 0; 290198849Sken 290245386Swpaul switch(IFM_SUBTYPE(ifm->ifm_media)) { 290345386Swpaul case IFM_AUTO: 290498849Sken /* 290598849Sken * Transmit flow control doesn't work on the Tigon 1. 290698849Sken */ 290798849Sken flowctl = TI_GLNK_RX_FLOWCTL_Y; 290898849Sken 290998849Sken /* 291098849Sken * Transmit flow control can also cause problems on the 291198849Sken * Tigon 2, apparantly with both the copper and fiber 291298849Sken * boards. The symptom is that the interface will just 291398849Sken * hang. This was reproduced with Alteon 180 switches. 291498849Sken */ 291598849Sken#if 0 291698849Sken if (sc->ti_hwrev != TI_HWREV_TIGON) 291798849Sken flowctl |= TI_GLNK_TX_FLOWCTL_Y; 291898849Sken#endif 291998849Sken 292045386Swpaul CSR_WRITE_4(sc, TI_GCR_GLINK, TI_GLNK_PREF|TI_GLNK_1000MB| 292198849Sken TI_GLNK_FULL_DUPLEX| flowctl | 292245386Swpaul TI_GLNK_AUTONEGENB|TI_GLNK_ENB); 292398849Sken 292498849Sken flowctl = TI_LNK_RX_FLOWCTL_Y; 292598849Sken#if 0 292698849Sken if (sc->ti_hwrev != TI_HWREV_TIGON) 292798849Sken flowctl |= TI_LNK_TX_FLOWCTL_Y; 292898849Sken#endif 292998849Sken 293045386Swpaul CSR_WRITE_4(sc, TI_GCR_LINK, TI_LNK_100MB|TI_LNK_10MB| 293198849Sken TI_LNK_FULL_DUPLEX|TI_LNK_HALF_DUPLEX| flowctl | 293245386Swpaul TI_LNK_AUTONEGENB|TI_LNK_ENB); 293345386Swpaul TI_DO_CMD(TI_CMD_LINK_NEGOTIATION, 293445386Swpaul TI_CMD_CODE_NEGOTIATE_BOTH, 0); 293545386Swpaul break; 293645386Swpaul case IFM_1000_SX: 293795673Sphk case IFM_1000_T: 293898849Sken flowctl = TI_GLNK_RX_FLOWCTL_Y; 293998849Sken#if 0 294098849Sken if (sc->ti_hwrev != TI_HWREV_TIGON) 294198849Sken flowctl |= TI_GLNK_TX_FLOWCTL_Y; 294298849Sken#endif 294398849Sken 294445386Swpaul CSR_WRITE_4(sc, TI_GCR_GLINK, TI_GLNK_PREF|TI_GLNK_1000MB| 294598849Sken flowctl |TI_GLNK_ENB); 294645386Swpaul CSR_WRITE_4(sc, TI_GCR_LINK, 0); 294763699Swpaul if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) { 294863699Swpaul TI_SETBIT(sc, TI_GCR_GLINK, TI_GLNK_FULL_DUPLEX); 294963699Swpaul } 295045386Swpaul TI_DO_CMD(TI_CMD_LINK_NEGOTIATION, 295145386Swpaul TI_CMD_CODE_NEGOTIATE_GIGABIT, 0); 295245386Swpaul break; 295345386Swpaul case IFM_100_FX: 295445386Swpaul case IFM_10_FL: 295563699Swpaul case IFM_100_TX: 295663699Swpaul case IFM_10_T: 295798849Sken flowctl = TI_LNK_RX_FLOWCTL_Y; 295898849Sken#if 0 295998849Sken if (sc->ti_hwrev != TI_HWREV_TIGON) 296098849Sken flowctl |= TI_LNK_TX_FLOWCTL_Y; 296198849Sken#endif 296298849Sken 296345386Swpaul CSR_WRITE_4(sc, TI_GCR_GLINK, 0); 296498849Sken CSR_WRITE_4(sc, TI_GCR_LINK, TI_LNK_ENB|TI_LNK_PREF|flowctl); 296563699Swpaul if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_FX || 296663699Swpaul IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) { 296745386Swpaul TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_100MB); 296845386Swpaul } else { 296945386Swpaul TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_10MB); 297045386Swpaul } 297145386Swpaul if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) { 297245386Swpaul TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_FULL_DUPLEX); 297345386Swpaul } else { 297445386Swpaul TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_HALF_DUPLEX); 297545386Swpaul } 297645386Swpaul TI_DO_CMD(TI_CMD_LINK_NEGOTIATION, 297745386Swpaul TI_CMD_CODE_NEGOTIATE_10_100, 0); 297845386Swpaul break; 297945386Swpaul } 298045386Swpaul 298145386Swpaul return(0); 298245386Swpaul} 298345386Swpaul 298445386Swpaul/* 298545386Swpaul * Report current media status. 298645386Swpaul */ 2987102336Salfredstatic void 2988102336Salfredti_ifmedia_sts(ifp, ifmr) 298945386Swpaul struct ifnet *ifp; 299045386Swpaul struct ifmediareq *ifmr; 299145386Swpaul{ 299245386Swpaul struct ti_softc *sc; 299363699Swpaul u_int32_t media = 0; 299445386Swpaul 299545386Swpaul sc = ifp->if_softc; 299645386Swpaul 299745386Swpaul ifmr->ifm_status = IFM_AVALID; 299845386Swpaul ifmr->ifm_active = IFM_ETHER; 299945386Swpaul 300045386Swpaul if (sc->ti_linkstat == TI_EV_CODE_LINK_DOWN) 300145386Swpaul return; 300245386Swpaul 300345386Swpaul ifmr->ifm_status |= IFM_ACTIVE; 300445386Swpaul 300563699Swpaul if (sc->ti_linkstat == TI_EV_CODE_GIG_LINK_UP) { 300663699Swpaul media = CSR_READ_4(sc, TI_GCR_GLINK_STAT); 300763699Swpaul if (sc->ti_copper) 300895673Sphk ifmr->ifm_active |= IFM_1000_T; 300963699Swpaul else 301063699Swpaul ifmr->ifm_active |= IFM_1000_SX; 301163699Swpaul if (media & TI_GLNK_FULL_DUPLEX) 301263699Swpaul ifmr->ifm_active |= IFM_FDX; 301363699Swpaul else 301463699Swpaul ifmr->ifm_active |= IFM_HDX; 301563699Swpaul } else if (sc->ti_linkstat == TI_EV_CODE_LINK_UP) { 301645386Swpaul media = CSR_READ_4(sc, TI_GCR_LINK_STAT); 301763699Swpaul if (sc->ti_copper) { 301863699Swpaul if (media & TI_LNK_100MB) 301963699Swpaul ifmr->ifm_active |= IFM_100_TX; 302063699Swpaul if (media & TI_LNK_10MB) 302163699Swpaul ifmr->ifm_active |= IFM_10_T; 302263699Swpaul } else { 302363699Swpaul if (media & TI_LNK_100MB) 302463699Swpaul ifmr->ifm_active |= IFM_100_FX; 302563699Swpaul if (media & TI_LNK_10MB) 302663699Swpaul ifmr->ifm_active |= IFM_10_FL; 302763699Swpaul } 302845386Swpaul if (media & TI_LNK_FULL_DUPLEX) 302945386Swpaul ifmr->ifm_active |= IFM_FDX; 303045386Swpaul if (media & TI_LNK_HALF_DUPLEX) 303145386Swpaul ifmr->ifm_active |= IFM_HDX; 303245386Swpaul } 303345386Swpaul 303445386Swpaul return; 303545386Swpaul} 303645386Swpaul 3037102336Salfredstatic int 3038102336Salfredti_ioctl(ifp, command, data) 303945386Swpaul struct ifnet *ifp; 304045386Swpaul u_long command; 304145386Swpaul caddr_t data; 304245386Swpaul{ 304345386Swpaul struct ti_softc *sc = ifp->if_softc; 304445386Swpaul struct ifreq *ifr = (struct ifreq *) data; 304583630Sjlemon int mask, error = 0; 304645386Swpaul struct ti_cmd_desc cmd; 304745386Swpaul 304867087Swpaul TI_LOCK(sc); 304945386Swpaul 305045386Swpaul switch(command) { 305145386Swpaul case SIOCSIFMTU: 305245386Swpaul if (ifr->ifr_mtu > TI_JUMBO_MTU) 305345386Swpaul error = EINVAL; 305445386Swpaul else { 305545386Swpaul ifp->if_mtu = ifr->ifr_mtu; 305645386Swpaul ti_init(sc); 305745386Swpaul } 305845386Swpaul break; 305945386Swpaul case SIOCSIFFLAGS: 306045386Swpaul if (ifp->if_flags & IFF_UP) { 306145386Swpaul /* 306245386Swpaul * If only the state of the PROMISC flag changed, 306345386Swpaul * then just use the 'set promisc mode' command 306445386Swpaul * instead of reinitializing the entire NIC. Doing 306545386Swpaul * a full re-init means reloading the firmware and 306645386Swpaul * waiting for it to start up, which may take a 306745386Swpaul * second or two. 306845386Swpaul */ 306945386Swpaul if (ifp->if_flags & IFF_RUNNING && 307045386Swpaul ifp->if_flags & IFF_PROMISC && 307145386Swpaul !(sc->ti_if_flags & IFF_PROMISC)) { 307245386Swpaul TI_DO_CMD(TI_CMD_SET_PROMISC_MODE, 307345386Swpaul TI_CMD_CODE_PROMISC_ENB, 0); 307445386Swpaul } else if (ifp->if_flags & IFF_RUNNING && 307545386Swpaul !(ifp->if_flags & IFF_PROMISC) && 307645386Swpaul sc->ti_if_flags & IFF_PROMISC) { 307745386Swpaul TI_DO_CMD(TI_CMD_SET_PROMISC_MODE, 307845386Swpaul TI_CMD_CODE_PROMISC_DIS, 0); 307945386Swpaul } else 308045386Swpaul ti_init(sc); 308145386Swpaul } else { 308245386Swpaul if (ifp->if_flags & IFF_RUNNING) { 308345386Swpaul ti_stop(sc); 308445386Swpaul } 308545386Swpaul } 308645386Swpaul sc->ti_if_flags = ifp->if_flags; 308745386Swpaul error = 0; 308845386Swpaul break; 308945386Swpaul case SIOCADDMULTI: 309045386Swpaul case SIOCDELMULTI: 309145386Swpaul if (ifp->if_flags & IFF_RUNNING) { 309245386Swpaul ti_setmulti(sc); 309345386Swpaul error = 0; 309445386Swpaul } 309545386Swpaul break; 309645386Swpaul case SIOCSIFMEDIA: 309745386Swpaul case SIOCGIFMEDIA: 309845386Swpaul error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, command); 309945386Swpaul break; 310083630Sjlemon case SIOCSIFCAP: 310183630Sjlemon mask = ifr->ifr_reqcap ^ ifp->if_capenable; 310283630Sjlemon if (mask & IFCAP_HWCSUM) { 310383630Sjlemon if (IFCAP_HWCSUM & ifp->if_capenable) 310483630Sjlemon ifp->if_capenable &= ~IFCAP_HWCSUM; 310583630Sjlemon else 310683630Sjlemon ifp->if_capenable |= IFCAP_HWCSUM; 310783630Sjlemon if (ifp->if_flags & IFF_RUNNING) 310883630Sjlemon ti_init(sc); 310983630Sjlemon } 311083630Sjlemon error = 0; 311183630Sjlemon break; 311245386Swpaul default: 3113106936Ssam error = ether_ioctl(ifp, command, data); 311445386Swpaul break; 311545386Swpaul } 311645386Swpaul 311767087Swpaul TI_UNLOCK(sc); 311845386Swpaul 311945386Swpaul return(error); 312045386Swpaul} 312145386Swpaul 312298849Skenstatic int 312398849Skenti_open(dev_t dev, int flags, int fmt, struct thread *td) 312498849Sken{ 312598849Sken struct ti_softc *sc; 312698849Sken 3127120980Sphk sc = dev->si_drv1; 312898849Sken if (sc == NULL) 312998849Sken return(ENODEV); 313098849Sken 313198849Sken TI_LOCK(sc); 313298849Sken sc->ti_flags |= TI_FLAG_DEBUGING; 313398849Sken TI_UNLOCK(sc); 313498849Sken 313598849Sken return(0); 313698849Sken} 313798849Sken 313898849Skenstatic int 313998849Skenti_close(dev_t dev, int flag, int fmt, struct thread *td) 314098849Sken{ 314198849Sken struct ti_softc *sc; 314298849Sken 3143120980Sphk sc = dev->si_drv1; 314498849Sken if (sc == NULL) 314598849Sken return(ENODEV); 314698849Sken 314798849Sken TI_LOCK(sc); 314898849Sken sc->ti_flags &= ~TI_FLAG_DEBUGING; 314998849Sken TI_UNLOCK(sc); 315098849Sken 315198849Sken return(0); 315298849Sken} 315398849Sken 315498849Sken/* 315598849Sken * This ioctl routine goes along with the Tigon character device. 315698849Sken */ 315798849Skenstatic int 315898849Skenti_ioctl2(dev_t dev, u_long cmd, caddr_t addr, int flag, struct thread *td) 315998849Sken{ 3160120980Sphk int error; 316198849Sken struct ti_softc *sc; 316298849Sken 3163120980Sphk sc = dev->si_drv1; 316498849Sken if (sc == NULL) 316598849Sken return(ENODEV); 316698849Sken 316798849Sken error = 0; 316898849Sken 316998849Sken switch(cmd) { 317098849Sken case TIIOCGETSTATS: 317198849Sken { 317298849Sken struct ti_stats *outstats; 317398849Sken 317498849Sken outstats = (struct ti_stats *)addr; 317598849Sken 317698849Sken bcopy(&sc->ti_rdata->ti_info.ti_stats, outstats, 317798849Sken sizeof(struct ti_stats)); 317898849Sken break; 317998849Sken } 318098849Sken case TIIOCGETPARAMS: 318198849Sken { 318298849Sken struct ti_params *params; 318398849Sken 318498849Sken params = (struct ti_params *)addr; 318598849Sken 318698849Sken params->ti_stat_ticks = sc->ti_stat_ticks; 318798849Sken params->ti_rx_coal_ticks = sc->ti_rx_coal_ticks; 318898849Sken params->ti_tx_coal_ticks = sc->ti_tx_coal_ticks; 318998849Sken params->ti_rx_max_coal_bds = sc->ti_rx_max_coal_bds; 319098849Sken params->ti_tx_max_coal_bds = sc->ti_tx_max_coal_bds; 319198849Sken params->ti_tx_buf_ratio = sc->ti_tx_buf_ratio; 319298849Sken params->param_mask = TI_PARAM_ALL; 319398849Sken 319498849Sken error = 0; 319598849Sken 319698849Sken break; 319798849Sken } 319898849Sken case TIIOCSETPARAMS: 319998849Sken { 320098849Sken struct ti_params *params; 320198849Sken 320298849Sken params = (struct ti_params *)addr; 320398849Sken 320498849Sken if (params->param_mask & TI_PARAM_STAT_TICKS) { 320598849Sken sc->ti_stat_ticks = params->ti_stat_ticks; 320698849Sken CSR_WRITE_4(sc, TI_GCR_STAT_TICKS, sc->ti_stat_ticks); 320798849Sken } 320898849Sken 320998849Sken if (params->param_mask & TI_PARAM_RX_COAL_TICKS) { 321098849Sken sc->ti_rx_coal_ticks = params->ti_rx_coal_ticks; 321198849Sken CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS, 321298849Sken sc->ti_rx_coal_ticks); 321398849Sken } 321498849Sken 321598849Sken if (params->param_mask & TI_PARAM_TX_COAL_TICKS) { 321698849Sken sc->ti_tx_coal_ticks = params->ti_tx_coal_ticks; 321798849Sken CSR_WRITE_4(sc, TI_GCR_TX_COAL_TICKS, 321898849Sken sc->ti_tx_coal_ticks); 321998849Sken } 322098849Sken 322198849Sken if (params->param_mask & TI_PARAM_RX_COAL_BDS) { 322298849Sken sc->ti_rx_max_coal_bds = params->ti_rx_max_coal_bds; 322398849Sken CSR_WRITE_4(sc, TI_GCR_RX_MAX_COAL_BD, 322498849Sken sc->ti_rx_max_coal_bds); 322598849Sken } 322698849Sken 322798849Sken if (params->param_mask & TI_PARAM_TX_COAL_BDS) { 322898849Sken sc->ti_tx_max_coal_bds = params->ti_tx_max_coal_bds; 322998849Sken CSR_WRITE_4(sc, TI_GCR_TX_MAX_COAL_BD, 323098849Sken sc->ti_tx_max_coal_bds); 323198849Sken } 323298849Sken 323398849Sken if (params->param_mask & TI_PARAM_TX_BUF_RATIO) { 323498849Sken sc->ti_tx_buf_ratio = params->ti_tx_buf_ratio; 323598849Sken CSR_WRITE_4(sc, TI_GCR_TX_BUFFER_RATIO, 323698849Sken sc->ti_tx_buf_ratio); 323798849Sken } 323898849Sken 323998849Sken error = 0; 324098849Sken 324198849Sken break; 324298849Sken } 324398849Sken case TIIOCSETTRACE: { 324498849Sken ti_trace_type trace_type; 324598849Sken 324698849Sken trace_type = *(ti_trace_type *)addr; 324798849Sken 324898849Sken /* 324998849Sken * Set tracing to whatever the user asked for. Setting 325098849Sken * this register to 0 should have the effect of disabling 325198849Sken * tracing. 325298849Sken */ 325398849Sken CSR_WRITE_4(sc, TI_GCR_NIC_TRACING, trace_type); 325498849Sken 325598849Sken error = 0; 325698849Sken 325798849Sken break; 325898849Sken } 325998849Sken case TIIOCGETTRACE: { 326098849Sken struct ti_trace_buf *trace_buf; 326198849Sken u_int32_t trace_start, cur_trace_ptr, trace_len; 326298849Sken 326398849Sken trace_buf = (struct ti_trace_buf *)addr; 326498849Sken 326598849Sken trace_start = CSR_READ_4(sc, TI_GCR_NICTRACE_START); 326698849Sken cur_trace_ptr = CSR_READ_4(sc, TI_GCR_NICTRACE_PTR); 326798849Sken trace_len = CSR_READ_4(sc, TI_GCR_NICTRACE_LEN); 326898849Sken 326998849Sken#if 0 327098849Sken printf("ti%d: trace_start = %#x, cur_trace_ptr = %#x, " 327198849Sken "trace_len = %d\n", sc->ti_unit, trace_start, 327298849Sken cur_trace_ptr, trace_len); 327398849Sken printf("ti%d: trace_buf->buf_len = %d\n", sc->ti_unit, 327498849Sken trace_buf->buf_len); 327598849Sken#endif 327698849Sken 327798849Sken error = ti_copy_mem(sc, trace_start, min(trace_len, 327898849Sken trace_buf->buf_len), 327998849Sken (caddr_t)trace_buf->buf, 1, 1); 328098849Sken 328198849Sken if (error == 0) { 328298849Sken trace_buf->fill_len = min(trace_len, 328398849Sken trace_buf->buf_len); 328498849Sken if (cur_trace_ptr < trace_start) 328598849Sken trace_buf->cur_trace_ptr = 328698849Sken trace_start - cur_trace_ptr; 328798849Sken else 328898849Sken trace_buf->cur_trace_ptr = 328998849Sken cur_trace_ptr - trace_start; 329098849Sken } else 329198849Sken trace_buf->fill_len = 0; 329298849Sken 329398849Sken 329498849Sken break; 329598849Sken } 329698849Sken 329798849Sken /* 329898849Sken * For debugging, five ioctls are needed: 329998849Sken * ALT_ATTACH 330098849Sken * ALT_READ_TG_REG 330198849Sken * ALT_WRITE_TG_REG 330298849Sken * ALT_READ_TG_MEM 330398849Sken * ALT_WRITE_TG_MEM 330498849Sken */ 330598849Sken case ALT_ATTACH: 330698849Sken /* 330798849Sken * From what I can tell, Alteon's Solaris Tigon driver 330898849Sken * only has one character device, so you have to attach 330998849Sken * to the Tigon board you're interested in. This seems 331098849Sken * like a not-so-good way to do things, since unless you 331198849Sken * subsequently specify the unit number of the device 331298849Sken * you're interested in in every ioctl, you'll only be 331398849Sken * able to debug one board at a time. 331498849Sken */ 331598849Sken error = 0; 331698849Sken break; 331798849Sken case ALT_READ_TG_MEM: 331898849Sken case ALT_WRITE_TG_MEM: 331998849Sken { 332098849Sken struct tg_mem *mem_param; 332198849Sken u_int32_t sram_end, scratch_end; 332298849Sken 332398849Sken mem_param = (struct tg_mem *)addr; 332498849Sken 332598849Sken if (sc->ti_hwrev == TI_HWREV_TIGON) { 332698849Sken sram_end = TI_END_SRAM_I; 332798849Sken scratch_end = TI_END_SCRATCH_I; 332898849Sken } else { 332998849Sken sram_end = TI_END_SRAM_II; 333098849Sken scratch_end = TI_END_SCRATCH_II; 333198849Sken } 333298849Sken 333398849Sken /* 333498849Sken * For now, we'll only handle accessing regular SRAM, 333598849Sken * nothing else. 333698849Sken */ 333798849Sken if ((mem_param->tgAddr >= TI_BEG_SRAM) 333898849Sken && ((mem_param->tgAddr + mem_param->len) <= sram_end)) { 333998849Sken /* 334098849Sken * In this instance, we always copy to/from user 334198849Sken * space, so the user space argument is set to 1. 334298849Sken */ 334398849Sken error = ti_copy_mem(sc, mem_param->tgAddr, 334498849Sken mem_param->len, 334598849Sken mem_param->userAddr, 1, 334698849Sken (cmd == ALT_READ_TG_MEM) ? 1 : 0); 334798849Sken } else if ((mem_param->tgAddr >= TI_BEG_SCRATCH) 334898849Sken && (mem_param->tgAddr <= scratch_end)) { 334998849Sken error = ti_copy_scratch(sc, mem_param->tgAddr, 335098849Sken mem_param->len, 335198849Sken mem_param->userAddr, 1, 335298849Sken (cmd == ALT_READ_TG_MEM) ? 335398849Sken 1 : 0, TI_PROCESSOR_A); 335498849Sken } else if ((mem_param->tgAddr >= TI_BEG_SCRATCH_B_DEBUG) 335598849Sken && (mem_param->tgAddr <= TI_BEG_SCRATCH_B_DEBUG)) { 335698849Sken if (sc->ti_hwrev == TI_HWREV_TIGON) { 335798849Sken printf("ti%d: invalid memory range for " 335898849Sken "Tigon I\n", sc->ti_unit); 335998849Sken error = EINVAL; 336098849Sken break; 336198849Sken } 336298849Sken error = ti_copy_scratch(sc, mem_param->tgAddr - 336398849Sken TI_SCRATCH_DEBUG_OFF, 336498849Sken mem_param->len, 336598849Sken mem_param->userAddr, 1, 336698849Sken (cmd == ALT_READ_TG_MEM) ? 336798849Sken 1 : 0, TI_PROCESSOR_B); 336898849Sken } else { 336998849Sken printf("ti%d: memory address %#x len %d is out of " 337098849Sken "supported range\n", sc->ti_unit, 337198849Sken mem_param->tgAddr, mem_param->len); 337298849Sken error = EINVAL; 337398849Sken } 337498849Sken 337598849Sken break; 337698849Sken } 337798849Sken case ALT_READ_TG_REG: 337898849Sken case ALT_WRITE_TG_REG: 337998849Sken { 338098849Sken struct tg_reg *regs; 338198849Sken u_int32_t tmpval; 338298849Sken 338398849Sken regs = (struct tg_reg *)addr; 338498849Sken 338598849Sken /* 338698849Sken * Make sure the address in question isn't out of range. 338798849Sken */ 338898849Sken if (regs->addr > TI_REG_MAX) { 338998849Sken error = EINVAL; 339098849Sken break; 339198849Sken } 339298849Sken if (cmd == ALT_READ_TG_REG) { 339398849Sken bus_space_read_region_4(sc->ti_btag, sc->ti_bhandle, 339498849Sken regs->addr, &tmpval, 1); 339598849Sken regs->data = ntohl(tmpval); 339698849Sken#if 0 339798849Sken if ((regs->addr == TI_CPU_STATE) 339898849Sken || (regs->addr == TI_CPU_CTL_B)) { 339998849Sken printf("ti%d: register %#x = %#x\n", 340098849Sken sc->ti_unit, regs->addr, tmpval); 340198849Sken } 340298849Sken#endif 340398849Sken } else { 340498849Sken tmpval = htonl(regs->data); 340598849Sken bus_space_write_region_4(sc->ti_btag, sc->ti_bhandle, 340698849Sken regs->addr, &tmpval, 1); 340798849Sken } 340898849Sken 340998849Sken break; 341098849Sken } 341198849Sken default: 341298849Sken error = ENOTTY; 341398849Sken break; 341498849Sken } 341598849Sken return(error); 341698849Sken} 341798849Sken 3418102336Salfredstatic void 3419102336Salfredti_watchdog(ifp) 342045386Swpaul struct ifnet *ifp; 342145386Swpaul{ 342245386Swpaul struct ti_softc *sc; 342345386Swpaul 342445386Swpaul sc = ifp->if_softc; 342567087Swpaul TI_LOCK(sc); 342645386Swpaul 342798849Sken /* 342898849Sken * When we're debugging, the chip is often stopped for long periods 342998849Sken * of time, and that would normally cause the watchdog timer to fire. 343098849Sken * Since that impedes debugging, we don't want to do that. 343198849Sken */ 343298849Sken if (sc->ti_flags & TI_FLAG_DEBUGING) { 343398849Sken TI_UNLOCK(sc); 343498849Sken return; 343598849Sken } 343698849Sken 343745386Swpaul printf("ti%d: watchdog timeout -- resetting\n", sc->ti_unit); 343845386Swpaul ti_stop(sc); 343945386Swpaul ti_init(sc); 344045386Swpaul 344145386Swpaul ifp->if_oerrors++; 344267087Swpaul TI_UNLOCK(sc); 344345386Swpaul 344445386Swpaul return; 344545386Swpaul} 344645386Swpaul 344745386Swpaul/* 344845386Swpaul * Stop the adapter and free any mbufs allocated to the 344945386Swpaul * RX and TX lists. 345045386Swpaul */ 3451102336Salfredstatic void 3452102336Salfredti_stop(sc) 345345386Swpaul struct ti_softc *sc; 345445386Swpaul{ 345545386Swpaul struct ifnet *ifp; 345645386Swpaul struct ti_cmd_desc cmd; 345745386Swpaul 345867087Swpaul TI_LOCK(sc); 345967087Swpaul 346045386Swpaul ifp = &sc->arpcom.ac_if; 346145386Swpaul 346245386Swpaul /* Disable host interrupts. */ 346345386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1); 346445386Swpaul /* 346545386Swpaul * Tell firmware we're shutting down. 346645386Swpaul */ 346745386Swpaul TI_DO_CMD(TI_CMD_HOST_STATE, TI_CMD_CODE_STACK_DOWN, 0); 346845386Swpaul 346945386Swpaul /* Halt and reinitialize. */ 347045386Swpaul ti_chipinit(sc); 347145386Swpaul ti_mem(sc, 0x2000, 0x100000 - 0x2000, NULL); 347245386Swpaul ti_chipinit(sc); 347345386Swpaul 347445386Swpaul /* Free the RX lists. */ 347545386Swpaul ti_free_rx_ring_std(sc); 347645386Swpaul 347745386Swpaul /* Free jumbo RX list. */ 347845386Swpaul ti_free_rx_ring_jumbo(sc); 347945386Swpaul 348045386Swpaul /* Free mini RX list. */ 348145386Swpaul ti_free_rx_ring_mini(sc); 348245386Swpaul 348345386Swpaul /* Free TX buffers. */ 348445386Swpaul ti_free_tx_ring(sc); 348545386Swpaul 348645386Swpaul sc->ti_ev_prodidx.ti_idx = 0; 348745386Swpaul sc->ti_return_prodidx.ti_idx = 0; 348845386Swpaul sc->ti_tx_considx.ti_idx = 0; 348945386Swpaul sc->ti_tx_saved_considx = TI_TXCONS_UNSET; 349045386Swpaul 349145386Swpaul ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 349267087Swpaul TI_UNLOCK(sc); 349345386Swpaul 349445386Swpaul return; 349545386Swpaul} 349645386Swpaul 349745386Swpaul/* 349845386Swpaul * Stop all chip I/O so that the kernel's probe routines don't 349945386Swpaul * get confused by errant DMAs when rebooting. 350045386Swpaul */ 3501102336Salfredstatic void 3502102336Salfredti_shutdown(dev) 350349011Swpaul device_t dev; 350445386Swpaul{ 350545386Swpaul struct ti_softc *sc; 350645386Swpaul 350749011Swpaul sc = device_get_softc(dev); 350867087Swpaul TI_LOCK(sc); 350945386Swpaul ti_chipinit(sc); 351067087Swpaul TI_UNLOCK(sc); 351145386Swpaul 351245386Swpaul return; 351345386Swpaul} 3514