if_ti.c revision 113812
145386Swpaul/* 245386Swpaul * Copyright (c) 1997, 1998, 1999 345386Swpaul * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 445386Swpaul * 545386Swpaul * Redistribution and use in source and binary forms, with or without 645386Swpaul * modification, are permitted provided that the following conditions 745386Swpaul * are met: 845386Swpaul * 1. Redistributions of source code must retain the above copyright 945386Swpaul * notice, this list of conditions and the following disclaimer. 1045386Swpaul * 2. Redistributions in binary form must reproduce the above copyright 1145386Swpaul * notice, this list of conditions and the following disclaimer in the 1245386Swpaul * documentation and/or other materials provided with the distribution. 1345386Swpaul * 3. All advertising materials mentioning features or use of this software 1445386Swpaul * must display the following acknowledgement: 1545386Swpaul * This product includes software developed by Bill Paul. 1645386Swpaul * 4. Neither the name of the author nor the names of any co-contributors 1745386Swpaul * may be used to endorse or promote products derived from this software 1845386Swpaul * without specific prior written permission. 1945386Swpaul * 2045386Swpaul * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 2145386Swpaul * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2245386Swpaul * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2345386Swpaul * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 2445386Swpaul * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2545386Swpaul * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2645386Swpaul * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2745386Swpaul * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 2845386Swpaul * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 2945386Swpaul * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 3045386Swpaul * THE POSSIBILITY OF SUCH DAMAGE. 3145386Swpaul */ 3245386Swpaul 3345386Swpaul/* 3445386Swpaul * Alteon Networks Tigon PCI gigabit ethernet driver for FreeBSD. 3545386Swpaul * Manuals, sample driver and firmware source kits are available 3645386Swpaul * from http://www.alteon.com/support/openkits. 3745386Swpaul * 3845386Swpaul * Written by Bill Paul <wpaul@ctr.columbia.edu> 3945386Swpaul * Electrical Engineering Department 4045386Swpaul * Columbia University, New York City 4145386Swpaul */ 4245386Swpaul 4345386Swpaul/* 4445386Swpaul * The Alteon Networks Tigon chip contains an embedded R4000 CPU, 4545386Swpaul * gigabit MAC, dual DMA channels and a PCI interface unit. NICs 4645386Swpaul * using the Tigon may have anywhere from 512K to 2MB of SRAM. The 4745386Swpaul * Tigon supports hardware IP, TCP and UCP checksumming, multicast 4845386Swpaul * filtering and jumbo (9014 byte) frames. The hardware is largely 4945386Swpaul * controlled by firmware, which must be loaded into the NIC during 5045386Swpaul * initialization. 5145386Swpaul * 5245386Swpaul * The Tigon 2 contains 2 R4000 CPUs and requires a newer firmware 5345386Swpaul * revision, which supports new features such as extended commands, 5445386Swpaul * extended jumbo receive ring desciptors and a mini receive ring. 5545386Swpaul * 5645386Swpaul * Alteon Networks is to be commended for releasing such a vast amount 5745386Swpaul * of development material for the Tigon NIC without requiring an NDA 5845386Swpaul * (although they really should have done it a long time ago). With 5945386Swpaul * any luck, the other vendors will finally wise up and follow Alteon's 6045386Swpaul * stellar example. 6145386Swpaul * 6245386Swpaul * The firmware for the Tigon 1 and 2 NICs is compiled directly into 6345386Swpaul * this driver by #including it as a C header file. This bloats the 6445386Swpaul * driver somewhat, but it's the easiest method considering that the 6545386Swpaul * driver code and firmware code need to be kept in sync. The source 6645386Swpaul * for the firmware is not provided with the FreeBSD distribution since 6745386Swpaul * compiling it requires a GNU toolchain targeted for mips-sgi-irix5.3. 6845386Swpaul * 6945386Swpaul * The following people deserve special thanks: 7045386Swpaul * - Terry Murphy of 3Com, for providing a 3c985 Tigon 1 board 7145386Swpaul * for testing 7245386Swpaul * - Raymond Lee of Netgear, for providing a pair of Netgear 7345386Swpaul * GA620 Tigon 2 boards for testing 7445386Swpaul * - Ulf Zimmermann, for bringing the GA260 to my attention and 7545386Swpaul * convincing me to write this driver. 7645386Swpaul * - Andrew Gallatin for providing FreeBSD/Alpha support. 7745386Swpaul */ 7845386Swpaul 79113038Sobrien#include <sys/cdefs.h> 80113038Sobrien__FBSDID("$FreeBSD: head/sys/dev/ti/if_ti.c 113812 2003-04-21 18:34:04Z imp $"); 81113038Sobrien 8298849Sken#include "opt_ti.h" 8398849Sken 8445386Swpaul#include <sys/param.h> 8545386Swpaul#include <sys/systm.h> 8645386Swpaul#include <sys/sockio.h> 8745386Swpaul#include <sys/mbuf.h> 8845386Swpaul#include <sys/malloc.h> 8945386Swpaul#include <sys/kernel.h> 9045386Swpaul#include <sys/socket.h> 9145386Swpaul#include <sys/queue.h> 9298849Sken#include <sys/conf.h> 9345386Swpaul 9445386Swpaul#include <net/if.h> 9545386Swpaul#include <net/if_arp.h> 9645386Swpaul#include <net/ethernet.h> 9745386Swpaul#include <net/if_dl.h> 9845386Swpaul#include <net/if_media.h> 9983115Sbrooks#include <net/if_types.h> 10083115Sbrooks#include <net/if_vlan_var.h> 10145386Swpaul 10245386Swpaul#include <net/bpf.h> 10345386Swpaul 10445386Swpaul#include <netinet/in_systm.h> 10545386Swpaul#include <netinet/in.h> 10645386Swpaul#include <netinet/ip.h> 10745386Swpaul 10845386Swpaul#include <vm/vm.h> /* for vtophys */ 10945386Swpaul#include <vm/pmap.h> /* for vtophys */ 11045386Swpaul#include <machine/bus_memio.h> 11145386Swpaul#include <machine/bus.h> 11249011Swpaul#include <machine/resource.h> 11349011Swpaul#include <sys/bus.h> 11449011Swpaul#include <sys/rman.h> 11545386Swpaul 11698849Sken/* #define TI_PRIVATE_JUMBOS */ 11798849Sken 11898849Sken#if !defined(TI_PRIVATE_JUMBOS) 11998849Sken#include <sys/sockio.h> 12098849Sken#include <sys/uio.h> 12198849Sken#include <sys/lock.h> 12298849Sken#include <vm/vm_extern.h> 12398849Sken#include <vm/pmap.h> 12498849Sken#include <vm/vm_map.h> 12598849Sken#include <vm/vm_map.h> 12698849Sken#include <vm/vm_param.h> 12798849Sken#include <vm/vm_pageout.h> 12898849Sken#include <sys/vmmeter.h> 12998849Sken#include <vm/vm_page.h> 13098849Sken#include <vm/vm_object.h> 13198849Sken#include <vm/vm_kern.h> 13298849Sken#include <sys/proc.h> 13398849Sken#include <sys/jumbo.h> 13498849Sken#endif /* !TI_PRIVATE_JUMBOS */ 13598849Sken#include <sys/vnode.h> /* for vfindev, vgone */ 13698849Sken 13745386Swpaul#include <pci/pcireg.h> 13845386Swpaul#include <pci/pcivar.h> 13945386Swpaul 14098849Sken#include <sys/tiio.h> 14145386Swpaul#include <pci/if_tireg.h> 14245386Swpaul#include <pci/ti_fw.h> 14345386Swpaul#include <pci/ti_fw2.h> 14445386Swpaul 14558698Sjlemon#define TI_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP | CSUM_IP_FRAGS) 14698849Sken/* 14798849Sken * We can only turn on header splitting if we're using extended receive 14898849Sken * BDs. 14998849Sken */ 15098849Sken#if defined(TI_JUMBO_HDRSPLIT) && defined(TI_PRIVATE_JUMBOS) 15198849Sken#error "options TI_JUMBO_HDRSPLIT and TI_PRIVATE_JUMBOS are mutually exclusive" 15298849Sken#endif /* TI_JUMBO_HDRSPLIT && TI_JUMBO_HDRSPLIT */ 15345386Swpaul 15498849Skenstruct ti_softc *tis[8]; 15598849Sken 15698849Skentypedef enum { 15798849Sken TI_SWAP_HTON, 15898849Sken TI_SWAP_NTOH 15998849Sken} ti_swap_type; 16098849Sken 16198849Sken 16245386Swpaul/* 16345386Swpaul * Various supported device vendors/types and their names. 16445386Swpaul */ 16545386Swpaul 16645386Swpaulstatic struct ti_type ti_devs[] = { 16745386Swpaul { ALT_VENDORID, ALT_DEVICEID_ACENIC, 16863702Swpaul "Alteon AceNIC 1000baseSX Gigabit Ethernet" }, 16963699Swpaul { ALT_VENDORID, ALT_DEVICEID_ACENIC_COPPER, 17063702Swpaul "Alteon AceNIC 1000baseT Gigabit Ethernet" }, 17145386Swpaul { TC_VENDORID, TC_DEVICEID_3C985, 17245386Swpaul "3Com 3c985-SX Gigabit Ethernet" }, 17345386Swpaul { NG_VENDORID, NG_DEVICEID_GA620, 17464139Swpaul "Netgear GA620 1000baseSX Gigabit Ethernet" }, 17564139Swpaul { NG_VENDORID, NG_DEVICEID_GA620T, 17664139Swpaul "Netgear GA620 1000baseT Gigabit Ethernet" }, 17745386Swpaul { SGI_VENDORID, SGI_DEVICEID_TIGON, 17845386Swpaul "Silicon Graphics Gigabit Ethernet" }, 17956206Swpaul { DEC_VENDORID, DEC_DEVICEID_FARALLON_PN9000SX, 18056206Swpaul "Farallon PN9000SX Gigabit Ethernet" }, 18145386Swpaul { 0, 0, NULL } 18245386Swpaul}; 18345386Swpaul 18498849Sken#define TI_CDEV_MAJOR 153 18598849Sken 18698849Skenstatic d_open_t ti_open; 18798849Skenstatic d_close_t ti_close; 18898849Skenstatic d_ioctl_t ti_ioctl2; 18998849Sken 19098849Skenstatic struct cdevsw ti_cdevsw = { 191111815Sphk .d_open = ti_open, 192111815Sphk .d_close = ti_close, 193111815Sphk .d_ioctl = ti_ioctl2, 194111815Sphk .d_name = "ti", 195111815Sphk .d_maj = TI_CDEV_MAJOR, 19698849Sken}; 19798849Sken 19892739Salfredstatic int ti_probe (device_t); 19992739Salfredstatic int ti_attach (device_t); 20092739Salfredstatic int ti_detach (device_t); 20192739Salfredstatic void ti_txeof (struct ti_softc *); 20292739Salfredstatic void ti_rxeof (struct ti_softc *); 20345386Swpaul 20492739Salfredstatic void ti_stats_update (struct ti_softc *); 20592739Salfredstatic int ti_encap (struct ti_softc *, struct mbuf *, u_int32_t *); 20645386Swpaul 20792739Salfredstatic void ti_intr (void *); 20892739Salfredstatic void ti_start (struct ifnet *); 20992739Salfredstatic int ti_ioctl (struct ifnet *, u_long, caddr_t); 21092739Salfredstatic void ti_init (void *); 21192739Salfredstatic void ti_init2 (struct ti_softc *); 21292739Salfredstatic void ti_stop (struct ti_softc *); 21392739Salfredstatic void ti_watchdog (struct ifnet *); 21492739Salfredstatic void ti_shutdown (device_t); 21592739Salfredstatic int ti_ifmedia_upd (struct ifnet *); 21692739Salfredstatic void ti_ifmedia_sts (struct ifnet *, struct ifmediareq *); 21745386Swpaul 21892739Salfredstatic u_int32_t ti_eeprom_putbyte (struct ti_softc *, int); 21992739Salfredstatic u_int8_t ti_eeprom_getbyte (struct ti_softc *, int, u_int8_t *); 22092739Salfredstatic int ti_read_eeprom (struct ti_softc *, caddr_t, int, int); 22145386Swpaul 22292739Salfredstatic void ti_add_mcast (struct ti_softc *, struct ether_addr *); 22392739Salfredstatic void ti_del_mcast (struct ti_softc *, struct ether_addr *); 22492739Salfredstatic void ti_setmulti (struct ti_softc *); 22545386Swpaul 22692739Salfredstatic void ti_mem (struct ti_softc *, u_int32_t, 22792739Salfred u_int32_t, caddr_t); 22898849Skenstatic int ti_copy_mem (struct ti_softc *, u_int32_t, 22998849Sken u_int32_t, caddr_t, int, int); 23098849Skenstatic int ti_copy_scratch (struct ti_softc *, u_int32_t, 23198849Sken u_int32_t, caddr_t, int, int, int); 23298849Skenstatic int ti_bcopy_swap (const void *, void *, size_t, 23398849Sken ti_swap_type); 23492739Salfredstatic void ti_loadfw (struct ti_softc *); 23592739Salfredstatic void ti_cmd (struct ti_softc *, struct ti_cmd_desc *); 23692739Salfredstatic void ti_cmd_ext (struct ti_softc *, struct ti_cmd_desc *, 23792739Salfred caddr_t, int); 23892739Salfredstatic void ti_handle_events (struct ti_softc *); 23998849Sken#ifdef TI_PRIVATE_JUMBOS 24092739Salfredstatic int ti_alloc_jumbo_mem (struct ti_softc *); 24192739Salfredstatic void *ti_jalloc (struct ti_softc *); 24299058Salfredstatic void ti_jfree (void *, void *); 24398849Sken#endif /* TI_PRIVATE_JUMBOS */ 24492739Salfredstatic int ti_newbuf_std (struct ti_softc *, int, struct mbuf *); 24592739Salfredstatic int ti_newbuf_mini (struct ti_softc *, int, struct mbuf *); 24692739Salfredstatic int ti_newbuf_jumbo (struct ti_softc *, int, struct mbuf *); 24792739Salfredstatic int ti_init_rx_ring_std (struct ti_softc *); 24892739Salfredstatic void ti_free_rx_ring_std (struct ti_softc *); 24992739Salfredstatic int ti_init_rx_ring_jumbo (struct ti_softc *); 25092739Salfredstatic void ti_free_rx_ring_jumbo (struct ti_softc *); 25192739Salfredstatic int ti_init_rx_ring_mini (struct ti_softc *); 25292739Salfredstatic void ti_free_rx_ring_mini (struct ti_softc *); 25392739Salfredstatic void ti_free_tx_ring (struct ti_softc *); 25492739Salfredstatic int ti_init_tx_ring (struct ti_softc *); 25545386Swpaul 25692739Salfredstatic int ti_64bitslot_war (struct ti_softc *); 25792739Salfredstatic int ti_chipinit (struct ti_softc *); 25892739Salfredstatic int ti_gibinit (struct ti_softc *); 25945386Swpaul 26098849Sken#ifdef TI_JUMBO_HDRSPLIT 26199013Speterstatic __inline void ti_hdr_split (struct mbuf *top, int hdr_len, 26299013Speter int pkt_len, int idx); 26398849Sken#endif /* TI_JUMBO_HDRSPLIT */ 26498849Sken 26549011Swpaulstatic device_method_t ti_methods[] = { 26649011Swpaul /* Device interface */ 26749011Swpaul DEVMETHOD(device_probe, ti_probe), 26849011Swpaul DEVMETHOD(device_attach, ti_attach), 26949011Swpaul DEVMETHOD(device_detach, ti_detach), 27049011Swpaul DEVMETHOD(device_shutdown, ti_shutdown), 27149011Swpaul { 0, 0 } 27249011Swpaul}; 27349011Swpaul 27449011Swpaulstatic driver_t ti_driver = { 27551455Swpaul "ti", 27649011Swpaul ti_methods, 27749011Swpaul sizeof(struct ti_softc) 27849011Swpaul}; 27949011Swpaul 28049011Swpaulstatic devclass_t ti_devclass; 28149011Swpaul 282113506SmdoddDRIVER_MODULE(ti, pci, ti_driver, ti_devclass, 0, 0); 283113506SmdoddMODULE_DEPEND(ti, pci, 1, 1, 1); 284113506SmdoddMODULE_DEPEND(ti, ether, 1, 1, 1); 28549011Swpaul 28698849Sken/* List of Tigon softcs */ 28798849Skenstatic STAILQ_HEAD(ti_softc_list, ti_softc) ti_sc_list; 28898849Sken 28998849Skenstatic struct ti_softc * 29098849Skenti_lookup_softc(int unit) 29198849Sken{ 29298849Sken struct ti_softc *sc; 29398849Sken for (sc = STAILQ_FIRST(&ti_sc_list); sc != NULL; 29498849Sken sc = STAILQ_NEXT(sc, ti_links)) 29598849Sken if (sc->ti_unit == unit) 29698849Sken return(sc); 29798849Sken return(NULL); 29898849Sken} 29998849Sken 30045386Swpaul/* 30145386Swpaul * Send an instruction or address to the EEPROM, check for ACK. 30245386Swpaul */ 30345386Swpaulstatic u_int32_t ti_eeprom_putbyte(sc, byte) 30445386Swpaul struct ti_softc *sc; 30545386Swpaul int byte; 30645386Swpaul{ 30745386Swpaul register int i, ack = 0; 30845386Swpaul 30945386Swpaul /* 31045386Swpaul * Make sure we're in TX mode. 31145386Swpaul */ 31245386Swpaul TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); 31345386Swpaul 31445386Swpaul /* 31545386Swpaul * Feed in each bit and stobe the clock. 31645386Swpaul */ 31745386Swpaul for (i = 0x80; i; i >>= 1) { 31845386Swpaul if (byte & i) { 31945386Swpaul TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); 32045386Swpaul } else { 32145386Swpaul TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); 32245386Swpaul } 32345386Swpaul DELAY(1); 32445386Swpaul TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); 32545386Swpaul DELAY(1); 32645386Swpaul TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); 32745386Swpaul } 32845386Swpaul 32945386Swpaul /* 33045386Swpaul * Turn off TX mode. 33145386Swpaul */ 33245386Swpaul TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); 33345386Swpaul 33445386Swpaul /* 33545386Swpaul * Check for ack. 33645386Swpaul */ 33745386Swpaul TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); 33845386Swpaul ack = CSR_READ_4(sc, TI_MISC_LOCAL_CTL) & TI_MLC_EE_DIN; 33945386Swpaul TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); 34045386Swpaul 34145386Swpaul return(ack); 34245386Swpaul} 34345386Swpaul 34445386Swpaul/* 34545386Swpaul * Read a byte of data stored in the EEPROM at address 'addr.' 34645386Swpaul * We have to send two address bytes since the EEPROM can hold 34745386Swpaul * more than 256 bytes of data. 34845386Swpaul */ 34945386Swpaulstatic u_int8_t ti_eeprom_getbyte(sc, addr, dest) 35045386Swpaul struct ti_softc *sc; 35145386Swpaul int addr; 35245386Swpaul u_int8_t *dest; 35345386Swpaul{ 35445386Swpaul register int i; 35545386Swpaul u_int8_t byte = 0; 35645386Swpaul 35745386Swpaul EEPROM_START; 35845386Swpaul 35945386Swpaul /* 36045386Swpaul * Send write control code to EEPROM. 36145386Swpaul */ 36245386Swpaul if (ti_eeprom_putbyte(sc, EEPROM_CTL_WRITE)) { 36345386Swpaul printf("ti%d: failed to send write command, status: %x\n", 36445386Swpaul sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL)); 36545386Swpaul return(1); 36645386Swpaul } 36745386Swpaul 36845386Swpaul /* 36945386Swpaul * Send first byte of address of byte we want to read. 37045386Swpaul */ 37145386Swpaul if (ti_eeprom_putbyte(sc, (addr >> 8) & 0xFF)) { 37245386Swpaul printf("ti%d: failed to send address, status: %x\n", 37345386Swpaul sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL)); 37445386Swpaul return(1); 37545386Swpaul } 37645386Swpaul /* 37745386Swpaul * Send second byte address of byte we want to read. 37845386Swpaul */ 37945386Swpaul if (ti_eeprom_putbyte(sc, addr & 0xFF)) { 38045386Swpaul printf("ti%d: failed to send address, status: %x\n", 38145386Swpaul sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL)); 38245386Swpaul return(1); 38345386Swpaul } 38445386Swpaul 38545386Swpaul EEPROM_STOP; 38645386Swpaul EEPROM_START; 38745386Swpaul /* 38845386Swpaul * Send read control code to EEPROM. 38945386Swpaul */ 39045386Swpaul if (ti_eeprom_putbyte(sc, EEPROM_CTL_READ)) { 39145386Swpaul printf("ti%d: failed to send read command, status: %x\n", 39245386Swpaul sc->ti_unit, CSR_READ_4(sc, TI_MISC_LOCAL_CTL)); 39345386Swpaul return(1); 39445386Swpaul } 39545386Swpaul 39645386Swpaul /* 39745386Swpaul * Start reading bits from EEPROM. 39845386Swpaul */ 39945386Swpaul TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); 40045386Swpaul for (i = 0x80; i; i >>= 1) { 40145386Swpaul TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); 40245386Swpaul DELAY(1); 40345386Swpaul if (CSR_READ_4(sc, TI_MISC_LOCAL_CTL) & TI_MLC_EE_DIN) 40445386Swpaul byte |= i; 40545386Swpaul TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); 40645386Swpaul DELAY(1); 40745386Swpaul } 40845386Swpaul 40945386Swpaul EEPROM_STOP; 41045386Swpaul 41145386Swpaul /* 41245386Swpaul * No ACK generated for read, so just return byte. 41345386Swpaul */ 41445386Swpaul 41545386Swpaul *dest = byte; 41645386Swpaul 41745386Swpaul return(0); 41845386Swpaul} 41945386Swpaul 42045386Swpaul/* 42145386Swpaul * Read a sequence of bytes from the EEPROM. 42245386Swpaul */ 423102336Salfredstatic int 424102336Salfredti_read_eeprom(sc, dest, off, cnt) 42545386Swpaul struct ti_softc *sc; 42645386Swpaul caddr_t dest; 42745386Swpaul int off; 42845386Swpaul int cnt; 42945386Swpaul{ 43045386Swpaul int err = 0, i; 43145386Swpaul u_int8_t byte = 0; 43245386Swpaul 43345386Swpaul for (i = 0; i < cnt; i++) { 43445386Swpaul err = ti_eeprom_getbyte(sc, off + i, &byte); 43545386Swpaul if (err) 43645386Swpaul break; 43745386Swpaul *(dest + i) = byte; 43845386Swpaul } 43945386Swpaul 44045386Swpaul return(err ? 1 : 0); 44145386Swpaul} 44245386Swpaul 44345386Swpaul/* 44445386Swpaul * NIC memory access function. Can be used to either clear a section 44545386Swpaul * of NIC local memory or (if buf is non-NULL) copy data into it. 44645386Swpaul */ 447102336Salfredstatic void 448102336Salfredti_mem(sc, addr, len, buf) 44945386Swpaul struct ti_softc *sc; 45045386Swpaul u_int32_t addr, len; 45145386Swpaul caddr_t buf; 45245386Swpaul{ 45345386Swpaul int segptr, segsize, cnt; 45445386Swpaul caddr_t ti_winbase, ptr; 45545386Swpaul 45645386Swpaul segptr = addr; 45745386Swpaul cnt = len; 45849133Swpaul ti_winbase = (caddr_t)(sc->ti_vhandle + TI_WINDOW); 45945386Swpaul ptr = buf; 46045386Swpaul 46145386Swpaul while(cnt) { 46245386Swpaul if (cnt < TI_WINLEN) 46345386Swpaul segsize = cnt; 46445386Swpaul else 46545386Swpaul segsize = TI_WINLEN - (segptr % TI_WINLEN); 46645386Swpaul CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1))); 46745386Swpaul if (buf == NULL) 46845386Swpaul bzero((char *)ti_winbase + (segptr & 46945386Swpaul (TI_WINLEN - 1)), segsize); 47045386Swpaul else { 47145386Swpaul bcopy((char *)ptr, (char *)ti_winbase + 47245386Swpaul (segptr & (TI_WINLEN - 1)), segsize); 47345386Swpaul ptr += segsize; 47445386Swpaul } 47545386Swpaul segptr += segsize; 47645386Swpaul cnt -= segsize; 47745386Swpaul } 47845386Swpaul 47945386Swpaul return; 48045386Swpaul} 48145386Swpaul 48298849Skenstatic int 48398849Skenti_copy_mem(sc, tigon_addr, len, buf, useraddr, readdata) 48498849Sken struct ti_softc *sc; 48598849Sken u_int32_t tigon_addr, len; 48698849Sken caddr_t buf; 48798849Sken int useraddr, readdata; 48898849Sken{ 48998849Sken int segptr, segsize, cnt; 49098849Sken caddr_t ptr; 49198849Sken u_int32_t origwin; 49298849Sken u_int8_t tmparray[TI_WINLEN], tmparray2[TI_WINLEN]; 49398849Sken int resid, segresid; 49498849Sken int first_pass; 49598849Sken 49698849Sken /* 49798849Sken * At the moment, we don't handle non-aligned cases, we just bail. 49898849Sken * If this proves to be a problem, it will be fixed. 49998849Sken */ 50098849Sken if ((readdata == 0) 50198849Sken && (tigon_addr & 0x3)) { 50298849Sken printf("ti%d: ti_copy_mem: tigon address %#x isn't " 50398849Sken "word-aligned\n", sc->ti_unit, tigon_addr); 50498849Sken printf("ti%d: ti_copy_mem: unaligned writes aren't yet " 50598849Sken "supported\n", sc->ti_unit); 50698849Sken return(EINVAL); 50798849Sken } 50898849Sken 50998849Sken segptr = tigon_addr & ~0x3; 51098849Sken segresid = tigon_addr - segptr; 51198849Sken 51298849Sken /* 51398849Sken * This is the non-aligned amount left over that we'll need to 51498849Sken * copy. 51598849Sken */ 51698849Sken resid = len & 0x3; 51798849Sken 51898849Sken /* Add in the left over amount at the front of the buffer */ 51998849Sken resid += segresid; 52098849Sken 52198849Sken cnt = len & ~0x3; 52298849Sken /* 52398849Sken * If resid + segresid is >= 4, add multiples of 4 to the count and 52498849Sken * decrease the residual by that much. 52598849Sken */ 52698849Sken cnt += resid & ~0x3; 52798849Sken resid -= resid & ~0x3; 52898849Sken 52998849Sken ptr = buf; 53098849Sken 53198849Sken first_pass = 1; 53298849Sken 53398849Sken /* 53498849Sken * Make sure we aren't interrupted while we're changing the window 53598849Sken * pointer. 53698849Sken */ 53798849Sken TI_LOCK(sc); 53898849Sken 53998849Sken /* 54098849Sken * Save the old window base value. 54198849Sken */ 54298849Sken origwin = CSR_READ_4(sc, TI_WINBASE); 54398849Sken 54498849Sken while(cnt) { 54598849Sken bus_size_t ti_offset; 54698849Sken 54798849Sken if (cnt < TI_WINLEN) 54898849Sken segsize = cnt; 54998849Sken else 55098849Sken segsize = TI_WINLEN - (segptr % TI_WINLEN); 55198849Sken CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1))); 55298849Sken 55398849Sken ti_offset = TI_WINDOW + (segptr & (TI_WINLEN -1)); 55498849Sken 55598849Sken if (readdata) { 55698849Sken 55798849Sken bus_space_read_region_4(sc->ti_btag, 55898849Sken sc->ti_bhandle, ti_offset, 55998849Sken (u_int32_t *)tmparray, 56098849Sken segsize >> 2); 56198849Sken if (useraddr) { 56298849Sken /* 56398849Sken * Yeah, this is a little on the kludgy 56498849Sken * side, but at least this code is only 56598849Sken * used for debugging. 56698849Sken */ 56798849Sken ti_bcopy_swap(tmparray, tmparray2, segsize, 56898849Sken TI_SWAP_NTOH); 56998849Sken 57098849Sken if (first_pass) { 57198849Sken copyout(&tmparray2[segresid], ptr, 57298849Sken segsize - segresid); 57398849Sken first_pass = 0; 57498849Sken } else 57598849Sken copyout(tmparray2, ptr, segsize); 57698849Sken } else { 57798849Sken if (first_pass) { 57898849Sken 57998849Sken ti_bcopy_swap(tmparray, tmparray2, 58098849Sken segsize, TI_SWAP_NTOH); 58198849Sken bcopy(&tmparray2[segresid], ptr, 58298849Sken segsize - segresid); 58398849Sken first_pass = 0; 58498849Sken } else 58598849Sken ti_bcopy_swap(tmparray, ptr, segsize, 58698849Sken TI_SWAP_NTOH); 58798849Sken } 58898849Sken 58998849Sken } else { 59098849Sken if (useraddr) { 59198849Sken copyin(ptr, tmparray2, segsize); 59298849Sken ti_bcopy_swap(tmparray2, tmparray, segsize, 59398849Sken TI_SWAP_HTON); 59498849Sken } else 59598849Sken ti_bcopy_swap(ptr, tmparray, segsize, 59698849Sken TI_SWAP_HTON); 59798849Sken 59898849Sken bus_space_write_region_4(sc->ti_btag, 59998849Sken sc->ti_bhandle, ti_offset, 60098849Sken (u_int32_t *)tmparray, 60198849Sken segsize >> 2); 60298849Sken } 60398849Sken segptr += segsize; 60498849Sken ptr += segsize; 60598849Sken cnt -= segsize; 60698849Sken } 60798849Sken 60898849Sken /* 60998849Sken * Handle leftover, non-word-aligned bytes. 61098849Sken */ 61198849Sken if (resid != 0) { 61298849Sken u_int32_t tmpval, tmpval2; 61398849Sken bus_size_t ti_offset; 61498849Sken 61598849Sken /* 61698849Sken * Set the segment pointer. 61798849Sken */ 61898849Sken CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1))); 61998849Sken 62098849Sken ti_offset = TI_WINDOW + (segptr & (TI_WINLEN - 1)); 62198849Sken 62298849Sken /* 62398849Sken * First, grab whatever is in our source/destination. 62498849Sken * We'll obviously need this for reads, but also for 62598849Sken * writes, since we'll be doing read/modify/write. 62698849Sken */ 62798849Sken bus_space_read_region_4(sc->ti_btag, sc->ti_bhandle, 62898849Sken ti_offset, &tmpval, 1); 62998849Sken 63098849Sken /* 63198849Sken * Next, translate this from little-endian to big-endian 63298849Sken * (at least on i386 boxes). 63398849Sken */ 63498849Sken tmpval2 = ntohl(tmpval); 63598849Sken 63698849Sken if (readdata) { 63798849Sken /* 63898849Sken * If we're reading, just copy the leftover number 63998849Sken * of bytes from the host byte order buffer to 64098849Sken * the user's buffer. 64198849Sken */ 64298849Sken if (useraddr) 64398849Sken copyout(&tmpval2, ptr, resid); 64498849Sken else 64598849Sken bcopy(&tmpval2, ptr, resid); 64698849Sken } else { 64798849Sken /* 64898849Sken * If we're writing, first copy the bytes to be 64998849Sken * written into the network byte order buffer, 65098849Sken * leaving the rest of the buffer with whatever was 65198849Sken * originally in there. Then, swap the bytes 65298849Sken * around into host order and write them out. 65398849Sken * 65498849Sken * XXX KDM the read side of this has been verified 65598849Sken * to work, but the write side of it has not been 65698849Sken * verified. So user beware. 65798849Sken */ 65898849Sken if (useraddr) 65998849Sken copyin(ptr, &tmpval2, resid); 66098849Sken else 66198849Sken bcopy(ptr, &tmpval2, resid); 66298849Sken 66398849Sken tmpval = htonl(tmpval2); 66498849Sken 66598849Sken bus_space_write_region_4(sc->ti_btag, sc->ti_bhandle, 66698849Sken ti_offset, &tmpval, 1); 66798849Sken } 66898849Sken } 66998849Sken 67098849Sken CSR_WRITE_4(sc, TI_WINBASE, origwin); 67198849Sken 67298849Sken TI_UNLOCK(sc); 67398849Sken 67498849Sken return(0); 67598849Sken} 67698849Sken 67798849Skenstatic int 67898849Skenti_copy_scratch(sc, tigon_addr, len, buf, useraddr, readdata, cpu) 67998849Sken struct ti_softc *sc; 68098849Sken u_int32_t tigon_addr, len; 68198849Sken caddr_t buf; 68298849Sken int useraddr, readdata; 68398849Sken int cpu; 68498849Sken{ 68598849Sken u_int32_t segptr; 68698849Sken int cnt; 68798849Sken u_int32_t tmpval, tmpval2; 68898849Sken caddr_t ptr; 68998849Sken 69098849Sken /* 69198849Sken * At the moment, we don't handle non-aligned cases, we just bail. 69298849Sken * If this proves to be a problem, it will be fixed. 69398849Sken */ 69498849Sken if (tigon_addr & 0x3) { 69598849Sken printf("ti%d: ti_copy_scratch: tigon address %#x isn't " 69698849Sken "word-aligned\n", sc->ti_unit, tigon_addr); 69798849Sken return(EINVAL); 69898849Sken } 69998849Sken 70098849Sken if (len & 0x3) { 70198849Sken printf("ti%d: ti_copy_scratch: transfer length %d isn't " 70298849Sken "word-aligned\n", sc->ti_unit, len); 70398849Sken return(EINVAL); 70498849Sken } 70598849Sken 70698849Sken segptr = tigon_addr; 70798849Sken cnt = len; 70898849Sken ptr = buf; 70998849Sken 71098849Sken TI_LOCK(sc); 71198849Sken 71298849Sken while (cnt) { 71398849Sken CSR_WRITE_4(sc, CPU_REG(TI_SRAM_ADDR, cpu), segptr); 71498849Sken 71598849Sken if (readdata) { 71698849Sken tmpval2 = CSR_READ_4(sc, CPU_REG(TI_SRAM_DATA, cpu)); 71798849Sken 71898849Sken tmpval = ntohl(tmpval2); 71998849Sken 72098849Sken /* 72198849Sken * Note: I've used this debugging interface 72298849Sken * extensively with Alteon's 12.3.15 firmware, 72398849Sken * compiled with GCC 2.7.2.1 and binutils 2.9.1. 72498849Sken * 72598849Sken * When you compile the firmware without 72698849Sken * optimization, which is necessary sometimes in 72798849Sken * order to properly step through it, you sometimes 72898849Sken * read out a bogus value of 0xc0017c instead of 72998849Sken * whatever was supposed to be in that scratchpad 73098849Sken * location. That value is on the stack somewhere, 73198849Sken * but I've never been able to figure out what was 73298849Sken * causing the problem. 73398849Sken * 73498849Sken * The address seems to pop up in random places, 73598849Sken * often not in the same place on two subsequent 73698849Sken * reads. 73798849Sken * 73898849Sken * In any case, the underlying data doesn't seem 73998849Sken * to be affected, just the value read out. 74098849Sken * 74198849Sken * KDM, 3/7/2000 74298849Sken */ 74398849Sken 74498849Sken if (tmpval2 == 0xc0017c) 74598849Sken printf("ti%d: found 0xc0017c at %#x " 74698849Sken "(tmpval2)\n", sc->ti_unit, segptr); 74798849Sken 74898849Sken if (tmpval == 0xc0017c) 74998849Sken printf("ti%d: found 0xc0017c at %#x " 75098849Sken "(tmpval)\n", sc->ti_unit, segptr); 75198849Sken 75298849Sken if (useraddr) 75398849Sken copyout(&tmpval, ptr, 4); 75498849Sken else 75598849Sken bcopy(&tmpval, ptr, 4); 75698849Sken } else { 75798849Sken if (useraddr) 75898849Sken copyin(ptr, &tmpval2, 4); 75998849Sken else 76098849Sken bcopy(ptr, &tmpval2, 4); 76198849Sken 76298849Sken tmpval = htonl(tmpval2); 76398849Sken 76498849Sken CSR_WRITE_4(sc, CPU_REG(TI_SRAM_DATA, cpu), tmpval); 76598849Sken } 76698849Sken 76798849Sken cnt -= 4; 76898849Sken segptr += 4; 76998849Sken ptr += 4; 77098849Sken } 77198849Sken 77298849Sken TI_UNLOCK(sc); 77398849Sken 77498849Sken return(0); 77598849Sken} 77698849Sken 77798849Skenstatic int 77898849Skenti_bcopy_swap(src, dst, len, swap_type) 77998849Sken const void *src; 78098849Sken void *dst; 78198849Sken size_t len; 78298849Sken ti_swap_type swap_type; 78398849Sken{ 78498849Sken const u_int8_t *tmpsrc; 78598849Sken u_int8_t *tmpdst; 78698849Sken size_t tmplen; 78798849Sken 78898849Sken if (len & 0x3) { 789106627Sjhb printf("ti_bcopy_swap: length %zd isn't 32-bit aligned\n", 79098849Sken len); 79198849Sken return(-1); 79298849Sken } 79398849Sken 79498849Sken tmpsrc = src; 79598849Sken tmpdst = dst; 79698849Sken tmplen = len; 79798849Sken 79898849Sken while (tmplen) { 79998849Sken if (swap_type == TI_SWAP_NTOH) 80098849Sken *(u_int32_t *)tmpdst = 80198849Sken ntohl(*(const u_int32_t *)tmpsrc); 80298849Sken else 80398849Sken *(u_int32_t *)tmpdst = 80498849Sken htonl(*(const u_int32_t *)tmpsrc); 80598849Sken 80698849Sken tmpsrc += 4; 80798849Sken tmpdst += 4; 80898849Sken tmplen -= 4; 80998849Sken } 81098849Sken 81198849Sken return(0); 81298849Sken} 81398849Sken 81445386Swpaul/* 81545386Swpaul * Load firmware image into the NIC. Check that the firmware revision 81645386Swpaul * is acceptable and see if we want the firmware for the Tigon 1 or 81745386Swpaul * Tigon 2. 81845386Swpaul */ 819102336Salfredstatic void 820102336Salfredti_loadfw(sc) 82145386Swpaul struct ti_softc *sc; 82245386Swpaul{ 82345386Swpaul switch(sc->ti_hwrev) { 82445386Swpaul case TI_HWREV_TIGON: 82545386Swpaul if (tigonFwReleaseMajor != TI_FIRMWARE_MAJOR || 82645386Swpaul tigonFwReleaseMinor != TI_FIRMWARE_MINOR || 82745386Swpaul tigonFwReleaseFix != TI_FIRMWARE_FIX) { 82845386Swpaul printf("ti%d: firmware revision mismatch; want " 82945386Swpaul "%d.%d.%d, got %d.%d.%d\n", sc->ti_unit, 83045386Swpaul TI_FIRMWARE_MAJOR, TI_FIRMWARE_MINOR, 83145386Swpaul TI_FIRMWARE_FIX, tigonFwReleaseMajor, 83245386Swpaul tigonFwReleaseMinor, tigonFwReleaseFix); 83345386Swpaul return; 83445386Swpaul } 83545386Swpaul ti_mem(sc, tigonFwTextAddr, tigonFwTextLen, 83645386Swpaul (caddr_t)tigonFwText); 83745386Swpaul ti_mem(sc, tigonFwDataAddr, tigonFwDataLen, 83845386Swpaul (caddr_t)tigonFwData); 83945386Swpaul ti_mem(sc, tigonFwRodataAddr, tigonFwRodataLen, 84045386Swpaul (caddr_t)tigonFwRodata); 84145386Swpaul ti_mem(sc, tigonFwBssAddr, tigonFwBssLen, NULL); 84245386Swpaul ti_mem(sc, tigonFwSbssAddr, tigonFwSbssLen, NULL); 84345386Swpaul CSR_WRITE_4(sc, TI_CPU_PROGRAM_COUNTER, tigonFwStartAddr); 84445386Swpaul break; 84545386Swpaul case TI_HWREV_TIGON_II: 84645386Swpaul if (tigon2FwReleaseMajor != TI_FIRMWARE_MAJOR || 84745386Swpaul tigon2FwReleaseMinor != TI_FIRMWARE_MINOR || 84845386Swpaul tigon2FwReleaseFix != TI_FIRMWARE_FIX) { 84945386Swpaul printf("ti%d: firmware revision mismatch; want " 85045386Swpaul "%d.%d.%d, got %d.%d.%d\n", sc->ti_unit, 85145386Swpaul TI_FIRMWARE_MAJOR, TI_FIRMWARE_MINOR, 85245386Swpaul TI_FIRMWARE_FIX, tigon2FwReleaseMajor, 85345386Swpaul tigon2FwReleaseMinor, tigon2FwReleaseFix); 85445386Swpaul return; 85545386Swpaul } 85645386Swpaul ti_mem(sc, tigon2FwTextAddr, tigon2FwTextLen, 85745386Swpaul (caddr_t)tigon2FwText); 85845386Swpaul ti_mem(sc, tigon2FwDataAddr, tigon2FwDataLen, 85945386Swpaul (caddr_t)tigon2FwData); 86045386Swpaul ti_mem(sc, tigon2FwRodataAddr, tigon2FwRodataLen, 86145386Swpaul (caddr_t)tigon2FwRodata); 86245386Swpaul ti_mem(sc, tigon2FwBssAddr, tigon2FwBssLen, NULL); 86345386Swpaul ti_mem(sc, tigon2FwSbssAddr, tigon2FwSbssLen, NULL); 86445386Swpaul CSR_WRITE_4(sc, TI_CPU_PROGRAM_COUNTER, tigon2FwStartAddr); 86545386Swpaul break; 86645386Swpaul default: 86745386Swpaul printf("ti%d: can't load firmware: unknown hardware rev\n", 86845386Swpaul sc->ti_unit); 86945386Swpaul break; 87045386Swpaul } 87145386Swpaul 87245386Swpaul return; 87345386Swpaul} 87445386Swpaul 87545386Swpaul/* 87645386Swpaul * Send the NIC a command via the command ring. 87745386Swpaul */ 878102336Salfredstatic void 879102336Salfredti_cmd(sc, cmd) 88045386Swpaul struct ti_softc *sc; 88145386Swpaul struct ti_cmd_desc *cmd; 88245386Swpaul{ 88345386Swpaul u_int32_t index; 88445386Swpaul 88545386Swpaul if (sc->ti_rdata->ti_cmd_ring == NULL) 88645386Swpaul return; 88745386Swpaul 88845386Swpaul index = sc->ti_cmd_saved_prodidx; 88945386Swpaul CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4), *(u_int32_t *)(cmd)); 89045386Swpaul TI_INC(index, TI_CMD_RING_CNT); 89145386Swpaul CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, index); 89245386Swpaul sc->ti_cmd_saved_prodidx = index; 89345386Swpaul 89445386Swpaul return; 89545386Swpaul} 89645386Swpaul 89745386Swpaul/* 89845386Swpaul * Send the NIC an extended command. The 'len' parameter specifies the 89945386Swpaul * number of command slots to include after the initial command. 90045386Swpaul */ 901102336Salfredstatic void 902102336Salfredti_cmd_ext(sc, cmd, arg, len) 90345386Swpaul struct ti_softc *sc; 90445386Swpaul struct ti_cmd_desc *cmd; 90545386Swpaul caddr_t arg; 90645386Swpaul int len; 90745386Swpaul{ 90845386Swpaul u_int32_t index; 90945386Swpaul register int i; 91045386Swpaul 91145386Swpaul if (sc->ti_rdata->ti_cmd_ring == NULL) 91245386Swpaul return; 91345386Swpaul 91445386Swpaul index = sc->ti_cmd_saved_prodidx; 91545386Swpaul CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4), *(u_int32_t *)(cmd)); 91645386Swpaul TI_INC(index, TI_CMD_RING_CNT); 91745386Swpaul for (i = 0; i < len; i++) { 91845386Swpaul CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4), 91945386Swpaul *(u_int32_t *)(&arg[i * 4])); 92045386Swpaul TI_INC(index, TI_CMD_RING_CNT); 92145386Swpaul } 92245386Swpaul CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, index); 92345386Swpaul sc->ti_cmd_saved_prodidx = index; 92445386Swpaul 92545386Swpaul return; 92645386Swpaul} 92745386Swpaul 92845386Swpaul/* 92945386Swpaul * Handle events that have triggered interrupts. 93045386Swpaul */ 931102336Salfredstatic void 932102336Salfredti_handle_events(sc) 93345386Swpaul struct ti_softc *sc; 93445386Swpaul{ 93545386Swpaul struct ti_event_desc *e; 93645386Swpaul 93745386Swpaul if (sc->ti_rdata->ti_event_ring == NULL) 93845386Swpaul return; 93945386Swpaul 94045386Swpaul while (sc->ti_ev_saved_considx != sc->ti_ev_prodidx.ti_idx) { 94145386Swpaul e = &sc->ti_rdata->ti_event_ring[sc->ti_ev_saved_considx]; 94245386Swpaul switch(e->ti_event) { 94345386Swpaul case TI_EV_LINKSTAT_CHANGED: 94445386Swpaul sc->ti_linkstat = e->ti_code; 94545386Swpaul if (e->ti_code == TI_EV_CODE_LINK_UP) 94645386Swpaul printf("ti%d: 10/100 link up\n", sc->ti_unit); 94745386Swpaul else if (e->ti_code == TI_EV_CODE_GIG_LINK_UP) 94845386Swpaul printf("ti%d: gigabit link up\n", sc->ti_unit); 94945386Swpaul else if (e->ti_code == TI_EV_CODE_LINK_DOWN) 95045386Swpaul printf("ti%d: link down\n", sc->ti_unit); 95145386Swpaul break; 95245386Swpaul case TI_EV_ERROR: 95345386Swpaul if (e->ti_code == TI_EV_CODE_ERR_INVAL_CMD) 95445386Swpaul printf("ti%d: invalid command\n", sc->ti_unit); 95545386Swpaul else if (e->ti_code == TI_EV_CODE_ERR_UNIMP_CMD) 95645386Swpaul printf("ti%d: unknown command\n", sc->ti_unit); 95745386Swpaul else if (e->ti_code == TI_EV_CODE_ERR_BADCFG) 95845386Swpaul printf("ti%d: bad config data\n", sc->ti_unit); 95945386Swpaul break; 96045386Swpaul case TI_EV_FIRMWARE_UP: 96145386Swpaul ti_init2(sc); 96245386Swpaul break; 96345386Swpaul case TI_EV_STATS_UPDATED: 96445386Swpaul ti_stats_update(sc); 96545386Swpaul break; 96645386Swpaul case TI_EV_RESET_JUMBO_RING: 96745386Swpaul case TI_EV_MCAST_UPDATED: 96845386Swpaul /* Who cares. */ 96945386Swpaul break; 97045386Swpaul default: 97145386Swpaul printf("ti%d: unknown event: %d\n", 97245386Swpaul sc->ti_unit, e->ti_event); 97345386Swpaul break; 97445386Swpaul } 97545386Swpaul /* Advance the consumer index. */ 97645386Swpaul TI_INC(sc->ti_ev_saved_considx, TI_EVENT_RING_CNT); 97745386Swpaul CSR_WRITE_4(sc, TI_GCR_EVENTCONS_IDX, sc->ti_ev_saved_considx); 97845386Swpaul } 97945386Swpaul 98045386Swpaul return; 98145386Swpaul} 98245386Swpaul 98398849Sken#ifdef TI_PRIVATE_JUMBOS 98498849Sken 98545386Swpaul/* 98645386Swpaul * Memory management for the jumbo receive ring is a pain in the 98745386Swpaul * butt. We need to allocate at least 9018 bytes of space per frame, 98845386Swpaul * _and_ it has to be contiguous (unless you use the extended 98945386Swpaul * jumbo descriptor format). Using malloc() all the time won't 99045386Swpaul * work: malloc() allocates memory in powers of two, which means we 99145386Swpaul * would end up wasting a considerable amount of space by allocating 99245386Swpaul * 9K chunks. We don't have a jumbo mbuf cluster pool. Thus, we have 99345386Swpaul * to do our own memory management. 99445386Swpaul * 99545386Swpaul * The driver needs to allocate a contiguous chunk of memory at boot 99645386Swpaul * time. We then chop this up ourselves into 9K pieces and use them 99745386Swpaul * as external mbuf storage. 99845386Swpaul * 99945386Swpaul * One issue here is how much memory to allocate. The jumbo ring has 100045386Swpaul * 256 slots in it, but at 9K per slot than can consume over 2MB of 100145386Swpaul * RAM. This is a bit much, especially considering we also need 100245386Swpaul * RAM for the standard ring and mini ring (on the Tigon 2). To 100345386Swpaul * save space, we only actually allocate enough memory for 64 slots 100445386Swpaul * by default, which works out to between 500 and 600K. This can 100545386Swpaul * be tuned by changing a #define in if_tireg.h. 100645386Swpaul */ 100745386Swpaul 1008102336Salfredstatic int 1009102336Salfredti_alloc_jumbo_mem(sc) 101045386Swpaul struct ti_softc *sc; 101145386Swpaul{ 101245386Swpaul caddr_t ptr; 101345386Swpaul register int i; 101445386Swpaul struct ti_jpool_entry *entry; 101545386Swpaul 101645386Swpaul /* Grab a big chunk o' storage. */ 101745386Swpaul sc->ti_cdata.ti_jumbo_buf = contigmalloc(TI_JMEM, M_DEVBUF, 101850548Sbde M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); 101945386Swpaul 102045386Swpaul if (sc->ti_cdata.ti_jumbo_buf == NULL) { 102145386Swpaul printf("ti%d: no memory for jumbo buffers!\n", sc->ti_unit); 102245386Swpaul return(ENOBUFS); 102345386Swpaul } 102445386Swpaul 102545386Swpaul SLIST_INIT(&sc->ti_jfree_listhead); 102645386Swpaul SLIST_INIT(&sc->ti_jinuse_listhead); 102745386Swpaul 102845386Swpaul /* 102945386Swpaul * Now divide it up into 9K pieces and save the addresses 103067405Sbmilekic * in an array. 103145386Swpaul */ 103245386Swpaul ptr = sc->ti_cdata.ti_jumbo_buf; 103345386Swpaul for (i = 0; i < TI_JSLOTS; i++) { 103467405Sbmilekic sc->ti_cdata.ti_jslots[i] = ptr; 103567405Sbmilekic ptr += TI_JLEN; 103645386Swpaul entry = malloc(sizeof(struct ti_jpool_entry), 103745386Swpaul M_DEVBUF, M_NOWAIT); 103845386Swpaul if (entry == NULL) { 103962793Sgallatin contigfree(sc->ti_cdata.ti_jumbo_buf, TI_JMEM, 104062793Sgallatin M_DEVBUF); 104145386Swpaul sc->ti_cdata.ti_jumbo_buf = NULL; 104245386Swpaul printf("ti%d: no memory for jumbo " 104345386Swpaul "buffer queue!\n", sc->ti_unit); 104445386Swpaul return(ENOBUFS); 104545386Swpaul } 104645386Swpaul entry->slot = i; 104745386Swpaul SLIST_INSERT_HEAD(&sc->ti_jfree_listhead, entry, jpool_entries); 104845386Swpaul } 104945386Swpaul 105045386Swpaul return(0); 105145386Swpaul} 105245386Swpaul 105345386Swpaul/* 105445386Swpaul * Allocate a jumbo buffer. 105545386Swpaul */ 105645386Swpaulstatic void *ti_jalloc(sc) 105745386Swpaul struct ti_softc *sc; 105845386Swpaul{ 105945386Swpaul struct ti_jpool_entry *entry; 106045386Swpaul 106145386Swpaul entry = SLIST_FIRST(&sc->ti_jfree_listhead); 106245386Swpaul 106345386Swpaul if (entry == NULL) { 106445386Swpaul printf("ti%d: no free jumbo buffers\n", sc->ti_unit); 106545386Swpaul return(NULL); 106645386Swpaul } 106745386Swpaul 106845386Swpaul SLIST_REMOVE_HEAD(&sc->ti_jfree_listhead, jpool_entries); 106945386Swpaul SLIST_INSERT_HEAD(&sc->ti_jinuse_listhead, entry, jpool_entries); 107067405Sbmilekic return(sc->ti_cdata.ti_jslots[entry->slot]); 107145386Swpaul} 107245386Swpaul 107345386Swpaul/* 107445386Swpaul * Release a jumbo buffer. 107545386Swpaul */ 1076102336Salfredstatic void 1077102336Salfredti_jfree(buf, args) 107899058Salfred void *buf; 107964837Sdwmalone void *args; 108045386Swpaul{ 108145386Swpaul struct ti_softc *sc; 108245386Swpaul int i; 108345386Swpaul struct ti_jpool_entry *entry; 108445386Swpaul 108545386Swpaul /* Extract the softc struct pointer. */ 108667405Sbmilekic sc = (struct ti_softc *)args; 108745386Swpaul 108845386Swpaul if (sc == NULL) 108967405Sbmilekic panic("ti_jfree: didn't get softc pointer!"); 109045386Swpaul 109145386Swpaul /* calculate the slot this buffer belongs to */ 109267405Sbmilekic i = ((vm_offset_t)buf 109345386Swpaul - (vm_offset_t)sc->ti_cdata.ti_jumbo_buf) / TI_JLEN; 109445386Swpaul 109545386Swpaul if ((i < 0) || (i >= TI_JSLOTS)) 109645386Swpaul panic("ti_jfree: asked to free buffer that we don't manage!"); 109745386Swpaul 109864837Sdwmalone entry = SLIST_FIRST(&sc->ti_jinuse_listhead); 109964837Sdwmalone if (entry == NULL) 110064837Sdwmalone panic("ti_jfree: buffer not in use!"); 110164837Sdwmalone entry->slot = i; 110264837Sdwmalone SLIST_REMOVE_HEAD(&sc->ti_jinuse_listhead, jpool_entries); 110364837Sdwmalone SLIST_INSERT_HEAD(&sc->ti_jfree_listhead, entry, jpool_entries); 110464837Sdwmalone 110545386Swpaul return; 110645386Swpaul} 110745386Swpaul 110898849Sken#endif /* TI_PRIVATE_JUMBOS */ 110945386Swpaul 111045386Swpaul/* 111145386Swpaul * Intialize a standard receive ring descriptor. 111245386Swpaul */ 1113102336Salfredstatic int 1114102336Salfredti_newbuf_std(sc, i, m) 111545386Swpaul struct ti_softc *sc; 111645386Swpaul int i; 111745386Swpaul struct mbuf *m; 111845386Swpaul{ 111945386Swpaul struct mbuf *m_new = NULL; 112045386Swpaul struct ti_rx_desc *r; 112145386Swpaul 112249036Swpaul if (m == NULL) { 1123111119Simp MGETHDR(m_new, M_DONTWAIT, MT_DATA); 112487846Sluigi if (m_new == NULL) 112545386Swpaul return(ENOBUFS); 112645386Swpaul 1127111119Simp MCLGET(m_new, M_DONTWAIT); 112845386Swpaul if (!(m_new->m_flags & M_EXT)) { 112945386Swpaul m_freem(m_new); 113045386Swpaul return(ENOBUFS); 113145386Swpaul } 113249036Swpaul m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; 113349036Swpaul } else { 113449036Swpaul m_new = m; 113549036Swpaul m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; 113649036Swpaul m_new->m_data = m_new->m_ext.ext_buf; 113745386Swpaul } 113845386Swpaul 113948597Swpaul m_adj(m_new, ETHER_ALIGN); 114045386Swpaul sc->ti_cdata.ti_rx_std_chain[i] = m_new; 114145386Swpaul r = &sc->ti_rdata->ti_rx_std_ring[i]; 114245386Swpaul TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t)); 114345386Swpaul r->ti_type = TI_BDTYPE_RECV_BD; 114445386Swpaul r->ti_flags = 0; 114558698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 114658698Sjlemon r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM; 114749036Swpaul r->ti_len = m_new->m_len; 114845386Swpaul r->ti_idx = i; 114945386Swpaul 115045386Swpaul return(0); 115145386Swpaul} 115245386Swpaul 115345386Swpaul/* 115445386Swpaul * Intialize a mini receive ring descriptor. This only applies to 115545386Swpaul * the Tigon 2. 115645386Swpaul */ 1157102336Salfredstatic int 1158102336Salfredti_newbuf_mini(sc, i, m) 115945386Swpaul struct ti_softc *sc; 116045386Swpaul int i; 116145386Swpaul struct mbuf *m; 116245386Swpaul{ 116345386Swpaul struct mbuf *m_new = NULL; 116445386Swpaul struct ti_rx_desc *r; 116545386Swpaul 116649036Swpaul if (m == NULL) { 1167111119Simp MGETHDR(m_new, M_DONTWAIT, MT_DATA); 116845386Swpaul if (m_new == NULL) { 116945386Swpaul return(ENOBUFS); 117045386Swpaul } 117149036Swpaul m_new->m_len = m_new->m_pkthdr.len = MHLEN; 117249036Swpaul } else { 117349036Swpaul m_new = m; 117449036Swpaul m_new->m_data = m_new->m_pktdat; 117549036Swpaul m_new->m_len = m_new->m_pkthdr.len = MHLEN; 117645386Swpaul } 117749036Swpaul 117848597Swpaul m_adj(m_new, ETHER_ALIGN); 117945386Swpaul r = &sc->ti_rdata->ti_rx_mini_ring[i]; 118045386Swpaul sc->ti_cdata.ti_rx_mini_chain[i] = m_new; 118145386Swpaul TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t)); 118245386Swpaul r->ti_type = TI_BDTYPE_RECV_BD; 118345386Swpaul r->ti_flags = TI_BDFLAG_MINI_RING; 118458698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 118558698Sjlemon r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM; 118649036Swpaul r->ti_len = m_new->m_len; 118745386Swpaul r->ti_idx = i; 118845386Swpaul 118945386Swpaul return(0); 119045386Swpaul} 119145386Swpaul 119298849Sken#ifdef TI_PRIVATE_JUMBOS 119398849Sken 119445386Swpaul/* 119545386Swpaul * Initialize a jumbo receive ring descriptor. This allocates 119645386Swpaul * a jumbo buffer from the pool managed internally by the driver. 119745386Swpaul */ 1198102336Salfredstatic int 1199102336Salfredti_newbuf_jumbo(sc, i, m) 120045386Swpaul struct ti_softc *sc; 120145386Swpaul int i; 120245386Swpaul struct mbuf *m; 120345386Swpaul{ 120445386Swpaul struct mbuf *m_new = NULL; 120545386Swpaul struct ti_rx_desc *r; 120645386Swpaul 120749036Swpaul if (m == NULL) { 120845386Swpaul caddr_t *buf = NULL; 120945386Swpaul 121045386Swpaul /* Allocate the mbuf. */ 1211111119Simp MGETHDR(m_new, M_DONTWAIT, MT_DATA); 121245386Swpaul if (m_new == NULL) { 121345386Swpaul return(ENOBUFS); 121445386Swpaul } 121545386Swpaul 121645386Swpaul /* Allocate the jumbo buffer */ 121745386Swpaul buf = ti_jalloc(sc); 121845386Swpaul if (buf == NULL) { 121945386Swpaul m_freem(m_new); 122045386Swpaul printf("ti%d: jumbo allocation failed " 122145386Swpaul "-- packet dropped!\n", sc->ti_unit); 122245386Swpaul return(ENOBUFS); 122345386Swpaul } 122445386Swpaul 122545386Swpaul /* Attach the buffer to the mbuf. */ 122664837Sdwmalone m_new->m_data = (void *) buf; 122764837Sdwmalone m_new->m_len = m_new->m_pkthdr.len = TI_JUMBO_FRAMELEN; 122867405Sbmilekic MEXTADD(m_new, buf, TI_JUMBO_FRAMELEN, ti_jfree, 122968621Sbmilekic (struct ti_softc *)sc, 0, EXT_NET_DRV); 123049036Swpaul } else { 123149036Swpaul m_new = m; 123249036Swpaul m_new->m_data = m_new->m_ext.ext_buf; 123349036Swpaul m_new->m_ext.ext_size = TI_JUMBO_FRAMELEN; 123445386Swpaul } 123545386Swpaul 123649780Swpaul m_adj(m_new, ETHER_ALIGN); 123745386Swpaul /* Set up the descriptor. */ 123845386Swpaul r = &sc->ti_rdata->ti_rx_jumbo_ring[i]; 123945386Swpaul sc->ti_cdata.ti_rx_jumbo_chain[i] = m_new; 124045386Swpaul TI_HOSTADDR(r->ti_addr) = vtophys(mtod(m_new, caddr_t)); 124145386Swpaul r->ti_type = TI_BDTYPE_RECV_JUMBO_BD; 124245386Swpaul r->ti_flags = TI_BDFLAG_JUMBO_RING; 124358698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 124458698Sjlemon r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM | TI_BDFLAG_IP_CKSUM; 124549036Swpaul r->ti_len = m_new->m_len; 124645386Swpaul r->ti_idx = i; 124745386Swpaul 124845386Swpaul return(0); 124945386Swpaul} 125045386Swpaul 125198849Sken#else 125298849Sken#include <vm/vm_page.h> 125398849Sken 125498849Sken#if (PAGE_SIZE == 4096) 125598849Sken#define NPAYLOAD 2 125698849Sken#else 125798849Sken#define NPAYLOAD 1 125898849Sken#endif 125998849Sken 126098849Sken#define TCP_HDR_LEN (52 + sizeof(struct ether_header)) 126198849Sken#define UDP_HDR_LEN (28 + sizeof(struct ether_header)) 126298849Sken#define NFS_HDR_LEN (UDP_HDR_LEN) 1263104401Salfredstatic int HDR_LEN = TCP_HDR_LEN; 126498849Sken 126598849Sken 126698849Sken /* 126798849Sken * Initialize a jumbo receive ring descriptor. This allocates 126898849Sken * a jumbo buffer from the pool managed internally by the driver. 126998849Sken */ 127098849Skenstatic int 127198849Skenti_newbuf_jumbo(sc, idx, m_old) 127298849Sken struct ti_softc *sc; 127398849Sken int idx; 127498849Sken struct mbuf *m_old; 127598849Sken{ 127698849Sken struct mbuf *cur, *m_new = NULL; 127798849Sken struct mbuf *m[3] = {NULL, NULL, NULL}; 127898849Sken struct ti_rx_desc_ext *r; 127998849Sken vm_page_t frame; 128098849Sken /* 1 extra buf to make nobufs easy*/ 128198849Sken caddr_t buf[3] = {NULL, NULL, NULL}; 128298849Sken int i; 128398849Sken 128498849Sken if (m_old != NULL) { 128598849Sken m_new = m_old; 128698849Sken cur = m_old->m_next; 128798849Sken for (i = 0; i <= NPAYLOAD; i++){ 128898849Sken m[i] = cur; 128998849Sken cur = cur->m_next; 129098849Sken } 129198849Sken } else { 129298849Sken /* Allocate the mbufs. */ 1293111119Simp MGETHDR(m_new, M_DONTWAIT, MT_DATA); 129498849Sken if (m_new == NULL) { 129598849Sken printf("ti%d: mbuf allocation failed " 129698849Sken "-- packet dropped!\n", sc->ti_unit); 129798849Sken goto nobufs; 129898849Sken } 1299111119Simp MGET(m[NPAYLOAD], M_DONTWAIT, MT_DATA); 130098849Sken if (m[NPAYLOAD] == NULL) { 130198849Sken printf("ti%d: cluster mbuf allocation failed " 130298849Sken "-- packet dropped!\n", sc->ti_unit); 130398849Sken goto nobufs; 130498849Sken } 1305111119Simp MCLGET(m[NPAYLOAD], M_DONTWAIT); 130698849Sken if ((m[NPAYLOAD]->m_flags & M_EXT) == 0) { 130798849Sken printf("ti%d: mbuf allocation failed " 130898849Sken "-- packet dropped!\n", sc->ti_unit); 130998849Sken goto nobufs; 131098849Sken } 131198849Sken m[NPAYLOAD]->m_len = MCLBYTES; 131298849Sken 131398849Sken for (i = 0; i < NPAYLOAD; i++){ 1314111119Simp MGET(m[i], M_DONTWAIT, MT_DATA); 131598849Sken if (m[i] == NULL) { 131698849Sken printf("ti%d: mbuf allocation failed " 131798849Sken "-- packet dropped!\n", sc->ti_unit); 131898849Sken goto nobufs; 131998849Sken } 132098849Sken if (!(frame = jumbo_pg_alloc())){ 132198849Sken printf("ti%d: buffer allocation failed " 132298849Sken "-- packet dropped!\n", sc->ti_unit); 132398849Sken printf(" index %d page %d\n", idx, i); 132498849Sken goto nobufs; 132598849Sken } 132698849Sken buf[i] = jumbo_phys_to_kva(VM_PAGE_TO_PHYS(frame)); 132798849Sken } 132898849Sken for (i = 0; i < NPAYLOAD; i++){ 132998849Sken /* Attach the buffer to the mbuf. */ 133098849Sken m[i]->m_data = (void *)buf[i]; 133198849Sken m[i]->m_len = PAGE_SIZE; 133298849Sken MEXTADD(m[i], (void *)buf[i], PAGE_SIZE, 133398849Sken jumbo_freem, NULL, 0, EXT_DISPOSABLE); 133498849Sken m[i]->m_next = m[i+1]; 133598849Sken } 133698849Sken /* link the buffers to the header */ 133798849Sken m_new->m_next = m[0]; 133898849Sken m_new->m_data += ETHER_ALIGN; 133998849Sken if (sc->ti_hdrsplit) 134098849Sken m_new->m_len = MHLEN - ETHER_ALIGN; 134198849Sken else 134298849Sken m_new->m_len = HDR_LEN; 134398849Sken m_new->m_pkthdr.len = NPAYLOAD * PAGE_SIZE + m_new->m_len; 134498849Sken } 134598849Sken 134698849Sken /* Set up the descriptor. */ 134798849Sken r = &sc->ti_rdata->ti_rx_jumbo_ring[idx]; 134898849Sken sc->ti_cdata.ti_rx_jumbo_chain[idx] = m_new; 134998849Sken TI_HOSTADDR(r->ti_addr0) = vtophys(mtod(m_new, caddr_t)); 135098849Sken r->ti_len0 = m_new->m_len; 135198849Sken 135298849Sken TI_HOSTADDR(r->ti_addr1) = vtophys(mtod(m[0], caddr_t)); 135398849Sken r->ti_len1 = PAGE_SIZE; 135498849Sken 135598849Sken TI_HOSTADDR(r->ti_addr2) = vtophys(mtod(m[1], caddr_t)); 135698849Sken r->ti_len2 = m[1]->m_ext.ext_size; /* could be PAGE_SIZE or MCLBYTES */ 135798849Sken 135898849Sken if (PAGE_SIZE == 4096) { 135998849Sken TI_HOSTADDR(r->ti_addr3) = vtophys(mtod(m[2], caddr_t)); 136098849Sken r->ti_len3 = MCLBYTES; 136198849Sken } else { 136298849Sken r->ti_len3 = 0; 136398849Sken } 136498849Sken r->ti_type = TI_BDTYPE_RECV_JUMBO_BD; 136598849Sken 136698849Sken r->ti_flags = TI_BDFLAG_JUMBO_RING|TI_RCB_FLAG_USE_EXT_RX_BD; 136798849Sken 136898849Sken if (sc->arpcom.ac_if.if_hwassist) 136998849Sken r->ti_flags |= TI_BDFLAG_TCP_UDP_CKSUM|TI_BDFLAG_IP_CKSUM; 137098849Sken 137198849Sken r->ti_idx = idx; 137298849Sken 137398849Sken return(0); 137498849Sken 137598849Sken nobufs: 137698849Sken 137798849Sken /* 137898849Sken * Warning! : 137998849Sken * This can only be called before the mbufs are strung together. 138098849Sken * If the mbufs are strung together, m_freem() will free the chain, 138198849Sken * so that the later mbufs will be freed multiple times. 138298849Sken */ 138398849Sken if (m_new) 138498849Sken m_freem(m_new); 138598849Sken 138698849Sken for(i = 0; i < 3; i++){ 138798849Sken if (m[i]) 138898849Sken m_freem(m[i]); 138998849Sken if (buf[i]) 139098849Sken jumbo_pg_free((vm_offset_t)buf[i]); 139198849Sken } 139298849Sken return ENOBUFS; 139398849Sken} 139498849Sken#endif 139598849Sken 139698849Sken 139798849Sken 139845386Swpaul/* 139945386Swpaul * The standard receive ring has 512 entries in it. At 2K per mbuf cluster, 140045386Swpaul * that's 1MB or memory, which is a lot. For now, we fill only the first 140145386Swpaul * 256 ring entries and hope that our CPU is fast enough to keep up with 140245386Swpaul * the NIC. 140345386Swpaul */ 1404102336Salfredstatic int 1405102336Salfredti_init_rx_ring_std(sc) 140645386Swpaul struct ti_softc *sc; 140745386Swpaul{ 140845386Swpaul register int i; 140945386Swpaul struct ti_cmd_desc cmd; 141045386Swpaul 141145386Swpaul for (i = 0; i < TI_SSLOTS; i++) { 141245386Swpaul if (ti_newbuf_std(sc, i, NULL) == ENOBUFS) 141345386Swpaul return(ENOBUFS); 141445386Swpaul }; 141545386Swpaul 141645386Swpaul TI_UPDATE_STDPROD(sc, i - 1); 141748597Swpaul sc->ti_std = i - 1; 141845386Swpaul 141945386Swpaul return(0); 142045386Swpaul} 142145386Swpaul 1422102336Salfredstatic void 1423102336Salfredti_free_rx_ring_std(sc) 142445386Swpaul struct ti_softc *sc; 142545386Swpaul{ 142645386Swpaul register int i; 142745386Swpaul 142845386Swpaul for (i = 0; i < TI_STD_RX_RING_CNT; i++) { 142945386Swpaul if (sc->ti_cdata.ti_rx_std_chain[i] != NULL) { 143045386Swpaul m_freem(sc->ti_cdata.ti_rx_std_chain[i]); 143145386Swpaul sc->ti_cdata.ti_rx_std_chain[i] = NULL; 143245386Swpaul } 143345386Swpaul bzero((char *)&sc->ti_rdata->ti_rx_std_ring[i], 143445386Swpaul sizeof(struct ti_rx_desc)); 143545386Swpaul } 143645386Swpaul 143745386Swpaul return; 143845386Swpaul} 143945386Swpaul 1440102336Salfredstatic int 1441102336Salfredti_init_rx_ring_jumbo(sc) 144245386Swpaul struct ti_softc *sc; 144345386Swpaul{ 144445386Swpaul register int i; 144545386Swpaul struct ti_cmd_desc cmd; 144645386Swpaul 144763699Swpaul for (i = 0; i < TI_JUMBO_RX_RING_CNT; i++) { 144845386Swpaul if (ti_newbuf_jumbo(sc, i, NULL) == ENOBUFS) 144945386Swpaul return(ENOBUFS); 145045386Swpaul }; 145145386Swpaul 145245386Swpaul TI_UPDATE_JUMBOPROD(sc, i - 1); 145348597Swpaul sc->ti_jumbo = i - 1; 145445386Swpaul 145545386Swpaul return(0); 145645386Swpaul} 145745386Swpaul 1458102336Salfredstatic void 1459102336Salfredti_free_rx_ring_jumbo(sc) 146045386Swpaul struct ti_softc *sc; 146145386Swpaul{ 146245386Swpaul register int i; 146345386Swpaul 146445386Swpaul for (i = 0; i < TI_JUMBO_RX_RING_CNT; i++) { 146545386Swpaul if (sc->ti_cdata.ti_rx_jumbo_chain[i] != NULL) { 146645386Swpaul m_freem(sc->ti_cdata.ti_rx_jumbo_chain[i]); 146745386Swpaul sc->ti_cdata.ti_rx_jumbo_chain[i] = NULL; 146845386Swpaul } 146945386Swpaul bzero((char *)&sc->ti_rdata->ti_rx_jumbo_ring[i], 147045386Swpaul sizeof(struct ti_rx_desc)); 147145386Swpaul } 147245386Swpaul 147345386Swpaul return; 147445386Swpaul} 147545386Swpaul 1476102336Salfredstatic int 1477102336Salfredti_init_rx_ring_mini(sc) 147845386Swpaul struct ti_softc *sc; 147945386Swpaul{ 148045386Swpaul register int i; 148145386Swpaul 148245386Swpaul for (i = 0; i < TI_MSLOTS; i++) { 148345386Swpaul if (ti_newbuf_mini(sc, i, NULL) == ENOBUFS) 148445386Swpaul return(ENOBUFS); 148545386Swpaul }; 148645386Swpaul 148745386Swpaul TI_UPDATE_MINIPROD(sc, i - 1); 148848597Swpaul sc->ti_mini = i - 1; 148945386Swpaul 149045386Swpaul return(0); 149145386Swpaul} 149245386Swpaul 1493102336Salfredstatic void 1494102336Salfredti_free_rx_ring_mini(sc) 149545386Swpaul struct ti_softc *sc; 149645386Swpaul{ 149745386Swpaul register int i; 149845386Swpaul 149945386Swpaul for (i = 0; i < TI_MINI_RX_RING_CNT; i++) { 150045386Swpaul if (sc->ti_cdata.ti_rx_mini_chain[i] != NULL) { 150145386Swpaul m_freem(sc->ti_cdata.ti_rx_mini_chain[i]); 150245386Swpaul sc->ti_cdata.ti_rx_mini_chain[i] = NULL; 150345386Swpaul } 150445386Swpaul bzero((char *)&sc->ti_rdata->ti_rx_mini_ring[i], 150545386Swpaul sizeof(struct ti_rx_desc)); 150645386Swpaul } 150745386Swpaul 150845386Swpaul return; 150945386Swpaul} 151045386Swpaul 1511102336Salfredstatic void 1512102336Salfredti_free_tx_ring(sc) 151345386Swpaul struct ti_softc *sc; 151445386Swpaul{ 151545386Swpaul register int i; 151645386Swpaul 151745386Swpaul if (sc->ti_rdata->ti_tx_ring == NULL) 151845386Swpaul return; 151945386Swpaul 152045386Swpaul for (i = 0; i < TI_TX_RING_CNT; i++) { 152145386Swpaul if (sc->ti_cdata.ti_tx_chain[i] != NULL) { 152245386Swpaul m_freem(sc->ti_cdata.ti_tx_chain[i]); 152345386Swpaul sc->ti_cdata.ti_tx_chain[i] = NULL; 152445386Swpaul } 152545386Swpaul bzero((char *)&sc->ti_rdata->ti_tx_ring[i], 152645386Swpaul sizeof(struct ti_tx_desc)); 152745386Swpaul } 152845386Swpaul 152945386Swpaul return; 153045386Swpaul} 153145386Swpaul 1532102336Salfredstatic int 1533102336Salfredti_init_tx_ring(sc) 153445386Swpaul struct ti_softc *sc; 153545386Swpaul{ 153648011Swpaul sc->ti_txcnt = 0; 153745386Swpaul sc->ti_tx_saved_considx = 0; 153845386Swpaul CSR_WRITE_4(sc, TI_MB_SENDPROD_IDX, 0); 153945386Swpaul return(0); 154045386Swpaul} 154145386Swpaul 154245386Swpaul/* 154345386Swpaul * The Tigon 2 firmware has a new way to add/delete multicast addresses, 154445386Swpaul * but we have to support the old way too so that Tigon 1 cards will 154545386Swpaul * work. 154645386Swpaul */ 1547105219Sphkstatic void 1548102336Salfredti_add_mcast(sc, addr) 154945386Swpaul struct ti_softc *sc; 155045386Swpaul struct ether_addr *addr; 155145386Swpaul{ 155245386Swpaul struct ti_cmd_desc cmd; 155345386Swpaul u_int16_t *m; 155445386Swpaul u_int32_t ext[2] = {0, 0}; 155545386Swpaul 155645386Swpaul m = (u_int16_t *)&addr->octet[0]; 155745386Swpaul 155845386Swpaul switch(sc->ti_hwrev) { 155945386Swpaul case TI_HWREV_TIGON: 156045386Swpaul CSR_WRITE_4(sc, TI_GCR_MAR0, htons(m[0])); 156145386Swpaul CSR_WRITE_4(sc, TI_GCR_MAR1, (htons(m[1]) << 16) | htons(m[2])); 156245386Swpaul TI_DO_CMD(TI_CMD_ADD_MCAST_ADDR, 0, 0); 156345386Swpaul break; 156445386Swpaul case TI_HWREV_TIGON_II: 156545386Swpaul ext[0] = htons(m[0]); 156645386Swpaul ext[1] = (htons(m[1]) << 16) | htons(m[2]); 156745386Swpaul TI_DO_CMD_EXT(TI_CMD_EXT_ADD_MCAST, 0, 0, (caddr_t)&ext, 2); 156845386Swpaul break; 156945386Swpaul default: 157045386Swpaul printf("ti%d: unknown hwrev\n", sc->ti_unit); 157145386Swpaul break; 157245386Swpaul } 157345386Swpaul 157445386Swpaul return; 157545386Swpaul} 157645386Swpaul 1577105219Sphkstatic void 1578102336Salfredti_del_mcast(sc, addr) 157945386Swpaul struct ti_softc *sc; 158045386Swpaul struct ether_addr *addr; 158145386Swpaul{ 158245386Swpaul struct ti_cmd_desc cmd; 158345386Swpaul u_int16_t *m; 158445386Swpaul u_int32_t ext[2] = {0, 0}; 158545386Swpaul 158645386Swpaul m = (u_int16_t *)&addr->octet[0]; 158745386Swpaul 158845386Swpaul switch(sc->ti_hwrev) { 158945386Swpaul case TI_HWREV_TIGON: 159045386Swpaul CSR_WRITE_4(sc, TI_GCR_MAR0, htons(m[0])); 159145386Swpaul CSR_WRITE_4(sc, TI_GCR_MAR1, (htons(m[1]) << 16) | htons(m[2])); 159245386Swpaul TI_DO_CMD(TI_CMD_DEL_MCAST_ADDR, 0, 0); 159345386Swpaul break; 159445386Swpaul case TI_HWREV_TIGON_II: 159545386Swpaul ext[0] = htons(m[0]); 159645386Swpaul ext[1] = (htons(m[1]) << 16) | htons(m[2]); 159745386Swpaul TI_DO_CMD_EXT(TI_CMD_EXT_DEL_MCAST, 0, 0, (caddr_t)&ext, 2); 159845386Swpaul break; 159945386Swpaul default: 160045386Swpaul printf("ti%d: unknown hwrev\n", sc->ti_unit); 160145386Swpaul break; 160245386Swpaul } 160345386Swpaul 160445386Swpaul return; 160545386Swpaul} 160645386Swpaul 160745386Swpaul/* 160845386Swpaul * Configure the Tigon's multicast address filter. 160945386Swpaul * 161045386Swpaul * The actual multicast table management is a bit of a pain, thanks to 161145386Swpaul * slight brain damage on the part of both Alteon and us. With our 161245386Swpaul * multicast code, we are only alerted when the multicast address table 161345386Swpaul * changes and at that point we only have the current list of addresses: 161445386Swpaul * we only know the current state, not the previous state, so we don't 161545386Swpaul * actually know what addresses were removed or added. The firmware has 161645386Swpaul * state, but we can't get our grubby mits on it, and there is no 'delete 161745386Swpaul * all multicast addresses' command. Hence, we have to maintain our own 161845386Swpaul * state so we know what addresses have been programmed into the NIC at 161945386Swpaul * any given time. 162045386Swpaul */ 1621102336Salfredstatic void 1622102336Salfredti_setmulti(sc) 162345386Swpaul struct ti_softc *sc; 162445386Swpaul{ 162545386Swpaul struct ifnet *ifp; 162645386Swpaul struct ifmultiaddr *ifma; 162745386Swpaul struct ti_cmd_desc cmd; 162845386Swpaul struct ti_mc_entry *mc; 162945386Swpaul u_int32_t intrs; 163045386Swpaul 163145386Swpaul ifp = &sc->arpcom.ac_if; 163245386Swpaul 163345386Swpaul if (ifp->if_flags & IFF_ALLMULTI) { 163445386Swpaul TI_DO_CMD(TI_CMD_SET_ALLMULTI, TI_CMD_CODE_ALLMULTI_ENB, 0); 163545386Swpaul return; 163645386Swpaul } else { 163745386Swpaul TI_DO_CMD(TI_CMD_SET_ALLMULTI, TI_CMD_CODE_ALLMULTI_DIS, 0); 163845386Swpaul } 163945386Swpaul 164045386Swpaul /* Disable interrupts. */ 164145386Swpaul intrs = CSR_READ_4(sc, TI_MB_HOSTINTR); 164245386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1); 164345386Swpaul 164445386Swpaul /* First, zot all the existing filters. */ 164571999Sphk while (SLIST_FIRST(&sc->ti_mc_listhead) != NULL) { 164671999Sphk mc = SLIST_FIRST(&sc->ti_mc_listhead); 164745386Swpaul ti_del_mcast(sc, &mc->mc_addr); 164845386Swpaul SLIST_REMOVE_HEAD(&sc->ti_mc_listhead, mc_entries); 164945386Swpaul free(mc, M_DEVBUF); 165045386Swpaul } 165145386Swpaul 165245386Swpaul /* Now program new ones. */ 165372084Sphk TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 165445386Swpaul if (ifma->ifma_addr->sa_family != AF_LINK) 165545386Swpaul continue; 165645386Swpaul mc = malloc(sizeof(struct ti_mc_entry), M_DEVBUF, M_NOWAIT); 165745386Swpaul bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 165845386Swpaul (char *)&mc->mc_addr, ETHER_ADDR_LEN); 165945386Swpaul SLIST_INSERT_HEAD(&sc->ti_mc_listhead, mc, mc_entries); 166045386Swpaul ti_add_mcast(sc, &mc->mc_addr); 166145386Swpaul } 166245386Swpaul 166345386Swpaul /* Re-enable interrupts. */ 166445386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, intrs); 166545386Swpaul 166645386Swpaul return; 166745386Swpaul} 166845386Swpaul 166945386Swpaul/* 167045386Swpaul * Check to see if the BIOS has configured us for a 64 bit slot when 167145386Swpaul * we aren't actually in one. If we detect this condition, we can work 167245386Swpaul * around it on the Tigon 2 by setting a bit in the PCI state register, 167345386Swpaul * but for the Tigon 1 we must give up and abort the interface attach. 167445386Swpaul */ 167545386Swpaulstatic int ti_64bitslot_war(sc) 167645386Swpaul struct ti_softc *sc; 167745386Swpaul{ 167845386Swpaul if (!(CSR_READ_4(sc, TI_PCI_STATE) & TI_PCISTATE_32BIT_BUS)) { 167945386Swpaul CSR_WRITE_4(sc, 0x600, 0); 168045386Swpaul CSR_WRITE_4(sc, 0x604, 0); 168145386Swpaul CSR_WRITE_4(sc, 0x600, 0x5555AAAA); 168245386Swpaul if (CSR_READ_4(sc, 0x604) == 0x5555AAAA) { 168345386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) 168445386Swpaul return(EINVAL); 168545386Swpaul else { 168645386Swpaul TI_SETBIT(sc, TI_PCI_STATE, 168745386Swpaul TI_PCISTATE_32BIT_BUS); 168845386Swpaul return(0); 168945386Swpaul } 169045386Swpaul } 169145386Swpaul } 169245386Swpaul 169345386Swpaul return(0); 169445386Swpaul} 169545386Swpaul 169645386Swpaul/* 169745386Swpaul * Do endian, PCI and DMA initialization. Also check the on-board ROM 169845386Swpaul * self-test results. 169945386Swpaul */ 1700102336Salfredstatic int 1701102336Salfredti_chipinit(sc) 170245386Swpaul struct ti_softc *sc; 170345386Swpaul{ 170445386Swpaul u_int32_t cacheline; 170545386Swpaul u_int32_t pci_writemax = 0; 170698849Sken u_int32_t hdrsplit; 170745386Swpaul 170845386Swpaul /* Initialize link to down state. */ 170945386Swpaul sc->ti_linkstat = TI_EV_CODE_LINK_DOWN; 171045386Swpaul 171183630Sjlemon if (sc->arpcom.ac_if.if_capenable & IFCAP_HWCSUM) 171283630Sjlemon sc->arpcom.ac_if.if_hwassist = TI_CSUM_FEATURES; 171383630Sjlemon else 171483630Sjlemon sc->arpcom.ac_if.if_hwassist = 0; 171558698Sjlemon 171645386Swpaul /* Set endianness before we access any non-PCI registers. */ 171745386Swpaul#if BYTE_ORDER == BIG_ENDIAN 171845386Swpaul CSR_WRITE_4(sc, TI_MISC_HOST_CTL, 171945386Swpaul TI_MHC_BIGENDIAN_INIT | (TI_MHC_BIGENDIAN_INIT << 24)); 172045386Swpaul#else 172145386Swpaul CSR_WRITE_4(sc, TI_MISC_HOST_CTL, 172245386Swpaul TI_MHC_LITTLEENDIAN_INIT | (TI_MHC_LITTLEENDIAN_INIT << 24)); 172345386Swpaul#endif 172445386Swpaul 172545386Swpaul /* Check the ROM failed bit to see if self-tests passed. */ 172645386Swpaul if (CSR_READ_4(sc, TI_CPU_STATE) & TI_CPUSTATE_ROMFAIL) { 172745386Swpaul printf("ti%d: board self-diagnostics failed!\n", sc->ti_unit); 172845386Swpaul return(ENODEV); 172945386Swpaul } 173045386Swpaul 173145386Swpaul /* Halt the CPU. */ 173245386Swpaul TI_SETBIT(sc, TI_CPU_STATE, TI_CPUSTATE_HALT); 173345386Swpaul 173445386Swpaul /* Figure out the hardware revision. */ 173545386Swpaul switch(CSR_READ_4(sc, TI_MISC_HOST_CTL) & TI_MHC_CHIP_REV_MASK) { 173645386Swpaul case TI_REV_TIGON_I: 173745386Swpaul sc->ti_hwrev = TI_HWREV_TIGON; 173845386Swpaul break; 173945386Swpaul case TI_REV_TIGON_II: 174045386Swpaul sc->ti_hwrev = TI_HWREV_TIGON_II; 174145386Swpaul break; 174245386Swpaul default: 174345386Swpaul printf("ti%d: unsupported chip revision\n", sc->ti_unit); 174445386Swpaul return(ENODEV); 174545386Swpaul } 174645386Swpaul 174745386Swpaul /* Do special setup for Tigon 2. */ 174845386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON_II) { 174945386Swpaul TI_SETBIT(sc, TI_CPU_CTL_B, TI_CPUSTATE_HALT); 175076033Swpaul TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_SRAM_BANK_512K); 175145386Swpaul TI_SETBIT(sc, TI_MISC_CONF, TI_MCR_SRAM_SYNCHRONOUS); 175245386Swpaul } 175345386Swpaul 175498849Sken /* 175598849Sken * We don't have firmware source for the Tigon 1, so Tigon 1 boards 175698849Sken * can't do header splitting. 175798849Sken */ 175898849Sken#ifdef TI_JUMBO_HDRSPLIT 175998849Sken if (sc->ti_hwrev != TI_HWREV_TIGON) 176098849Sken sc->ti_hdrsplit = 1; 176198849Sken else 176298849Sken printf("ti%d: can't do header splitting on a Tigon I board\n", 176398849Sken sc->ti_unit); 176498849Sken#endif /* TI_JUMBO_HDRSPLIT */ 176598849Sken 176645386Swpaul /* Set up the PCI state register. */ 176745386Swpaul CSR_WRITE_4(sc, TI_PCI_STATE, TI_PCI_READ_CMD|TI_PCI_WRITE_CMD); 176845386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON_II) { 176945386Swpaul TI_SETBIT(sc, TI_PCI_STATE, TI_PCISTATE_USE_MEM_RD_MULT); 177045386Swpaul } 177145386Swpaul 177245386Swpaul /* Clear the read/write max DMA parameters. */ 177345386Swpaul TI_CLRBIT(sc, TI_PCI_STATE, (TI_PCISTATE_WRITE_MAXDMA| 177445386Swpaul TI_PCISTATE_READ_MAXDMA)); 177545386Swpaul 177645386Swpaul /* Get cache line size. */ 177745386Swpaul cacheline = CSR_READ_4(sc, TI_PCI_BIST) & 0xFF; 177845386Swpaul 177945386Swpaul /* 178045386Swpaul * If the system has set enabled the PCI memory write 178145386Swpaul * and invalidate command in the command register, set 178245386Swpaul * the write max parameter accordingly. This is necessary 178345386Swpaul * to use MWI with the Tigon 2. 178445386Swpaul */ 178545386Swpaul if (CSR_READ_4(sc, TI_PCI_CMDSTAT) & PCIM_CMD_MWIEN) { 178645386Swpaul switch(cacheline) { 178745386Swpaul case 1: 178845386Swpaul case 4: 178945386Swpaul case 8: 179045386Swpaul case 16: 179145386Swpaul case 32: 179245386Swpaul case 64: 179345386Swpaul break; 179445386Swpaul default: 179545386Swpaul /* Disable PCI memory write and invalidate. */ 179645386Swpaul if (bootverbose) 179745386Swpaul printf("ti%d: cache line size %d not " 179845386Swpaul "supported; disabling PCI MWI\n", 179945386Swpaul sc->ti_unit, cacheline); 180045386Swpaul CSR_WRITE_4(sc, TI_PCI_CMDSTAT, CSR_READ_4(sc, 180145386Swpaul TI_PCI_CMDSTAT) & ~PCIM_CMD_MWIEN); 180245386Swpaul break; 180345386Swpaul } 180445386Swpaul } 180545386Swpaul 180645386Swpaul#ifdef __brokenalpha__ 180745386Swpaul /* 180845386Swpaul * From the Alteon sample driver: 180945386Swpaul * Must insure that we do not cross an 8K (bytes) boundary 181045386Swpaul * for DMA reads. Our highest limit is 1K bytes. This is a 181145386Swpaul * restriction on some ALPHA platforms with early revision 181245386Swpaul * 21174 PCI chipsets, such as the AlphaPC 164lx 181345386Swpaul */ 181445386Swpaul TI_SETBIT(sc, TI_PCI_STATE, pci_writemax|TI_PCI_READMAX_1024); 181545386Swpaul#else 181645386Swpaul TI_SETBIT(sc, TI_PCI_STATE, pci_writemax); 181745386Swpaul#endif 181845386Swpaul 181945386Swpaul /* This sets the min dma param all the way up (0xff). */ 182045386Swpaul TI_SETBIT(sc, TI_PCI_STATE, TI_PCISTATE_MINDMA); 182145386Swpaul 182298849Sken if (sc->ti_hdrsplit) 182398849Sken hdrsplit = TI_OPMODE_JUMBO_HDRSPLIT; 182498849Sken else 182598849Sken hdrsplit = 0; 182698849Sken 182745386Swpaul /* Configure DMA variables. */ 182845386Swpaul#if BYTE_ORDER == BIG_ENDIAN 182945386Swpaul CSR_WRITE_4(sc, TI_GCR_OPMODE, TI_OPMODE_BYTESWAP_BD | 183045386Swpaul TI_OPMODE_BYTESWAP_DATA | TI_OPMODE_WORDSWAP_BD | 183145386Swpaul TI_OPMODE_WARN_ENB | TI_OPMODE_FATAL_ENB | 183298849Sken TI_OPMODE_DONT_FRAG_JUMBO | hdrsplit); 183398849Sken#else /* BYTE_ORDER */ 183445386Swpaul CSR_WRITE_4(sc, TI_GCR_OPMODE, TI_OPMODE_BYTESWAP_DATA| 183545386Swpaul TI_OPMODE_WORDSWAP_BD|TI_OPMODE_DONT_FRAG_JUMBO| 183698849Sken TI_OPMODE_WARN_ENB|TI_OPMODE_FATAL_ENB | hdrsplit); 183798849Sken#endif /* BYTE_ORDER */ 183845386Swpaul 183945386Swpaul /* 184045386Swpaul * Only allow 1 DMA channel to be active at a time. 184145386Swpaul * I don't think this is a good idea, but without it 184245386Swpaul * the firmware racks up lots of nicDmaReadRingFull 184358698Sjlemon * errors. This is not compatible with hardware checksums. 184445386Swpaul */ 184558698Sjlemon if (sc->arpcom.ac_if.if_hwassist == 0) 184658698Sjlemon TI_SETBIT(sc, TI_GCR_OPMODE, TI_OPMODE_1_DMA_ACTIVE); 184745386Swpaul 184845386Swpaul /* Recommended settings from Tigon manual. */ 184945386Swpaul CSR_WRITE_4(sc, TI_GCR_DMA_WRITECFG, TI_DMA_STATE_THRESH_8W); 185045386Swpaul CSR_WRITE_4(sc, TI_GCR_DMA_READCFG, TI_DMA_STATE_THRESH_8W); 185145386Swpaul 185245386Swpaul if (ti_64bitslot_war(sc)) { 185345386Swpaul printf("ti%d: bios thinks we're in a 64 bit slot, " 185445386Swpaul "but we aren't", sc->ti_unit); 185545386Swpaul return(EINVAL); 185645386Swpaul } 185745386Swpaul 185845386Swpaul return(0); 185945386Swpaul} 186045386Swpaul 186145386Swpaul/* 186245386Swpaul * Initialize the general information block and firmware, and 186345386Swpaul * start the CPU(s) running. 186445386Swpaul */ 1865102336Salfredstatic int 1866102336Salfredti_gibinit(sc) 186745386Swpaul struct ti_softc *sc; 186845386Swpaul{ 186945386Swpaul struct ti_rcb *rcb; 187045386Swpaul int i; 187145386Swpaul struct ifnet *ifp; 187245386Swpaul 187345386Swpaul ifp = &sc->arpcom.ac_if; 187445386Swpaul 187545386Swpaul /* Disable interrupts for now. */ 187645386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1); 187745386Swpaul 187845386Swpaul /* Tell the chip where to find the general information block. */ 187945386Swpaul CSR_WRITE_4(sc, TI_GCR_GENINFO_HI, 0); 188045386Swpaul CSR_WRITE_4(sc, TI_GCR_GENINFO_LO, vtophys(&sc->ti_rdata->ti_info)); 188145386Swpaul 188245386Swpaul /* Load the firmware into SRAM. */ 188345386Swpaul ti_loadfw(sc); 188445386Swpaul 188545386Swpaul /* Set up the contents of the general info and ring control blocks. */ 188645386Swpaul 188745386Swpaul /* Set up the event ring and producer pointer. */ 188845386Swpaul rcb = &sc->ti_rdata->ti_info.ti_ev_rcb; 188945386Swpaul 189045386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = vtophys(&sc->ti_rdata->ti_event_ring); 189145386Swpaul rcb->ti_flags = 0; 189245386Swpaul TI_HOSTADDR(sc->ti_rdata->ti_info.ti_ev_prodidx_ptr) = 189345386Swpaul vtophys(&sc->ti_ev_prodidx); 189445386Swpaul sc->ti_ev_prodidx.ti_idx = 0; 189545386Swpaul CSR_WRITE_4(sc, TI_GCR_EVENTCONS_IDX, 0); 189645386Swpaul sc->ti_ev_saved_considx = 0; 189745386Swpaul 189845386Swpaul /* Set up the command ring and producer mailbox. */ 189945386Swpaul rcb = &sc->ti_rdata->ti_info.ti_cmd_rcb; 190045386Swpaul 190145386Swpaul sc->ti_rdata->ti_cmd_ring = 190249133Swpaul (struct ti_cmd_desc *)(sc->ti_vhandle + TI_GCR_CMDRING); 190345386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = TI_GCR_NIC_ADDR(TI_GCR_CMDRING); 190445386Swpaul rcb->ti_flags = 0; 190545386Swpaul rcb->ti_max_len = 0; 190645386Swpaul for (i = 0; i < TI_CMD_RING_CNT; i++) { 190745386Swpaul CSR_WRITE_4(sc, TI_GCR_CMDRING + (i * 4), 0); 190845386Swpaul } 190945386Swpaul CSR_WRITE_4(sc, TI_GCR_CMDCONS_IDX, 0); 191045386Swpaul CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, 0); 191145386Swpaul sc->ti_cmd_saved_prodidx = 0; 191245386Swpaul 191345386Swpaul /* 191445386Swpaul * Assign the address of the stats refresh buffer. 191545386Swpaul * We re-use the current stats buffer for this to 191645386Swpaul * conserve memory. 191745386Swpaul */ 191845386Swpaul TI_HOSTADDR(sc->ti_rdata->ti_info.ti_refresh_stats_ptr) = 191945386Swpaul vtophys(&sc->ti_rdata->ti_info.ti_stats); 192045386Swpaul 192145386Swpaul /* Set up the standard receive ring. */ 192245386Swpaul rcb = &sc->ti_rdata->ti_info.ti_std_rx_rcb; 192345386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = vtophys(&sc->ti_rdata->ti_rx_std_ring); 192445386Swpaul rcb->ti_max_len = TI_FRAMELEN; 192545386Swpaul rcb->ti_flags = 0; 192658698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 192758698Sjlemon rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM | 192858698Sjlemon TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; 192945386Swpaul rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; 193045386Swpaul 193145386Swpaul /* Set up the jumbo receive ring. */ 193245386Swpaul rcb = &sc->ti_rdata->ti_info.ti_jumbo_rx_rcb; 193345386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = 193445386Swpaul vtophys(&sc->ti_rdata->ti_rx_jumbo_ring); 193598849Sken 193698849Sken#ifdef TI_PRIVATE_JUMBOS 193749036Swpaul rcb->ti_max_len = TI_JUMBO_FRAMELEN; 193845386Swpaul rcb->ti_flags = 0; 193998849Sken#else 194098849Sken rcb->ti_max_len = PAGE_SIZE; 194198849Sken rcb->ti_flags = TI_RCB_FLAG_USE_EXT_RX_BD; 194298849Sken#endif 194358698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 194458698Sjlemon rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM | 194558698Sjlemon TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; 194645386Swpaul rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; 194745386Swpaul 194845386Swpaul /* 194945386Swpaul * Set up the mini ring. Only activated on the 195045386Swpaul * Tigon 2 but the slot in the config block is 195145386Swpaul * still there on the Tigon 1. 195245386Swpaul */ 195345386Swpaul rcb = &sc->ti_rdata->ti_info.ti_mini_rx_rcb; 195445386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = 195545386Swpaul vtophys(&sc->ti_rdata->ti_rx_mini_ring); 195651352Swpaul rcb->ti_max_len = MHLEN - ETHER_ALIGN; 195745386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) 195845386Swpaul rcb->ti_flags = TI_RCB_FLAG_RING_DISABLED; 195945386Swpaul else 196045386Swpaul rcb->ti_flags = 0; 196158698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 196258698Sjlemon rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM | 196358698Sjlemon TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; 196445386Swpaul rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; 196545386Swpaul 196645386Swpaul /* 196745386Swpaul * Set up the receive return ring. 196845386Swpaul */ 196945386Swpaul rcb = &sc->ti_rdata->ti_info.ti_return_rcb; 197045386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = 197145386Swpaul vtophys(&sc->ti_rdata->ti_rx_return_ring); 197245386Swpaul rcb->ti_flags = 0; 197345386Swpaul rcb->ti_max_len = TI_RETURN_RING_CNT; 197445386Swpaul TI_HOSTADDR(sc->ti_rdata->ti_info.ti_return_prodidx_ptr) = 197545386Swpaul vtophys(&sc->ti_return_prodidx); 197645386Swpaul 197745386Swpaul /* 197845386Swpaul * Set up the tx ring. Note: for the Tigon 2, we have the option 197945386Swpaul * of putting the transmit ring in the host's address space and 198045386Swpaul * letting the chip DMA it instead of leaving the ring in the NIC's 198145386Swpaul * memory and accessing it through the shared memory region. We 198245386Swpaul * do this for the Tigon 2, but it doesn't work on the Tigon 1, 198345386Swpaul * so we have to revert to the shared memory scheme if we detect 198445386Swpaul * a Tigon 1 chip. 198545386Swpaul */ 198645386Swpaul CSR_WRITE_4(sc, TI_WINBASE, TI_TX_RING_BASE); 198745386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) { 198845386Swpaul sc->ti_rdata->ti_tx_ring_nic = 198949133Swpaul (struct ti_tx_desc *)(sc->ti_vhandle + TI_WINDOW); 199045386Swpaul } 199145386Swpaul bzero((char *)sc->ti_rdata->ti_tx_ring, 199245386Swpaul TI_TX_RING_CNT * sizeof(struct ti_tx_desc)); 199345386Swpaul rcb = &sc->ti_rdata->ti_info.ti_tx_rcb; 199445386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) 199545386Swpaul rcb->ti_flags = 0; 199645386Swpaul else 199745386Swpaul rcb->ti_flags = TI_RCB_FLAG_HOST_RING; 199845386Swpaul rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; 199958698Sjlemon if (sc->arpcom.ac_if.if_hwassist) 200058698Sjlemon rcb->ti_flags |= TI_RCB_FLAG_TCP_UDP_CKSUM | 200158698Sjlemon TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; 200245386Swpaul rcb->ti_max_len = TI_TX_RING_CNT; 200345386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) 200445386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = TI_TX_RING_BASE; 200545386Swpaul else 200645386Swpaul TI_HOSTADDR(rcb->ti_hostaddr) = 200745386Swpaul vtophys(&sc->ti_rdata->ti_tx_ring); 200845386Swpaul TI_HOSTADDR(sc->ti_rdata->ti_info.ti_tx_considx_ptr) = 200945386Swpaul vtophys(&sc->ti_tx_considx); 201045386Swpaul 201145386Swpaul /* Set up tuneables */ 201298849Sken#if 0 201345386Swpaul if (ifp->if_mtu > (ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN)) 201445386Swpaul CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS, 201545386Swpaul (sc->ti_rx_coal_ticks / 10)); 201645386Swpaul else 201798849Sken#endif 201845386Swpaul CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS, sc->ti_rx_coal_ticks); 201945386Swpaul CSR_WRITE_4(sc, TI_GCR_TX_COAL_TICKS, sc->ti_tx_coal_ticks); 202045386Swpaul CSR_WRITE_4(sc, TI_GCR_STAT_TICKS, sc->ti_stat_ticks); 202145386Swpaul CSR_WRITE_4(sc, TI_GCR_RX_MAX_COAL_BD, sc->ti_rx_max_coal_bds); 202245386Swpaul CSR_WRITE_4(sc, TI_GCR_TX_MAX_COAL_BD, sc->ti_tx_max_coal_bds); 202345386Swpaul CSR_WRITE_4(sc, TI_GCR_TX_BUFFER_RATIO, sc->ti_tx_buf_ratio); 202445386Swpaul 202545386Swpaul /* Turn interrupts on. */ 202645386Swpaul CSR_WRITE_4(sc, TI_GCR_MASK_INTRS, 0); 202745386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0); 202845386Swpaul 202945386Swpaul /* Start CPU. */ 203045386Swpaul TI_CLRBIT(sc, TI_CPU_STATE, (TI_CPUSTATE_HALT|TI_CPUSTATE_STEP)); 203145386Swpaul 203245386Swpaul return(0); 203345386Swpaul} 203445386Swpaul 203545386Swpaul/* 203645386Swpaul * Probe for a Tigon chip. Check the PCI vendor and device IDs 203745386Swpaul * against our list and return its name if we find a match. 203845386Swpaul */ 2039102336Salfredstatic int 2040102336Salfredti_probe(dev) 204149011Swpaul device_t dev; 204245386Swpaul{ 204345386Swpaul struct ti_type *t; 204445386Swpaul 204545386Swpaul t = ti_devs; 204645386Swpaul 204745386Swpaul while(t->ti_name != NULL) { 204849011Swpaul if ((pci_get_vendor(dev) == t->ti_vid) && 204949011Swpaul (pci_get_device(dev) == t->ti_did)) { 205049011Swpaul device_set_desc(dev, t->ti_name); 205149011Swpaul return(0); 205249011Swpaul } 205345386Swpaul t++; 205445386Swpaul } 205545386Swpaul 205649011Swpaul return(ENXIO); 205745386Swpaul} 205845386Swpaul 205998849Sken#ifdef KLD_MODULE 206098849Skenstatic int 206198849Skenlog2rndup(int len) 206298849Sken{ 206398849Sken int log2size = 0, t = len; 206498849Sken while (t > 1) { 206598849Sken log2size++; 206698849Sken t >>= 1; 206798849Sken } 206898849Sken if (len != (1 << log2size)) 206998849Sken log2size++; 207098849Sken return log2size; 207198849Sken} 207298849Sken 207398849Skenstatic int 207498849Skenti_mbuf_sanity(device_t dev) 207598849Sken{ 207698849Sken if ((mbstat.m_msize != MSIZE) || mbstat.m_mclbytes != MCLBYTES){ 207798849Sken device_printf(dev, "\n"); 207898849Sken device_printf(dev, "This module was compiled with " 207998849Sken "-DMCLSHIFT=%d -DMSIZE=%d\n", MCLSHIFT, 208098849Sken MSIZE); 208198849Sken device_printf(dev, "The kernel was compiled with MCLSHIFT=%d," 208298849Sken " MSIZE=%d\n", log2rndup(mbstat.m_mclbytes), 208398849Sken (int)mbstat.m_msize); 208498849Sken return(EINVAL); 208598849Sken } 208698849Sken return(0); 208798849Sken} 208898849Sken#endif 208998849Sken 209098849Sken 2091102336Salfredstatic int 2092102336Salfredti_attach(dev) 209349011Swpaul device_t dev; 209445386Swpaul{ 209545386Swpaul struct ifnet *ifp; 209645386Swpaul struct ti_softc *sc; 209749011Swpaul int unit, error = 0, rid; 209845386Swpaul 209998849Sken sc = NULL; 210098849Sken 210198849Sken#ifdef KLD_MODULE 210298849Sken if (ti_mbuf_sanity(dev)){ 210398849Sken device_printf(dev, "Module mbuf constants do not match " 210498849Sken "kernel constants!\n"); 210598849Sken device_printf(dev, "Rebuild the module or the kernel so " 210698849Sken "they match\n"); 210798849Sken device_printf(dev, "\n"); 210898849Sken error = EINVAL; 210998849Sken goto fail; 211098849Sken } 211198849Sken#endif 211298849Sken 211349011Swpaul sc = device_get_softc(dev); 211449011Swpaul unit = device_get_unit(dev); 211545386Swpaul 211693818Sjhb mtx_init(&sc->ti_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 211793818Sjhb MTX_DEF | MTX_RECURSE); 2118113609Snjl ifmedia_init(&sc->ifmedia, IFM_IMASK, ti_ifmedia_upd, ti_ifmedia_sts); 2119106936Ssam sc->arpcom.ac_if.if_capabilities = IFCAP_HWCSUM | IFCAP_VLAN_HWTAGGING; 212083630Sjlemon sc->arpcom.ac_if.if_capenable = sc->arpcom.ac_if.if_capabilities; 212169583Swpaul 212245386Swpaul /* 212345386Swpaul * Map control/status registers. 212445386Swpaul */ 212572813Swpaul pci_enable_busmaster(dev); 212645386Swpaul 212749011Swpaul rid = TI_PCI_LOMEM; 212849011Swpaul sc->ti_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 212965176Sdfr 0, ~0, 1, RF_ACTIVE|PCI_RF_DENSE); 213049011Swpaul 213149011Swpaul if (sc->ti_res == NULL) { 213245386Swpaul printf ("ti%d: couldn't map memory\n", unit); 213349011Swpaul error = ENXIO; 213445386Swpaul goto fail; 213545386Swpaul } 213645386Swpaul 213749035Swpaul sc->ti_btag = rman_get_bustag(sc->ti_res); 213849035Swpaul sc->ti_bhandle = rman_get_bushandle(sc->ti_res); 213949133Swpaul sc->ti_vhandle = (vm_offset_t)rman_get_virtual(sc->ti_res); 214049035Swpaul 214149011Swpaul /* Allocate interrupt */ 214249011Swpaul rid = 0; 214349133Swpaul 214449011Swpaul sc->ti_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1, 214549011Swpaul RF_SHAREABLE | RF_ACTIVE); 214645386Swpaul 214749011Swpaul if (sc->ti_irq == NULL) { 214849011Swpaul printf("ti%d: couldn't map interrupt\n", unit); 214949011Swpaul error = ENXIO; 215045386Swpaul goto fail; 215145386Swpaul } 215245386Swpaul 215345386Swpaul sc->ti_unit = unit; 215445386Swpaul 215545386Swpaul if (ti_chipinit(sc)) { 215645386Swpaul printf("ti%d: chip initialization failed\n", sc->ti_unit); 215749011Swpaul error = ENXIO; 215845386Swpaul goto fail; 215945386Swpaul } 216045386Swpaul 216145386Swpaul /* Zero out the NIC's on-board SRAM. */ 216245386Swpaul ti_mem(sc, 0x2000, 0x100000 - 0x2000, NULL); 216345386Swpaul 216445386Swpaul /* Init again -- zeroing memory may have clobbered some registers. */ 216545386Swpaul if (ti_chipinit(sc)) { 216645386Swpaul printf("ti%d: chip initialization failed\n", sc->ti_unit); 216749011Swpaul error = ENXIO; 216845386Swpaul goto fail; 216945386Swpaul } 217045386Swpaul 217145386Swpaul /* 217245386Swpaul * Get station address from the EEPROM. Note: the manual states 217345386Swpaul * that the MAC address is at offset 0x8c, however the data is 217445386Swpaul * stored as two longwords (since that's how it's loaded into 217572645Sasmodai * the NIC). This means the MAC address is actually preceded 217645386Swpaul * by two zero bytes. We need to skip over those. 217745386Swpaul */ 217845386Swpaul if (ti_read_eeprom(sc, (caddr_t)&sc->arpcom.ac_enaddr, 217945386Swpaul TI_EE_MAC_OFFSET + 2, ETHER_ADDR_LEN)) { 218045386Swpaul printf("ti%d: failed to read station address\n", unit); 218149011Swpaul error = ENXIO; 218245386Swpaul goto fail; 218345386Swpaul } 218445386Swpaul 218545386Swpaul /* 218645386Swpaul * A Tigon chip was detected. Inform the world. 218745386Swpaul */ 218845386Swpaul printf("ti%d: Ethernet address: %6D\n", unit, 218945386Swpaul sc->arpcom.ac_enaddr, ":"); 219045386Swpaul 219145386Swpaul /* Allocate the general information block and ring buffers. */ 219249011Swpaul sc->ti_rdata = contigmalloc(sizeof(struct ti_ring_data), M_DEVBUF, 219350548Sbde M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); 219445386Swpaul 219549011Swpaul if (sc->ti_rdata == NULL) { 2196112872Snjl printf("ti%d: no memory for list buffers!\n", sc->ti_unit); 219749011Swpaul error = ENXIO; 219845386Swpaul goto fail; 219945386Swpaul } 220045386Swpaul 220145386Swpaul bzero(sc->ti_rdata, sizeof(struct ti_ring_data)); 220245386Swpaul 220345386Swpaul /* Try to allocate memory for jumbo buffers. */ 220498849Sken#ifdef TI_PRIVATE_JUMBOS 220545386Swpaul if (ti_alloc_jumbo_mem(sc)) { 220645386Swpaul printf("ti%d: jumbo buffer allocation failed\n", sc->ti_unit); 220749011Swpaul error = ENXIO; 220845386Swpaul goto fail; 220945386Swpaul } 221098849Sken#else 221198849Sken if (!jumbo_vm_init()) { 221298849Sken printf("ti%d: VM initialization failed!\n", sc->ti_unit); 221398849Sken error = ENOMEM; 221498849Sken goto fail; 221598849Sken } 221698849Sken#endif 221745386Swpaul 221863699Swpaul /* 221963699Swpaul * We really need a better way to tell a 1000baseTX card 222063699Swpaul * from a 1000baseSX one, since in theory there could be 222163699Swpaul * OEMed 1000baseTX cards from lame vendors who aren't 222263699Swpaul * clever enough to change the PCI ID. For the moment 222363699Swpaul * though, the AceNIC is the only copper card available. 222463699Swpaul */ 222563699Swpaul if (pci_get_vendor(dev) == ALT_VENDORID && 222663699Swpaul pci_get_device(dev) == ALT_DEVICEID_ACENIC_COPPER) 222763699Swpaul sc->ti_copper = 1; 222864139Swpaul /* Ok, it's not the only copper card available. */ 222964139Swpaul if (pci_get_vendor(dev) == NG_VENDORID && 223064139Swpaul pci_get_device(dev) == NG_DEVICEID_GA620T) 223164139Swpaul sc->ti_copper = 1; 223263699Swpaul 223345386Swpaul /* Set default tuneable values. */ 223445386Swpaul sc->ti_stat_ticks = 2 * TI_TICKS_PER_SEC; 223598849Sken#if 0 223645386Swpaul sc->ti_rx_coal_ticks = TI_TICKS_PER_SEC / 5000; 223798849Sken#endif 223898849Sken sc->ti_rx_coal_ticks = 170; 223945386Swpaul sc->ti_tx_coal_ticks = TI_TICKS_PER_SEC / 500; 224045386Swpaul sc->ti_rx_max_coal_bds = 64; 224198849Sken#if 0 224245386Swpaul sc->ti_tx_max_coal_bds = 128; 224398849Sken#endif 224498849Sken sc->ti_tx_max_coal_bds = 32; 224545386Swpaul sc->ti_tx_buf_ratio = 21; 224645386Swpaul 224745386Swpaul /* Set up ifnet structure */ 224845386Swpaul ifp = &sc->arpcom.ac_if; 224945386Swpaul ifp->if_softc = sc; 225045386Swpaul ifp->if_unit = sc->ti_unit; 225145386Swpaul ifp->if_name = "ti"; 225245386Swpaul ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 225398849Sken tis[unit] = sc; 225445386Swpaul ifp->if_ioctl = ti_ioctl; 225545386Swpaul ifp->if_output = ether_output; 225645386Swpaul ifp->if_start = ti_start; 225745386Swpaul ifp->if_watchdog = ti_watchdog; 225845386Swpaul ifp->if_init = ti_init; 225945386Swpaul ifp->if_mtu = ETHERMTU; 226045386Swpaul ifp->if_snd.ifq_maxlen = TI_TX_RING_CNT - 1; 226145386Swpaul 226245386Swpaul /* Set up ifmedia support. */ 226363699Swpaul if (sc->ti_copper) { 226463699Swpaul /* 226563699Swpaul * Copper cards allow manual 10/100 mode selection, 226663699Swpaul * but not manual 1000baseTX mode selection. Why? 226763699Swpaul * Becuase currently there's no way to specify the 226863699Swpaul * master/slave setting through the firmware interface, 226963699Swpaul * so Alteon decided to just bag it and handle it 227063699Swpaul * via autonegotiation. 227163699Swpaul */ 227263699Swpaul ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T, 0, NULL); 227363699Swpaul ifmedia_add(&sc->ifmedia, 227463699Swpaul IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); 227563699Swpaul ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL); 227663699Swpaul ifmedia_add(&sc->ifmedia, 227763699Swpaul IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL); 227895673Sphk ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_1000_T, 0, NULL); 227963699Swpaul ifmedia_add(&sc->ifmedia, 228095673Sphk IFM_ETHER|IFM_1000_T|IFM_FDX, 0, NULL); 228163699Swpaul } else { 228263699Swpaul /* Fiber cards don't support 10/100 modes. */ 228363699Swpaul ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_1000_SX, 0, NULL); 228463699Swpaul ifmedia_add(&sc->ifmedia, 228563699Swpaul IFM_ETHER|IFM_1000_SX|IFM_FDX, 0, NULL); 228663699Swpaul } 228745386Swpaul ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL); 228845386Swpaul ifmedia_set(&sc->ifmedia, IFM_ETHER|IFM_AUTO); 228945386Swpaul 229045386Swpaul /* 229198849Sken * We're assuming here that card initialization is a sequential 229298849Sken * thing. If it isn't, multiple cards probing at the same time 229398849Sken * could stomp on the list of softcs here. 229498849Sken */ 229598849Sken /* 229698849Sken * If this is the first card to be initialized, initialize the 229798849Sken * softc queue. 229898849Sken */ 229998849Sken if (unit == 0) 230098849Sken STAILQ_INIT(&ti_sc_list); 230198849Sken 230298849Sken STAILQ_INSERT_TAIL(&ti_sc_list, sc, ti_links); 230398849Sken 230498849Sken /* Register the device */ 230598849Sken sc->dev = make_dev(&ti_cdevsw, sc->ti_unit, UID_ROOT, GID_OPERATOR, 230698849Sken 0600, "ti%d", sc->ti_unit); 230798849Sken 230898849Sken /* 230963090Sarchie * Call MI attach routine. 231045386Swpaul */ 2311106936Ssam ether_ifattach(ifp, sc->arpcom.ac_enaddr); 231245386Swpaul 2313113609Snjl /* Hook interrupt last to avoid having to lock softc */ 2314112872Snjl error = bus_setup_intr(dev, sc->ti_irq, INTR_TYPE_NET, 2315112872Snjl ti_intr, sc, &sc->ti_intrhand); 2316112872Snjl 2317112872Snjl if (error) { 2318112872Snjl printf("ti%d: couldn't set up irq\n", unit); 2319113609Snjl ether_ifdetach(ifp); 2320112872Snjl goto fail; 2321112872Snjl } 2322112872Snjl 232345386Swpaulfail: 2324112872Snjl if (sc && error) 2325112872Snjl ti_detach(dev); 2326112872Snjl 232749011Swpaul return(error); 232845386Swpaul} 232945386Swpaul 233098849Sken/* 233198849Sken * Verify that our character special device is not currently 233298849Sken * open. Also track down any cached vnodes & kill them before 233398849Sken * the module is unloaded 233498849Sken */ 233598849Skenstatic int 233698849Skenti_unref_special(device_t dev) 233798849Sken{ 233898849Sken struct vnode *ti_vn; 233998849Sken int count; 234098849Sken struct ti_softc *sc = sc = device_get_softc(dev); 234198849Sken 234298849Sken if (!vfinddev(sc->dev, VCHR, &ti_vn)) { 234398849Sken return 0; 234498849Sken } 234598849Sken 234698849Sken if ((count = vcount(ti_vn))) { 234798849Sken device_printf(dev, "%d refs to special device, " 234898849Sken "denying unload\n", count); 234998849Sken return count; 235098849Sken } 235198849Sken /* now we know that there's a vnode in the cache. We hunt it 235298849Sken down and kill it now, before unloading */ 235398849Sken vgone(ti_vn); 235498849Sken return(0); 235598849Sken} 235698849Sken 2357113609Snjl/* 2358113609Snjl * Shutdown hardware and free up resources. This can be called any 2359113609Snjl * time after the mutex has been initialized. It is called in both 2360113609Snjl * the error case in attach and the normal detach case so it needs 2361113609Snjl * to be careful about only freeing resources that have actually been 2362113609Snjl * allocated. 2363113609Snjl */ 2364102336Salfredstatic int 2365102336Salfredti_detach(dev) 236649011Swpaul device_t dev; 236749011Swpaul{ 236849011Swpaul struct ti_softc *sc; 236949011Swpaul struct ifnet *ifp; 237049011Swpaul 237198849Sken if (ti_unref_special(dev)) 237298849Sken return EBUSY; 237349011Swpaul 237449011Swpaul sc = device_get_softc(dev); 2375112930Sphk KASSERT(mtx_initialized(&sc->ti_mtx), ("ti mutex not initialized")); 237667087Swpaul TI_LOCK(sc); 237749011Swpaul ifp = &sc->arpcom.ac_if; 237849011Swpaul 2379113609Snjl /* These should only be active if attach succeeded */ 2380113812Simp if (device_is_attached(dev)) { 2381113609Snjl ti_stop(sc); 2382112872Snjl ether_ifdetach(ifp); 2383112872Snjl bus_generic_detach(dev); 2384112872Snjl } 2385113609Snjl ifmedia_removeall(&sc->ifmedia); 238649011Swpaul 2387112872Snjl if (sc->ti_intrhand) 2388112872Snjl bus_teardown_intr(dev, sc->ti_irq, sc->ti_intrhand); 2389112872Snjl if (sc->ti_irq) 2390112872Snjl bus_release_resource(dev, SYS_RES_IRQ, 0, sc->ti_irq); 2391112872Snjl if (sc->ti_res) { 2392112872Snjl bus_release_resource(dev, SYS_RES_MEMORY, TI_PCI_LOMEM, 2393112872Snjl sc->ti_res); 2394112872Snjl } 239549011Swpaul 239698849Sken#ifdef TI_PRIVATE_JUMBOS 2397112872Snjl if (sc->ti_cdata.ti_jumbo_buf) 2398112872Snjl contigfree(sc->ti_cdata.ti_jumbo_buf, TI_JMEM, M_DEVBUF); 239998849Sken#endif 2400112872Snjl if (sc->ti_rdata) 2401112872Snjl contigfree(sc->ti_rdata, sizeof(struct ti_ring_data), M_DEVBUF); 240249011Swpaul 240367087Swpaul TI_UNLOCK(sc); 240467087Swpaul mtx_destroy(&sc->ti_mtx); 240549011Swpaul 240649011Swpaul return(0); 240749011Swpaul} 240849011Swpaul 240998849Sken#ifdef TI_JUMBO_HDRSPLIT 241045386Swpaul/* 241198849Sken * If hdr_len is 0, that means that header splitting wasn't done on 241298849Sken * this packet for some reason. The two most likely reasons are that 241398849Sken * the protocol isn't a supported protocol for splitting, or this 241498849Sken * packet had a fragment offset that wasn't 0. 241598849Sken * 241698849Sken * The header length, if it is non-zero, will always be the length of 241798849Sken * the headers on the packet, but that length could be longer than the 241898849Sken * first mbuf. So we take the minimum of the two as the actual 241998849Sken * length. 242098849Sken */ 242198849Skenstatic __inline void 242298849Skenti_hdr_split(struct mbuf *top, int hdr_len, int pkt_len, int idx) 242398849Sken{ 242498849Sken int i = 0; 242598849Sken int lengths[4] = {0, 0, 0, 0}; 242698849Sken struct mbuf *m, *mp; 242798849Sken 242898849Sken if (hdr_len != 0) 242998849Sken top->m_len = min(hdr_len, top->m_len); 243098849Sken pkt_len -= top->m_len; 243198849Sken lengths[i++] = top->m_len; 243298849Sken 243398849Sken mp = top; 243498849Sken for (m = top->m_next; m && pkt_len; m = m->m_next) { 243598849Sken m->m_len = m->m_ext.ext_size = min(m->m_len, pkt_len); 243698849Sken pkt_len -= m->m_len; 243798849Sken lengths[i++] = m->m_len; 243898849Sken mp = m; 243998849Sken } 244098849Sken 244198849Sken#if 0 244298849Sken if (hdr_len != 0) 244398849Sken printf("got split packet: "); 244498849Sken else 244598849Sken printf("got non-split packet: "); 244698849Sken 244798849Sken printf("%d,%d,%d,%d = %d\n", lengths[0], 244898849Sken lengths[1], lengths[2], lengths[3], 244998849Sken lengths[0] + lengths[1] + lengths[2] + 245098849Sken lengths[3]); 245198849Sken#endif 245298849Sken 245398849Sken if (pkt_len) 245498849Sken panic("header splitting didn't"); 245598849Sken 245698849Sken if (m) { 245798849Sken m_freem(m); 245898849Sken mp->m_next = NULL; 245998849Sken 246098849Sken } 246198849Sken if (mp->m_next != NULL) 246298849Sken panic("ti_hdr_split: last mbuf in chain should be null"); 246398849Sken} 246498849Sken#endif /* TI_JUMBO_HDRSPLIT */ 246598849Sken 246698849Sken/* 246745386Swpaul * Frame reception handling. This is called if there's a frame 246845386Swpaul * on the receive return list. 246945386Swpaul * 247045386Swpaul * Note: we have to be able to handle three possibilities here: 247145386Swpaul * 1) the frame is from the mini receive ring (can only happen) 247245386Swpaul * on Tigon 2 boards) 247345386Swpaul * 2) the frame is from the jumbo recieve ring 247445386Swpaul * 3) the frame is from the standard receive ring 247545386Swpaul */ 247645386Swpaul 2477102336Salfredstatic void 2478102336Salfredti_rxeof(sc) 247945386Swpaul struct ti_softc *sc; 248045386Swpaul{ 248145386Swpaul struct ifnet *ifp; 248248597Swpaul struct ti_cmd_desc cmd; 248345386Swpaul 248445386Swpaul ifp = &sc->arpcom.ac_if; 248545386Swpaul 248645386Swpaul while(sc->ti_rx_saved_considx != sc->ti_return_prodidx.ti_idx) { 248745386Swpaul struct ti_rx_desc *cur_rx; 248845386Swpaul u_int32_t rxidx; 248945386Swpaul struct ether_header *eh; 249045386Swpaul struct mbuf *m = NULL; 249145386Swpaul u_int16_t vlan_tag = 0; 249245386Swpaul int have_tag = 0; 249345386Swpaul 249445386Swpaul cur_rx = 249545386Swpaul &sc->ti_rdata->ti_rx_return_ring[sc->ti_rx_saved_considx]; 249645386Swpaul rxidx = cur_rx->ti_idx; 249745386Swpaul TI_INC(sc->ti_rx_saved_considx, TI_RETURN_RING_CNT); 249845386Swpaul 249945386Swpaul if (cur_rx->ti_flags & TI_BDFLAG_VLAN_TAG) { 250045386Swpaul have_tag = 1; 250177058Sphk vlan_tag = cur_rx->ti_vlan_tag & 0xfff; 250245386Swpaul } 250345386Swpaul 250445386Swpaul if (cur_rx->ti_flags & TI_BDFLAG_JUMBO_RING) { 250598849Sken 250645386Swpaul TI_INC(sc->ti_jumbo, TI_JUMBO_RX_RING_CNT); 250745386Swpaul m = sc->ti_cdata.ti_rx_jumbo_chain[rxidx]; 250845386Swpaul sc->ti_cdata.ti_rx_jumbo_chain[rxidx] = NULL; 250945386Swpaul if (cur_rx->ti_flags & TI_BDFLAG_ERROR) { 251045386Swpaul ifp->if_ierrors++; 251145386Swpaul ti_newbuf_jumbo(sc, sc->ti_jumbo, m); 251245386Swpaul continue; 251345386Swpaul } 251448597Swpaul if (ti_newbuf_jumbo(sc, sc->ti_jumbo, NULL) == ENOBUFS) { 251548597Swpaul ifp->if_ierrors++; 251648597Swpaul ti_newbuf_jumbo(sc, sc->ti_jumbo, m); 251748597Swpaul continue; 251848597Swpaul } 251998849Sken#ifdef TI_PRIVATE_JUMBOS 252098849Sken m->m_len = cur_rx->ti_len; 252198849Sken#else /* TI_PRIVATE_JUMBOS */ 252298849Sken#ifdef TI_JUMBO_HDRSPLIT 252398849Sken if (sc->ti_hdrsplit) 252498849Sken ti_hdr_split(m, TI_HOSTADDR(cur_rx->ti_addr), 252598849Sken cur_rx->ti_len, rxidx); 252698849Sken else 252798849Sken#endif /* TI_JUMBO_HDRSPLIT */ 252898849Sken m_adj(m, cur_rx->ti_len - m->m_pkthdr.len); 252998849Sken#endif /* TI_PRIVATE_JUMBOS */ 253045386Swpaul } else if (cur_rx->ti_flags & TI_BDFLAG_MINI_RING) { 253145386Swpaul TI_INC(sc->ti_mini, TI_MINI_RX_RING_CNT); 253245386Swpaul m = sc->ti_cdata.ti_rx_mini_chain[rxidx]; 253345386Swpaul sc->ti_cdata.ti_rx_mini_chain[rxidx] = NULL; 253445386Swpaul if (cur_rx->ti_flags & TI_BDFLAG_ERROR) { 253545386Swpaul ifp->if_ierrors++; 253645386Swpaul ti_newbuf_mini(sc, sc->ti_mini, m); 253745386Swpaul continue; 253845386Swpaul } 253948597Swpaul if (ti_newbuf_mini(sc, sc->ti_mini, NULL) == ENOBUFS) { 254048597Swpaul ifp->if_ierrors++; 254148597Swpaul ti_newbuf_mini(sc, sc->ti_mini, m); 254248597Swpaul continue; 254348597Swpaul } 254498849Sken m->m_len = cur_rx->ti_len; 254545386Swpaul } else { 254645386Swpaul TI_INC(sc->ti_std, TI_STD_RX_RING_CNT); 254745386Swpaul m = sc->ti_cdata.ti_rx_std_chain[rxidx]; 254845386Swpaul sc->ti_cdata.ti_rx_std_chain[rxidx] = NULL; 254945386Swpaul if (cur_rx->ti_flags & TI_BDFLAG_ERROR) { 255045386Swpaul ifp->if_ierrors++; 255145386Swpaul ti_newbuf_std(sc, sc->ti_std, m); 255245386Swpaul continue; 255345386Swpaul } 255448597Swpaul if (ti_newbuf_std(sc, sc->ti_std, NULL) == ENOBUFS) { 255548597Swpaul ifp->if_ierrors++; 255648597Swpaul ti_newbuf_std(sc, sc->ti_std, m); 255748597Swpaul continue; 255848597Swpaul } 255998849Sken m->m_len = cur_rx->ti_len; 256045386Swpaul } 256145386Swpaul 256298849Sken m->m_pkthdr.len = cur_rx->ti_len; 256345386Swpaul ifp->if_ipackets++; 256445386Swpaul eh = mtod(m, struct ether_header *); 256545386Swpaul m->m_pkthdr.rcvif = ifp; 256645386Swpaul 256758698Sjlemon if (ifp->if_hwassist) { 256858698Sjlemon m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | 256958698Sjlemon CSUM_DATA_VALID; 257058698Sjlemon if ((cur_rx->ti_ip_cksum ^ 0xffff) == 0) 257158698Sjlemon m->m_pkthdr.csum_flags |= CSUM_IP_VALID; 257258698Sjlemon m->m_pkthdr.csum_data = cur_rx->ti_tcp_udp_cksum; 257358698Sjlemon } 257445386Swpaul 257545386Swpaul /* 2576106936Ssam * If we received a packet with a vlan tag, 2577106936Ssam * tag it before passing the packet upward. 257845386Swpaul */ 2579106936Ssam if (have_tag) 2580106936Ssam VLAN_INPUT_TAG(ifp, m, vlan_tag, continue); 2581106936Ssam (*ifp->if_input)(ifp, m); 258245386Swpaul } 258345386Swpaul 258445386Swpaul /* Only necessary on the Tigon 1. */ 258545386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) 258645386Swpaul CSR_WRITE_4(sc, TI_GCR_RXRETURNCONS_IDX, 258745386Swpaul sc->ti_rx_saved_considx); 258845386Swpaul 258948597Swpaul TI_UPDATE_STDPROD(sc, sc->ti_std); 259048597Swpaul TI_UPDATE_MINIPROD(sc, sc->ti_mini); 259148597Swpaul TI_UPDATE_JUMBOPROD(sc, sc->ti_jumbo); 259245386Swpaul 259345386Swpaul return; 259445386Swpaul} 259545386Swpaul 2596102336Salfredstatic void 2597102336Salfredti_txeof(sc) 259845386Swpaul struct ti_softc *sc; 259945386Swpaul{ 260045386Swpaul struct ti_tx_desc *cur_tx = NULL; 260145386Swpaul struct ifnet *ifp; 260245386Swpaul 260345386Swpaul ifp = &sc->arpcom.ac_if; 260445386Swpaul 260545386Swpaul /* 260645386Swpaul * Go through our tx ring and free mbufs for those 260745386Swpaul * frames that have been sent. 260845386Swpaul */ 260945386Swpaul while (sc->ti_tx_saved_considx != sc->ti_tx_considx.ti_idx) { 261045386Swpaul u_int32_t idx = 0; 261145386Swpaul 261245386Swpaul idx = sc->ti_tx_saved_considx; 261345386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) { 261445386Swpaul if (idx > 383) 261545386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 261645386Swpaul TI_TX_RING_BASE + 6144); 261745386Swpaul else if (idx > 255) 261845386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 261945386Swpaul TI_TX_RING_BASE + 4096); 262045386Swpaul else if (idx > 127) 262145386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 262245386Swpaul TI_TX_RING_BASE + 2048); 262345386Swpaul else 262445386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 262545386Swpaul TI_TX_RING_BASE); 262645386Swpaul cur_tx = &sc->ti_rdata->ti_tx_ring_nic[idx % 128]; 262745386Swpaul } else 262845386Swpaul cur_tx = &sc->ti_rdata->ti_tx_ring[idx]; 262945386Swpaul if (cur_tx->ti_flags & TI_BDFLAG_END) 263045386Swpaul ifp->if_opackets++; 263145386Swpaul if (sc->ti_cdata.ti_tx_chain[idx] != NULL) { 263245386Swpaul m_freem(sc->ti_cdata.ti_tx_chain[idx]); 263345386Swpaul sc->ti_cdata.ti_tx_chain[idx] = NULL; 263445386Swpaul } 263548011Swpaul sc->ti_txcnt--; 263645386Swpaul TI_INC(sc->ti_tx_saved_considx, TI_TX_RING_CNT); 263745386Swpaul ifp->if_timer = 0; 263845386Swpaul } 263945386Swpaul 264045386Swpaul if (cur_tx != NULL) 264145386Swpaul ifp->if_flags &= ~IFF_OACTIVE; 264245386Swpaul 264345386Swpaul return; 264445386Swpaul} 264545386Swpaul 2646102336Salfredstatic void 2647102336Salfredti_intr(xsc) 264845386Swpaul void *xsc; 264945386Swpaul{ 265045386Swpaul struct ti_softc *sc; 265145386Swpaul struct ifnet *ifp; 265245386Swpaul 265345386Swpaul sc = xsc; 265467087Swpaul TI_LOCK(sc); 265545386Swpaul ifp = &sc->arpcom.ac_if; 265645386Swpaul 265798849Sken/*#ifdef notdef*/ 265845386Swpaul /* Avoid this for now -- checking this register is expensive. */ 265945386Swpaul /* Make sure this is really our interrupt. */ 266067087Swpaul if (!(CSR_READ_4(sc, TI_MISC_HOST_CTL) & TI_MHC_INTSTATE)) { 266167087Swpaul TI_UNLOCK(sc); 266245386Swpaul return; 266367087Swpaul } 266498849Sken/*#endif*/ 266545386Swpaul 266645386Swpaul /* Ack interrupt and stop others from occuring. */ 266745386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1); 266845386Swpaul 266945386Swpaul if (ifp->if_flags & IFF_RUNNING) { 267045386Swpaul /* Check RX return ring producer/consumer */ 267145386Swpaul ti_rxeof(sc); 267245386Swpaul 267345386Swpaul /* Check TX ring producer/consumer */ 267445386Swpaul ti_txeof(sc); 267545386Swpaul } 267645386Swpaul 267745386Swpaul ti_handle_events(sc); 267845386Swpaul 267945386Swpaul /* Re-enable interrupts. */ 268045386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0); 268145386Swpaul 268245386Swpaul if (ifp->if_flags & IFF_RUNNING && ifp->if_snd.ifq_head != NULL) 268345386Swpaul ti_start(ifp); 268445386Swpaul 268567087Swpaul TI_UNLOCK(sc); 268667087Swpaul 268745386Swpaul return; 268845386Swpaul} 268945386Swpaul 2690102336Salfredstatic void 2691102336Salfredti_stats_update(sc) 269245386Swpaul struct ti_softc *sc; 269345386Swpaul{ 269445386Swpaul struct ifnet *ifp; 269545386Swpaul 269645386Swpaul ifp = &sc->arpcom.ac_if; 269745386Swpaul 269845386Swpaul ifp->if_collisions += 269945386Swpaul (sc->ti_rdata->ti_info.ti_stats.dot3StatsSingleCollisionFrames + 270045386Swpaul sc->ti_rdata->ti_info.ti_stats.dot3StatsMultipleCollisionFrames + 270145386Swpaul sc->ti_rdata->ti_info.ti_stats.dot3StatsExcessiveCollisions + 270245386Swpaul sc->ti_rdata->ti_info.ti_stats.dot3StatsLateCollisions) - 270345386Swpaul ifp->if_collisions; 270445386Swpaul 270545386Swpaul return; 270645386Swpaul} 270745386Swpaul 270845386Swpaul/* 270945386Swpaul * Encapsulate an mbuf chain in the tx ring by coupling the mbuf data 271045386Swpaul * pointers to descriptors. 271145386Swpaul */ 2712102336Salfredstatic int 2713102336Salfredti_encap(sc, m_head, txidx) 271445386Swpaul struct ti_softc *sc; 271545386Swpaul struct mbuf *m_head; 271645386Swpaul u_int32_t *txidx; 271745386Swpaul{ 271845386Swpaul struct ti_tx_desc *f = NULL; 271945386Swpaul struct mbuf *m; 272048011Swpaul u_int32_t frag, cur, cnt = 0; 272158698Sjlemon u_int16_t csum_flags = 0; 2722106936Ssam struct m_tag *mtag; 272345386Swpaul 272445386Swpaul m = m_head; 272545386Swpaul cur = frag = *txidx; 272645386Swpaul 272758698Sjlemon if (m_head->m_pkthdr.csum_flags) { 272858698Sjlemon if (m_head->m_pkthdr.csum_flags & CSUM_IP) 272958698Sjlemon csum_flags |= TI_BDFLAG_IP_CKSUM; 273058698Sjlemon if (m_head->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP)) 273158698Sjlemon csum_flags |= TI_BDFLAG_TCP_UDP_CKSUM; 273258698Sjlemon if (m_head->m_flags & M_LASTFRAG) 273358698Sjlemon csum_flags |= TI_BDFLAG_IP_FRAG_END; 273458698Sjlemon else if (m_head->m_flags & M_FRAG) 273558698Sjlemon csum_flags |= TI_BDFLAG_IP_FRAG; 273658698Sjlemon } 2737106936Ssam 2738106936Ssam mtag = VLAN_OUTPUT_TAG(&sc->arpcom.ac_if, m); 2739106936Ssam 274045386Swpaul /* 274145386Swpaul * Start packing the mbufs in this chain into 274245386Swpaul * the fragment pointers. Stop when we run out 274345386Swpaul * of fragments or hit the end of the mbuf chain. 274445386Swpaul */ 274545386Swpaul for (m = m_head; m != NULL; m = m->m_next) { 274645386Swpaul if (m->m_len != 0) { 274745386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) { 274845386Swpaul if (frag > 383) 274945386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 275045386Swpaul TI_TX_RING_BASE + 6144); 275145386Swpaul else if (frag > 255) 275245386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 275345386Swpaul TI_TX_RING_BASE + 4096); 275445386Swpaul else if (frag > 127) 275545386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 275645386Swpaul TI_TX_RING_BASE + 2048); 275745386Swpaul else 275845386Swpaul CSR_WRITE_4(sc, TI_WINBASE, 275945386Swpaul TI_TX_RING_BASE); 276045386Swpaul f = &sc->ti_rdata->ti_tx_ring_nic[frag % 128]; 276145386Swpaul } else 276245386Swpaul f = &sc->ti_rdata->ti_tx_ring[frag]; 276345386Swpaul if (sc->ti_cdata.ti_tx_chain[frag] != NULL) 276445386Swpaul break; 276545386Swpaul TI_HOSTADDR(f->ti_addr) = vtophys(mtod(m, vm_offset_t)); 276645386Swpaul f->ti_len = m->m_len; 276758698Sjlemon f->ti_flags = csum_flags; 276883115Sbrooks 2769106936Ssam if (mtag != NULL) { 277045386Swpaul f->ti_flags |= TI_BDFLAG_VLAN_TAG; 2771106936Ssam f->ti_vlan_tag = VLAN_TAG_VALUE(mtag) & 0xfff; 277245386Swpaul } else { 277345386Swpaul f->ti_vlan_tag = 0; 277445386Swpaul } 277583115Sbrooks 277648011Swpaul /* 277748011Swpaul * Sanity check: avoid coming within 16 descriptors 277848011Swpaul * of the end of the ring. 277948011Swpaul */ 278048011Swpaul if ((TI_TX_RING_CNT - (sc->ti_txcnt + cnt)) < 16) 278148011Swpaul return(ENOBUFS); 278245386Swpaul cur = frag; 278345386Swpaul TI_INC(frag, TI_TX_RING_CNT); 278448011Swpaul cnt++; 278545386Swpaul } 278645386Swpaul } 278745386Swpaul 278845386Swpaul if (m != NULL) 278945386Swpaul return(ENOBUFS); 279045386Swpaul 279146177Swpaul if (frag == sc->ti_tx_saved_considx) 279246177Swpaul return(ENOBUFS); 279346177Swpaul 279445386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) 279545386Swpaul sc->ti_rdata->ti_tx_ring_nic[cur % 128].ti_flags |= 279698849Sken TI_BDFLAG_END; 279745386Swpaul else 279845386Swpaul sc->ti_rdata->ti_tx_ring[cur].ti_flags |= TI_BDFLAG_END; 279947458Swpaul sc->ti_cdata.ti_tx_chain[cur] = m_head; 280048011Swpaul sc->ti_txcnt += cnt; 280145386Swpaul 280245386Swpaul *txidx = frag; 280345386Swpaul 280445386Swpaul return(0); 280545386Swpaul} 280645386Swpaul 280745386Swpaul/* 280845386Swpaul * Main transmit routine. To avoid having to do mbuf copies, we put pointers 280945386Swpaul * to the mbuf data regions directly in the transmit descriptors. 281045386Swpaul */ 2811102336Salfredstatic void 2812102336Salfredti_start(ifp) 281345386Swpaul struct ifnet *ifp; 281445386Swpaul{ 281545386Swpaul struct ti_softc *sc; 281645386Swpaul struct mbuf *m_head = NULL; 281745386Swpaul u_int32_t prodidx = 0; 281845386Swpaul 281945386Swpaul sc = ifp->if_softc; 282067087Swpaul TI_LOCK(sc); 282145386Swpaul 282245386Swpaul prodidx = CSR_READ_4(sc, TI_MB_SENDPROD_IDX); 282345386Swpaul 282445386Swpaul while(sc->ti_cdata.ti_tx_chain[prodidx] == NULL) { 282545386Swpaul IF_DEQUEUE(&ifp->if_snd, m_head); 282645386Swpaul if (m_head == NULL) 282745386Swpaul break; 282845386Swpaul 282945386Swpaul /* 283058698Sjlemon * XXX 283158698Sjlemon * safety overkill. If this is a fragmented packet chain 283258698Sjlemon * with delayed TCP/UDP checksums, then only encapsulate 283358698Sjlemon * it if we have enough descriptors to handle the entire 283458698Sjlemon * chain at once. 283558698Sjlemon * (paranoia -- may not actually be needed) 283658698Sjlemon */ 283758698Sjlemon if (m_head->m_flags & M_FIRSTFRAG && 283858698Sjlemon m_head->m_pkthdr.csum_flags & (CSUM_DELAY_DATA)) { 283958698Sjlemon if ((TI_TX_RING_CNT - sc->ti_txcnt) < 284058698Sjlemon m_head->m_pkthdr.csum_data + 16) { 284158698Sjlemon IF_PREPEND(&ifp->if_snd, m_head); 284258698Sjlemon ifp->if_flags |= IFF_OACTIVE; 284358698Sjlemon break; 284458698Sjlemon } 284558698Sjlemon } 284658698Sjlemon 284758698Sjlemon /* 284845386Swpaul * Pack the data into the transmit ring. If we 284945386Swpaul * don't have room, set the OACTIVE flag and wait 285045386Swpaul * for the NIC to drain the ring. 285145386Swpaul */ 285245386Swpaul if (ti_encap(sc, m_head, &prodidx)) { 285345386Swpaul IF_PREPEND(&ifp->if_snd, m_head); 285445386Swpaul ifp->if_flags |= IFF_OACTIVE; 285545386Swpaul break; 285645386Swpaul } 285745386Swpaul 285845386Swpaul /* 285945386Swpaul * If there's a BPF listener, bounce a copy of this frame 286045386Swpaul * to him. 286145386Swpaul */ 2862106936Ssam BPF_MTAP(ifp, m_head); 286345386Swpaul } 286445386Swpaul 286545386Swpaul /* Transmit */ 286645386Swpaul CSR_WRITE_4(sc, TI_MB_SENDPROD_IDX, prodidx); 286745386Swpaul 286845386Swpaul /* 286945386Swpaul * Set a timeout in case the chip goes out to lunch. 287045386Swpaul */ 287145386Swpaul ifp->if_timer = 5; 287267087Swpaul TI_UNLOCK(sc); 287345386Swpaul 287445386Swpaul return; 287545386Swpaul} 287645386Swpaul 2877102336Salfredstatic void 2878102336Salfredti_init(xsc) 287945386Swpaul void *xsc; 288045386Swpaul{ 288145386Swpaul struct ti_softc *sc = xsc; 288245386Swpaul 288345386Swpaul /* Cancel pending I/O and flush buffers. */ 288445386Swpaul ti_stop(sc); 288545386Swpaul 288667087Swpaul TI_LOCK(sc); 288745386Swpaul /* Init the gen info block, ring control blocks and firmware. */ 288845386Swpaul if (ti_gibinit(sc)) { 288945386Swpaul printf("ti%d: initialization failure\n", sc->ti_unit); 289067087Swpaul TI_UNLOCK(sc); 289145386Swpaul return; 289245386Swpaul } 289345386Swpaul 289467087Swpaul TI_UNLOCK(sc); 289545386Swpaul 289645386Swpaul return; 289745386Swpaul} 289845386Swpaul 289945386Swpaulstatic void ti_init2(sc) 290045386Swpaul struct ti_softc *sc; 290145386Swpaul{ 290245386Swpaul struct ti_cmd_desc cmd; 290345386Swpaul struct ifnet *ifp; 290445386Swpaul u_int16_t *m; 290545386Swpaul struct ifmedia *ifm; 290645386Swpaul int tmp; 290745386Swpaul 290845386Swpaul ifp = &sc->arpcom.ac_if; 290945386Swpaul 291045386Swpaul /* Specify MTU and interface index. */ 291145386Swpaul CSR_WRITE_4(sc, TI_GCR_IFINDEX, ifp->if_unit); 291245386Swpaul CSR_WRITE_4(sc, TI_GCR_IFMTU, ifp->if_mtu + 291345386Swpaul ETHER_HDR_LEN + ETHER_CRC_LEN); 291445386Swpaul TI_DO_CMD(TI_CMD_UPDATE_GENCOM, 0, 0); 291545386Swpaul 291645386Swpaul /* Load our MAC address. */ 291745386Swpaul m = (u_int16_t *)&sc->arpcom.ac_enaddr[0]; 291845386Swpaul CSR_WRITE_4(sc, TI_GCR_PAR0, htons(m[0])); 291945386Swpaul CSR_WRITE_4(sc, TI_GCR_PAR1, (htons(m[1]) << 16) | htons(m[2])); 292045386Swpaul TI_DO_CMD(TI_CMD_SET_MAC_ADDR, 0, 0); 292145386Swpaul 292245386Swpaul /* Enable or disable promiscuous mode as needed. */ 292345386Swpaul if (ifp->if_flags & IFF_PROMISC) { 292445386Swpaul TI_DO_CMD(TI_CMD_SET_PROMISC_MODE, TI_CMD_CODE_PROMISC_ENB, 0); 292545386Swpaul } else { 292645386Swpaul TI_DO_CMD(TI_CMD_SET_PROMISC_MODE, TI_CMD_CODE_PROMISC_DIS, 0); 292745386Swpaul } 292845386Swpaul 292945386Swpaul /* Program multicast filter. */ 293045386Swpaul ti_setmulti(sc); 293145386Swpaul 293245386Swpaul /* 293345386Swpaul * If this is a Tigon 1, we should tell the 293445386Swpaul * firmware to use software packet filtering. 293545386Swpaul */ 293645386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON) { 293745386Swpaul TI_DO_CMD(TI_CMD_FDR_FILTERING, TI_CMD_CODE_FILT_ENB, 0); 293845386Swpaul } 293945386Swpaul 294045386Swpaul /* Init RX ring. */ 294145386Swpaul ti_init_rx_ring_std(sc); 294245386Swpaul 294345386Swpaul /* Init jumbo RX ring. */ 294445386Swpaul if (ifp->if_mtu > (ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN)) 294545386Swpaul ti_init_rx_ring_jumbo(sc); 294645386Swpaul 294745386Swpaul /* 294845386Swpaul * If this is a Tigon 2, we can also configure the 294945386Swpaul * mini ring. 295045386Swpaul */ 295145386Swpaul if (sc->ti_hwrev == TI_HWREV_TIGON_II) 295245386Swpaul ti_init_rx_ring_mini(sc); 295345386Swpaul 295445386Swpaul CSR_WRITE_4(sc, TI_GCR_RXRETURNCONS_IDX, 0); 295545386Swpaul sc->ti_rx_saved_considx = 0; 295645386Swpaul 295745386Swpaul /* Init TX ring. */ 295845386Swpaul ti_init_tx_ring(sc); 295945386Swpaul 296045386Swpaul /* Tell firmware we're alive. */ 296145386Swpaul TI_DO_CMD(TI_CMD_HOST_STATE, TI_CMD_CODE_STACK_UP, 0); 296245386Swpaul 296345386Swpaul /* Enable host interrupts. */ 296445386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0); 296545386Swpaul 296645386Swpaul ifp->if_flags |= IFF_RUNNING; 296745386Swpaul ifp->if_flags &= ~IFF_OACTIVE; 296845386Swpaul 296945386Swpaul /* 297045386Swpaul * Make sure to set media properly. We have to do this 297145386Swpaul * here since we have to issue commands in order to set 297245386Swpaul * the link negotiation and we can't issue commands until 297345386Swpaul * the firmware is running. 297445386Swpaul */ 297545386Swpaul ifm = &sc->ifmedia; 297645386Swpaul tmp = ifm->ifm_media; 297745386Swpaul ifm->ifm_media = ifm->ifm_cur->ifm_media; 297845386Swpaul ti_ifmedia_upd(ifp); 297945386Swpaul ifm->ifm_media = tmp; 298045386Swpaul 298145386Swpaul return; 298245386Swpaul} 298345386Swpaul 298445386Swpaul/* 298545386Swpaul * Set media options. 298645386Swpaul */ 2987102336Salfredstatic int 2988102336Salfredti_ifmedia_upd(ifp) 298945386Swpaul struct ifnet *ifp; 299045386Swpaul{ 299145386Swpaul struct ti_softc *sc; 299245386Swpaul struct ifmedia *ifm; 299345386Swpaul struct ti_cmd_desc cmd; 299498849Sken u_int32_t flowctl; 299545386Swpaul 299645386Swpaul sc = ifp->if_softc; 299745386Swpaul ifm = &sc->ifmedia; 299845386Swpaul 299945386Swpaul if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 300045386Swpaul return(EINVAL); 300145386Swpaul 300298849Sken flowctl = 0; 300398849Sken 300445386Swpaul switch(IFM_SUBTYPE(ifm->ifm_media)) { 300545386Swpaul case IFM_AUTO: 300698849Sken /* 300798849Sken * Transmit flow control doesn't work on the Tigon 1. 300898849Sken */ 300998849Sken flowctl = TI_GLNK_RX_FLOWCTL_Y; 301098849Sken 301198849Sken /* 301298849Sken * Transmit flow control can also cause problems on the 301398849Sken * Tigon 2, apparantly with both the copper and fiber 301498849Sken * boards. The symptom is that the interface will just 301598849Sken * hang. This was reproduced with Alteon 180 switches. 301698849Sken */ 301798849Sken#if 0 301898849Sken if (sc->ti_hwrev != TI_HWREV_TIGON) 301998849Sken flowctl |= TI_GLNK_TX_FLOWCTL_Y; 302098849Sken#endif 302198849Sken 302245386Swpaul CSR_WRITE_4(sc, TI_GCR_GLINK, TI_GLNK_PREF|TI_GLNK_1000MB| 302398849Sken TI_GLNK_FULL_DUPLEX| flowctl | 302445386Swpaul TI_GLNK_AUTONEGENB|TI_GLNK_ENB); 302598849Sken 302698849Sken flowctl = TI_LNK_RX_FLOWCTL_Y; 302798849Sken#if 0 302898849Sken if (sc->ti_hwrev != TI_HWREV_TIGON) 302998849Sken flowctl |= TI_LNK_TX_FLOWCTL_Y; 303098849Sken#endif 303198849Sken 303245386Swpaul CSR_WRITE_4(sc, TI_GCR_LINK, TI_LNK_100MB|TI_LNK_10MB| 303398849Sken TI_LNK_FULL_DUPLEX|TI_LNK_HALF_DUPLEX| flowctl | 303445386Swpaul TI_LNK_AUTONEGENB|TI_LNK_ENB); 303545386Swpaul TI_DO_CMD(TI_CMD_LINK_NEGOTIATION, 303645386Swpaul TI_CMD_CODE_NEGOTIATE_BOTH, 0); 303745386Swpaul break; 303845386Swpaul case IFM_1000_SX: 303995673Sphk case IFM_1000_T: 304098849Sken flowctl = TI_GLNK_RX_FLOWCTL_Y; 304198849Sken#if 0 304298849Sken if (sc->ti_hwrev != TI_HWREV_TIGON) 304398849Sken flowctl |= TI_GLNK_TX_FLOWCTL_Y; 304498849Sken#endif 304598849Sken 304645386Swpaul CSR_WRITE_4(sc, TI_GCR_GLINK, TI_GLNK_PREF|TI_GLNK_1000MB| 304798849Sken flowctl |TI_GLNK_ENB); 304845386Swpaul CSR_WRITE_4(sc, TI_GCR_LINK, 0); 304963699Swpaul if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) { 305063699Swpaul TI_SETBIT(sc, TI_GCR_GLINK, TI_GLNK_FULL_DUPLEX); 305163699Swpaul } 305245386Swpaul TI_DO_CMD(TI_CMD_LINK_NEGOTIATION, 305345386Swpaul TI_CMD_CODE_NEGOTIATE_GIGABIT, 0); 305445386Swpaul break; 305545386Swpaul case IFM_100_FX: 305645386Swpaul case IFM_10_FL: 305763699Swpaul case IFM_100_TX: 305863699Swpaul case IFM_10_T: 305998849Sken flowctl = TI_LNK_RX_FLOWCTL_Y; 306098849Sken#if 0 306198849Sken if (sc->ti_hwrev != TI_HWREV_TIGON) 306298849Sken flowctl |= TI_LNK_TX_FLOWCTL_Y; 306398849Sken#endif 306498849Sken 306545386Swpaul CSR_WRITE_4(sc, TI_GCR_GLINK, 0); 306698849Sken CSR_WRITE_4(sc, TI_GCR_LINK, TI_LNK_ENB|TI_LNK_PREF|flowctl); 306763699Swpaul if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_FX || 306863699Swpaul IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) { 306945386Swpaul TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_100MB); 307045386Swpaul } else { 307145386Swpaul TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_10MB); 307245386Swpaul } 307345386Swpaul if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) { 307445386Swpaul TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_FULL_DUPLEX); 307545386Swpaul } else { 307645386Swpaul TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_HALF_DUPLEX); 307745386Swpaul } 307845386Swpaul TI_DO_CMD(TI_CMD_LINK_NEGOTIATION, 307945386Swpaul TI_CMD_CODE_NEGOTIATE_10_100, 0); 308045386Swpaul break; 308145386Swpaul } 308245386Swpaul 308345386Swpaul return(0); 308445386Swpaul} 308545386Swpaul 308645386Swpaul/* 308745386Swpaul * Report current media status. 308845386Swpaul */ 3089102336Salfredstatic void 3090102336Salfredti_ifmedia_sts(ifp, ifmr) 309145386Swpaul struct ifnet *ifp; 309245386Swpaul struct ifmediareq *ifmr; 309345386Swpaul{ 309445386Swpaul struct ti_softc *sc; 309563699Swpaul u_int32_t media = 0; 309645386Swpaul 309745386Swpaul sc = ifp->if_softc; 309845386Swpaul 309945386Swpaul ifmr->ifm_status = IFM_AVALID; 310045386Swpaul ifmr->ifm_active = IFM_ETHER; 310145386Swpaul 310245386Swpaul if (sc->ti_linkstat == TI_EV_CODE_LINK_DOWN) 310345386Swpaul return; 310445386Swpaul 310545386Swpaul ifmr->ifm_status |= IFM_ACTIVE; 310645386Swpaul 310763699Swpaul if (sc->ti_linkstat == TI_EV_CODE_GIG_LINK_UP) { 310863699Swpaul media = CSR_READ_4(sc, TI_GCR_GLINK_STAT); 310963699Swpaul if (sc->ti_copper) 311095673Sphk ifmr->ifm_active |= IFM_1000_T; 311163699Swpaul else 311263699Swpaul ifmr->ifm_active |= IFM_1000_SX; 311363699Swpaul if (media & TI_GLNK_FULL_DUPLEX) 311463699Swpaul ifmr->ifm_active |= IFM_FDX; 311563699Swpaul else 311663699Swpaul ifmr->ifm_active |= IFM_HDX; 311763699Swpaul } else if (sc->ti_linkstat == TI_EV_CODE_LINK_UP) { 311845386Swpaul media = CSR_READ_4(sc, TI_GCR_LINK_STAT); 311963699Swpaul if (sc->ti_copper) { 312063699Swpaul if (media & TI_LNK_100MB) 312163699Swpaul ifmr->ifm_active |= IFM_100_TX; 312263699Swpaul if (media & TI_LNK_10MB) 312363699Swpaul ifmr->ifm_active |= IFM_10_T; 312463699Swpaul } else { 312563699Swpaul if (media & TI_LNK_100MB) 312663699Swpaul ifmr->ifm_active |= IFM_100_FX; 312763699Swpaul if (media & TI_LNK_10MB) 312863699Swpaul ifmr->ifm_active |= IFM_10_FL; 312963699Swpaul } 313045386Swpaul if (media & TI_LNK_FULL_DUPLEX) 313145386Swpaul ifmr->ifm_active |= IFM_FDX; 313245386Swpaul if (media & TI_LNK_HALF_DUPLEX) 313345386Swpaul ifmr->ifm_active |= IFM_HDX; 313445386Swpaul } 313545386Swpaul 313645386Swpaul return; 313745386Swpaul} 313845386Swpaul 3139102336Salfredstatic int 3140102336Salfredti_ioctl(ifp, command, data) 314145386Swpaul struct ifnet *ifp; 314245386Swpaul u_long command; 314345386Swpaul caddr_t data; 314445386Swpaul{ 314545386Swpaul struct ti_softc *sc = ifp->if_softc; 314645386Swpaul struct ifreq *ifr = (struct ifreq *) data; 314783630Sjlemon int mask, error = 0; 314845386Swpaul struct ti_cmd_desc cmd; 314945386Swpaul 315067087Swpaul TI_LOCK(sc); 315145386Swpaul 315245386Swpaul switch(command) { 315345386Swpaul case SIOCSIFMTU: 315445386Swpaul if (ifr->ifr_mtu > TI_JUMBO_MTU) 315545386Swpaul error = EINVAL; 315645386Swpaul else { 315745386Swpaul ifp->if_mtu = ifr->ifr_mtu; 315845386Swpaul ti_init(sc); 315945386Swpaul } 316045386Swpaul break; 316145386Swpaul case SIOCSIFFLAGS: 316245386Swpaul if (ifp->if_flags & IFF_UP) { 316345386Swpaul /* 316445386Swpaul * If only the state of the PROMISC flag changed, 316545386Swpaul * then just use the 'set promisc mode' command 316645386Swpaul * instead of reinitializing the entire NIC. Doing 316745386Swpaul * a full re-init means reloading the firmware and 316845386Swpaul * waiting for it to start up, which may take a 316945386Swpaul * second or two. 317045386Swpaul */ 317145386Swpaul if (ifp->if_flags & IFF_RUNNING && 317245386Swpaul ifp->if_flags & IFF_PROMISC && 317345386Swpaul !(sc->ti_if_flags & IFF_PROMISC)) { 317445386Swpaul TI_DO_CMD(TI_CMD_SET_PROMISC_MODE, 317545386Swpaul TI_CMD_CODE_PROMISC_ENB, 0); 317645386Swpaul } else if (ifp->if_flags & IFF_RUNNING && 317745386Swpaul !(ifp->if_flags & IFF_PROMISC) && 317845386Swpaul sc->ti_if_flags & IFF_PROMISC) { 317945386Swpaul TI_DO_CMD(TI_CMD_SET_PROMISC_MODE, 318045386Swpaul TI_CMD_CODE_PROMISC_DIS, 0); 318145386Swpaul } else 318245386Swpaul ti_init(sc); 318345386Swpaul } else { 318445386Swpaul if (ifp->if_flags & IFF_RUNNING) { 318545386Swpaul ti_stop(sc); 318645386Swpaul } 318745386Swpaul } 318845386Swpaul sc->ti_if_flags = ifp->if_flags; 318945386Swpaul error = 0; 319045386Swpaul break; 319145386Swpaul case SIOCADDMULTI: 319245386Swpaul case SIOCDELMULTI: 319345386Swpaul if (ifp->if_flags & IFF_RUNNING) { 319445386Swpaul ti_setmulti(sc); 319545386Swpaul error = 0; 319645386Swpaul } 319745386Swpaul break; 319845386Swpaul case SIOCSIFMEDIA: 319945386Swpaul case SIOCGIFMEDIA: 320045386Swpaul error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, command); 320145386Swpaul break; 320283630Sjlemon case SIOCSIFCAP: 320383630Sjlemon mask = ifr->ifr_reqcap ^ ifp->if_capenable; 320483630Sjlemon if (mask & IFCAP_HWCSUM) { 320583630Sjlemon if (IFCAP_HWCSUM & ifp->if_capenable) 320683630Sjlemon ifp->if_capenable &= ~IFCAP_HWCSUM; 320783630Sjlemon else 320883630Sjlemon ifp->if_capenable |= IFCAP_HWCSUM; 320983630Sjlemon if (ifp->if_flags & IFF_RUNNING) 321083630Sjlemon ti_init(sc); 321183630Sjlemon } 321283630Sjlemon error = 0; 321383630Sjlemon break; 321445386Swpaul default: 3215106936Ssam error = ether_ioctl(ifp, command, data); 321645386Swpaul break; 321745386Swpaul } 321845386Swpaul 321967087Swpaul TI_UNLOCK(sc); 322045386Swpaul 322145386Swpaul return(error); 322245386Swpaul} 322345386Swpaul 322498849Skenstatic int 322598849Skenti_open(dev_t dev, int flags, int fmt, struct thread *td) 322698849Sken{ 322798849Sken int unit; 322898849Sken struct ti_softc *sc; 322998849Sken 323098849Sken unit = minor(dev) & 0xff; 323198849Sken 323298849Sken sc = ti_lookup_softc(unit); 323398849Sken 323498849Sken if (sc == NULL) 323598849Sken return(ENODEV); 323698849Sken 323798849Sken TI_LOCK(sc); 323898849Sken sc->ti_flags |= TI_FLAG_DEBUGING; 323998849Sken TI_UNLOCK(sc); 324098849Sken 324198849Sken return(0); 324298849Sken} 324398849Sken 324498849Skenstatic int 324598849Skenti_close(dev_t dev, int flag, int fmt, struct thread *td) 324698849Sken{ 324798849Sken int unit; 324898849Sken struct ti_softc *sc; 324998849Sken 325098849Sken unit = minor(dev) & 0xff; 325198849Sken 325298849Sken sc = ti_lookup_softc(unit); 325398849Sken 325498849Sken if (sc == NULL) 325598849Sken return(ENODEV); 325698849Sken 325798849Sken TI_LOCK(sc); 325898849Sken sc->ti_flags &= ~TI_FLAG_DEBUGING; 325998849Sken TI_UNLOCK(sc); 326098849Sken 326198849Sken return(0); 326298849Sken} 326398849Sken 326498849Sken/* 326598849Sken * This ioctl routine goes along with the Tigon character device. 326698849Sken */ 326798849Skenstatic int 326898849Skenti_ioctl2(dev_t dev, u_long cmd, caddr_t addr, int flag, struct thread *td) 326998849Sken{ 327098849Sken int unit, error; 327198849Sken struct ti_softc *sc; 327298849Sken 327398849Sken unit = minor(dev) & 0xff; 327498849Sken 327598849Sken sc = ti_lookup_softc(unit); 327698849Sken 327798849Sken if (sc == NULL) 327898849Sken return(ENODEV); 327998849Sken 328098849Sken error = 0; 328198849Sken 328298849Sken switch(cmd) { 328398849Sken case TIIOCGETSTATS: 328498849Sken { 328598849Sken struct ti_stats *outstats; 328698849Sken 328798849Sken outstats = (struct ti_stats *)addr; 328898849Sken 328998849Sken bcopy(&sc->ti_rdata->ti_info.ti_stats, outstats, 329098849Sken sizeof(struct ti_stats)); 329198849Sken break; 329298849Sken } 329398849Sken case TIIOCGETPARAMS: 329498849Sken { 329598849Sken struct ti_params *params; 329698849Sken 329798849Sken params = (struct ti_params *)addr; 329898849Sken 329998849Sken params->ti_stat_ticks = sc->ti_stat_ticks; 330098849Sken params->ti_rx_coal_ticks = sc->ti_rx_coal_ticks; 330198849Sken params->ti_tx_coal_ticks = sc->ti_tx_coal_ticks; 330298849Sken params->ti_rx_max_coal_bds = sc->ti_rx_max_coal_bds; 330398849Sken params->ti_tx_max_coal_bds = sc->ti_tx_max_coal_bds; 330498849Sken params->ti_tx_buf_ratio = sc->ti_tx_buf_ratio; 330598849Sken params->param_mask = TI_PARAM_ALL; 330698849Sken 330798849Sken error = 0; 330898849Sken 330998849Sken break; 331098849Sken } 331198849Sken case TIIOCSETPARAMS: 331298849Sken { 331398849Sken struct ti_params *params; 331498849Sken 331598849Sken params = (struct ti_params *)addr; 331698849Sken 331798849Sken if (params->param_mask & TI_PARAM_STAT_TICKS) { 331898849Sken sc->ti_stat_ticks = params->ti_stat_ticks; 331998849Sken CSR_WRITE_4(sc, TI_GCR_STAT_TICKS, sc->ti_stat_ticks); 332098849Sken } 332198849Sken 332298849Sken if (params->param_mask & TI_PARAM_RX_COAL_TICKS) { 332398849Sken sc->ti_rx_coal_ticks = params->ti_rx_coal_ticks; 332498849Sken CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS, 332598849Sken sc->ti_rx_coal_ticks); 332698849Sken } 332798849Sken 332898849Sken if (params->param_mask & TI_PARAM_TX_COAL_TICKS) { 332998849Sken sc->ti_tx_coal_ticks = params->ti_tx_coal_ticks; 333098849Sken CSR_WRITE_4(sc, TI_GCR_TX_COAL_TICKS, 333198849Sken sc->ti_tx_coal_ticks); 333298849Sken } 333398849Sken 333498849Sken if (params->param_mask & TI_PARAM_RX_COAL_BDS) { 333598849Sken sc->ti_rx_max_coal_bds = params->ti_rx_max_coal_bds; 333698849Sken CSR_WRITE_4(sc, TI_GCR_RX_MAX_COAL_BD, 333798849Sken sc->ti_rx_max_coal_bds); 333898849Sken } 333998849Sken 334098849Sken if (params->param_mask & TI_PARAM_TX_COAL_BDS) { 334198849Sken sc->ti_tx_max_coal_bds = params->ti_tx_max_coal_bds; 334298849Sken CSR_WRITE_4(sc, TI_GCR_TX_MAX_COAL_BD, 334398849Sken sc->ti_tx_max_coal_bds); 334498849Sken } 334598849Sken 334698849Sken if (params->param_mask & TI_PARAM_TX_BUF_RATIO) { 334798849Sken sc->ti_tx_buf_ratio = params->ti_tx_buf_ratio; 334898849Sken CSR_WRITE_4(sc, TI_GCR_TX_BUFFER_RATIO, 334998849Sken sc->ti_tx_buf_ratio); 335098849Sken } 335198849Sken 335298849Sken error = 0; 335398849Sken 335498849Sken break; 335598849Sken } 335698849Sken case TIIOCSETTRACE: { 335798849Sken ti_trace_type trace_type; 335898849Sken 335998849Sken trace_type = *(ti_trace_type *)addr; 336098849Sken 336198849Sken /* 336298849Sken * Set tracing to whatever the user asked for. Setting 336398849Sken * this register to 0 should have the effect of disabling 336498849Sken * tracing. 336598849Sken */ 336698849Sken CSR_WRITE_4(sc, TI_GCR_NIC_TRACING, trace_type); 336798849Sken 336898849Sken error = 0; 336998849Sken 337098849Sken break; 337198849Sken } 337298849Sken case TIIOCGETTRACE: { 337398849Sken struct ti_trace_buf *trace_buf; 337498849Sken u_int32_t trace_start, cur_trace_ptr, trace_len; 337598849Sken 337698849Sken trace_buf = (struct ti_trace_buf *)addr; 337798849Sken 337898849Sken trace_start = CSR_READ_4(sc, TI_GCR_NICTRACE_START); 337998849Sken cur_trace_ptr = CSR_READ_4(sc, TI_GCR_NICTRACE_PTR); 338098849Sken trace_len = CSR_READ_4(sc, TI_GCR_NICTRACE_LEN); 338198849Sken 338298849Sken#if 0 338398849Sken printf("ti%d: trace_start = %#x, cur_trace_ptr = %#x, " 338498849Sken "trace_len = %d\n", sc->ti_unit, trace_start, 338598849Sken cur_trace_ptr, trace_len); 338698849Sken printf("ti%d: trace_buf->buf_len = %d\n", sc->ti_unit, 338798849Sken trace_buf->buf_len); 338898849Sken#endif 338998849Sken 339098849Sken error = ti_copy_mem(sc, trace_start, min(trace_len, 339198849Sken trace_buf->buf_len), 339298849Sken (caddr_t)trace_buf->buf, 1, 1); 339398849Sken 339498849Sken if (error == 0) { 339598849Sken trace_buf->fill_len = min(trace_len, 339698849Sken trace_buf->buf_len); 339798849Sken if (cur_trace_ptr < trace_start) 339898849Sken trace_buf->cur_trace_ptr = 339998849Sken trace_start - cur_trace_ptr; 340098849Sken else 340198849Sken trace_buf->cur_trace_ptr = 340298849Sken cur_trace_ptr - trace_start; 340398849Sken } else 340498849Sken trace_buf->fill_len = 0; 340598849Sken 340698849Sken 340798849Sken break; 340898849Sken } 340998849Sken 341098849Sken /* 341198849Sken * For debugging, five ioctls are needed: 341298849Sken * ALT_ATTACH 341398849Sken * ALT_READ_TG_REG 341498849Sken * ALT_WRITE_TG_REG 341598849Sken * ALT_READ_TG_MEM 341698849Sken * ALT_WRITE_TG_MEM 341798849Sken */ 341898849Sken case ALT_ATTACH: 341998849Sken /* 342098849Sken * From what I can tell, Alteon's Solaris Tigon driver 342198849Sken * only has one character device, so you have to attach 342298849Sken * to the Tigon board you're interested in. This seems 342398849Sken * like a not-so-good way to do things, since unless you 342498849Sken * subsequently specify the unit number of the device 342598849Sken * you're interested in in every ioctl, you'll only be 342698849Sken * able to debug one board at a time. 342798849Sken */ 342898849Sken error = 0; 342998849Sken break; 343098849Sken case ALT_READ_TG_MEM: 343198849Sken case ALT_WRITE_TG_MEM: 343298849Sken { 343398849Sken struct tg_mem *mem_param; 343498849Sken u_int32_t sram_end, scratch_end; 343598849Sken 343698849Sken mem_param = (struct tg_mem *)addr; 343798849Sken 343898849Sken if (sc->ti_hwrev == TI_HWREV_TIGON) { 343998849Sken sram_end = TI_END_SRAM_I; 344098849Sken scratch_end = TI_END_SCRATCH_I; 344198849Sken } else { 344298849Sken sram_end = TI_END_SRAM_II; 344398849Sken scratch_end = TI_END_SCRATCH_II; 344498849Sken } 344598849Sken 344698849Sken /* 344798849Sken * For now, we'll only handle accessing regular SRAM, 344898849Sken * nothing else. 344998849Sken */ 345098849Sken if ((mem_param->tgAddr >= TI_BEG_SRAM) 345198849Sken && ((mem_param->tgAddr + mem_param->len) <= sram_end)) { 345298849Sken /* 345398849Sken * In this instance, we always copy to/from user 345498849Sken * space, so the user space argument is set to 1. 345598849Sken */ 345698849Sken error = ti_copy_mem(sc, mem_param->tgAddr, 345798849Sken mem_param->len, 345898849Sken mem_param->userAddr, 1, 345998849Sken (cmd == ALT_READ_TG_MEM) ? 1 : 0); 346098849Sken } else if ((mem_param->tgAddr >= TI_BEG_SCRATCH) 346198849Sken && (mem_param->tgAddr <= scratch_end)) { 346298849Sken error = ti_copy_scratch(sc, mem_param->tgAddr, 346398849Sken mem_param->len, 346498849Sken mem_param->userAddr, 1, 346598849Sken (cmd == ALT_READ_TG_MEM) ? 346698849Sken 1 : 0, TI_PROCESSOR_A); 346798849Sken } else if ((mem_param->tgAddr >= TI_BEG_SCRATCH_B_DEBUG) 346898849Sken && (mem_param->tgAddr <= TI_BEG_SCRATCH_B_DEBUG)) { 346998849Sken if (sc->ti_hwrev == TI_HWREV_TIGON) { 347098849Sken printf("ti%d: invalid memory range for " 347198849Sken "Tigon I\n", sc->ti_unit); 347298849Sken error = EINVAL; 347398849Sken break; 347498849Sken } 347598849Sken error = ti_copy_scratch(sc, mem_param->tgAddr - 347698849Sken TI_SCRATCH_DEBUG_OFF, 347798849Sken mem_param->len, 347898849Sken mem_param->userAddr, 1, 347998849Sken (cmd == ALT_READ_TG_MEM) ? 348098849Sken 1 : 0, TI_PROCESSOR_B); 348198849Sken } else { 348298849Sken printf("ti%d: memory address %#x len %d is out of " 348398849Sken "supported range\n", sc->ti_unit, 348498849Sken mem_param->tgAddr, mem_param->len); 348598849Sken error = EINVAL; 348698849Sken } 348798849Sken 348898849Sken break; 348998849Sken } 349098849Sken case ALT_READ_TG_REG: 349198849Sken case ALT_WRITE_TG_REG: 349298849Sken { 349398849Sken struct tg_reg *regs; 349498849Sken u_int32_t tmpval; 349598849Sken 349698849Sken regs = (struct tg_reg *)addr; 349798849Sken 349898849Sken /* 349998849Sken * Make sure the address in question isn't out of range. 350098849Sken */ 350198849Sken if (regs->addr > TI_REG_MAX) { 350298849Sken error = EINVAL; 350398849Sken break; 350498849Sken } 350598849Sken if (cmd == ALT_READ_TG_REG) { 350698849Sken bus_space_read_region_4(sc->ti_btag, sc->ti_bhandle, 350798849Sken regs->addr, &tmpval, 1); 350898849Sken regs->data = ntohl(tmpval); 350998849Sken#if 0 351098849Sken if ((regs->addr == TI_CPU_STATE) 351198849Sken || (regs->addr == TI_CPU_CTL_B)) { 351298849Sken printf("ti%d: register %#x = %#x\n", 351398849Sken sc->ti_unit, regs->addr, tmpval); 351498849Sken } 351598849Sken#endif 351698849Sken } else { 351798849Sken tmpval = htonl(regs->data); 351898849Sken bus_space_write_region_4(sc->ti_btag, sc->ti_bhandle, 351998849Sken regs->addr, &tmpval, 1); 352098849Sken } 352198849Sken 352298849Sken break; 352398849Sken } 352498849Sken default: 352598849Sken error = ENOTTY; 352698849Sken break; 352798849Sken } 352898849Sken return(error); 352998849Sken} 353098849Sken 3531102336Salfredstatic void 3532102336Salfredti_watchdog(ifp) 353345386Swpaul struct ifnet *ifp; 353445386Swpaul{ 353545386Swpaul struct ti_softc *sc; 353645386Swpaul 353745386Swpaul sc = ifp->if_softc; 353867087Swpaul TI_LOCK(sc); 353945386Swpaul 354098849Sken /* 354198849Sken * When we're debugging, the chip is often stopped for long periods 354298849Sken * of time, and that would normally cause the watchdog timer to fire. 354398849Sken * Since that impedes debugging, we don't want to do that. 354498849Sken */ 354598849Sken if (sc->ti_flags & TI_FLAG_DEBUGING) { 354698849Sken TI_UNLOCK(sc); 354798849Sken return; 354898849Sken } 354998849Sken 355045386Swpaul printf("ti%d: watchdog timeout -- resetting\n", sc->ti_unit); 355145386Swpaul ti_stop(sc); 355245386Swpaul ti_init(sc); 355345386Swpaul 355445386Swpaul ifp->if_oerrors++; 355567087Swpaul TI_UNLOCK(sc); 355645386Swpaul 355745386Swpaul return; 355845386Swpaul} 355945386Swpaul 356045386Swpaul/* 356145386Swpaul * Stop the adapter and free any mbufs allocated to the 356245386Swpaul * RX and TX lists. 356345386Swpaul */ 3564102336Salfredstatic void 3565102336Salfredti_stop(sc) 356645386Swpaul struct ti_softc *sc; 356745386Swpaul{ 356845386Swpaul struct ifnet *ifp; 356945386Swpaul struct ti_cmd_desc cmd; 357045386Swpaul 357167087Swpaul TI_LOCK(sc); 357267087Swpaul 357345386Swpaul ifp = &sc->arpcom.ac_if; 357445386Swpaul 357545386Swpaul /* Disable host interrupts. */ 357645386Swpaul CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1); 357745386Swpaul /* 357845386Swpaul * Tell firmware we're shutting down. 357945386Swpaul */ 358045386Swpaul TI_DO_CMD(TI_CMD_HOST_STATE, TI_CMD_CODE_STACK_DOWN, 0); 358145386Swpaul 358245386Swpaul /* Halt and reinitialize. */ 358345386Swpaul ti_chipinit(sc); 358445386Swpaul ti_mem(sc, 0x2000, 0x100000 - 0x2000, NULL); 358545386Swpaul ti_chipinit(sc); 358645386Swpaul 358745386Swpaul /* Free the RX lists. */ 358845386Swpaul ti_free_rx_ring_std(sc); 358945386Swpaul 359045386Swpaul /* Free jumbo RX list. */ 359145386Swpaul ti_free_rx_ring_jumbo(sc); 359245386Swpaul 359345386Swpaul /* Free mini RX list. */ 359445386Swpaul ti_free_rx_ring_mini(sc); 359545386Swpaul 359645386Swpaul /* Free TX buffers. */ 359745386Swpaul ti_free_tx_ring(sc); 359845386Swpaul 359945386Swpaul sc->ti_ev_prodidx.ti_idx = 0; 360045386Swpaul sc->ti_return_prodidx.ti_idx = 0; 360145386Swpaul sc->ti_tx_considx.ti_idx = 0; 360245386Swpaul sc->ti_tx_saved_considx = TI_TXCONS_UNSET; 360345386Swpaul 360445386Swpaul ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 360567087Swpaul TI_UNLOCK(sc); 360645386Swpaul 360745386Swpaul return; 360845386Swpaul} 360945386Swpaul 361045386Swpaul/* 361145386Swpaul * Stop all chip I/O so that the kernel's probe routines don't 361245386Swpaul * get confused by errant DMAs when rebooting. 361345386Swpaul */ 3614102336Salfredstatic void 3615102336Salfredti_shutdown(dev) 361649011Swpaul device_t dev; 361745386Swpaul{ 361845386Swpaul struct ti_softc *sc; 361945386Swpaul 362049011Swpaul sc = device_get_softc(dev); 362167087Swpaul TI_LOCK(sc); 362245386Swpaul ti_chipinit(sc); 362367087Swpaul TI_UNLOCK(sc); 362445386Swpaul 362545386Swpaul return; 362645386Swpaul} 3627