ah_osdep.c revision 185522
1162413Ssam/*- 2178354Ssam * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3162413Ssam * All rights reserved. 4162413Ssam * 5162413Ssam * Redistribution and use in source and binary forms, with or without 6162413Ssam * modification, are permitted provided that the following conditions 7162413Ssam * are met: 8162413Ssam * 1. Redistributions of source code must retain the above copyright 9162413Ssam * notice, this list of conditions and the following disclaimer, 10162413Ssam * without modification. 11162413Ssam * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12162413Ssam * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13162413Ssam * redistribution must be conditioned upon including a substantially 14162413Ssam * similar Disclaimer requirement for further binary redistribution. 15162413Ssam * 16162413Ssam * NO WARRANTY 17162413Ssam * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18162413Ssam * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19162413Ssam * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20162413Ssam * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21162413Ssam * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22162413Ssam * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23162413Ssam * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24162413Ssam * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25162413Ssam * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26162413Ssam * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27162413Ssam * THE POSSIBILITY OF SUCH DAMAGES. 28162413Ssam * 29162413Ssam * $FreeBSD: head/sys/dev/ath/ah_osdep.c 185522 2008-12-01 16:53:01Z sam $ 30162413Ssam */ 31162413Ssam#include "opt_ah.h" 32162413Ssam 33162413Ssam#include <sys/param.h> 34162413Ssam#include <sys/systm.h> 35162413Ssam#include <sys/kernel.h> 36162413Ssam#include <sys/module.h> 37162413Ssam#include <sys/sysctl.h> 38162413Ssam#include <sys/bus.h> 39162413Ssam#include <sys/malloc.h> 40162413Ssam#include <sys/proc.h> 41162413Ssam 42162413Ssam#include <machine/stdarg.h> 43162413Ssam 44162413Ssam#include <net/ethernet.h> /* XXX for ether_sprintf */ 45162413Ssam 46185522Ssam#include <dev/ath/ath_hal/ah.h> 47162413Ssam 48162413Ssam/* 49162413Ssam * WiSoC boards overload the bus tag with information about the 50162413Ssam * board layout. We must extract the bus space tag from that 51162413Ssam * indirect structure. For everyone else the tag is passed in 52162413Ssam * directly. 53162413Ssam * XXX cache indirect ref privately 54162413Ssam */ 55162413Ssam#ifdef AH_SUPPORT_AR5312 56162413Ssam#define BUSTAG(ah) \ 57162413Ssam ((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag) 58162413Ssam#else 59185522Ssam#define BUSTAG(ah) ((ah)->ah_st) 60162413Ssam#endif 61162413Ssam 62162413Ssamextern void ath_hal_printf(struct ath_hal *, const char*, ...) 63162413Ssam __printflike(2,3); 64162413Ssamextern void ath_hal_vprintf(struct ath_hal *, const char*, __va_list) 65162413Ssam __printflike(2, 0); 66162413Ssamextern const char* ath_hal_ether_sprintf(const u_int8_t *mac); 67162413Ssamextern void *ath_hal_malloc(size_t); 68162413Ssamextern void ath_hal_free(void *); 69162413Ssam#ifdef AH_ASSERT 70162413Ssamextern void ath_hal_assert_failed(const char* filename, 71162413Ssam int lineno, const char* msg); 72162413Ssam#endif 73162413Ssam#ifdef AH_DEBUG 74184369Ssam#if HAL_ABI_VERSION >= 0x08090101 75184369Ssamextern void HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...); 76184369Ssam#else 77162413Ssamextern void HALDEBUG(struct ath_hal *ah, const char* fmt, ...); 78162413Ssamextern void HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...); 79184369Ssam#endif 80162413Ssam#endif /* AH_DEBUG */ 81162413Ssam 82162413Ssam/* NB: put this here instead of the driver to avoid circular references */ 83162413SsamSYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters"); 84162413SsamSYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0, "Atheros HAL parameters"); 85162413Ssam 86162413Ssam#ifdef AH_DEBUG 87162413Ssamstatic int ath_hal_debug = 0; 88162413SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug, 89162413Ssam 0, "Atheros HAL debugging printfs"); 90162413SsamTUNABLE_INT("hw.ath.hal.debug", &ath_hal_debug); 91162413Ssam#endif /* AH_DEBUG */ 92162413Ssam 93162413Ssam/* NB: these are deprecated; they exist for now for compatibility */ 94162413Ssamint ath_hal_dma_beacon_response_time = 2; /* in TU's */ 95162413SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, dma_brt, CTLFLAG_RW, 96162413Ssam &ath_hal_dma_beacon_response_time, 0, 97162413Ssam "Atheros HAL DMA beacon response time"); 98162413Ssamint ath_hal_sw_beacon_response_time = 10; /* in TU's */ 99162413SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, sw_brt, CTLFLAG_RW, 100162413Ssam &ath_hal_sw_beacon_response_time, 0, 101162413Ssam "Atheros HAL software beacon response time"); 102162413Ssamint ath_hal_additional_swba_backoff = 0; /* in TU's */ 103162413SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, swba_backoff, CTLFLAG_RW, 104162413Ssam &ath_hal_additional_swba_backoff, 0, 105162413Ssam "Atheros HAL additional SWBA backoff time"); 106162413Ssam 107162413SsamMALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data"); 108162413Ssam 109162413Ssamvoid* 110162413Ssamath_hal_malloc(size_t size) 111162413Ssam{ 112162413Ssam return malloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO); 113162413Ssam} 114162413Ssam 115162413Ssamvoid 116162413Ssamath_hal_free(void* p) 117162413Ssam{ 118162413Ssam return free(p, M_ATH_HAL); 119162413Ssam} 120162413Ssam 121162413Ssamvoid 122162413Ssamath_hal_vprintf(struct ath_hal *ah, const char* fmt, va_list ap) 123162413Ssam{ 124162413Ssam vprintf(fmt, ap); 125162413Ssam} 126162413Ssam 127162413Ssamvoid 128162413Ssamath_hal_printf(struct ath_hal *ah, const char* fmt, ...) 129162413Ssam{ 130162413Ssam va_list ap; 131162413Ssam va_start(ap, fmt); 132162413Ssam ath_hal_vprintf(ah, fmt, ap); 133162413Ssam va_end(ap); 134162413Ssam} 135162413Ssam 136162413Ssamconst char* 137162413Ssamath_hal_ether_sprintf(const u_int8_t *mac) 138162413Ssam{ 139162413Ssam return ether_sprintf(mac); 140162413Ssam} 141162413Ssam 142162413Ssam#ifdef AH_DEBUG 143184369Ssam#if HAL_ABI_VERSION >= 0x08090101 144162413Ssamvoid 145184369SsamHALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...) 146184369Ssam{ 147184369Ssam if (ath_hal_debug & mask) { 148184369Ssam __va_list ap; 149184369Ssam va_start(ap, fmt); 150184369Ssam ath_hal_vprintf(ah, fmt, ap); 151184369Ssam va_end(ap); 152184369Ssam } 153184369Ssam} 154184369Ssam#else 155184369Ssamvoid 156162413SsamHALDEBUG(struct ath_hal *ah, const char* fmt, ...) 157162413Ssam{ 158162413Ssam if (ath_hal_debug) { 159162413Ssam __va_list ap; 160162413Ssam va_start(ap, fmt); 161162413Ssam ath_hal_vprintf(ah, fmt, ap); 162162413Ssam va_end(ap); 163162413Ssam } 164162413Ssam} 165162413Ssam 166162413Ssamvoid 167162413SsamHALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...) 168162413Ssam{ 169162413Ssam if (ath_hal_debug >= level) { 170162413Ssam __va_list ap; 171162413Ssam va_start(ap, fmt); 172162413Ssam ath_hal_vprintf(ah, fmt, ap); 173162413Ssam va_end(ap); 174162413Ssam } 175162413Ssam} 176184369Ssam#endif 177162413Ssam#endif /* AH_DEBUG */ 178162413Ssam 179162413Ssam#ifdef AH_DEBUG_ALQ 180162413Ssam/* 181162413Ssam * ALQ register tracing support. 182162413Ssam * 183162413Ssam * Setting hw.ath.hal.alq=1 enables tracing of all register reads and 184162413Ssam * writes to the file /tmp/ath_hal.log. The file format is a simple 185162413Ssam * fixed-size array of records. When done logging set hw.ath.hal.alq=0 186162413Ssam * and then decode the file with the arcode program (that is part of the 187162413Ssam * HAL). If you start+stop tracing the data will be appended to an 188162413Ssam * existing file. 189162413Ssam * 190162413Ssam * NB: doesn't handle multiple devices properly; only one DEVICE record 191162413Ssam * is emitted and the different devices are not identified. 192162413Ssam */ 193162413Ssam#include <sys/alq.h> 194162413Ssam#include <sys/pcpu.h> 195185522Ssam#include <dev/ath/ath_hal/ah_decode.h> 196162413Ssam 197162413Ssamstatic struct alq *ath_hal_alq; 198162413Ssamstatic int ath_hal_alq_emitdev; /* need to emit DEVICE record */ 199162413Ssamstatic u_int ath_hal_alq_lost; /* count of lost records */ 200162413Ssamstatic const char *ath_hal_logfile = "/tmp/ath_hal.log"; 201162413Ssamstatic u_int ath_hal_alq_qsize = 64*1024; 202162413Ssam 203162413Ssamstatic int 204162413Ssamath_hal_setlogging(int enable) 205162413Ssam{ 206162413Ssam int error; 207162413Ssam 208162413Ssam if (enable) { 209168589Srwatson error = alq_open(&ath_hal_alq, ath_hal_logfile, 210168589Srwatson curthread->td_ucred, ALQ_DEFAULT_CMODE, 211168589Srwatson sizeof (struct athregrec), ath_hal_alq_qsize); 212168589Srwatson ath_hal_alq_lost = 0; 213168589Srwatson ath_hal_alq_emitdev = 1; 214168589Srwatson printf("ath_hal: logging to %s enabled\n", 215168589Srwatson ath_hal_logfile); 216162413Ssam } else { 217162413Ssam if (ath_hal_alq) 218162413Ssam alq_close(ath_hal_alq); 219162413Ssam ath_hal_alq = NULL; 220162413Ssam printf("ath_hal: logging disabled\n"); 221162413Ssam error = 0; 222162413Ssam } 223162413Ssam return (error); 224162413Ssam} 225162413Ssam 226162413Ssamstatic int 227162413Ssamsysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS) 228162413Ssam{ 229162413Ssam int error, enable; 230162413Ssam 231162413Ssam enable = (ath_hal_alq != NULL); 232162413Ssam error = sysctl_handle_int(oidp, &enable, 0, req); 233162413Ssam if (error || !req->newptr) 234162413Ssam return (error); 235162413Ssam else 236162413Ssam return (ath_hal_setlogging(enable)); 237162413Ssam} 238162413SsamSYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW, 239162413Ssam 0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging"); 240162413SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW, 241162413Ssam &ath_hal_alq_qsize, 0, "In-memory log size (#records)"); 242162413SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW, 243162413Ssam &ath_hal_alq_lost, 0, "Register operations not logged"); 244162413Ssam 245162413Ssamstatic struct ale * 246162413Ssamath_hal_alq_get(struct ath_hal *ah) 247162413Ssam{ 248162413Ssam struct ale *ale; 249162413Ssam 250162413Ssam if (ath_hal_alq_emitdev) { 251162413Ssam ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 252162413Ssam if (ale) { 253162413Ssam struct athregrec *r = 254162413Ssam (struct athregrec *) ale->ae_data; 255162413Ssam r->op = OP_DEVICE; 256162413Ssam r->reg = 0; 257162413Ssam r->val = ah->ah_devid; 258162413Ssam alq_post(ath_hal_alq, ale); 259162413Ssam ath_hal_alq_emitdev = 0; 260162413Ssam } else 261162413Ssam ath_hal_alq_lost++; 262162413Ssam } 263162413Ssam ale = alq_get(ath_hal_alq, ALQ_NOWAIT); 264162413Ssam if (!ale) 265162413Ssam ath_hal_alq_lost++; 266162413Ssam return ale; 267162413Ssam} 268162413Ssam 269162413Ssamvoid 270162413Ssamath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 271162413Ssam{ 272162413Ssam bus_space_tag_t tag = BUSTAG(ah); 273185522Ssam bus_space_handle_t h = ah->ah_sh; 274162413Ssam 275162413Ssam if (ath_hal_alq) { 276162413Ssam struct ale *ale = ath_hal_alq_get(ah); 277162413Ssam if (ale) { 278162413Ssam struct athregrec *r = (struct athregrec *) ale->ae_data; 279162413Ssam r->op = OP_WRITE; 280162413Ssam r->reg = reg; 281162413Ssam r->val = val; 282162413Ssam alq_post(ath_hal_alq, ale); 283162413Ssam } 284162413Ssam } 285162413Ssam#if _BYTE_ORDER == _BIG_ENDIAN 286162413Ssam if (reg >= 0x4000 && reg < 0x5000) 287162413Ssam bus_space_write_4(tag, h, reg, val); 288162413Ssam else 289162413Ssam#endif 290162413Ssam bus_space_write_stream_4(tag, h, reg, val); 291162413Ssam} 292162413Ssam 293162413Ssamu_int32_t 294162413Ssamath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 295162413Ssam{ 296162413Ssam bus_space_tag_t tag = BUSTAG(ah); 297185522Ssam bus_space_handle_t h = ah->ah_sh; 298162413Ssam u_int32_t val; 299162413Ssam 300162413Ssam#if _BYTE_ORDER == _BIG_ENDIAN 301162413Ssam if (reg >= 0x4000 && reg < 0x5000) 302162413Ssam val = bus_space_read_4(tag, h, reg); 303162413Ssam else 304162413Ssam#endif 305162413Ssam val = bus_space_read_stream_4(tag, h, reg); 306162413Ssam if (ath_hal_alq) { 307162413Ssam struct ale *ale = ath_hal_alq_get(ah); 308162413Ssam if (ale) { 309162413Ssam struct athregrec *r = (struct athregrec *) ale->ae_data; 310162413Ssam r->op = OP_READ; 311162413Ssam r->reg = reg; 312162413Ssam r->val = val; 313162413Ssam alq_post(ath_hal_alq, ale); 314162413Ssam } 315162413Ssam } 316162413Ssam return val; 317162413Ssam} 318162413Ssam 319162413Ssamvoid 320162413SsamOS_MARK(struct ath_hal *ah, u_int id, u_int32_t v) 321162413Ssam{ 322162413Ssam if (ath_hal_alq) { 323162413Ssam struct ale *ale = ath_hal_alq_get(ah); 324162413Ssam if (ale) { 325162413Ssam struct athregrec *r = (struct athregrec *) ale->ae_data; 326162413Ssam r->op = OP_MARK; 327162413Ssam r->reg = id; 328162413Ssam r->val = v; 329162413Ssam alq_post(ath_hal_alq, ale); 330162413Ssam } 331162413Ssam } 332162413Ssam} 333162413Ssam#elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) 334162413Ssam/* 335162413Ssam * Memory-mapped device register read/write. These are here 336162413Ssam * as routines when debugging support is enabled and/or when 337162413Ssam * explicitly configured to use function calls. The latter is 338162413Ssam * for architectures that might need to do something before 339162413Ssam * referencing memory (e.g. remap an i/o window). 340162413Ssam * 341162413Ssam * NB: see the comments in ah_osdep.h about byte-swapping register 342162413Ssam * reads and writes to understand what's going on below. 343162413Ssam */ 344162413Ssam 345162413Ssamvoid 346162413Ssamath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val) 347162413Ssam{ 348162413Ssam bus_space_tag_t tag = BUSTAG(ah); 349185522Ssam bus_space_handle_t h = ah->ah_sh; 350162413Ssam 351162413Ssam#if _BYTE_ORDER == _BIG_ENDIAN 352162413Ssam if (reg >= 0x4000 && reg < 0x5000) 353162413Ssam bus_space_write_4(tag, h, reg, val); 354162413Ssam else 355162413Ssam#endif 356162413Ssam bus_space_write_stream_4(tag, h, reg, val); 357162413Ssam} 358162413Ssam 359162413Ssamu_int32_t 360162413Ssamath_hal_reg_read(struct ath_hal *ah, u_int32_t reg) 361162413Ssam{ 362162413Ssam bus_space_tag_t tag = BUSTAG(ah); 363185522Ssam bus_space_handle_t h = ah->ah_sh; 364162413Ssam u_int32_t val; 365162413Ssam 366162413Ssam#if _BYTE_ORDER == _BIG_ENDIAN 367162413Ssam if (reg >= 0x4000 && reg < 0x5000) 368162413Ssam val = bus_space_read_4(tag, h, reg); 369162413Ssam else 370162413Ssam#endif 371162413Ssam val = bus_space_read_stream_4(tag, h, reg); 372162413Ssam return val; 373162413Ssam} 374162413Ssam#endif /* AH_DEBUG || AH_REGOPS_FUNC */ 375162413Ssam 376162413Ssam#ifdef AH_ASSERT 377162413Ssamvoid 378162413Ssamath_hal_assert_failed(const char* filename, int lineno, const char *msg) 379162413Ssam{ 380162413Ssam printf("Atheros HAL assertion failure: %s: line %u: %s\n", 381162413Ssam filename, lineno, msg); 382162413Ssam panic("ath_hal_assert"); 383162413Ssam} 384162413Ssam#endif /* AH_ASSERT */ 385162413Ssam 386162413Ssam/* 387162413Ssam * Delay n microseconds. 388162413Ssam */ 389162413Ssamvoid 390162413Ssamath_hal_delay(int n) 391162413Ssam{ 392162413Ssam DELAY(n); 393162413Ssam} 394162413Ssam 395162413Ssamu_int32_t 396162413Ssamath_hal_getuptime(struct ath_hal *ah) 397162413Ssam{ 398162413Ssam struct bintime bt; 399162413Ssam getbinuptime(&bt); 400162413Ssam return (bt.sec * 1000) + 401162413Ssam (((uint64_t)1000 * (uint32_t)(bt.frac >> 32)) >> 32); 402162413Ssam} 403162413Ssam 404162413Ssamvoid 405162413Ssamath_hal_memzero(void *dst, size_t n) 406162413Ssam{ 407162413Ssam bzero(dst, n); 408162413Ssam} 409162413Ssam 410162413Ssamvoid * 411162413Ssamath_hal_memcpy(void *dst, const void *src, size_t n) 412162413Ssam{ 413162413Ssam return memcpy(dst, src, n); 414162413Ssam} 415