ah_osdep.c revision 185522
1178354Ssam/*-
2178354Ssam * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3178354Ssam * All rights reserved.
4178354Ssam *
5178354Ssam * Redistribution and use in source and binary forms, with or without
6178354Ssam * modification, are permitted provided that the following conditions
7178354Ssam * are met:
8178354Ssam * 1. Redistributions of source code must retain the above copyright
9178354Ssam *    notice, this list of conditions and the following disclaimer,
10178354Ssam *    without modification.
11178354Ssam * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12178354Ssam *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13178354Ssam *    redistribution must be conditioned upon including a substantially
14178354Ssam *    similar Disclaimer requirement for further binary redistribution.
15178354Ssam *
16178354Ssam * NO WARRANTY
17178354Ssam * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18178354Ssam * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19178354Ssam * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20178354Ssam * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21178354Ssam * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22178354Ssam * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23178354Ssam * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24178354Ssam * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25178354Ssam * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26178354Ssam * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27178354Ssam * THE POSSIBILITY OF SUCH DAMAGES.
28178354Ssam *
29178354Ssam * $FreeBSD: head/sys/dev/ath/ah_osdep.c 185522 2008-12-01 16:53:01Z sam $
30178354Ssam */
31178354Ssam#include "opt_ah.h"
32178354Ssam
33178354Ssam#include <sys/param.h>
34178354Ssam#include <sys/systm.h>
35178354Ssam#include <sys/kernel.h>
36178354Ssam#include <sys/module.h>
37178354Ssam#include <sys/sysctl.h>
38178354Ssam#include <sys/bus.h>
39178354Ssam#include <sys/malloc.h>
40178354Ssam#include <sys/proc.h>
41178354Ssam
42178354Ssam#include <machine/stdarg.h>
43178354Ssam
44178354Ssam#include <net/ethernet.h>		/* XXX for ether_sprintf */
45178354Ssam
46178354Ssam#include <dev/ath/ath_hal/ah.h>
47178354Ssam
48188258Ssam/*
49188258Ssam * WiSoC boards overload the bus tag with information about the
50188258Ssam * board layout.  We must extract the bus space tag from that
51188258Ssam * indirect structure.  For everyone else the tag is passed in
52188258Ssam * directly.
53188258Ssam * XXX cache indirect ref privately
54188258Ssam */
55178354Ssam#ifdef AH_SUPPORT_AR5312
56178354Ssam#define	BUSTAG(ah) \
57178354Ssam	((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag)
58178354Ssam#else
59188155Ssam#define	BUSTAG(ah)	((ah)->ah_st)
60178354Ssam#endif
61178354Ssam
62178354Ssamextern	void ath_hal_printf(struct ath_hal *, const char*, ...)
63178354Ssam		__printflike(2,3);
64178354Ssamextern	void ath_hal_vprintf(struct ath_hal *, const char*, __va_list)
65178354Ssam		__printflike(2, 0);
66178354Ssamextern	const char* ath_hal_ether_sprintf(const u_int8_t *mac);
67178354Ssamextern	void *ath_hal_malloc(size_t);
68178354Ssamextern	void ath_hal_free(void *);
69178354Ssam#ifdef AH_ASSERT
70178354Ssamextern	void ath_hal_assert_failed(const char* filename,
71178354Ssam		int lineno, const char* msg);
72178354Ssam#endif
73178354Ssam#ifdef AH_DEBUG
74178354Ssam#if HAL_ABI_VERSION >= 0x08090101
75178354Ssamextern	void HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...);
76178354Ssam#else
77178354Ssamextern	void HALDEBUG(struct ath_hal *ah, const char* fmt, ...);
78178354Ssamextern	void HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...);
79178354Ssam#endif
80178354Ssam#endif /* AH_DEBUG */
81178354Ssam
82178354Ssam/* NB: put this here instead of the driver to avoid circular references */
83178354SsamSYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters");
84186100SsamSYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0, "Atheros HAL parameters");
85178354Ssam
86178354Ssam#ifdef AH_DEBUG
87178354Ssamstatic	int ath_hal_debug = 0;
88178354SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug,
89178354Ssam	    0, "Atheros HAL debugging printfs");
90178354SsamTUNABLE_INT("hw.ath.hal.debug", &ath_hal_debug);
91178354Ssam#endif /* AH_DEBUG */
92178354Ssam
93178354Ssam/* NB: these are deprecated; they exist for now for compatibility */
94178354Ssamint	ath_hal_dma_beacon_response_time = 2;	/* in TU's */
95178354SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, dma_brt, CTLFLAG_RW,
96178354Ssam	   &ath_hal_dma_beacon_response_time, 0,
97178354Ssam	   "Atheros HAL DMA beacon response time");
98178354Ssamint	ath_hal_sw_beacon_response_time = 10;	/* in TU's */
99178354SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, sw_brt, CTLFLAG_RW,
100178354Ssam	   &ath_hal_sw_beacon_response_time, 0,
101178354Ssam	   "Atheros HAL software beacon response time");
102178354Ssamint	ath_hal_additional_swba_backoff = 0;	/* in TU's */
103178354SsamSYSCTL_INT(_hw_ath_hal, OID_AUTO, swba_backoff, CTLFLAG_RW,
104178354Ssam	   &ath_hal_additional_swba_backoff, 0,
105178354Ssam	   "Atheros HAL additional SWBA backoff time");
106178354Ssam
107178354SsamMALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data");
108178354Ssam
109178354Ssamvoid*
110178354Ssamath_hal_malloc(size_t size)
111178354Ssam{
112178354Ssam	return malloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO);
113178354Ssam}
114178354Ssam
115178354Ssamvoid
116178354Ssamath_hal_free(void* p)
117178354Ssam{
118178354Ssam	return free(p, M_ATH_HAL);
119178354Ssam}
120178354Ssam
121178354Ssamvoid
122ath_hal_vprintf(struct ath_hal *ah, const char* fmt, va_list ap)
123{
124	vprintf(fmt, ap);
125}
126
127void
128ath_hal_printf(struct ath_hal *ah, const char* fmt, ...)
129{
130	va_list ap;
131	va_start(ap, fmt);
132	ath_hal_vprintf(ah, fmt, ap);
133	va_end(ap);
134}
135
136const char*
137ath_hal_ether_sprintf(const u_int8_t *mac)
138{
139	return ether_sprintf(mac);
140}
141
142#ifdef AH_DEBUG
143#if HAL_ABI_VERSION >= 0x08090101
144void
145HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...)
146{
147	if (ath_hal_debug & mask) {
148		__va_list ap;
149		va_start(ap, fmt);
150		ath_hal_vprintf(ah, fmt, ap);
151		va_end(ap);
152	}
153}
154#else
155void
156HALDEBUG(struct ath_hal *ah, const char* fmt, ...)
157{
158	if (ath_hal_debug) {
159		__va_list ap;
160		va_start(ap, fmt);
161		ath_hal_vprintf(ah, fmt, ap);
162		va_end(ap);
163	}
164}
165
166void
167HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...)
168{
169	if (ath_hal_debug >= level) {
170		__va_list ap;
171		va_start(ap, fmt);
172		ath_hal_vprintf(ah, fmt, ap);
173		va_end(ap);
174	}
175}
176#endif
177#endif /* AH_DEBUG */
178
179#ifdef AH_DEBUG_ALQ
180/*
181 * ALQ register tracing support.
182 *
183 * Setting hw.ath.hal.alq=1 enables tracing of all register reads and
184 * writes to the file /tmp/ath_hal.log.  The file format is a simple
185 * fixed-size array of records.  When done logging set hw.ath.hal.alq=0
186 * and then decode the file with the arcode program (that is part of the
187 * HAL).  If you start+stop tracing the data will be appended to an
188 * existing file.
189 *
190 * NB: doesn't handle multiple devices properly; only one DEVICE record
191 *     is emitted and the different devices are not identified.
192 */
193#include <sys/alq.h>
194#include <sys/pcpu.h>
195#include <dev/ath/ath_hal/ah_decode.h>
196
197static	struct alq *ath_hal_alq;
198static	int ath_hal_alq_emitdev;	/* need to emit DEVICE record */
199static	u_int ath_hal_alq_lost;		/* count of lost records */
200static	const char *ath_hal_logfile = "/tmp/ath_hal.log";
201static	u_int ath_hal_alq_qsize = 64*1024;
202
203static int
204ath_hal_setlogging(int enable)
205{
206	int error;
207
208	if (enable) {
209		error = alq_open(&ath_hal_alq, ath_hal_logfile,
210			curthread->td_ucred, ALQ_DEFAULT_CMODE,
211			sizeof (struct athregrec), ath_hal_alq_qsize);
212		ath_hal_alq_lost = 0;
213		ath_hal_alq_emitdev = 1;
214		printf("ath_hal: logging to %s enabled\n",
215			ath_hal_logfile);
216	} else {
217		if (ath_hal_alq)
218			alq_close(ath_hal_alq);
219		ath_hal_alq = NULL;
220		printf("ath_hal: logging disabled\n");
221		error = 0;
222	}
223	return (error);
224}
225
226static int
227sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS)
228{
229	int error, enable;
230
231	enable = (ath_hal_alq != NULL);
232        error = sysctl_handle_int(oidp, &enable, 0, req);
233        if (error || !req->newptr)
234                return (error);
235	else
236		return (ath_hal_setlogging(enable));
237}
238SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW,
239	0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging");
240SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW,
241	&ath_hal_alq_qsize, 0, "In-memory log size (#records)");
242SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW,
243	&ath_hal_alq_lost, 0, "Register operations not logged");
244
245static struct ale *
246ath_hal_alq_get(struct ath_hal *ah)
247{
248	struct ale *ale;
249
250	if (ath_hal_alq_emitdev) {
251		ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
252		if (ale) {
253			struct athregrec *r =
254				(struct athregrec *) ale->ae_data;
255			r->op = OP_DEVICE;
256			r->reg = 0;
257			r->val = ah->ah_devid;
258			alq_post(ath_hal_alq, ale);
259			ath_hal_alq_emitdev = 0;
260		} else
261			ath_hal_alq_lost++;
262	}
263	ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
264	if (!ale)
265		ath_hal_alq_lost++;
266	return ale;
267}
268
269void
270ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
271{
272	bus_space_tag_t tag = BUSTAG(ah);
273	bus_space_handle_t h = ah->ah_sh;
274
275	if (ath_hal_alq) {
276		struct ale *ale = ath_hal_alq_get(ah);
277		if (ale) {
278			struct athregrec *r = (struct athregrec *) ale->ae_data;
279			r->op = OP_WRITE;
280			r->reg = reg;
281			r->val = val;
282			alq_post(ath_hal_alq, ale);
283		}
284	}
285#if _BYTE_ORDER == _BIG_ENDIAN
286	if (reg >= 0x4000 && reg < 0x5000)
287		bus_space_write_4(tag, h, reg, val);
288	else
289#endif
290		bus_space_write_stream_4(tag, h, reg, val);
291}
292
293u_int32_t
294ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
295{
296	bus_space_tag_t tag = BUSTAG(ah);
297	bus_space_handle_t h = ah->ah_sh;
298	u_int32_t val;
299
300#if _BYTE_ORDER == _BIG_ENDIAN
301	if (reg >= 0x4000 && reg < 0x5000)
302		val = bus_space_read_4(tag, h, reg);
303	else
304#endif
305		val = bus_space_read_stream_4(tag, h, reg);
306	if (ath_hal_alq) {
307		struct ale *ale = ath_hal_alq_get(ah);
308		if (ale) {
309			struct athregrec *r = (struct athregrec *) ale->ae_data;
310			r->op = OP_READ;
311			r->reg = reg;
312			r->val = val;
313			alq_post(ath_hal_alq, ale);
314		}
315	}
316	return val;
317}
318
319void
320OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v)
321{
322	if (ath_hal_alq) {
323		struct ale *ale = ath_hal_alq_get(ah);
324		if (ale) {
325			struct athregrec *r = (struct athregrec *) ale->ae_data;
326			r->op = OP_MARK;
327			r->reg = id;
328			r->val = v;
329			alq_post(ath_hal_alq, ale);
330		}
331	}
332}
333#elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC)
334/*
335 * Memory-mapped device register read/write.  These are here
336 * as routines when debugging support is enabled and/or when
337 * explicitly configured to use function calls.  The latter is
338 * for architectures that might need to do something before
339 * referencing memory (e.g. remap an i/o window).
340 *
341 * NB: see the comments in ah_osdep.h about byte-swapping register
342 *     reads and writes to understand what's going on below.
343 */
344
345void
346ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
347{
348	bus_space_tag_t tag = BUSTAG(ah);
349	bus_space_handle_t h = ah->ah_sh;
350
351#if _BYTE_ORDER == _BIG_ENDIAN
352	if (reg >= 0x4000 && reg < 0x5000)
353		bus_space_write_4(tag, h, reg, val);
354	else
355#endif
356		bus_space_write_stream_4(tag, h, reg, val);
357}
358
359u_int32_t
360ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
361{
362	bus_space_tag_t tag = BUSTAG(ah);
363	bus_space_handle_t h = ah->ah_sh;
364	u_int32_t val;
365
366#if _BYTE_ORDER == _BIG_ENDIAN
367	if (reg >= 0x4000 && reg < 0x5000)
368		val = bus_space_read_4(tag, h, reg);
369	else
370#endif
371		val = bus_space_read_stream_4(tag, h, reg);
372	return val;
373}
374#endif /* AH_DEBUG || AH_REGOPS_FUNC */
375
376#ifdef AH_ASSERT
377void
378ath_hal_assert_failed(const char* filename, int lineno, const char *msg)
379{
380	printf("Atheros HAL assertion failure: %s: line %u: %s\n",
381		filename, lineno, msg);
382	panic("ath_hal_assert");
383}
384#endif /* AH_ASSERT */
385
386/*
387 * Delay n microseconds.
388 */
389void
390ath_hal_delay(int n)
391{
392	DELAY(n);
393}
394
395u_int32_t
396ath_hal_getuptime(struct ath_hal *ah)
397{
398	struct bintime bt;
399	getbinuptime(&bt);
400	return (bt.sec * 1000) +
401		(((uint64_t)1000 * (uint32_t)(bt.frac >> 32)) >> 32);
402}
403
404void
405ath_hal_memzero(void *dst, size_t n)
406{
407	bzero(dst, n);
408}
409
410void *
411ath_hal_memcpy(void *dst, const void *src, size_t n)
412{
413	return memcpy(dst, src, n);
414}
415