1/*- 2 * Copyright (c) 2007 Bruce M. Simpson. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27/* 28 * Child driver for ChipCommon core. 29 * This is not MI code at the moment. 30 * Two 16C550 compatible UARTs live here. On the WGT634U, uart1 is the 31 * system console, and uart0 is not pinned out. 32 * Because their presence is conditional, they should probably 33 * be attached from here. 34 * GPIO lives here. 35 * The hardware watchdog lives here. 36 * Clock control registers live here. 37 * You don't need to read them to determine the clock speed on the 5365, 38 * which is always 200MHz and thus may be hardcoded (for now). 39 * Flash config registers live here. There may or may not be system flash. 40 * The external interface bus lives here (conditionally). 41 * There is a JTAG interface here which may be used to attach probes to 42 * the SoC for debugging. 43 */ 44 45#include <sys/cdefs.h> 46__FBSDID("$FreeBSD$"); 47 48#include <sys/param.h> 49#include <sys/systm.h> 50#include <sys/bus.h> 51#include <sys/kernel.h> 52#include <sys/module.h> 53#include <sys/rman.h> 54#include <sys/malloc.h> 55 56#include <machine/bus.h> 57 58#include <dev/siba/siba_ids.h> 59#include <dev/siba/sibareg.h> 60#include <dev/siba/sibavar.h> 61 62static int siba_cc_attach(device_t); 63static int siba_cc_probe(device_t); 64static void siba_cc_intr(void *v); 65 66static int 67siba_cc_probe(device_t dev) 68{ 69 70 if (siba_get_vendor(dev) == SIBA_VID_BROADCOM && 71 siba_get_device(dev) == SIBA_DEVID_CHIPCOMMON) { 72 device_set_desc(dev, "ChipCommon core"); 73 return (BUS_PROBE_DEFAULT); 74 } 75 76 return (ENXIO); 77} 78 79struct siba_cc_softc { 80 void *notused; 81}; 82 83static int 84siba_cc_attach(device_t dev) 85{ 86 //struct siba_cc_softc *sc = device_get_softc(dev); 87 struct resource *mem; 88 struct resource *irq; 89 int rid; 90 91 /* 92 * Allocate the resources which the parent bus has already 93 * determined for us. 94 * TODO: interrupt routing 95 */ 96#define MIPS_MEM_RID 0x20 97 rid = MIPS_MEM_RID; 98 mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); 99 if (mem == NULL) { 100 device_printf(dev, "unable to allocate memory\n"); 101 return (ENXIO); 102 } 103 104 rid = 0; 105 irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 0); 106 if (irq == NULL) { 107 device_printf(dev, "unable to allocate irq\n"); 108 return (ENXIO); 109 } 110 111 /* now setup the interrupt */ 112 /* may be fast, exclusive or mpsafe at a later date */ 113 114 /* 115 * XXX is this interrupt line in ChipCommon used for anything 116 * other than the uart? in that case we shouldn't hog it ourselves 117 * and let uart claim it to avoid polled mode. 118 */ 119 int err; 120 void *cookie; 121 err = bus_setup_intr(dev, irq, INTR_TYPE_TTY, NULL, siba_cc_intr, NULL, 122 &cookie); 123 if (err != 0) { 124 device_printf(dev, "unable to setup intr\n"); 125 return (ENXIO); 126 } 127 128 /* TODO: attach uart child */ 129 130 return (0); 131} 132 133static void 134siba_cc_intr(void *v) 135{ 136 137} 138 139static device_method_t siba_cc_methods[] = { 140 /* Device interface */ 141 DEVMETHOD(device_attach, siba_cc_attach), 142 DEVMETHOD(device_probe, siba_cc_probe), 143 144 DEVMETHOD_END 145}; 146 147static driver_t siba_cc_driver = { 148 "siba_cc", 149 siba_cc_methods, 150 sizeof(struct siba_softc), 151}; 152static devclass_t siba_cc_devclass; 153 154DRIVER_MODULE(siba_cc, siba, siba_cc_driver, siba_cc_devclass, 0, 0); 155