1/*
2 * Copyright (c) 2013, ETH Zurich. All rights reserved.
3 *
4 * This file is distributed under the terms in the attached LICENSE file.
5 * If you do not find this file, copies can be found by writing to:
6 * ETH Zurich D-INFK, Universitaetstrasse 6, CH-8092 Zurich. Attn: Systems Group.
7 */
8
9/*
10 * cortex_a9_gt.dev
11 *
12 * DESCRIPTION: Cortex A9 Global Timer
13 *
14 * This is derived from:
15 *
16 * Cortex-A9 MPCore Technical Reference Manual
17 * (DDI0407G_cortex_a9_mpcore_r4p1_trm.pdf)
18 *
19 * This implements private timers and watchdogs
20 */
21 
22device cortex_a9_gt msbfirst ( addr base ) "Cortex A9 Global Timer" {
23    
24    register TimerCounterLow addr(base, 0x0) 
25	"Counter (Lower Word)" 
26	type(uint32);
27
28    register TimerCounterHigh addr(base, 0x4) 
29	"Counter (Upper Word)" 
30	type(uint32);
31    
32    register TimerControl addr(base, 0x8) "Control" {
33	_		16	rsvd;
34	prescale	8	rw		"Prescale factor";
35	_		4	rsvd;
36	auto_increment	1	rw		"Single shot or increment mode";
37	int_enable	1	rw		"Interrupt enable bit";
38	comp_enable	1	rw		"Enable comparision between counter and comparator";
39	timer_enable	1	rw		"Timer enable bit";
40    };
41    
42    register TimerIntStat addr(base, 0xc) "Interrupt Status" {
43	_		31	rsvd;
44	event_flag	1	rw;
45    };
46    
47    register TimerComparatorLow addr(base, 0x10) 
48	"Comparator (Lower Word)" 
49	type(uint32);
50
51    register TimerComparatorHigh addr(base, 0x14) 
52	"Comparator (Upper Word)" 
53	type(uint32);
54    
55    register TimerAutoIncrement addr(base, 0x18) 
56	"Comparator Auto-Increment" 
57	type(uint32);
58    
59};
60