Searched refs:viafb_write_reg_mask (Results 1 - 7 of 7) sorted by relevance
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/video/via/ |
H A D | lcd.c | 412 viafb_write_reg_mask(CR79, VIACR, 0x07, BIT0 + BIT1 + BIT2); 442 viafb_write_reg_mask(CRA2, VIACR, 0xC0, BIT7 + BIT6); 454 viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT7); 485 viafb_write_reg_mask(CRA2, VIACR, 0x08, BIT3); 497 viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT3); 587 viafb_write_reg_mask(CR99, VIACR, 0x08, 640 viafb_write_reg_mask(CR79, VIACR, 0x00, 666 viafb_write_reg_mask(CR6A, VIACR, 0x01, BIT0); 688 viafb_write_reg_mask(CRD4, VIACR, 0, BIT1); 691 viafb_write_reg_mask(CRD [all...] |
H A D | via_utility.c | 152 viafb_write_reg_mask(SR16, VIASR, 0x80, BIT7); 162 viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7); 166 viafb_write_reg_mask(SR1A, VIASR, 0x0, BIT0); 183 viafb_write_reg_mask(SR1A, VIASR, 0x01, BIT0); 184 viafb_write_reg_mask(CR6A, VIACR, 0x02, BIT1); 207 viafb_write_reg_mask(SR16, VIASR, 0x80, BIT7); 217 viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7); 221 viafb_write_reg_mask(SR1A, VIASR, 0x0, BIT0);
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H A D | hw.c | 741 viafb_write_reg_mask(CR11, VIACR, BIT7, BIT7); 746 viafb_write_reg_mask(CR11, VIACR, 0, BIT7); 747 viafb_write_reg_mask(CR47, VIACR, 0, BIT0); 837 viafb_write_reg_mask(0x1A, VIASR, 0x00, 0x01); 843 viafb_write_reg_mask(0x1A, VIASR, 0x01, 0x01); 864 viafb_write_reg_mask(CR36, VIACR, 0x00, BIT4 + BIT5); 868 viafb_write_reg_mask(SR16, VIASR, 0x00, BIT6); 871 viafb_write_reg_mask(CR6A, VIACR, 0xC0, BIT6 + BIT7); 872 viafb_write_reg_mask(SR16, VIASR, 0x40, BIT6); 880 viafb_write_reg_mask(SR1 [all...] |
H A D | vt1636.c | 100 viafb_write_reg_mask(SR1E, VIASR, 0xC0, 0xC0); 106 viafb_write_reg_mask(SR1E, VIASR, 0x30, 0x30); 112 viafb_write_reg_mask(SR2A, VIASR, 0x03, 0x03); 118 viafb_write_reg_mask(SR2A, VIASR, 0x03, 0x0C); 137 viafb_write_reg_mask(SR1E, VIASR, 0x00, 0xC0); 143 viafb_write_reg_mask(SR1E, VIASR, 0x00, 0x30); 149 viafb_write_reg_mask(SR2A, VIASR, 0x00, 0x03); 155 viafb_write_reg_mask(SR2A, VIASR, 0x00, 0x0C);
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H A D | dvi.c | 72 viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); 79 viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); 82 viafb_write_reg_mask(SR1E, VIASR, 0xC0, BIT6 + BIT7); 88 viafb_write_reg_mask(SR1E, VIASR, 0xF0, BIT4 + 93 viafb_write_reg_mask(SR3E, VIASR, 0x0, BIT5); 532 viafb_write_reg_mask(CR91, VIACR, 0x1f, 0x1f); 533 viafb_write_reg_mask(CR88, VIACR, 0x00, BIT6 + BIT0); 566 viafb_write_reg_mask(CR91, VIACR, 0, BIT7); 569 viafb_write_reg_mask(CRD2, VIACR, 0, BIT3);
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H A D | viafbdev.c | 335 viafb_write_reg_mask(CR36, VIACR, 0x00, BIT4 + BIT5); 340 viafb_write_reg_mask(CR36, VIACR, 0x10, BIT4 + BIT5); 345 viafb_write_reg_mask(CR36, VIACR, 0x20, BIT4 + BIT5); 350 viafb_write_reg_mask(CR36, VIACR, 0x30, BIT4 + BIT5); 1122 viafb_write_reg_mask(CR96, VIACR, 1126 viafb_write_reg_mask(SR2A, VIASR, 1128 viafb_write_reg_mask(SR1B, VIASR, 1132 viafb_write_reg_mask(SR2A, VIASR, 1134 viafb_write_reg_mask(SR1E, VIASR, 1190 viafb_write_reg_mask(CR9 [all...] |
H A D | hw.h | 31 #define viafb_write_reg_mask(i, p, d, m) via_write_reg_mask(p, i, d, m) macro
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