Lines Matching refs:viafb_write_reg_mask
335 viafb_write_reg_mask(CR36, VIACR, 0x00, BIT4 + BIT5);
340 viafb_write_reg_mask(CR36, VIACR, 0x10, BIT4 + BIT5);
345 viafb_write_reg_mask(CR36, VIACR, 0x20, BIT4 + BIT5);
350 viafb_write_reg_mask(CR36, VIACR, 0x30, BIT4 + BIT5);
1122 viafb_write_reg_mask(CR96, VIACR,
1126 viafb_write_reg_mask(SR2A, VIASR,
1128 viafb_write_reg_mask(SR1B, VIASR,
1132 viafb_write_reg_mask(SR2A, VIASR,
1134 viafb_write_reg_mask(SR1E, VIASR,
1190 viafb_write_reg_mask(CR9B, VIACR,
1194 viafb_write_reg_mask(SR65, VIASR,
1198 viafb_write_reg_mask(SR65, VIASR,
1246 viafb_write_reg_mask(CR97, VIACR, reg_val, 0x0f);
1285 viafb_write_reg_mask(CR99, VIACR, reg_val, 0x0f);