Searched refs:t8 (Results 1 - 25 of 42) sorted by last modified time

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/linux-master/tools/testing/selftests/bpf/prog_tests/
H A Dbtf_dump.c418 long double t8 = -9.876543; local
445 ASSERT_OK(btf_dump_data(btf, d, "test_long_double", NULL, 0, &t8, 16,
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_pps.c1286 seq->t8 = REG_FIELD_GET(PANEL_LIGHT_ON_DELAY_MASK, pp_on);
1307 drm_dbg_kms(&i915->drm, "%s t1_t3 %d t8 %d t9 %d t10 %d t11_t12 %d\n",
1309 seq->t1_t3, seq->t8, seq->t9, seq->t10, seq->t11_t12);
1321 if (hw.t1_t3 != sw->t1_t3 || hw.t8 != sw->t8 || hw.t9 != sw->t9 ||
1331 return delays->t1_t3 || delays->t8 || delays->t9 ||
1392 spec->t8 = 50 * 10; /* no limit for t8, use t7 instead */
1393 spec->t9 = 50 * 10; /* no limit for t9, make it symmetric with t8 */
1426 assign_final(t8);
[all...]
H A Dintel_bios.h55 u16 t8; member in struct:edp_power_seq
/linux-master/drivers/net/ethernet/marvell/
H A Dsky2.c3123 u8 t8; local
3217 t8 = sky2_read8(hw, B2_Y2_HW_RES);
3218 if ((t8 & CFG_DUAL_MAC_MSK) == CFG_DUAL_MAC_MSK) {
H A Dskge.c3525 u8 t8, mac_cfg, pmd_type; local
3594 t8 = skge_read8(hw, B2_E_0);
3596 if (t8 == 3) {
3601 hw->ram_size = t8 * 512;
3602 } else if (t8 == 0)
3605 hw->ram_size = t8 * 4096;
/linux-master/arch/arm64/include/asm/
H A Dassembler.h498 * copy_page - copy src to dest using temp registers t1-t8
500 .macro copy_page dest:req src:req t1:req t2:req t3:req t4:req t5:req t6:req t7:req t8:req
504 ldp \t7, \t8, [\src, #48] variable
509 stnp \t7, \t8, [\dest, #48] variable
/linux-master/arch/alpha/kernel/
H A Dsys_nautilus.c91 u8 t8; local
92 pci_bus_read_config_byte(bus, 0x38, 0x43, &t8);
93 pci_bus_write_config_byte(bus, 0x38, 0x43, t8 | 0x80);
/linux-master/arch/mips/kernel/
H A Dscall32-o32.S64 load_a7: user_lw(t8, 28(t0)) # argument #8 from usp
70 sw t8, 28(sp) # argument #8 to ksp
169 li t8, 0
H A Dcps-vec.S371 move t8, ta2
469 and t0, t0, t8
H A Dr2300_switch.S39 PTR_LA t8, __stack_chk_guard
41 LONG_S t9, 0(t8)
H A Docteon_switch.S46 LONG_L t8, 0(t1) /* Load from CVMSEG */
50 LONG_S t8, 0(t2) /* Store CVMSEG to thread storage */
64 PTR_LA t8, __stack_chk_guard
66 LONG_S t9, 0(t8)
/linux-master/arch/loongarch/kvm/
H A Dswitch.S176 ld.d t8, a2, KVM_ARCH_HANDLE_EXIT
177 jirl ra, t8, 0
/linux-master/arch/loongarch/kernel/
H A Drethook_trampoline.S26 cfi_st t8, PT_R20
61 cfi_ld t8, PT_R20
H A Dmcount_dyn.S50 PTR_S t8, sp, PT_R20
67 PTR_ADDI t8, sp, PT_SIZE
68 PTR_S t8, sp, PT_R3
/linux-master/arch/loongarch/include/asm/
H A Dstackframe.h69 cfi_st t8, PT_R20, \docfi variable
184 cfi_ld t8, PT_R20, \docfi variable
/linux-master/arch/mips/include/asm/
H A Dregdef.h140 #define t8 $24 /* caller saved */ macro
183 #define t8 $24 /* caller saved */ macro
/linux-master/drivers/gpu/drm/gma500/
H A Dcdv_intel_dp.c2036 cur.t8 = (pp_on & PANEL_LIGHT_ON_DELAY_MASK) >>
2048 DRM_DEBUG_KMS("cur t1_t3 %d t8 %d t9 %d t10 %d t11_t12 %d\n",
2049 cur.t1_t3, cur.t8, cur.t9, cur.t10, cur.t11_t12);
2053 intel_dp->backlight_on_delay = cur.t8 / 10;
/linux-master/arch/mips/lib/
H A Dmemcpy.S284 #define rem t8
H A Dmemset.S27 #define FILL64RG t8
102 move t8, a1 /* used by 'swp' instruction */
H A Dcsum_partial.S111 sltiu t8, a1, 0x8
112 bnez t8, .Lsmall_csumcpy /* < 8 bytes to copy */
119 andi t8, src, 0x2
128 andi t8, src, 0x2
131 beqz t8, .Ldword_align
132 sltiu t8, a1, 56
137 sltiu t8, a1, 56
141 bnez t8, .Ldo_end_words
142 move t8, a1
144 andi t8, sr
[all...]
/linux-master/arch/mips/cavium-octeon/
H A Docteon-memcpy.S313 #define rem t8
/linux-master/arch/alpha/lib/
H A Dstrrchr.S25 mov zero, t8 # .. e1 : t8 is last match byte compare mask
47 cmovne t3, t3, t8 # e0 :
62 cmovne t3, t3, t8 # .. e1 : save it, if match found
69 beq t8, $retnull # .. e1 :
71 and t8, 0xf0, t2 # e0 : binary search for the high bit set
72 cmovne t2, t2, t8 # .. e1 (zdb)
74 and t8, 0xcc, t1 # .. e1 :
75 cmovne t1, t1, t8 # e0 :
77 and t8,
[all...]
H A Dev67-strrchr.S43 mov zero, t8 # E : t8 is last match byte compare mask
72 cmovne t3, t3, t8 # E : Latency=2, extra map slot
90 cmovne t3, t3, t8 # E : save it, if match found Latency=2, extra map slot
97 ctlz t8, t2 # U0 : Latency=3 (0x40 for t8=0)
100 cmoveq t8, 0x3f, t2 # E : Compensate for case when no match is seen
/linux-master/arch/loongarch/mm/
H A Dpage.S41 lu12i.w t8, 1 << (PAGE_SHIFT - 12)
42 add.d t8, t8, a0
81 bne t8, a0, 1b
/linux-master/arch/loongarch/power/
H A Dhibernate_asm.S42 REG_L t8, t1, 0
43 REG_S t8, t2, 0

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