Searched refs:reg_shift (Results 1 - 25 of 61) sorted by path

123

/linux-master/arch/arm/mach-omap2/
H A Dprm2xxx.c63 while (p->reg_shift >= 0 && p->std_shift >= 0) {
64 if (v & (1 << p->reg_shift))
H A Dprm.h113 * @reg_shift: bitshift in the PRM reset source register
119 s8 reg_shift; member in struct:prm_reset_src_map
H A Dprm3xxx.c456 while (p->reg_shift >= 0 && p->std_shift >= 0) {
457 if (v & (1 << p->reg_shift))
H A Dprm44xx.c385 while (p->reg_shift >= 0 && p->std_shift >= 0) {
386 if (v & (1 << p->reg_shift))
/linux-master/arch/mips/bcm47xx/
H A Dserial.c45 p->regshift = ssb_port->reg_shift;
71 p->regshift = bcma_port->reg_shift;
/linux-master/arch/mips/kernel/
H A Dearly_printk_8250.c16 void setup_8250_early_printk_port(unsigned long base, unsigned int reg_shift, argument
20 serial8250_reg_shift = reg_shift;
/linux-master/include/linux/
H A D8250_pci.h28 unsigned int reg_shift; member in struct:pciserial_board
/linux-master/include/linux/platform_data/
H A Data-pxa.h15 uint32_t reg_shift; member in struct:pata_pxa_pdata
H A Di2c-ocores.h12 u32 reg_shift; /* register offset shift value */ member in struct:ocores_i2c_platform_data
H A Dserial-sccnxp.h77 const u8 reg_shift; member in struct:sccnxp_pdata
/linux-master/include/linux/ssb/
H A Dssb_driver_mips.h14 unsigned int reg_shift; member in struct:ssb_serial_port
/linux-master/arch/mips/include/asm/
H A Dsetup.h13 unsigned int reg_shift, unsigned int timeout);
16 unsigned int reg_shift, unsigned int timeout) {}
15 setup_8250_early_printk_port(unsigned long base, unsigned int reg_shift, unsigned int timeout) argument
/linux-master/arch/mips/sni/
H A Da20r.c124 .reg_shift = 2,
/linux-master/arch/powerpc/boot/
H A Dns16550.c32 static u32 reg_shift; variable
36 out_8(reg_base + (UART_FCR << reg_shift), 0x06);
42 while ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_THRE) == 0);
48 while ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_DR) == 0);
54 return ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_DR) != 0);
71 n = getprop(devp, "reg-shift", &reg_shift, sizeof(reg_shift));
72 if (n != sizeof(reg_shift))
73 reg_shift = 0;
75 reg_shift
[all...]
/linux-master/drivers/ata/
H A Dpata_falcon.c132 int irq = 0, io_offset = 1, reg_shift = 2; /* Falcon defaults */ local
178 reg_shift = 0;
186 ap->ioaddr.error_addr = base + io_offset + (1 << reg_shift);
187 ap->ioaddr.feature_addr = base + io_offset + (1 << reg_shift);
188 ap->ioaddr.nsect_addr = base + io_offset + (2 << reg_shift);
189 ap->ioaddr.lbal_addr = base + io_offset + (3 << reg_shift);
190 ap->ioaddr.lbam_addr = base + io_offset + (4 << reg_shift);
191 ap->ioaddr.lbah_addr = base + io_offset + (5 << reg_shift);
192 ap->ioaddr.device_addr = base + io_offset + (6 << reg_shift);
193 ap->ioaddr.status_addr = base + io_offset + (7 << reg_shift);
[all...]
H A Dpata_of_platform.c29 unsigned int reg_shift = 0; local
59 of_property_read_u32(dn, "reg-shift", &reg_shift);
76 reg_shift, pio_mask, &pata_platform_sht,
H A Dpata_pxa.c236 (ATA_REG_DATA << pdata->reg_shift);
238 (ATA_REG_ERR << pdata->reg_shift);
240 (ATA_REG_FEATURE << pdata->reg_shift);
242 (ATA_REG_NSECT << pdata->reg_shift);
244 (ATA_REG_LBAL << pdata->reg_shift);
246 (ATA_REG_LBAM << pdata->reg_shift);
248 (ATA_REG_LBAH << pdata->reg_shift);
250 (ATA_REG_DEVICE << pdata->reg_shift);
252 (ATA_REG_STATUS << pdata->reg_shift);
254 (ATA_REG_CMD << pdata->reg_shift);
[all...]
/linux-master/drivers/base/regmap/
H A Dinternal.h35 s8 reg_shift; member in struct:regmap_format
125 int reg_shift; member in struct:regmap
H A Dregmap.c763 map->format.reg_shift = config->reg_shift;
767 map->reg_shift = config->pad_bits % 8;
855 switch (config->reg_bits + map->reg_shift) {
1591 if (map->format.reg_shift > 0)
1592 reg >>= map->format.reg_shift;
1593 else if (map->format.reg_shift < 0)
1594 reg <<= -(map->format.reg_shift);
1679 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2406 map->format.format_reg(u8, reg, map->reg_shift);
[all...]
/linux-master/drivers/bcma/
H A Ddriver_chipcommon.c418 ports[i].reg_shift = 0;
/linux-master/drivers/gpio/
H A Dgpio-adnp.c15 #define GPIO_DDR(gpio) (0x00 << (gpio)->reg_shift)
16 #define GPIO_PLR(gpio) (0x01 << (gpio)->reg_shift)
17 #define GPIO_IER(gpio) (0x02 << (gpio)->reg_shift)
18 #define GPIO_ISR(gpio) (0x03 << (gpio)->reg_shift)
19 #define GPIO_PTR(gpio) (0x04 << (gpio)->reg_shift)
24 unsigned int reg_shift; member in struct:adnp
69 unsigned int reg = offset >> adnp->reg_shift;
83 unsigned int reg = offset >> adnp->reg_shift;
112 unsigned int reg = offset >> adnp->reg_shift;
149 unsigned int reg = offset >> adnp->reg_shift;
[all...]
H A Dgpio-creg-snps.c34 u32 reg, reg_shift, value; local
40 reg_shift = layout->shift[offset];
42 reg_shift += layout->bit_per_gpio[i] + layout->shift[i];
46 reg &= ~(GENMASK(layout->bit_per_gpio[i] - 1, 0) << reg_shift);
47 reg |= (value << reg_shift);
H A Dgpio-htc-egpio.c37 int reg_shift; /* bit shift */ member in struct:egpio_info
123 return bit >> ei->reg_shift;
128 return 1 << (bit & ((1 << ei->reg_shift)-1));
189 shift = pos << ei->reg_shift;
241 shift += (1<<ei->reg_shift)) {
298 ei->reg_shift = fls(pdata->reg_width - 1);
299 pr_debug("reg_shift = %d\n", ei->reg_shift);
/linux-master/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi.c190 unsigned int reg_shift; member in struct:dw_hdmi
213 regmap_write(hdmi->regm, offset << hdmi->reg_shift, val);
220 regmap_read(hdmi->regm, offset << hdmi->reg_shift, &val);
249 regmap_update_bits(hdmi->regm, reg << hdmi->reg_shift, mask, data);
3381 hdmi->reg_shift = 2;
/linux-master/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_vbif.c161 u32 reg_lvl, reg_val, reg_val_lvl, mask, reg_high, reg_shift; local
170 reg_shift = (xin_id & 0x7) * 4;
175 mask = 0x7 << reg_shift;
178 reg_val |= (remap_level << reg_shift) & mask;
181 reg_val_lvl |= (remap_level << reg_shift) & mask;

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