/linux-master/drivers/clk/at91/ |
H A D | clk-audio-pll.c | 276 struct clk_hw *pclk = clk_hw_get_parent(hw); local 306 best_parent_rate = clk_hw_round_rate(pclk, 327 struct clk_hw *pclk = clk_hw_get_parent(hw); local 341 best_parent_rate = clk_round_rate(pclk->clk, 1); 344 best_parent_rate = clk_round_rate(pclk->clk, rate * div);
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/linux-master/drivers/clk/qcom/ |
H A D | clk-regmap-mux-div.h | 24 * @pclk: the input PLL clock 37 struct clk *pclk; member in struct:clk_regmap_mux_div
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H A D | apcs-msm8916.c | 85 a53cc->pclk = devm_clk_get(parent, NULL); 86 if (IS_ERR(a53cc->pclk)) { 87 ret = PTR_ERR(a53cc->pclk); 94 ret = clk_notifier_register(a53cc->pclk, &a53cc->clk_nb); 118 clk_notifier_unregister(a53cc->pclk, &a53cc->clk_nb); 126 clk_notifier_unregister(a53cc->pclk, &a53cc->clk_nb);
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H A D | apcs-sdx55.c | 82 a7cc->pclk = devm_clk_get(parent, "pll"); 83 if (IS_ERR(a7cc->pclk)) 84 return dev_err_probe(dev, PTR_ERR(a7cc->pclk), 88 ret = clk_notifier_register(a7cc->pclk, &a7cc->clk_nb); 119 clk_notifier_unregister(a7cc->pclk, &a7cc->clk_nb); 128 clk_notifier_unregister(a7cc->pclk, &a7cc->clk_nb);
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/linux-master/drivers/clocksource/ |
H A D | timer-rockchip.c | 37 struct clk *pclk; member in struct:rk_timer 131 struct clk *pclk; local 146 pclk = of_clk_get_by_name(np, "pclk"); 147 if (IS_ERR(pclk)) { 148 ret = PTR_ERR(pclk); 149 pr_err("Failed to get pclk for '%s'\n", TIMER_NAME); 153 ret = clk_prepare_enable(pclk); 155 pr_err("Failed to enable pclk for '%s'\n", TIMER_NAME); 158 timer->pclk [all...] |
/linux-master/drivers/gpu/drm/msm/hdmi/ |
H A D | hdmi_audio.c | 34 #define HDMI_MSM_AUDIO_ARCS(pclk, ...) { (1000 * (pclk)), __VA_ARGS__ }
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/linux-master/drivers/gpu/drm/omapdrm/dss/ |
H A D | hdmi_common.c | 52 int hdmi_compute_acr(u32 pclk, u32 sample_freq, u32 *n, u32 *cts) argument 75 if (pclk == 27027000 || pclk == 74250000) 78 if (pclk == 27027000) 85 if (pclk == 27027000) 146 *cts = (pclk/1000) * (*n / 128) * deep_color / (sample_freq / 10);
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/linux-master/drivers/iommu/ |
H A D | msm_iommu.h | 42 * pclk: The clock for the IOMMU bus interconnect 54 struct clk *pclk; member in struct:msm_iommu_dev
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/linux-master/drivers/video/fbdev/omap2/omapfb/dss/ |
H A D | hdmi_common.c | 52 int hdmi_compute_acr(u32 pclk, u32 sample_freq, u32 *n, u32 *cts) argument 75 if (pclk == 27027000 || pclk == 74250000) 78 if (pclk == 27027000) 85 if (pclk == 27027000) 146 *cts = (pclk/1000) * (*n / 128) * deep_color / (sample_freq / 10);
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/linux-master/drivers/video/fbdev/ |
H A D | pxa168fb.h | 382 #define CFG_INV_PCLK(pclk) ((pclk) << 1)
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/linux-master/sound/soc/stm/ |
H A D | stm32_sai.h | 283 * @pclk: SAI bus clock 294 struct clk *pclk; member in struct:stm32_sai_data
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/linux-master/arch/arm/mach-mv78xx0/ |
H A D | common.c | 76 static void get_pclk_l2clk(int hclk, int core_index, int *pclk, int *l2clk) argument 94 *pclk = ((u64)hclk * (2 + (cfg & 0xf))) >> 1; 100 *l2clk = *pclk / (((cfg >> 4) & 3) + 1); 409 int pclk; local 414 get_pclk_l2clk(hclk, core_index, &pclk, &l2clk); 418 printk("PCLK = %dMHz, ", (pclk + 499999) / 1000000);
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/linux-master/arch/arm/mach-spear/ |
H A D | spear13xx.c | 101 struct clk *gpt_clk, *pclk; local 113 pclk = clk_get(NULL, pclk_name); 114 if (IS_ERR(pclk)) { 120 clk_set_parent(gpt_clk, pclk); 122 clk_put(pclk);
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H A D | spear3xx.c | 74 struct clk *gpt_clk, *pclk; local 86 pclk = clk_get(NULL, pclk_name); 87 if (IS_ERR(pclk)) { 93 clk_set_parent(gpt_clk, pclk); 95 clk_put(pclk);
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H A D | spear6xx.c | 371 struct clk *gpt_clk, *pclk; local 383 pclk = clk_get(NULL, pclk_name); 384 if (IS_ERR(pclk)) { 390 clk_set_parent(gpt_clk, pclk); 392 clk_put(pclk);
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/linux-master/drivers/amba/ |
H A D | bus.c | 67 pcdev->pclk = clk_get(&pcdev->dev, "apb_pclk"); 68 if (IS_ERR(pcdev->pclk)) 69 return PTR_ERR(pcdev->pclk); 71 ret = clk_prepare_enable(pcdev->pclk); 73 clk_put(pcdev->pclk); 80 clk_disable_unprepare(pcdev->pclk); 81 clk_put(pcdev->pclk); 149 dev_dbg(&dev->dev, "can't get pclk: %d\n", ret); 386 * Hooks to provide runtime PM of the pclk (bus clock). It is safe to 397 clk_disable(pcdev->pclk); [all...] |
/linux-master/drivers/ata/ |
H A D | pata_ftide010.c | 27 * @pclk: peripheral clock for the IDE block 44 struct clk *pclk; member in struct:ftide010 476 ftide->pclk = devm_clk_get(dev, "PCLK"); 477 if (!IS_ERR(ftide->pclk)) { 478 ret = clk_prepare_enable(ftide->pclk); 534 clk_disable_unprepare(ftide->pclk); 545 clk_disable_unprepare(ftide->pclk);
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H A D | sata_gemini.c | 196 struct clk *pclk; local 200 pclk = sg->sata0_pclk; 202 pclk = sg->sata1_pclk; 203 ret = clk_enable(pclk); 212 clk_disable(pclk);
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/linux-master/drivers/bus/ |
H A D | bt1-apb.c | 43 * @pclk: APB-reference clock. 55 struct clk *pclk; member in struct:bt1_apb 192 clk_disable_unprepare(apb->pclk); 199 apb->pclk = devm_clk_get(apb->dev, "pclk"); 200 if (IS_ERR(apb->pclk)) 201 return dev_err_probe(apb->dev, PTR_ERR(apb->pclk), 204 ret = clk_prepare_enable(apb->pclk); 216 apb->rate = clk_get_rate(apb->pclk);
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/linux-master/drivers/clk/ |
H A D | clk-conf.c | 18 struct clk *clk, *pclk; local 40 pclk = of_clk_get_from_provider(&clkspec); 42 if (IS_ERR(pclk)) { 43 if (PTR_ERR(pclk) != -EPROBE_DEFER) 46 return PTR_ERR(pclk); 68 rc = clk_set_parent(clk, pclk); 71 __clk_get_name(clk), __clk_get_name(pclk), rc); 73 clk_put(pclk); 77 clk_put(pclk);
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H A D | clk-stm32h7.c | 997 static const struct pclk_t pclk[] = { variable in typeref:struct:pclk_t 1333 for (n = 0; n < ARRAY_SIZE(pclk); n++) 1334 hws[PERIF_BANK + n] = clk_hw_register_gate(NULL, pclk[n].name, 1335 pclk[n].parent, 1336 pclk[n].flags, base + pclk[n].gate_offset, 1337 pclk[n].bit_idx, pclk[n].flags, &stm32rcc_lock);
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H A D | clk-xgene.c | 445 struct xgene_clk *pclk = to_xgene_clk(hw); local 449 if (pclk->lock) 450 spin_lock_irqsave(pclk->lock, flags); 452 if (pclk->param.csr_reg) { 455 data = xgene_clk_read(pclk->param.csr_reg + 456 pclk->param.reg_clk_offset); 457 data |= pclk->param.reg_clk_mask; 458 xgene_clk_write(data, pclk->param.csr_reg + 459 pclk->param.reg_clk_offset); 462 pclk 485 struct xgene_clk *pclk = to_xgene_clk(hw); local 515 struct xgene_clk *pclk = to_xgene_clk(hw); local 535 struct xgene_clk *pclk = to_xgene_clk(hw); local 559 struct xgene_clk *pclk = to_xgene_clk(hw); local 599 struct xgene_clk *pclk = to_xgene_clk(hw); local [all...] |
/linux-master/drivers/clk/pxa/ |
H A D | clk-pxa.c | 60 struct pxa_clk *pclk = to_pxa_clk(hw); local 63 if (!pclk->is_in_low_power || pclk->is_in_low_power()) 64 fix = &pclk->lp; 66 fix = &pclk->hp; 77 struct pxa_clk *pclk = to_pxa_clk(hw); local 79 if (!pclk->is_in_low_power) 81 return pclk->is_in_low_power() ? 0 : 1;
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/linux-master/drivers/clk/samsung/ |
H A D | clk-exynos5420.c | 1537 #define E5420_KFC_DIV(kpll, pclk, aclk) \ 1538 ((((kpll) << 24) | ((pclk) << 20) | ((aclk) << 4)))
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H A D | clk-exynos5433.c | 1594 /* pclk: sci, pmu, sysreg, gpio_{finger, ese, touch, nfc}, uart2-0 */ 3680 #define E5433_APOLLO_DIV0(cntclk, pclk_dbg, atclk, pclk, aclk) \ 3682 ((pclk) << 12) | ((aclk) << 8)) 3919 #define E5433_ATLAS_DIV0(cntclk, pclk_dbg, atclk, pclk, aclk) \ 3921 ((pclk) << 12) | ((aclk) << 8))
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