Searched refs:parent_rate (Results 1 - 25 of 358) sorted by path

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/linux-master/drivers/clk/actions/
H A Dowl-divider.c19 unsigned long *parent_rate)
21 return divider_round_rate(&common->hw, rate, parent_rate,
27 unsigned long *parent_rate)
32 rate, parent_rate);
37 unsigned long parent_rate)
46 return divider_recalc_rate(&common->hw, parent_rate,
53 unsigned long parent_rate)
58 &div->div_hw, parent_rate);
64 unsigned long parent_rate)
69 val = divider_get_val(rate, parent_rate, div_h
16 owl_divider_helper_round_rate(struct owl_clk_common *common, const struct owl_divider_hw *div_hw, unsigned long rate, unsigned long *parent_rate) argument
26 owl_divider_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) argument
35 owl_divider_helper_recalc_rate(struct owl_clk_common *common, const struct owl_divider_hw *div_hw, unsigned long parent_rate) argument
52 owl_divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
61 owl_divider_helper_set_rate(const struct owl_clk_common *common, const struct owl_divider_hw *div_hw, unsigned long rate, unsigned long parent_rate) argument
81 owl_divider_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
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H A Dowl-divider.h62 unsigned long *parent_rate);
66 unsigned long parent_rate);
71 unsigned long parent_rate);
H A Dowl-factor.h70 unsigned long *parent_rate);
74 unsigned long parent_rate);
79 unsigned long parent_rate);
/linux-master/drivers/clk/at91/
H A Dclk-audio-pll.c159 static unsigned long clk_audio_pll_fout(unsigned long parent_rate, argument
162 unsigned long long fr = (unsigned long long)parent_rate * fracr;
170 return parent_rate * (nd + 1) + fr;
174 unsigned long parent_rate)
179 fout = clk_audio_pll_fout(parent_rate, frac->nd, frac->fracr);
188 unsigned long parent_rate)
194 apad_rate = parent_rate / (apad_ck->qdaudio * apad_ck->div);
203 unsigned long parent_rate)
208 apmc_rate = parent_rate / (apmc_ck->qdpmc + 1);
217 unsigned long parent_rate,
173 clk_audio_pll_frac_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
187 clk_audio_pll_pad_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
202 clk_audio_pll_pmc_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
216 clk_audio_pll_frac_compute_frac(unsigned long rate, unsigned long parent_rate, unsigned long *nd, unsigned long *fracr) argument
273 clk_audio_pll_pad_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) argument
324 clk_audio_pll_pmc_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) argument
364 clk_audio_pll_frac_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
387 clk_audio_pll_pad_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
411 clk_audio_pll_pmc_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
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H A Dclk-h32mx.c29 unsigned long parent_rate)
36 return parent_rate / 2;
38 if (parent_rate > H32MX_MAX_FREQ)
40 return parent_rate;
44 unsigned long *parent_rate)
48 if (rate > *parent_rate)
49 return *parent_rate;
50 div = *parent_rate / 2;
54 if (rate - div < *parent_rate - rate)
57 return *parent_rate;
28 clk_sama5d4_h32mx_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
43 clk_sama5d4_h32mx_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) argument
60 clk_sama5d4_h32mx_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
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H A Dclk-plldiv.c23 unsigned long parent_rate)
31 return parent_rate / 2;
33 return parent_rate;
37 unsigned long *parent_rate)
41 if (rate > *parent_rate)
42 return *parent_rate;
43 div = *parent_rate / 2;
47 if (rate - div < *parent_rate - rate)
50 return *parent_rate;
54 unsigned long parent_rate)
22 clk_plldiv_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
36 clk_plldiv_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) argument
53 clk_plldiv_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
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/linux-master/drivers/clk/bcm/
H A Dclk-bcm53573-ilp.c44 unsigned long parent_rate)
89 return parent_rate * 4 / avg;
43 bcm53573_ilp_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
/linux-master/drivers/clk/berlin/
H A Dberlin2-avpll.c156 berlin2_avpll_vco_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
160 u64 freq = parent_rate;
252 berlin2_avpll_channel_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
256 u64 freq = parent_rate;
H A Dberlin2-pll.c42 berlin2_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
47 u64 rate = parent_rate;
/linux-master/drivers/clk/
H A Dclk-hi655x.c26 unsigned long parent_rate)
25 hi655x_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
H A Dclk-highbank.c94 unsigned long parent_rate)
101 return parent_rate;
105 vco_freq = parent_rate * (divf + 1);
135 unsigned long *parent_rate)
138 unsigned long ref_freq = *parent_rate;
146 unsigned long parent_rate)
152 clk_pll_calc(rate, parent_rate, &divq, &divf);
194 unsigned long parent_rate)
198 return parent_rate / div;
206 unsigned long parent_rate)
93 clk_pll_recalc_rate(struct clk_hw *hwclk, unsigned long parent_rate) argument
134 clk_pll_round_rate(struct clk_hw *hwclk, unsigned long rate, unsigned long *parent_rate) argument
145 clk_pll_set_rate(struct clk_hw *hwclk, unsigned long rate, unsigned long parent_rate) argument
193 clk_cpu_periphclk_recalc_rate(struct clk_hw *hwclk, unsigned long parent_rate) argument
205 clk_cpu_a9bclk_recalc_rate(struct clk_hw *hwclk, unsigned long parent_rate) argument
218 clk_periclk_recalc_rate(struct clk_hw *hwclk, unsigned long parent_rate) argument
231 clk_periclk_round_rate(struct clk_hw *hwclk, unsigned long rate, unsigned long *parent_rate) argument
243 clk_periclk_set_rate(struct clk_hw *hwclk, unsigned long rate, unsigned long parent_rate) argument
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H A Dclk-max77686.c135 unsigned long parent_rate)
134 max77686_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
H A Dclk-multiplier.c33 unsigned long parent_rate)
36 return DIV_ROUND_CLOSEST(rate, parent_rate);
38 return rate / parent_rate;
42 unsigned long parent_rate)
53 return parent_rate * val;
71 unsigned long parent_rate, current_rate, best_rate = ~0; local
101 parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw),
103 current_rate = parent_rate * i;
108 *best_parent_rate = parent_rate;
116 unsigned long *parent_rate)
31 __get_mult(struct clk_multiplier *mult, unsigned long rate, unsigned long parent_rate) argument
41 clk_multiplier_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
115 clk_multiplier_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) argument
125 clk_multiplier_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
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H A Dclk-twl6040.c105 unsigned long parent_rate)
104 twl6040_pdmclk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
H A Dclk-vt8500.c115 unsigned long parent_rate)
128 return parent_rate / div;
158 unsigned long parent_rate)
167 divisor = parent_rate / rate;
350 static int vt8500_find_pll_bits(unsigned long rate, unsigned long parent_rate, argument
356 if ((rate < parent_rate * 4) || (rate > parent_rate * 62)) {
362 if (rate <= parent_rate * 31)
368 *multiplier = rate / (parent_rate / *prediv);
369 tclk = (parent_rate / *predi
114 vt8500_dclk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
157 vt8500_dclk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
389 wm8650_find_pll_bits(unsigned long rate, unsigned long parent_rate, u32 *multiplier, u32 *divisor1, u32 *divisor2) argument
425 wm8750_get_filter(u32 parent_rate, u32 divisor1) argument
452 wm8750_find_pll_bits(unsigned long rate, unsigned long parent_rate, u32 *filter, u32 *multiplier, u32 *divisor1, u32 *divisor2) argument
500 wm8850_find_pll_bits(unsigned long rate, unsigned long parent_rate, u32 *multiplier, u32 *divisor1, u32 *divisor2) argument
546 vtwm_pll_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
636 vtwm_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
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/linux-master/drivers/clk/hisilicon/
H A Dclk-hi3660-stub.c58 unsigned long parent_rate)
81 unsigned long parent_rate)
57 hi3660_stub_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
80 hi3660_stub_clk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
H A Dclkdivider-hi6220.c46 unsigned long parent_rate)
54 return divider_recalc_rate(hw, parent_rate, val, dclk->table,
68 unsigned long parent_rate)
75 value = divider_get_val(rate, parent_rate, dclk->table,
45 hi6220_clkdiv_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
67 hi6220_clkdiv_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
/linux-master/drivers/clk/meson/
H A Dvid-pll-div.c76 unsigned long parent_rate)
89 return DIV_ROUND_UP_ULL(parent_rate * div->multiplier, div->divider);
75 meson_vid_pll_div_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
/linux-master/drivers/clk/mvebu/
H A Dclk-corediv.c126 unsigned long parent_rate)
135 return parent_rate / div;
139 unsigned long *parent_rate)
144 div = *parent_rate / rate;
150 return *parent_rate / div;
154 unsigned long parent_rate)
162 div = parent_rate / rate;
125 clk_corediv_recalc_rate(struct clk_hw *hwclk, unsigned long parent_rate) argument
138 clk_corediv_round_rate(struct clk_hw *hwclk, unsigned long rate, unsigned long *parent_rate) argument
153 clk_corediv_set_rate(struct clk_hw *hwclk, unsigned long rate, unsigned long parent_rate) argument
/linux-master/drivers/clk/mxs/
H A Dclk-div.c36 unsigned long parent_rate)
40 return div->ops->recalc_rate(&div->divider.hw, parent_rate);
52 unsigned long parent_rate)
57 ret = div->ops->set_rate(&div->divider.hw, rate, parent_rate);
35 clk_div_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
51 clk_div_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
H A Dclk-frac.c34 unsigned long parent_rate)
43 tmp_rate = (u64)parent_rate * div;
51 unsigned long parent_rate = *prate; local
55 if (rate > parent_rate)
60 do_div(tmp, parent_rate);
66 tmp_rate = (u64)parent_rate * div;
74 unsigned long parent_rate)
81 if (rate > parent_rate)
86 do_div(tmp, parent_rate);
33 clk_frac_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
73 clk_frac_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
H A Dclk-pll.c67 unsigned long parent_rate)
66 clk_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
H A Dclk-ref.c48 unsigned long parent_rate)
51 u64 tmp = parent_rate;
63 unsigned long parent_rate = *prate; local
64 u64 tmp = parent_rate;
76 tmp = parent_rate;
84 unsigned long parent_rate)
88 u64 tmp = parent_rate;
47 clk_ref_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
83 clk_ref_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
/linux-master/drivers/clk/nxp/
H A Dclk-lpc32xx.c467 unsigned long parent_rate)
469 return parent_rate * 397;
473 unsigned long parent_rate)
492 return parent_rate;
496 return parent_rate / (1 << clk->p_div);
503 ref_rate = parent_rate / clk->n_div;
518 parent_rate, val, is_direct, is_bypass, is_feedback,
522 !(pll_is_valid(parent_rate, 1, 1000000, 20000000)
527 parent_rate, cco_rate, ref_rate);
533 unsigned long parent_rate)
466 clk_pll_397x_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
472 clk_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
532 clk_pll_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
582 clk_hclk_pll_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) argument
645 clk_usb_pll_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) argument
745 clk_ddram_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
767 lpc32xx_clk_uart_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
865 clk_usb_i2c_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
943 clk_divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
978 clk_divider_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
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/linux-master/drivers/clk/pistachio/
H A Dclk-pll.c143 unsigned long *parent_rate)
149 if (i > 0 && pll->rates[i].fref == *parent_rate &&
194 unsigned long parent_rate)
205 params = pll_get_params(pll, parent_rate, rate);
270 unsigned long parent_rate)
287 rate = parent_rate;
351 unsigned long parent_rate)
362 params = pll_get_params(pll, parent_rate, rate);
410 unsigned long parent_rate)
414 u64 rate = parent_rate;
142 pll_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) argument
193 pll_gf40lp_frac_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
269 pll_gf40lp_frac_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
350 pll_gf40lp_laint_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
409 pll_gf40lp_laint_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
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