Searched refs:membase (Results 1 - 25 of 208) sorted by path

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/linux-master/arch/m68k/include/asm/
H A Dmcfuart.h21 void __iomem *membase; /* Virtual address if mapped */ member in struct:mcf_platform_uart
/linux-master/arch/mips/bcm47xx/
H A Dserial.c42 p->membase = (void *)ssb_port->regs;
68 p->membase = (void *)bcma_port->regs;
/linux-master/arch/mips/rb532/
H A Dserial.c44 .membase = (char *)KSEG1ADDR(REGBASE + UART0BASE),
H A Ddevices.c215 .membase = (char *)KSEG1ADDR(REGBASE + UART0BASE),
/linux-master/drivers/atm/
H A Dhe.h255 void __iomem *membase; member in struct:he_dev
H A Dnicstar.h711 void __iomem *membase; /* Card's memory base address */ member in struct:ns_dev
/linux-master/drivers/misc/ibmasm/
H A Duart.c41 uart.port.membase = iomem_base;
/linux-master/drivers/net/ethernet/sfc/falcon/
H A Dio.h70 __raw_writeq((__force u64)value, efx->membase + reg);
74 return (__force __le64)__raw_readq(efx->membase + reg);
81 __raw_writel((__force u32)value, efx->membase + reg);
85 return (__force __le32)__raw_readl(efx->membase + reg);
112 static inline void ef4_sram_writeq(struct ef4_nic *efx, void __iomem *membase, argument
124 __raw_writeq((__force u64)value->u64[0], membase + addr);
126 __raw_writel((__force u32)value->u32[0], membase + addr);
127 __raw_writel((__force u32)value->u32[1], membase + addr + 4);
163 static inline void ef4_sram_readq(struct ef4_nic *efx, void __iomem *membase, argument
171 value->u64[0] = (__force __le64)__raw_readq(membase
[all...]
/linux-master/drivers/tty/serial/8250/
H A D8250_acorn.c71 uart.port.membase = info->vaddr + type->offset[i];
H A D8250_hp300.c118 port.membase = (char *)(port.mapbase + DIO_VIRADDRBASE);
135 port.membase = (char *)(port.mapbase + DIO_VIRADDRBASE);
177 uart.port.membase = (char *)(uart.port.mapbase + DIO_VIRADDRBASE);
259 uart.port.membase = (char *)(base + DIO_VIRADDRBASE);
/linux-master/drivers/tty/serial/
H A Dapbuart.h46 #define APBBASE(port) ((struct grlib_apbuart_regs_map *)((port)->membase))
/linux-master/drivers/video/
H A Dvgastate.c407 if (!state->membase)
408 state->membase = 0xA0000;
410 fbbase = ioremap(state->membase, state->memsize);
467 void __iomem *fbbase = ioremap(state->membase, state->memsize);
/linux-master/include/uapi/linux/
H A Dkernelcapi.h28 unsigned int membase; member in struct:kcapi_carddef
/linux-master/arch/arm/kernel/
H A Disa.c21 .procname = "membase",
44 register_isa_ports(unsigned int membase, unsigned int portbase, unsigned int portshift) argument
46 isa_membase = membase;
/linux-master/arch/arm/mach-omap1/
H A Dboard-ams-delta.c770 .membase = IOMEM(MODEM_VIRT),
H A Dserial.c37 return (unsigned int)__raw_readb(up->membase + offset);
44 __raw_writeb(value, p->membase + offset);
119 serial_platform_data[i].membase =
121 if (!serial_platform_data[i].membase) {
/linux-master/arch/arm/plat-orion/
H A Dcommon.c91 void __iomem *membase,
97 data->membase = membase;
125 void __init orion_uart0_init(void __iomem *membase, argument
131 membase, mapbase, irq, clk);
153 void __init orion_uart1_init(void __iomem *membase, argument
159 membase, mapbase, irq, clk);
181 void __init orion_uart2_init(void __iomem *membase, argument
187 membase, mapbase, irq, clk);
209 void __init orion_uart3_init(void __iomem *membase, argument
87 uart_complete( struct platform_device *orion_uart, struct plat_serial8250_port *data, struct resource *resources, void __iomem *membase, resource_size_t mapbase, unsigned int irq, struct clk *clk) argument
[all...]
/linux-master/arch/arm/plat-orion/include/plat/
H A Dcommon.h17 void __init orion_uart0_init(void __iomem *membase,
22 void __init orion_uart1_init(void __iomem *membase,
27 void __init orion_uart2_init(void __iomem *membase,
32 void __init orion_uart3_init(void __iomem *membase,
/linux-master/arch/mips/alchemy/common/
H A Dplatform.c37 alchemy_uart_enable(CPHYSADDR(port->membase));
42 alchemy_uart_disable(CPHYSADDR(port->membase));
/linux-master/arch/mips/jazz/
H A Dsetup.c92 .membase = (void *)(_base), \
/linux-master/arch/mips/loongson2ef/common/
H A Dserial.c36 .membase = (void __iomem *)NULL, \
67 uart8250_data[mips_machtype].membase =
/linux-master/arch/mips/ralink/
H A Dbootrom.c13 static void __iomem *membase = (void __iomem *) KSEG1ADDR(BOOTROM_OFFSET); variable
17 seq_write(s, membase, BOOTROM_SIZE);
H A Dcevt-rt3352.c33 void __iomem *membase; member in struct:systick_device
49 count = ioread32(sdev->membase + SYSTICK_COUNT);
51 iowrite32(count, sdev->membase + SYSTICK_COMPARE);
94 iowrite32(0, systick.membase + SYSTICK_CONFIG);
114 systick.membase + SYSTICK_CONFIG);
123 systick.membase = of_iomap(np, 0);
124 if (!systick.membase)
139 ret = clocksource_mmio_init(systick.membase + SYSTICK_COUNT, np->name,
H A Dtimer.c36 void __iomem *membase; member in struct:rt_timer
44 __raw_writel(val, rt->membase + reg);
49 return __raw_readl(rt->membase + reg);
116 rt->membase = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
117 if (IS_ERR(rt->membase))
118 return PTR_ERR(rt->membase);
/linux-master/arch/mips/txx9/generic/
H A Dsetup.c380 req.membase = ioremap(baseaddr, 0x24);

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