Searched refs:latency (Results 1 - 25 of 53) sorted by path

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/haiku/headers/os/bluetooth/HCI/
H A DbtHCI_command.h332 uint32 latency; member in struct:hci_cp_flow_specification
H A DbtHCI_event.h110 uint32 latency; member in struct:hci_qos
/haiku/headers/os/media/
H A DMediaEventLooper.h15 is time to handle an event. Report your event latency, push other events
88 void SetEventLatency(bigtime_t latency);
/haiku/headers/os/midi2/
H A DMidiConsumer.h46 void SetLatency(bigtime_t latency);
/haiku/headers/private/audio/
H A Dsoundcard.h1896 int latency; /* In usecs, -1=unknown */ member in struct:oss_audioinfo
1960 int latency; /* In usecs, -1=unknown */ member in struct:oss_midi_info
/haiku/headers/private/media/
H A DServerInterface.h742 bigtime_t latency; member in struct:producer_get_latency_reply
783 bigtime_t latency; member in struct:producer_latency_changed_command
885 bigtime_t latency; member in struct:consumer_get_latency_for_reply
/haiku/src/add-ons/accelerants/matrox/engine/
H A Dmga_general.c173 * (CAS latency is dependant on MGA setup on some (DRAM) boards) */
177 uint8 latency = 0; local
194 LOG(4,("INIT: RAM access errors; tuning CAS latency if prudent...\n"));
205 for (latency = 4; latency >= 2; latency-- )
208 ACCW(MCTLWTST, ((si->ps.mctlwtst_reg & 0xfffffffc) | (latency - 2)));
237 LOG(4,("INIT: RAM access OK. CAS latency set to %d cycles.\n", latency));
239 LOG(4,("INIT: RAM access not fixable. CAS latency se
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/haiku/src/add-ons/accelerants/skeleton/engine/
H A Dgeneral.c149 * (CAS latency is dependant on NV setup on some (DRAM) boards) */
153 uint8 latency = 0; local
170 LOG(4,("INIT: RAM access errors; tuning CAS latency if prudent...\n"));
180 LOG(4,("INIT: RAM access OK. CAS latency set to %d cycles.\n", latency));
182 LOG(4,("INIT: RAM access not fixable. CAS latency set to %d cycles.\n", latency));
/haiku/src/add-ons/accelerants/via/engine/
H A Dgeneral.c173 * (CAS latency is dependant on NV setup on some (DRAM) boards) */
177 uint8 latency = 0; local
194 LOG(4,("INIT: RAM access errors; tuning CAS latency if prudent...\n"));
204 LOG(4,("INIT: RAM access OK. CAS latency set to %d cycles.\n", latency));
206 LOG(4,("INIT: RAM access not fixable. CAS latency set to %d cycles.\n", latency));
/haiku/src/add-ons/kernel/bus_managers/firewire/
H A Dfwohci_pci.cpp144 uint32 olatency, latency, ocache_line, cache_line; local
168 latency = olatency = gPci->read_pci_config(info->bus, info->device, info->function,
172 latency = DEF_LATENCY;
174 PCI_latency, 1, latency);
185 TRACE("latency timer %lx -> %lx.\n", olatency, latency);
/haiku/src/add-ons/media/media-add-ons/equalizer/
H A DEqualizerNode.h65 bigtime_t* latency,
105 bigtime_t latency, uint32 flags);
/haiku/src/add-ons/media/media-add-ons/opensound/
H A DOpenSoundDeviceEngine.h41 bigtime_t CardLatency(void) const { return (fAudioInfo.latency < 0) ? 0 : fAudioInfo.latency; };
/haiku/src/add-ons/media/media-add-ons/vst_host/
H A DVSTNode.h72 bigtime_t *latency,
112 bigtime_t latency, uint32 flags);
/haiku/src/apps/cortex/NodeManager/
H A DNodeGroup.h47 // For example, a change in node latency will likely confuse
54 // seeks are queued as late as possible; if the latency increases
76 // - calculate the new latency
78 // to tmStart+latency+pad,
79 // at tpStart+latency+pad - 1
81 // at tpStart+latency+pad
423 // when a cycling node's latency changes, call this method.
424 // +++++ shouldn't there be a general latency-change hook?
485 // functor: calculates latency of each node it's handed, caching
486 // the largest one found; includes initial latency i
497 bigtime_t latency; local
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/haiku/src/apps/debuganalyzer/model/
H A DModel.h486 void AddLatency(nanotime_t latency);
/haiku/src/kits/media/
H A DBufferProducer.cpp85 // latency of your currently-available outputs by iterating over
89 bigtime_t latency; local
106 latency = 0;
107 if (fConsumerThis->GetLatencyFor(output.destination, &latency,
108 &unused) == B_OK && latency > *_latency) {
109 *_latency = latency;
111 } else if (FindLatencyFor(output.destination, &latency, &unused)
112 == B_OK && latency > *_latency) {
113 *_latency = latency;
117 "max latency
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H A DMediaEventLooper.cpp251 // the event latency (see SetEventLatency()) and the scheduling
252 // latency (or, for real-time events, only the scheduling latency).
393 BMediaEventLooper::SetEventLatency(bigtime_t latency) argument
397 if (latency < 0)
398 latency = 0;
400 fEventLatency = latency;
441 // get latency information
/haiku/src/kits/media/experimental/
H A DMediaClientNode.cpp203 bigtime_t* latency, media_node_id* timesource)
211 //*latency = conn->fLatency;
456 // TODO: add correct latency estimate
516 const media_destination& dest, bigtime_t latency, uint32 flags)
619 // TODO: Investigate system level latency logging
202 GetLatencyFor(const media_destination& dest, bigtime_t* latency, media_node_id* timesource) argument
515 LatencyChanged(const media_source& source, const media_destination& dest, bigtime_t latency, uint32 flags) argument
H A DMediaClientNode.h72 bigtime_t* latency,
121 bigtime_t latency, uint32 flags);
/haiku/src/kits/midi2/
H A DMidiRosterLooper.cpp235 bigtime_t latency; local
238 && (msg->FindInt64("midi:latency", &latency) == B_OK)) {
244 cons->fLatency = latency;
443 bigtime_t latency; local
444 if (msg->FindInt64("midi:latency", &latency) == B_OK) {
447 if (cons->fLatency != latency) {
448 cons->fLatency = latency;
453 notify.AddInt64("be:latency", latenc
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/haiku/src/servers/midi/
H A DServerDefs.h73 bigtime_t latency; member in struct:endpoint_t
/haiku/headers/os/drivers/
H A DPCI.h41 uchar latency; /* latency timer */ member in struct:pci_info
247 #define PCI_latency 0x0d /* (1 byte) latency timer */
284 #define PCI_secondary_latency 0x1B /* (1 byte) latency of secondary bus */
308 #define PCI_secondary_latency_2 0x1B /* (1 byte) latency of secondary bus */
/haiku/src/add-ons/accelerants/nvidia/engine/
H A Dnv_general.c1419 * (CAS latency is dependant on NV setup on some (DRAM) boards) */
1423 uint8 latency = 0; local
1440 LOG(4,("INIT: RAM access errors; tuning CAS latency if prudent...\n"));
1450 LOG(4,("INIT: RAM access OK. CAS latency set to %d cycles.\n", latency));
1452 LOG(4,("INIT: RAM access not fixable. CAS latency set to %d cycles.\n", latency));
/haiku/src/add-ons/kernel/bus_managers/pci/
H A Dpci.cpp1345 dev->info.latency = ReadConfig(dev->domain, dev->bus, dev->device,
H A Dpci_info.cpp272 TRACE(("PCI: line_size %02x, latency %02x, header_type %02x, BIST %02x\n",
273 info->line_size, info->latency, info->header_type, info->bist));

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