/linux-master/arch/m68k/ifpsp060/src/ |
H A D | ilsp.S | 105 # divs.l # 195 tst.b POSNEG(%a6) # do divs, divu separately 198 # it was a divs.l, so ccode setting is a little more complicated...
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H A D | itest.S | 1135 divs.l %d1,%d2:%d3 1157 divs.l %d1,%d2:%d3 1181 divs.l %d1,%d2:%d3
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/linux-master/arch/mips/include/asm/ |
H A D | mips-r2-to-r6-emul.h | 17 u64 divs; member in struct:mips_r2_emulator_stats
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/linux-master/arch/mips/kernel/ |
H A D | mips-r2-to-r6-emul.c | 463 MIPS_R2_STATS(divs); 485 MIPS_R2_STATS(divs); 574 MIPS_R2_STATS(divs); 599 MIPS_R2_STATS(divs); 2251 seq_printf(s, "divs\t\t%ld\t%ld\n", 2252 (unsigned long)__this_cpu_read(mipsr2emustats.divs), 2253 (unsigned long)__this_cpu_read(mipsr2bdemustats.divs)); 2314 __this_cpu_write((mipsr2emustats).divs, 0); 2315 __this_cpu_write((mipsr2bdemustats).divs, 0);
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/linux-master/crypto/ |
H A D | testmgr.c | 466 static unsigned int count_test_sg_divisions(const struct test_sg_division *divs) argument 472 remaining -= divs[ndivs++].proportion_of_total; 481 static bool valid_sg_divisions(const struct test_sg_division *divs, argument 488 if (divs[i].proportion_of_total <= 0 || 489 divs[i].proportion_of_total > TEST_SG_TOTAL - total) 491 total += divs[i].proportion_of_total; 492 if (divs[i].flush_type != FLUSH_TYPE_NONE) 494 if (divs[i].nosimd) 498 memchr_inv(&divs[i], 0, (count - i) * sizeof(divs[ 579 build_test_sglist(struct test_sglist *tsgl, const struct test_sg_division *divs, const unsigned int alignmask, const unsigned int total_len, struct iov_iter *data, const struct test_sg_division *out_divs[XBUFSIZE]) argument 995 generate_random_sgl_divisions(struct rnd_state *rng, struct test_sg_division *divs, size_t max_divs, char *p, char *end, bool gen_flushes, u32 req_flags) argument 1221 build_hash_sglist(struct test_sglist *tsgl, const struct hash_testvec *vec, const struct testvec_config *cfg, unsigned int alignmask, const struct test_sg_division *divs[XBUFSIZE]) argument 1279 const struct test_sg_division *divs[XBUFSIZE]; local 1463 const struct test_sg_division *divs[XBUFSIZE]; local [all...] |
/linux-master/drivers/clk/baikal-t1/ |
H A D | clk-ccu-div.c | 118 struct ccu_div **divs; member in struct:ccu_div_data 263 return data->divs[idx]; 292 data->divs = kcalloc(data->divs_num, sizeof(*data->divs), GFP_KERNEL); 293 if (!data->divs) { 308 kfree(data->divs); 353 if (!data->divs[idx]) 354 data->divs[idx] = ERR_PTR(-EPROBE_DEFER); 382 data->divs[idx] = ccu_div_hw_register(&init); 383 if (IS_ERR(data->divs[id [all...] |
/linux-master/drivers/clk/ |
H A D | clk-fsl-flexspi.c | 56 const struct clk_div_table *divs; local 58 divs = device_get_match_data(dev); 59 if (!divs) 81 reg, 0, 5, 0, divs, NULL);
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/linux-master/drivers/clk/qcom/ |
H A D | dispcc-sm8250.c | 1316 static struct clk_regmap_div * const divs[] = { local 1334 for (i = 0; i < ARRAY_SIZE(divs); i++) { 1335 divs[i]->reg -= 4; 1336 divs[i]->width = 4;
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/linux-master/drivers/clk/rockchip/ |
H A D | clk-cpu.c | 104 for (i = 0; i < ARRAY_SIZE(rate->divs); i++) { 105 const struct rockchip_cpuclk_clksel *clksel = &rate->divs[i];
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H A D | clk-px30.c | 90 .divs = { \
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H A D | clk-rk3036.c | 93 .divs = { \
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H A D | clk-rk3128.c | 92 .divs = { \
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H A D | clk-rk3188.c | 131 .divs = { \ 170 .divs = { \
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H A D | clk-rk3228.c | 93 .divs = { \
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H A D | clk-rk3288.c | 158 .divs = { \
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H A D | clk-rk3308.c | 86 .divs = { \
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H A D | clk-rk3328.c | 105 .divs = { \
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H A D | clk-rk3368.c | 204 .divs = { \ 214 .divs = { \
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H A D | clk-rk3399.c | 341 .divs = { \ 351 .divs = { \
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H A D | clk-rk3568.c | 156 .divs = { \
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H A D | clk-rv1108.c | 82 .divs = { \
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H A D | clk-rv1126.c | 98 .divs = { \
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H A D | clk.h | 446 struct rockchip_cpuclk_clksel divs[ROCKCHIP_CPUCLK_NUM_DIVIDERS]; member in struct:rockchip_cpuclk_rate_table
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/linux-master/drivers/clk/samsung/ |
H A D | clk-cpu.c | 56 * @divs: offsets of DIV registers (ACLK, ATCLK, PCLKDBG and PERIPHCLK) 67 u32 divs[4]; member in struct:exynos_cpuclk_regs 418 .divs = { 0x1800, 0x1808, 0x180c, 0x1810 }, 423 .divs = { 0x1800, 0x1808, 0x180c, 0x1810 }, 529 val = readl(base + regs->divs[i]); 531 writel(val, base + regs->divs[i]); 532 wait_until_divider_stable(base + regs->divs[i], E850_BUSY_MASK);
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/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
H A D | mcp77.c | 209 int divs = 0; local 213 out = calc_P(nvkm_clk_read(&clk->base, nv_clk_src_hclkm4), core, &divs); 220 clk->cctrl = divs << 16; 244 out = calc_P((core << 1), shader, &divs); 248 (divs + P2) <= 7) { 250 clk->sctrl = (divs + P2) << 16; 259 out = calc_P(core, vdec, &divs); 263 clk->vdiv = divs << 16;
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