Searched refs:dc_state (Results 1 - 25 of 148) sorted by path

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/linux-master/arch/mips/mm/
H A Dcerr-sb1.c445 struct dc_state { struct
450 static struct dc_state dc_states[] = {
466 struct dc_state *dsc = dc_states;
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/
H A Ddce_clk_mgr.h37 struct dc_state *context);
39 uint32_t dce_get_max_pixel_clock_for_all_paths(struct dc_state *context);
H A Ddce_clk_mgr.c165 uint32_t dce_get_max_pixel_clock_for_all_paths(struct dc_state *context)
196 struct dc_state *context)
385 struct dc_state *context)
398 struct dc_state *context,
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/
H A Ddce110_clk_mgr.h34 const struct dc_state *context,
40 struct dc_state *context);
42 uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context);
H A Ddce110_clk_mgr.c92 uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context)
120 const struct dc_state *context,
174 struct dc_state *context)
250 struct dc_state *context,
/linux-master/drivers/gpu/drm/amd/display/dc/inc/
H A Ddce_calcs.h37 struct dc_state;
/linux-master/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm.c40 #include "dc/dc_state.h"
2598 struct dc_state *state, bool enable)
2638 struct dc_state *context = NULL;
2834 static void dm_gpureset_commit_state(struct dc_state *dc_state, argument
2853 for (k = 0; k < dc_state->stream_count; k++) {
2854 bundle->stream_update.stream = dc_state->streams[k];
2856 for (m = 0; m < dc_state->stream_status->plane_count; m++) {
2858 dc_state->stream_status->plane_states[m];
2865 dc_state
2891 struct dc_state *dc_state; local
6816 struct dc_state *dc_state = NULL; local
7204 dm_update_mst_vcpi_slots_for_dsc(struct drm_atomic_state *state, struct dc_state *dc_state, struct dsc_mst_fairness_vars *vars) argument
8867 amdgpu_dm_commit_streams(struct drm_atomic_state *state, struct dc_state *dc_state) argument
9159 struct dc_state *dc_state = NULL; local
[all...]
H A Damdgpu_dm.h492 struct dc_state *cached_dc_state;
756 struct dc_plane_state *dc_state; member in struct:dm_plane_state
862 struct dc_state *context;
H A Damdgpu_dm_mst_types.c1059 struct dc_state *dc_state,
1079 for (i = 0; i < dc_state->stream_count; i++) {
1082 stream = dc_state->streams[i];
1192 struct dc_state *dc_state,
1217 for (i = 0; i < dc_state->stream_count; i++) {
1221 stream = dc_state->streams[i];
1299 struct dc_state *dc_state,
1058 compute_mst_dsc_configs_for_link(struct drm_atomic_state *state, struct dc_state *dc_state, struct dc_link *dc_link, struct dsc_mst_fairness_vars *vars, struct drm_dp_mst_topology_mgr *mgr, int *link_vars_start_index) argument
1190 is_dsc_need_re_compute( struct drm_atomic_state *state, struct dc_state *dc_state, struct dc_link *dc_link) argument
1298 compute_mst_dsc_configs_for_state(struct drm_atomic_state *state, struct dc_state *dc_state, struct dsc_mst_fairness_vars *vars) argument
1362 pre_compute_mst_dsc_configs_for_state(struct drm_atomic_state *state, struct dc_state *dc_state, struct dsc_mst_fairness_vars *vars) argument
[all...]
H A Damdgpu_dm_mst_types.h80 struct dc_state *dc_state,
H A Damdgpu_dm_plane.c912 if (dm_plane_state_new->dc_state &&
913 dm_plane_state_old->dc_state != dm_plane_state_new->dc_state) {
915 dm_plane_state_new->dc_state;
1152 if (!dm_plane_state->dc_state)
1169 if (dc_validate_plane(dc, dm_plane_state->dc_state) == DC_OK)
1361 if (old_dm_plane_state->dc_state) {
1362 dm_plane_state->dc_state = old_dm_plane_state->dc_state;
1363 dc_plane_state_retain(dm_plane_state->dc_state);
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/
H A DMakefile63 dc_surface.o dc_debug.o dc_stream.o dc_link_enc_cfg.o dc_link_exports.o dc_state.o
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/
H A Dclk_mgr.c54 struct dc_state *context)
83 struct dc_state *context)
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/
H A Ddce112_clk_mgr.c192 struct dc_state *context,
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/
H A Ddce120_clk_mgr.c85 struct dc_state *context,
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/
H A Ddce60_clk_mgr.c108 struct dc_state *context)
121 struct dc_state *context,
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv1_clk_mgr.c188 struct dc_state *context,
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
H A Ddcn20_clk_mgr.c105 struct dc_state *context, bool safe_to_lower)
127 void dcn20_update_clocks_update_dentist(struct clk_mgr_internal *clk_mgr, struct dc_state *context)
217 struct dc_state *context,
344 struct dc_state *context,
450 struct dc_state *context,
H A Ddcn20_clk_mgr.h30 struct dc_state *context,
34 struct dc_state *context,
37 struct dc_state *context, bool safe_to_lower);
49 struct dc_state *context,
54 struct dc_state *context);
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
H A Ddcn201_clk_mgr.c85 struct dc_state *context,
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
H A Drn_clk_mgr.c55 static int rn_get_active_display_cnt_wa(struct dc *dc, struct dc_state *context)
91 struct dc_state *context = dc->current_state;
107 struct dc_state *context, int ref_dpp_clk, bool safe_to_lower)
132 struct dc_state *context,
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_clk_mgr.c193 struct dc_state *context,
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
H A Dvg_clk_mgr.c64 struct dc_state *context)
96 struct dc_state *context,
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_clk_mgr.c77 struct dc_state *context)
113 static void dcn31_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state *context, bool disable)
134 struct dc_state *context,
637 struct dc_state *context = dc->current_state;
H A Ddcn31_clk_mgr.h46 struct dc_state *context,

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