/haiku/headers/os/add-ons/graphics/ |
H A D | Accelerant.h | 130 uint32 bytes_per_row; /* number of bytes in one */ member in struct:__anon11
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/haiku/headers/private/graphics/vesa/ |
H A D | vesa.h | 56 uint16 bytes_per_row; member in struct:vbe_mode_info
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/haiku/headers/private/graphics/ |
H A D | video_overlay.h | 36 uint32 bytes_per_row; /* number of bytes in one line */ member in struct:__anon3
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/haiku/headers/private/kernel/ |
H A D | frame_buffer_console.h | 25 int32 bytes_per_row; member in struct:frame_buffer_boot_info
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/haiku/src/add-ons/accelerants/3dfx/ |
H A D | mode.cpp | 286 pFBC->bytes_per_row = si.displayMode.virtual_width
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/haiku/src/add-ons/accelerants/ati/ |
H A D | mode.cpp | 373 pFBC->bytes_per_row = si.displayMode.virtual_width * bytesPerPixel;
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/haiku/src/add-ons/accelerants/et6x00/ |
H A D | SetDisplayMode.c | 56 si->fbc.bytes_per_row = target.virtual_width * bpp;
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/haiku/src/add-ons/accelerants/intel_810/ |
H A D | mode.cpp | 281 pFBC->bytes_per_row = si.displayMode.virtual_width
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/haiku/src/add-ons/accelerants/matrox/ |
H A D | GetAccelerantHook.c | 226 ((si->fbc.bytes_per_row * si->dm.virtual_height) > (16 * 1024 * 1024)))
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H A D | Overlay.c | 121 si->overlay.myBuffer[offset].bytes_per_row = 2 * si->overlay.myBuffer[offset].width; 150 */ /* assuming Y-plane only bytes_per_row are requested here */ 151 /* si->overlay.myBuffer[offset].bytes_per_row = si->overlay.myBuffer[offset].width; 250 (si->fbc.bytes_per_row * si->dm.virtual_height)); /* size in bytes of screen(s) */ 256 = si->overlay.myBuffer[offset].bytes_per_row * si->overlay.myBuffer[offset].height;
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H A D | SetDisplayMode.c | 91 /* calculate and set new mode bytes_per_row */ 92 gx00_general_validate_pic_size (&target, &si->fbc.bytes_per_row, &si->acc_mode); 511 startadd = v_display_start * si->fbc.bytes_per_row;
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/haiku/src/add-ons/accelerants/matrox/engine/ |
H A D | mga_acc.c | 23 ACCW(YDST,((dst)* (si->fbc.bytes_per_row / (si->engine.depth >> 3))) >> 5); \ 88 switch (si->fbc.bytes_per_row / (si->engine.depth >> 3)) 109 ((si->fbc.bytes_per_row / (si->engine.depth >> 3)) & 0x0FFF)); 112 switch (si->fbc.bytes_per_row / (si->engine.depth >> 3)) 136 ((si->fbc.bytes_per_row / (si->engine.depth >> 3)) & 0x0FFF)); 141 ACCW(PITCH, ((si->fbc.bytes_per_row / (si->engine.depth >> 3)) & 0x0FFF)); 147 ACCW(PITCH, ((si->fbc.bytes_per_row / (si->engine.depth >> 3)) & 0x1FFF)); 192 ACCW(CXBNDRY,(((si->fbc.bytes_per_row / (si->engine.depth >> 3)) - 1) << 16) | (0)); 199 (si->fbc.bytes_per_row / (si->engine.depth >> 3))) + si->engine.src_dst); 221 offset = (si->fbc.bytes_per_row / (s [all...] |
H A D | mga_bes.c | 287 moi->a1orgv += ((moi->v1srcstv >> 16) * si->overlay.ob.bytes_per_row); 293 moi->a1orgv += ((moi->v1srcstv >> 16) * si->overlay.ob.bytes_per_row); 299 moi->a1orgv += (si->overlay.my_ov.v_start * si->overlay.ob.bytes_per_row);
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H A D | mga_crtc.c | 354 offset = si->fbc.bytes_per_row / 16;
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H A D | mga_crtc2.c | 277 offset = si->fbc.bytes_per_row; 308 CR2W(STARTADD0, (startadd + si->fbc.bytes_per_row));
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H A D | mga_general.c | 949 * Mode slopspace is reflected in fbc->bytes_per_row BTW. */ 952 status_t gx00_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row, bool *acc_mode) argument 1126 /* now calculate bytes_per_row for this mode */ 1127 *bytes_per_row = video_pitch * (depth >> 3);
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H A D | mga_maven.c | 49 screensize = si->fbc.bytes_per_row * si->dm.virtual_height; 52 if ((screensize + si->fbc.bytes_per_row + pointer_reservation) <= 61 for (x = 0; x < si->fbc.bytes_per_row; x++)
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/haiku/src/add-ons/accelerants/neomagic/ |
H A D | SetDisplayMode.c | 105 /* calculate and set new mode bytes_per_row */ 106 nm_general_validate_pic_size (&target, &si->fbc.bytes_per_row, &si->acc_mode); 214 startadd = v_display_start * si->fbc.bytes_per_row;
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/haiku/src/add-ons/accelerants/neomagic/engine/ |
H A D | nm_acc.c | 88 switch(si->fbc.bytes_per_row / si->engine.depth) 160 ACCW(2070_SRCPITCH, si->fbc.bytes_per_row); 162 ACCW(2070_DSTPITCH, si->fbc.bytes_per_row); 179 ((si->fbc.bytes_per_row << 16) | (si->fbc.bytes_per_row & 0x0000ffff))); 214 ACCW(SRCSTARTOFF, ((ys * si->fbc.bytes_per_row) + (xs * si->engine.depth))); 215 ACCW(2070_DSTSTARTOFF, ((yd * si->fbc.bytes_per_row) + (xd * si->engine.depth))); 233 ACCW(SRCSTARTOFF, ((ys * si->fbc.bytes_per_row) + (xs * si->engine.depth))); 234 ACCW(2090_DSTSTARTOFF, ((yd * si->fbc.bytes_per_row) + (xd * si->engine.depth))); 249 ACCW(SRCSTARTOFF, (((ys + h) * si->fbc.bytes_per_row) [all...] |
H A D | nm_general.c | 428 * Mode slopspace is reflected in fbc->bytes_per_row BTW. */ 429 status_t nm_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row, bool *acc_mode) argument 622 /* now calculate bytes_per_row for this mode */ 623 *bytes_per_row = video_pitch * (depth >> 3);
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H A D | nm_proto.h | 9 status_t nm_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row, bool *acc_mode);
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/haiku/src/add-ons/accelerants/nvidia/ |
H A D | Overlay.c | 111 si->overlay.myBuffer[offset].bytes_per_row = 2 * si->overlay.myBuffer[offset].width; 212 (si->fbc.bytes_per_row * si->dm.virtual_height)); /* size in bytes of screen(s) */ 218 = si->overlay.myBuffer[offset].bytes_per_row * si->overlay.myBuffer[offset].height;
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H A D | SetDisplayMode.c | 76 /* calculate and set new mode bytes_per_row */ 77 nv_general_validate_pic_size (&target, &si->fbc.bytes_per_row, &si->acc_mode); 307 si->engine.threeD.mem_low = si->fbc.bytes_per_row * si->dm.virtual_height; 401 startadd = v_display_start * si->fbc.bytes_per_row;
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/haiku/src/add-ons/accelerants/nvidia/engine/ |
H A D | nv_acc.c | 793 ACCW(PITCH0, (si->fbc.bytes_per_row & 0x0000ffff)); 795 ACCW(PITCH1, (si->fbc.bytes_per_row & 0x0000ffff)); 797 ACCW(PITCH2, (si->fbc.bytes_per_row & 0x0000ffff)); 799 ACCW(PITCH3, (si->fbc.bytes_per_row & 0x0000ffff)); 800 ACCW(PITCH4, (si->fbc.bytes_per_row & 0x0000ffff)); 811 ACCW(NV20_PITCH0, (si->fbc.bytes_per_row & 0x0000ffff)); 812 ACCW(NV20_PITCH1, (si->fbc.bytes_per_row & 0x0000ffff)); 813 ACCW(NV20_PITCH2, (si->fbc.bytes_per_row & 0x0000ffff)); 814 ACCW(NV20_PITCH3, (si->fbc.bytes_per_row & 0x0000ffff)); 827 ACCW(NV20_PITCH0, (si->fbc.bytes_per_row [all...] |
H A D | nv_acc_dma.c | 1132 ((si->fbc.bytes_per_row & 0x0000ffff) | (si->fbc.bytes_per_row << 16)); /* Pitch */ 1850 (si->fbc.bytes_per_row | (1 << 16) | (1 << 24)); /* SourcePitch */ 1854 (list[i].src_top * si->fbc.bytes_per_row) + (list[i].src_left * bpp); /* Offset */ 2011 (config->bytes_per_row | (1 << 16) | (1 << 24)); /* SourcePitch */ 2016 (list[i].src_top * config->bytes_per_row) + (list[i].src_left * bpp)); /* Offset */
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