Searched refs:bytes_per_row (Results 1 - 25 of 130) sorted by path

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/haiku/headers/os/add-ons/graphics/
H A DAccelerant.h130 uint32 bytes_per_row; /* number of bytes in one */ member in struct:__anon11
/haiku/headers/private/graphics/vesa/
H A Dvesa.h56 uint16 bytes_per_row; member in struct:vbe_mode_info
/haiku/headers/private/graphics/
H A Dvideo_overlay.h36 uint32 bytes_per_row; /* number of bytes in one line */ member in struct:__anon3
/haiku/headers/private/kernel/
H A Dframe_buffer_console.h25 int32 bytes_per_row; member in struct:frame_buffer_boot_info
/haiku/src/add-ons/accelerants/3dfx/
H A Dmode.cpp286 pFBC->bytes_per_row = si.displayMode.virtual_width
/haiku/src/add-ons/accelerants/ati/
H A Dmode.cpp373 pFBC->bytes_per_row = si.displayMode.virtual_width * bytesPerPixel;
/haiku/src/add-ons/accelerants/et6x00/
H A DSetDisplayMode.c56 si->fbc.bytes_per_row = target.virtual_width * bpp;
/haiku/src/add-ons/accelerants/intel_810/
H A Dmode.cpp281 pFBC->bytes_per_row = si.displayMode.virtual_width
/haiku/src/add-ons/accelerants/matrox/
H A DGetAccelerantHook.c226 ((si->fbc.bytes_per_row * si->dm.virtual_height) > (16 * 1024 * 1024)))
H A DOverlay.c121 si->overlay.myBuffer[offset].bytes_per_row = 2 * si->overlay.myBuffer[offset].width;
150 */ /* assuming Y-plane only bytes_per_row are requested here */
151 /* si->overlay.myBuffer[offset].bytes_per_row = si->overlay.myBuffer[offset].width;
250 (si->fbc.bytes_per_row * si->dm.virtual_height)); /* size in bytes of screen(s) */
256 = si->overlay.myBuffer[offset].bytes_per_row * si->overlay.myBuffer[offset].height;
H A DSetDisplayMode.c91 /* calculate and set new mode bytes_per_row */
92 gx00_general_validate_pic_size (&target, &si->fbc.bytes_per_row, &si->acc_mode);
511 startadd = v_display_start * si->fbc.bytes_per_row;
/haiku/src/add-ons/accelerants/matrox/engine/
H A Dmga_acc.c23 ACCW(YDST,((dst)* (si->fbc.bytes_per_row / (si->engine.depth >> 3))) >> 5); \
88 switch (si->fbc.bytes_per_row / (si->engine.depth >> 3))
109 ((si->fbc.bytes_per_row / (si->engine.depth >> 3)) & 0x0FFF));
112 switch (si->fbc.bytes_per_row / (si->engine.depth >> 3))
136 ((si->fbc.bytes_per_row / (si->engine.depth >> 3)) & 0x0FFF));
141 ACCW(PITCH, ((si->fbc.bytes_per_row / (si->engine.depth >> 3)) & 0x0FFF));
147 ACCW(PITCH, ((si->fbc.bytes_per_row / (si->engine.depth >> 3)) & 0x1FFF));
192 ACCW(CXBNDRY,(((si->fbc.bytes_per_row / (si->engine.depth >> 3)) - 1) << 16) | (0));
199 (si->fbc.bytes_per_row / (si->engine.depth >> 3))) + si->engine.src_dst);
221 offset = (si->fbc.bytes_per_row / (s
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H A Dmga_bes.c287 moi->a1orgv += ((moi->v1srcstv >> 16) * si->overlay.ob.bytes_per_row);
293 moi->a1orgv += ((moi->v1srcstv >> 16) * si->overlay.ob.bytes_per_row);
299 moi->a1orgv += (si->overlay.my_ov.v_start * si->overlay.ob.bytes_per_row);
H A Dmga_crtc.c354 offset = si->fbc.bytes_per_row / 16;
H A Dmga_crtc2.c277 offset = si->fbc.bytes_per_row;
308 CR2W(STARTADD0, (startadd + si->fbc.bytes_per_row));
H A Dmga_general.c949 * Mode slopspace is reflected in fbc->bytes_per_row BTW. */
952 status_t gx00_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row, bool *acc_mode) argument
1126 /* now calculate bytes_per_row for this mode */
1127 *bytes_per_row = video_pitch * (depth >> 3);
H A Dmga_maven.c49 screensize = si->fbc.bytes_per_row * si->dm.virtual_height;
52 if ((screensize + si->fbc.bytes_per_row + pointer_reservation) <=
61 for (x = 0; x < si->fbc.bytes_per_row; x++)
/haiku/src/add-ons/accelerants/neomagic/
H A DSetDisplayMode.c105 /* calculate and set new mode bytes_per_row */
106 nm_general_validate_pic_size (&target, &si->fbc.bytes_per_row, &si->acc_mode);
214 startadd = v_display_start * si->fbc.bytes_per_row;
/haiku/src/add-ons/accelerants/neomagic/engine/
H A Dnm_acc.c88 switch(si->fbc.bytes_per_row / si->engine.depth)
160 ACCW(2070_SRCPITCH, si->fbc.bytes_per_row);
162 ACCW(2070_DSTPITCH, si->fbc.bytes_per_row);
179 ((si->fbc.bytes_per_row << 16) | (si->fbc.bytes_per_row & 0x0000ffff)));
214 ACCW(SRCSTARTOFF, ((ys * si->fbc.bytes_per_row) + (xs * si->engine.depth)));
215 ACCW(2070_DSTSTARTOFF, ((yd * si->fbc.bytes_per_row) + (xd * si->engine.depth)));
233 ACCW(SRCSTARTOFF, ((ys * si->fbc.bytes_per_row) + (xs * si->engine.depth)));
234 ACCW(2090_DSTSTARTOFF, ((yd * si->fbc.bytes_per_row) + (xd * si->engine.depth)));
249 ACCW(SRCSTARTOFF, (((ys + h) * si->fbc.bytes_per_row)
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H A Dnm_general.c428 * Mode slopspace is reflected in fbc->bytes_per_row BTW. */
429 status_t nm_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row, bool *acc_mode) argument
622 /* now calculate bytes_per_row for this mode */
623 *bytes_per_row = video_pitch * (depth >> 3);
H A Dnm_proto.h9 status_t nm_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row, bool *acc_mode);
/haiku/src/add-ons/accelerants/nvidia/
H A DOverlay.c111 si->overlay.myBuffer[offset].bytes_per_row = 2 * si->overlay.myBuffer[offset].width;
212 (si->fbc.bytes_per_row * si->dm.virtual_height)); /* size in bytes of screen(s) */
218 = si->overlay.myBuffer[offset].bytes_per_row * si->overlay.myBuffer[offset].height;
H A DSetDisplayMode.c76 /* calculate and set new mode bytes_per_row */
77 nv_general_validate_pic_size (&target, &si->fbc.bytes_per_row, &si->acc_mode);
307 si->engine.threeD.mem_low = si->fbc.bytes_per_row * si->dm.virtual_height;
401 startadd = v_display_start * si->fbc.bytes_per_row;
/haiku/src/add-ons/accelerants/nvidia/engine/
H A Dnv_acc.c793 ACCW(PITCH0, (si->fbc.bytes_per_row & 0x0000ffff));
795 ACCW(PITCH1, (si->fbc.bytes_per_row & 0x0000ffff));
797 ACCW(PITCH2, (si->fbc.bytes_per_row & 0x0000ffff));
799 ACCW(PITCH3, (si->fbc.bytes_per_row & 0x0000ffff));
800 ACCW(PITCH4, (si->fbc.bytes_per_row & 0x0000ffff));
811 ACCW(NV20_PITCH0, (si->fbc.bytes_per_row & 0x0000ffff));
812 ACCW(NV20_PITCH1, (si->fbc.bytes_per_row & 0x0000ffff));
813 ACCW(NV20_PITCH2, (si->fbc.bytes_per_row & 0x0000ffff));
814 ACCW(NV20_PITCH3, (si->fbc.bytes_per_row & 0x0000ffff));
827 ACCW(NV20_PITCH0, (si->fbc.bytes_per_row
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H A Dnv_acc_dma.c1132 ((si->fbc.bytes_per_row & 0x0000ffff) | (si->fbc.bytes_per_row << 16)); /* Pitch */
1850 (si->fbc.bytes_per_row | (1 << 16) | (1 << 24)); /* SourcePitch */
1854 (list[i].src_top * si->fbc.bytes_per_row) + (list[i].src_left * bpp); /* Offset */
2011 (config->bytes_per_row | (1 << 16) | (1 << 24)); /* SourcePitch */
2016 (list[i].src_top * config->bytes_per_row) + (list[i].src_left * bpp)); /* Offset */

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