Searched refs:bus (Results 1 - 25 of 539) sorted by path

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/haiku/3rdparty/mmu_man/scripts/
H A DHardwareChecker.sh94 bus="pci"
114 echo "<div>Identification: <input type='text' id='$bus${devn}_desc' name='$bus${devn}_desc' value='$descline' readonly='readonly' size='80' /></div>"
121 echo "<input type='radio' name='$bus${devn}_status' id='$bus${devn}_status_ok' value='ok' /><label for='$bus${devn}_status_ok' class='status_ok'>Working</label>"
124 echo "<input type='radio' name='$bus${devn}_status' id='$bus${devn}_status_ko' value='ko' /><label for='$bus${devn}_status_ko' class='status_ko'>Not working</label>"
127 echo "<input type='radio' name='$bus
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/haiku/headers/os/drivers/bus/
H A DSCSI.h11 SCSI bus manager interface
13 The bus manager interface is _based_ on CAM, but I've modified it because :-
40 The SCSI bus manager takes care that the controller can access the data
43 bus manager has to allocate a buffer during execution you are in trouble),
46 requests, so the SCSI bus manager ommittes the test.
59 high priority service thread that is spawned by the SCSI bus manager
60 for each bus. This service thread also takes care to submit waiting
63 You can specify a maximum number of concurrent requests per bus via
64 path_inquiry (<hba_queue_size>) for the bus. The device limit is
67 to the bus wil
147 scsi_bus bus; // associated bus member in struct:scsi_ccb
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/haiku/headers/os/drivers/pcmcia/
H A Dbus_ops.h39 u32 (*b_in)(void *bus, u32 port, s32 sz);
40 void (*b_ins)(void *bus, u32 port, void *buf,
42 void (*b_out)(void *bus, u32 val, u32 port, s32 sz);
43 void (*b_outs)(void *bus, u32 port, void *buf,
45 void *(*b_ioremap)(void *bus, u_long ofs, u_long sz);
46 void (*b_iounmap)(void *bus, void *addr);
47 u32 (*b_read)(void *bus, void *addr, s32 sz);
48 void (*b_write)(void *bus, u32 val, void *addr, s32 sz);
49 void (*b_copy_from)(void *bus, void *d, void *s, u32 count);
50 void (*b_copy_to)(void *bus, voi
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H A Dcs.h101 struct bus_operations *bus; member in struct:event_callback_args_t
H A Ddriver_ops.h46 enum { LOC_ISA, LOC_PCI } bus; member in struct:dev_locator_t
54 u_char bus; member in struct:dev_locator_t::__anon270::__anon272
H A Dss.h64 struct bus_operations *bus; member in struct:socket_cap_t
/haiku/headers/private/drivers/
H A Data_adapter.h20 #include <bus/ATA.h>
21 #include <bus/PCI.h>
38 // IDE bus master command register
42 // IDE bus master status register
50 // offset of bus master registers
77 // io address of bus master registers (uint16)
/haiku/headers/private/graphics/
H A DAGP.h15 uchar bus; /* bus number */ member in struct:agp_info
16 uchar device; /* device number on bus */
53 aperture_id (*map_aperture)(uint8 bus, uint8 device, uint8 function,
79 #define B_AGP_GART_FOR_BUS_MODULE_NAME "bus_managers/agp_gart/bus/v0"
86 status_t (*create_aperture)(uint8 bus, uint8 device, uint8 function,
/haiku/headers/private/graphics/common/
H A Dddc.h17 void ddc2_init_timing(i2c_bus *bus);
21 status_t ddc2_read_edid1(const i2c_bus *bus, edid1_info *edid,
/haiku/headers/private/graphics/matrox/
H A DDriverInterface.h103 uint8 bus; /* PCI bus number, from pci_info */ member in struct:__anon785
104 uint8 device; /* PCI device number on bus, from pci_info */
124 void *framebuffer_pci; /* As viewed from the PCI bus (for DMA) */
129 void *dma_buffer_pci; /* buffer for dma - from PCI bus*/
/haiku/headers/private/graphics/skeleton/
H A DDriverInterface.h106 uint8 bus; /* PCI bus number, from pci_info */ member in struct:__anon937
107 uint8 device; /* PCI device number on bus, from pci_info */
124 void *framebuffer_pci; /* As viewed from the PCI bus (for DMA) */
129 void *dma_buffer_pci; /* buffer for dma - from PCI bus*/
/haiku/headers/private/graphics/via/
H A DDriverInterface.h173 uint8 bus; /* PCI bus number, from pci_info */ member in struct:__anon7
174 uint8 device; /* PCI device number on bus, from pci_info */
191 void *framebuffer_pci; /* As viewed from the PCI bus (for DMA) */
196 void *dma_buffer_pci; /* buffer for dma - from PCI bus*/
/haiku/headers/private/kernel/boot/
H A Ddisk_identifier.h39 uint8 bus; member in struct:disk_identifier::__anon1042::__anon1044
43 } bus; member in struct:disk_identifier
/haiku/src/add-ons/accelerants/3dfx/
H A D3dfx_edid.cpp49 i2c_bus bus; local
51 bus.cookie = (void*)NULL;
52 bus.set_signals = &SetI2CSignals;
53 bus.get_signals = &GetI2CSignals;
54 ddc2_init_timing(&bus);
59 bool bResult = (ddc2_read_edid1(&bus, &edidInfo, NULL, NULL) == B_OK);
/haiku/src/add-ons/accelerants/matrox/engine/
H A Dmga_support.c28 si->vendor_id, si->device_id, si->bus, si->device, si->function,
/haiku/src/add-ons/accelerants/nvidia/engine/
H A Dnv_agp.c75 && nai.agpi.bus == si->bus
152 LOG(4,("AGP: bus %d, device %d, function %d\n", ai.bus, ai.device, ai.function));
H A Dnv_brooktreetv.c120 i2c_bstart(si->ps.tv_encoder.bus);
121 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, sizeof(buffer));
122 i2c_bstop(si->ps.tv_encoder.bus);
135 static uint8 BT_check (uint8 bus, uint8 adress) argument
144 * Until a reboot the corresponding I2C bus will be inacessable then!!! */
155 i2c_bstart(bus);
156 i2c_writebuffer(bus, buffer, sizeof(buffer));
157 i2c_bstop(bus);
178 i2c_bstart(si->ps.tv_encoder.bus);
179 i2c_writebuffer(si->ps.tv_encoder.bus, buffe
218 uint8 bus; local
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H A Dnv_support.c28 si->vendor_id, si->device_id, si->bus, si->device, si->function,
/haiku/src/add-ons/accelerants/radeon/
H A Dmonitor_detection.c76 i2c_bus bus; local
84 ddc2_init_timing(&bus);
85 bus.cookie = &info;
86 bus.set_signals = &set_signals;
87 bus.get_signals = &get_signals;
89 if (ddc2_read_edid1(&bus, edid, &vdif, &vdifLength) != B_OK)
/haiku/src/add-ons/accelerants/skeleton/engine/
H A Dagp.c74 (nai.agpi.bus == si->bus) &&
147 LOG(4,("AGP: bus %d, device %d, function %d\n", ai.bus, ai.device, ai.function));
/haiku/src/add-ons/accelerants/via/engine/
H A Dagp.c53 && nai.agpi.bus == si->bus
/haiku/src/add-ons/kernel/bus_managers/firewire/
H A Dfwohci_pci.cpp126 * Clear the bus reset event flag to start transactions even when
149 val = gPci->read_pci_config(info->bus, info->device, info->function,
157 gPci->write_pci_config(info->bus, info->device, info->function,
168 latency = olatency = gPci->read_pci_config(info->bus, info->device, info->function,
173 gPci->write_pci_config(info->bus, info->device, info->function,
177 cache_line = ocache_line = gPci->read_pci_config(info->bus, info->device,
182 gPci->write_pci_config(info->bus, info->device, info->function,
189 sc->irq = gPci->read_pci_config(info->bus, info->device, info->function,
198 // val = gPci->read_pci_config(info->bus, info->device, info->function, 0x14, 4);
/haiku/src/add-ons/kernel/bus_managers/pci/
H A Dpci_fixup.cpp25 jmicron_fixup_ahci(PCI *pci, uint8 domain, uint8 bus, uint8 device, argument
42 dprintf("jmicron_fixup_ahci: domain %u, bus %u, device %u, function %u, "
43 "deviceId 0x%04x\n", domain, bus, device, function, deviceId);
46 uint32 val = pci->ReadConfig(domain, bus, device, function, 0x40, 4);
71 pci->WriteConfig(domain, bus, device, function, 0x40, 4, val);
75 uint8 irq = pci->ReadConfig(domain, bus, device, function, 0x3c, 1);
78 pci->WriteConfig(domain, bus, device, 1, 0x3c, 1, irq);
83 intel_fixup_ahci(PCI *pci, uint8 domain, uint8 bus, uint8 device, argument
108 dprintf("intel_fixup_ahci: domain %u, bus %u, device %u, function %u, "
109 "deviceId 0x%04x\n", domain, bus, devic
159 ati_fixup_ixp(PCI *pci, uint8 domain, uint8 bus, uint8 device, uint8 function, uint16 deviceId) argument
191 pci_fixup_device(PCI *pci, uint8 domain, uint8 bus, uint8 device, uint8 function) argument
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H A Dpci_fixup.h12 void pci_fixup_device(PCI *pci, uint8 domain, uint8 bus, uint8 device,
/haiku/src/add-ons/kernel/bus_managers/scsi/
H A Dbus_raw.cpp7 //! Devfs entry for raw bus access.
19 // info about bus
20 // (used both as bus cookie and file handle cookie)
33 bus_raw_info *bus; local
35 bus = (bus_raw_info*)malloc(sizeof(*bus));
36 if (bus == NULL)
41 (driver_module_info **)&bus->interface, (void **)&bus->cookie);
44 bus
52 scsi_bus_raw_uninit(void *bus) argument
59 scsi_bus_raw_open(void *bus, const char *path, int openMode, void **handle_cookie) argument
84 bus_raw_info *bus = (bus_raw_info*)_cookie; local
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