Searched refs:SYMCLKA_CLOCK_ENABLE (Results 1 - 5 of 5) sorted by last modified time

/linux-master/drivers/gpu/drm/amd/display/dc/dcn35/
H A Ddcn35_dccg.c835 REG_UPDATE(SYMCLKA_CLOCK_ENABLE,
836 SYMCLKA_CLOCK_ENABLE, 1);
868 REG_UPDATE_2(SYMCLKA_CLOCK_ENABLE,
914 REG_GET_3(SYMCLKA_CLOCK_ENABLE, SYMCLKA_CLOCK_ENABLE, &be_clk_en,
958 REG_UPDATE_2(SYMCLKA_CLOCK_ENABLE,
1001 REG_UPDATE(SYMCLKA_CLOCK_ENABLE,
1002 SYMCLKA_CLOCK_ENABLE, 0);
H A Ddcn35_dccg.h41 SR(SYMCLKA_CLOCK_ENABLE),\
160 DCCG_SF(SYMCLKA_CLOCK_ENABLE, SYMCLKA_CLOCK_ENABLE, mask_sh),\
165 DCCG_SF(SYMCLKA_CLOCK_ENABLE, SYMCLKA_FE_EN, mask_sh),\
170 DCCG_SF(SYMCLKA_CLOCK_ENABLE, SYMCLKA_SRC_SEL, mask_sh),\
175 DCCG_SF(SYMCLKA_CLOCK_ENABLE, SYMCLKA_FE_SRC_SEL, mask_sh),\
/linux-master/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_link_encoder.h36 LE_SF(SYMCLKA_CLOCK_ENABLE, SYMCLKA_CLOCK_ENABLE, mask_sh),\
H A Ddcn20_dccg.h275 type SYMCLKA_CLOCK_ENABLE;\
390 uint32_t SYMCLKA_CLOCK_ENABLE; member in struct:dccg_registers
/linux-master/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_link_encoder.h438 type SYMCLKA_CLOCK_ENABLE;\

Completed in 163 milliseconds