Searched refs:SDMA1_BASE__INST3_SEG0 (Results 1 - 5 of 5) sorted by last modified time

/linux-master/drivers/gpu/drm/amd/include/
H A Dvega10_ip_offset.h1041 #define SDMA1_BASE__INST3_SEG0 0 macro
H A Dvega20_ip_offset.h733 #define SDMA1_BASE__INST3_SEG0 0 macro
H A Dsienna_cichlid_ip_offset.h932 #define SDMA1_BASE__INST3_SEG0 0 macro
H A Darct_ip_offset.h986 #define SDMA1_BASE__INST3_SEG0 0 macro
H A Daldebaran_ip_offset.h1269 #define SDMA1_BASE__INST3_SEG0 0x0001E800 macro

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