Searched refs:CKSEG1ADDR (Results 1 - 25 of 42) sorted by last modified time

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/linux-master/drivers/bus/
H A Dmips_cdmm.c435 bus->regs = (void __iomem *)CKSEG1ADDR(bus->phys);
/linux-master/arch/mips/sgi-ip22/
H A Dip22-gio.c276 ptr32 = (void *)CKSEG1ADDR(addr);
286 ptr8 = (void *)CKSEG1ADDR(addr + 3);
297 ptr16 = (void *)CKSEG1ADDR(addr + 2);
318 ptr = (void *)CKSEG1ADDR(addr + HQ2_MYSTERY_OFFS);
/linux-master/arch/mips/kernel/
H A Dsmp-cps.c85 UASM_i_LA(&p, GPR_T9, CKSEG1ADDR(__pa_symbol(mips_cps_core_boot)));
104 core_entry_reg = CKSEG1ADDR(cps_vec_pa) &
/linux-master/arch/mips/include/asm/mach-generic/
H A Dspaces.h53 #define CKSEG1ADDR_OR_64BIT(x) CKSEG1ADDR(x)
/linux-master/arch/mips/include/asm/
H A Daddrspace.h79 #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1) macro
86 #define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) macro
H A Dsni.h40 #define SNI_PORT_BASE CKSEG1ADDR(0xb4000000)
46 #define PCIMT_UCONF CKSEG1ADDR(0xbfff0004)
47 #define PCIMT_IOADTIMEOUT2 CKSEG1ADDR(0xbfff000c)
48 #define PCIMT_IOMEMCONF CKSEG1ADDR(0xbfff0014)
49 #define PCIMT_IOMMU CKSEG1ADDR(0xbfff001c)
50 #define PCIMT_IOADTIMEOUT1 CKSEG1ADDR(0xbfff0024)
51 #define PCIMT_DMAACCESS CKSEG1ADDR(0xbfff002c)
52 #define PCIMT_DMAHIT CKSEG1ADDR(0xbfff0034)
53 #define PCIMT_ERRSTATUS CKSEG1ADDR(0xbfff003c)
54 #define PCIMT_ERRADDR CKSEG1ADDR(
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/linux-master/arch/mips/boot/compressed/
H A Duart-16550.c15 #define PORT(offset) (CKSEG1ADDR(UART_BASE) + (offset))
20 #define PORT(offset) (CKSEG1ADDR(INGENIC_UART_BASE_ADDR) + (4 * offset))
/linux-master/arch/mips/cobalt/
H A Dsetup.c81 set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE));
115 setup_8250_early_printk_port(CKSEG1ADDR(0x1c800000), 0, 0);
/linux-master/arch/mips/pci/
H A Dops-loongson2.c27 (void *)CKSEG1ADDR(LOONGSON_PCICFG_BASE | (offset))
/linux-master/arch/mips/mm/
H A Dioremap.c73 return (void __iomem *) CKSEG1ADDR(phys_addr);
/linux-master/arch/mips/loongson64/
H A Dsmp.c785 (void *)CKSEG1ADDR((unsigned long)loongson3_type3_play_dead);
793 (void *)CKSEG1ADDR((unsigned long)loongson3_type1_play_dead);
798 (void *)CKSEG1ADDR((unsigned long)loongson3_type2_play_dead);
805 (void *)CKSEG1ADDR((unsigned long)loongson3_type3_play_dead);
/linux-master/arch/mips/mti-malta/
H A Dmalta-setup.c119 cfg = __raw_readl((u32 *)CKSEG1ADDR(ROCIT_CONFIG_GEN0));
H A Dmalta-dtshim.c194 config = readl((void __iomem *)CKSEG1ADDR(ROCIT_CONFIG_GEN1));
/linux-master/arch/mips/bmips/
H A Dsetup.c34 #define REG_BCM6328_OTP ((void __iomem *)CKSEG1ADDR(0x1000062c))
/linux-master/arch/mips/bcm47xx/
H A Dprom.c113 setup_8250_early_printk_port(CKSEG1ADDR(BCM47XX_SERIAL_ADDR), 0, 0);
/linux-master/arch/mips/kvm/
H A Dvz.c3213 vcpu->arch.pc = CKSEG1ADDR(0x1fc00000);
/linux-master/arch/mips/include/asm/dec/
H A Dprom.h22 #define VEC_RESET (u64 *)CKSEG1ADDR(0x1fc00000)
/linux-master/arch/mips/dec/
H A Dint-handler.S30 #define KN02_CSR_BASE CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR)
31 #define KN02XA_IOASIC_BASE CKSEG1ADDR(KN02XA_SLOT_BASE + IOASIC_IOCTL)
32 #define KN03_IOASIC_BASE CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_IOCTL)
/linux-master/drivers/net/ethernet/amd/
H A Ddeclance.c1070 dev->base_addr = CKSEG1ADDR(dec_kn_slot_base + IOASIC_LANCE);
1076 dev->mem_start = CKSEG1ADDR(0x00020000);
1079 esar_base = CKSEG1ADDR(dec_kn_slot_base + IOASIC_ESAR);
1126 dev->mem_start = CKSEG1ADDR(start);
1155 dev->base_addr = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE);
1156 dev->mem_start = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE_MEM);
1158 esar_base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_ESAR + 1);
/linux-master/arch/mips/jazz/
H A Djazzdma.c75 pgtbl = (VDMA_PGTBL_ENTRY *)CKSEG1ADDR((unsigned long)pgtbl);
/linux-master/drivers/mtd/devices/
H A Dms02-nv.c88 ms02nv_diagp = (ms02nv_uint *)(CKSEG1ADDR(addr + MS02NV_DIAG));
89 ms02nv_magicp = (ms02nv_uint *)(CKSEG1ADDR(addr + MS02NV_MAGIC));
277 csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR);
283 csr = (volatile u32 *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR);
/linux-master/arch/mips/include/asm/mach-loongson64/
H A Dloongson.h67 (*(volatile u32 *)((char *)CKSEG1ADDR(LOONGSON_REG_BASE) + (x)))
/linux-master/arch/mips/n64/
H A Dinit.c53 #define REG_BASE ((u32 *) CKSEG1ADDR(0x4400000))
/linux-master/arch/mips/include/asm/mach-loongson2ef/
H A Dloongson.h56 (*(volatile u32 *)((char *)CKSEG1ADDR(LOONGSON_REG_BASE) + (x)))
/linux-master/arch/mips/fw/sni/
H A Dsniprom.c35 #define PROM_VEC (u64 *)CKSEG1ADDR(0x1fc00000)
87 return (void *)CKSEG1ADDR(hwconf);

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