/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
H A D | display_rq_dlg_calc_32.c | 235 unsigned int vready_after_vcount0; local 288 vready_after_vcount0 = get_vready_at_or_after_vsync(mode_lib, e2e_pipe_param, num_pipes, 290 dlg_regs->vready_after_vcount0 = vready_after_vcount0; 292 dml_print("DML_DLG: %s: vready_after_vcount0 = %d\n", __func__, dlg_regs->vready_after_vcount0);
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/linux-master/drivers/gpu/drm/amd/display/dc/dml2/ |
H A D | dml_display_rq_dlg_calc.c | 220 dml_uint_t vready_after_vcount0; local 329 vready_after_vcount0 = (dml_uint_t)(dml_get_vready_at_or_after_vsync(mode_lib, pipe_idx)); 330 disp_dlg_regs->vready_after_vcount0 = vready_after_vcount0; 332 dml_print("DML_DLG: %s: vready_after_vcount0 = %d\n", __func__, disp_dlg_regs->vready_after_vcount0);
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H A D | display_mode_util.c | 294 dml_print("DML: vready_after_vcount0 = 0x%x\n", dlg_regs->vready_after_vcount0);
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H A D | dml2_translation_helper.c | 1259 out->dlg_regs.vready_after_vcount0 = disp_dlg_regs->vready_after_vcount0;
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H A D | display_mode_core_structs.h | 1913 dml_uint_t vready_after_vcount0; member in struct:_vcs_dpi_dml_display_dlg_regs_st
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/ |
H A D | display_rq_dlg_helpers.c | 307 "DML_RQ_DLG_CALC: vready_after_vcount0 = 0x%0x\n", 308 dlg_regs->vready_after_vcount0);
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H A D | display_mode_structs.h | 657 unsigned int vready_after_vcount0; member in struct:_vcs_dpi_display_dlg_regs_st
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
H A D | display_rq_dlg_calc_21.c | 1081 disp_dlg_regs->vready_after_vcount0 = 1; 1083 disp_dlg_regs->vready_after_vcount0 = 0; 1088 disp_dlg_regs->vready_after_vcount0 = 1; 1090 disp_dlg_regs->vready_after_vcount0 = 0;
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
H A D | display_rq_dlg_calc_20v2.c | 1042 disp_dlg_regs->vready_after_vcount0 = 1; 1044 disp_dlg_regs->vready_after_vcount0 = 0; 1049 disp_dlg_regs->vready_after_vcount0 = 1; 1051 disp_dlg_regs->vready_after_vcount0 = 0;
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H A D | display_rq_dlg_calc_20.c | 1041 disp_dlg_regs->vready_after_vcount0 = 1; 1043 disp_dlg_regs->vready_after_vcount0 = 0; 1048 disp_dlg_regs->vready_after_vcount0 = 1; 1050 disp_dlg_regs->vready_after_vcount0 = 0;
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
H A D | display_rq_dlg_calc_31.c | 1036 disp_dlg_regs->vready_after_vcount0 = 1; 1038 disp_dlg_regs->vready_after_vcount0 = 0; 1041 disp_dlg_regs->vready_after_vcount0 = 1; 1043 disp_dlg_regs->vready_after_vcount0 = 0; 1046 dml_print("DML_DLG: %s: vready_after_vcount0 = %d\n", __func__, disp_dlg_regs->vready_after_vcount0); 1048 //old_impl_vs_vba_impl("vready_after_vcount0", disp_dlg_regs->vready_after_vcount0, vba__vready_after_vcount0);
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
H A D | display_rq_dlg_calc_314.c | 1123 disp_dlg_regs->vready_after_vcount0 = 1; 1125 disp_dlg_regs->vready_after_vcount0 = 0; 1128 disp_dlg_regs->vready_after_vcount0 = 1; 1130 disp_dlg_regs->vready_after_vcount0 = 0; 1133 dml_print("DML_DLG: %s: vready_after_vcount0 = %d\n", __func__, disp_dlg_regs->vready_after_vcount0); 1135 //old_impl_vs_vba_impl("vready_after_vcount0", disp_dlg_regs->vready_after_vcount0, vba__vready_after_vcount0);
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/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
H A D | display_rq_dlg_calc_30.c | 1139 disp_dlg_regs->vready_after_vcount0 = 1; 1141 disp_dlg_regs->vready_after_vcount0 = 0; 1146 disp_dlg_regs->vready_after_vcount0 = 1; 1148 disp_dlg_regs->vready_after_vcount0 = 0;
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn10/ |
H A D | dcn10_hw_sequencer_debug.c | 276 dlg_regs->chunk_hdl_adjust_cur1, dlg_regs->vready_after_vcount0, dlg_regs->dst_y_delta_drq_limit,
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/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
H A D | dcn10_hwseq.c | 260 dlg_regs->chunk_hdl_adjust_cur1, dlg_regs->vready_after_vcount0, dlg_regs->dst_y_delta_drq_limit,
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