Searched refs:tlbie (Results 1 - 15 of 15) sorted by relevance
| /linux-master/arch/powerpc/mm/book3s32/ |
| H A D | nohash_low.S | 32 tlbie r3
68 0: tlbie r4
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| H A D | hash_low.S | 355 tlbie r4
425 * Between the tlbie above and updating the hash table entry below,
433 * PTE in their TLB. So we don't need to bother with another tlbie here,
435 * address. :-) The tlbie above is mainly to make sure that this CPU comes
581 tlbie r4 /* in hw tlb too */
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| /linux-master/arch/powerpc/mm/book3s64/ |
| H A D | hash_native.c | 99 asm volatile(ASM_FTR_IFCLR("tlbie %0,0", PPC_TLBIE(%1,%0), %2)
118 asm volatile(ASM_FTR_IFCLR("tlbie %0,1", PPC_TLBIE(%1,%0), %2)
142 * re-order the tlbie
152 /* Need the extra ptesync to ensure we don't reorder tlbie*/
217 static inline void tlbie(unsigned long vpn, int psize, int apsize, function
425 tlbie(vpn, bpsize, apsize, ssize, local);
512 tlbie(vpn, psize, psize, ssize, 0);
547 tlbie(vpn, psize, psize, ssize, 0);
589 tlbie(vpn, bpsize, apsize, ssize, local);
646 * We need to do tlb invalidate for all the address, tlbie
[all...] |
| /linux-master/arch/powerpc/kvm/ |
| H A D | book3s_pr_papr.c | 114 vcpu->arch.mmu.tlbie(vcpu, rb, rb & 1 ? true : false);
202 vcpu->arch.mmu.tlbie(vcpu, rb, rb & 1 ? true : false);
247 vcpu->arch.mmu.tlbie(vcpu, rb, rb & 1 ? true : false);
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| H A D | book3s_32_mmu.c | 404 mmu->tlbie = kvmppc_mmu_book3s_32_tlbie;
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| H A D | book3s_64_mmu.c | 536 dprintk("KVM MMU: tlbie(0x%lx)\n", va);
539 * The tlbie instruction changed behaviour starting with
664 mmu->tlbie = kvmppc_mmu_book3s_64_tlbie;
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| H A D | book3s_emulate.c | 351 vcpu->arch.mmu.tlbie(vcpu, addr, large);
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| /linux-master/arch/powerpc/kernel/ |
| H A D | head_8xx.S | 185 tlbie tmp; \
187 tlbie tmp
317 tlbie r12
342 tlbie r4
584 tlbie r0
601 sync /* wait for tlbia/tlbie to finish */
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| H A D | swsusp_32.S | 366 tlbie r4
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| H A D | head_book3s_32.S | 890 sync /* wait for tlbia/tlbie to finish */
903 sync /* wait for tlbia/tlbie to finish */
1123 tlbie r10
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| /linux-master/arch/powerpc/include/asm/ |
| H A D | trace.h | 292 TRACE_EVENT(tlbie,
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| H A D | kvm_host.h | 402 void (*tlbie)(struct kvm_vcpu *vcpu, ulong addr, bool large); member in struct:kvmppc_mmu
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| H A D | ppc_asm.h | 480 * the 403GCX and 405GP tlbia IS defined and tlbie is not.
492 0: tlbie r4; \
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| /linux-master/arch/powerpc/platforms/powermac/ |
| H A D | sleep.S | 395 tlbie r4
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| /linux-master/tools/testing/selftests/powerpc/primitives/asm/ |
| H A D | ppc_asm.h | 480 * the 403GCX and 405GP tlbia IS defined and tlbie is not.
492 0: tlbie r4; \
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