1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 *
4 * Copyright SUSE Linux Products GmbH 2009
5 *
6 * Authors: Alexander Graf <agraf@suse.de>
7 */
8
9#include <linux/types.h>
10#include <linux/string.h>
11#include <linux/kvm.h>
12#include <linux/kvm_host.h>
13#include <linux/highmem.h>
14
15#include <asm/kvm_ppc.h>
16#include <asm/kvm_book3s.h>
17
18/* #define DEBUG_MMU */
19/* #define DEBUG_MMU_PTE */
20/* #define DEBUG_MMU_PTE_IP 0xfff14c40 */
21
22#ifdef DEBUG_MMU
23#define dprintk(X...) printk(KERN_INFO X)
24#else
25#define dprintk(X...) do { } while(0)
26#endif
27
28#ifdef DEBUG_MMU_PTE
29#define dprintk_pte(X...) printk(KERN_INFO X)
30#else
31#define dprintk_pte(X...) do { } while(0)
32#endif
33
34#define PTEG_FLAG_ACCESSED	0x00000100
35#define PTEG_FLAG_DIRTY		0x00000080
36#ifndef SID_SHIFT
37#define SID_SHIFT		28
38#endif
39
40static inline bool check_debug_ip(struct kvm_vcpu *vcpu)
41{
42#ifdef DEBUG_MMU_PTE_IP
43	return vcpu->arch.regs.nip == DEBUG_MMU_PTE_IP;
44#else
45	return true;
46#endif
47}
48
49static inline u32 sr_vsid(u32 sr_raw)
50{
51	return sr_raw & 0x0fffffff;
52}
53
54static inline bool sr_valid(u32 sr_raw)
55{
56	return (sr_raw & 0x80000000) ? false : true;
57}
58
59static inline bool sr_ks(u32 sr_raw)
60{
61	return (sr_raw & 0x40000000) ? true: false;
62}
63
64static inline bool sr_kp(u32 sr_raw)
65{
66	return (sr_raw & 0x20000000) ? true: false;
67}
68
69static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
70					  struct kvmppc_pte *pte, bool data,
71					  bool iswrite);
72static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
73					     u64 *vsid);
74
75static u32 find_sr(struct kvm_vcpu *vcpu, gva_t eaddr)
76{
77	return kvmppc_get_sr(vcpu, (eaddr >> 28) & 0xf);
78}
79
80static u64 kvmppc_mmu_book3s_32_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
81					 bool data)
82{
83	u64 vsid;
84	struct kvmppc_pte pte;
85
86	if (!kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, &pte, data, false))
87		return pte.vpage;
88
89	kvmppc_mmu_book3s_32_esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
90	return (((u64)eaddr >> 12) & 0xffff) | (vsid << 16);
91}
92
93static hva_t kvmppc_mmu_book3s_32_get_pteg(struct kvm_vcpu *vcpu,
94				      u32 sre, gva_t eaddr,
95				      bool primary)
96{
97	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
98	u32 page, hash, pteg, htabmask;
99	hva_t r;
100
101	page = (eaddr & 0x0FFFFFFF) >> 12;
102	htabmask = ((vcpu_book3s->sdr1 & 0x1FF) << 16) | 0xFFC0;
103
104	hash = ((sr_vsid(sre) ^ page) << 6);
105	if (!primary)
106		hash = ~hash;
107	hash &= htabmask;
108
109	pteg = (vcpu_book3s->sdr1 & 0xffff0000) | hash;
110
111	dprintk("MMU: pc=0x%lx eaddr=0x%lx sdr1=0x%llx pteg=0x%x vsid=0x%x\n",
112		kvmppc_get_pc(vcpu), eaddr, vcpu_book3s->sdr1, pteg,
113		sr_vsid(sre));
114
115	r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT);
116	if (kvm_is_error_hva(r))
117		return r;
118	return r | (pteg & ~PAGE_MASK);
119}
120
121static u32 kvmppc_mmu_book3s_32_get_ptem(u32 sre, gva_t eaddr, bool primary)
122{
123	return ((eaddr & 0x0fffffff) >> 22) | (sr_vsid(sre) << 7) |
124	       (primary ? 0 : 0x40) | 0x80000000;
125}
126
127static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
128					  struct kvmppc_pte *pte, bool data,
129					  bool iswrite)
130{
131	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
132	struct kvmppc_bat *bat;
133	int i;
134
135	for (i = 0; i < 8; i++) {
136		if (data)
137			bat = &vcpu_book3s->dbat[i];
138		else
139			bat = &vcpu_book3s->ibat[i];
140
141		if (kvmppc_get_msr(vcpu) & MSR_PR) {
142			if (!bat->vp)
143				continue;
144		} else {
145			if (!bat->vs)
146				continue;
147		}
148
149		if (check_debug_ip(vcpu))
150		{
151			dprintk_pte("%cBAT %02d: 0x%lx - 0x%x (0x%x)\n",
152				    data ? 'd' : 'i', i, eaddr, bat->bepi,
153				    bat->bepi_mask);
154		}
155		if ((eaddr & bat->bepi_mask) == bat->bepi) {
156			u64 vsid;
157			kvmppc_mmu_book3s_32_esid_to_vsid(vcpu,
158				eaddr >> SID_SHIFT, &vsid);
159			vsid <<= 16;
160			pte->vpage = (((u64)eaddr >> 12) & 0xffff) | vsid;
161
162			pte->raddr = bat->brpn | (eaddr & ~bat->bepi_mask);
163			pte->may_read = bat->pp;
164			pte->may_write = bat->pp > 1;
165			pte->may_execute = true;
166			if (!pte->may_read) {
167				printk(KERN_INFO "BAT is not readable!\n");
168				continue;
169			}
170			if (iswrite && !pte->may_write) {
171				dprintk_pte("BAT is read-only!\n");
172				continue;
173			}
174
175			return 0;
176		}
177	}
178
179	return -ENOENT;
180}
181
182static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu *vcpu, gva_t eaddr,
183				     struct kvmppc_pte *pte, bool data,
184				     bool iswrite, bool primary)
185{
186	u32 sre;
187	hva_t ptegp;
188	u32 pteg[16];
189	u32 pte0, pte1;
190	u32 ptem = 0;
191	int i;
192	int found = 0;
193
194	sre = find_sr(vcpu, eaddr);
195
196	dprintk_pte("SR 0x%lx: vsid=0x%x, raw=0x%x\n", eaddr >> 28,
197		    sr_vsid(sre), sre);
198
199	pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
200
201	ptegp = kvmppc_mmu_book3s_32_get_pteg(vcpu, sre, eaddr, primary);
202	if (kvm_is_error_hva(ptegp)) {
203		printk(KERN_INFO "KVM: Invalid PTEG!\n");
204		goto no_page_found;
205	}
206
207	ptem = kvmppc_mmu_book3s_32_get_ptem(sre, eaddr, primary);
208
209	if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
210		printk_ratelimited(KERN_ERR
211			"KVM: Can't copy data from 0x%lx!\n", ptegp);
212		goto no_page_found;
213	}
214
215	for (i=0; i<16; i+=2) {
216		pte0 = be32_to_cpu(pteg[i]);
217		pte1 = be32_to_cpu(pteg[i + 1]);
218		if (ptem == pte0) {
219			u8 pp;
220
221			pte->raddr = (pte1 & ~(0xFFFULL)) | (eaddr & 0xFFF);
222			pp = pte1 & 3;
223
224			if ((sr_kp(sre) &&  (kvmppc_get_msr(vcpu) & MSR_PR)) ||
225			    (sr_ks(sre) && !(kvmppc_get_msr(vcpu) & MSR_PR)))
226				pp |= 4;
227
228			pte->may_write = false;
229			pte->may_read = false;
230			pte->may_execute = true;
231			switch (pp) {
232				case 0:
233				case 1:
234				case 2:
235				case 6:
236					pte->may_write = true;
237					fallthrough;
238				case 3:
239				case 5:
240				case 7:
241					pte->may_read = true;
242					break;
243			}
244
245			dprintk_pte("MMU: Found PTE -> %x %x - %x\n",
246				    pte0, pte1, pp);
247			found = 1;
248			break;
249		}
250	}
251
252	/* Update PTE C and A bits, so the guest's swapper knows we used the
253	   page */
254	if (found) {
255		u32 pte_r = pte1;
256		char __user *addr = (char __user *) (ptegp + (i+1) * sizeof(u32));
257
258		/*
259		 * Use single-byte writes to update the HPTE, to
260		 * conform to what real hardware does.
261		 */
262		if (pte->may_read && !(pte_r & PTEG_FLAG_ACCESSED)) {
263			pte_r |= PTEG_FLAG_ACCESSED;
264			put_user(pte_r >> 8, addr + 2);
265		}
266		if (iswrite && pte->may_write && !(pte_r & PTEG_FLAG_DIRTY)) {
267			pte_r |= PTEG_FLAG_DIRTY;
268			put_user(pte_r, addr + 3);
269		}
270		if (!pte->may_read || (iswrite && !pte->may_write))
271			return -EPERM;
272		return 0;
273	}
274
275no_page_found:
276
277	if (check_debug_ip(vcpu)) {
278		dprintk_pte("KVM MMU: No PTE found (sdr1=0x%llx ptegp=0x%lx)\n",
279			    to_book3s(vcpu)->sdr1, ptegp);
280		for (i=0; i<16; i+=2) {
281			dprintk_pte("   %02d: 0x%x - 0x%x (0x%x)\n",
282				    i, be32_to_cpu(pteg[i]),
283				    be32_to_cpu(pteg[i+1]), ptem);
284		}
285	}
286
287	return -ENOENT;
288}
289
290static int kvmppc_mmu_book3s_32_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
291				      struct kvmppc_pte *pte, bool data,
292				      bool iswrite)
293{
294	int r;
295	ulong mp_ea = vcpu->arch.magic_page_ea;
296
297	pte->eaddr = eaddr;
298	pte->page_size = MMU_PAGE_4K;
299
300	/* Magic page override */
301	if (unlikely(mp_ea) &&
302	    unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
303	    !(kvmppc_get_msr(vcpu) & MSR_PR)) {
304		pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
305		pte->raddr = vcpu->arch.magic_page_pa | (pte->raddr & 0xfff);
306		pte->raddr &= KVM_PAM;
307		pte->may_execute = true;
308		pte->may_read = true;
309		pte->may_write = true;
310
311		return 0;
312	}
313
314	r = kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, pte, data, iswrite);
315	if (r < 0)
316		r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
317						   data, iswrite, true);
318	if (r == -ENOENT)
319		r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
320						   data, iswrite, false);
321
322	return r;
323}
324
325
326static u32 kvmppc_mmu_book3s_32_mfsrin(struct kvm_vcpu *vcpu, u32 srnum)
327{
328	return kvmppc_get_sr(vcpu, srnum);
329}
330
331static void kvmppc_mmu_book3s_32_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
332					ulong value)
333{
334	kvmppc_set_sr(vcpu, srnum, value);
335	kvmppc_mmu_map_segment(vcpu, srnum << SID_SHIFT);
336}
337
338static void kvmppc_mmu_book3s_32_tlbie(struct kvm_vcpu *vcpu, ulong ea, bool large)
339{
340	unsigned long i;
341	struct kvm_vcpu *v;
342
343	/* flush this VA on all cpus */
344	kvm_for_each_vcpu(i, v, vcpu->kvm)
345		kvmppc_mmu_pte_flush(v, ea, 0x0FFFF000);
346}
347
348static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
349					     u64 *vsid)
350{
351	ulong ea = esid << SID_SHIFT;
352	u32 sr;
353	u64 gvsid = esid;
354	u64 msr = kvmppc_get_msr(vcpu);
355
356	if (msr & (MSR_DR|MSR_IR)) {
357		sr = find_sr(vcpu, ea);
358		if (sr_valid(sr))
359			gvsid = sr_vsid(sr);
360	}
361
362	/* In case we only have one of MSR_IR or MSR_DR set, let's put
363	   that in the real-mode context (and hope RM doesn't access
364	   high memory) */
365	switch (msr & (MSR_DR|MSR_IR)) {
366	case 0:
367		*vsid = VSID_REAL | esid;
368		break;
369	case MSR_IR:
370		*vsid = VSID_REAL_IR | gvsid;
371		break;
372	case MSR_DR:
373		*vsid = VSID_REAL_DR | gvsid;
374		break;
375	case MSR_DR|MSR_IR:
376		if (sr_valid(sr))
377			*vsid = sr_vsid(sr);
378		else
379			*vsid = VSID_BAT | gvsid;
380		break;
381	default:
382		BUG();
383	}
384
385	if (msr & MSR_PR)
386		*vsid |= VSID_PR;
387
388	return 0;
389}
390
391static bool kvmppc_mmu_book3s_32_is_dcbz32(struct kvm_vcpu *vcpu)
392{
393	return true;
394}
395
396
397void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu)
398{
399	struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
400
401	mmu->mtsrin = kvmppc_mmu_book3s_32_mtsrin;
402	mmu->mfsrin = kvmppc_mmu_book3s_32_mfsrin;
403	mmu->xlate = kvmppc_mmu_book3s_32_xlate;
404	mmu->tlbie = kvmppc_mmu_book3s_32_tlbie;
405	mmu->esid_to_vsid = kvmppc_mmu_book3s_32_esid_to_vsid;
406	mmu->ea_to_vp = kvmppc_mmu_book3s_32_ea_to_vp;
407	mmu->is_dcbz32 = kvmppc_mmu_book3s_32_is_dcbz32;
408
409	mmu->slbmte = NULL;
410	mmu->slbmfee = NULL;
411	mmu->slbmfev = NULL;
412	mmu->slbfee = NULL;
413	mmu->slbie = NULL;
414	mmu->slbia = NULL;
415}
416