/linux-master/kernel/sched/ |
H A D | autogroup.h | 14 struct task_group *tg; member in struct:autogroup 21 extern void autogroup_free(struct task_group *tg); 23 static inline bool task_group_is_autogroup(struct task_group *tg) argument 25 return !!tg->autogroup; 28 extern bool task_wants_autogroup(struct task_struct *p, struct task_group *tg); 31 autogroup_task_group(struct task_struct *p, struct task_group *tg) argument 36 if (enabled && task_wants_autogroup(p, tg)) 37 return p->signal->autogroup->tg; 39 return tg; 42 extern int autogroup_path(struct task_group *tg, cha 47 autogroup_free(struct task_group *tg) argument 48 task_group_is_autogroup(struct task_group *tg) argument 54 autogroup_task_group(struct task_struct *p, struct task_group *tg) argument 59 autogroup_path(struct task_group *tg, char *buf, int buflen) argument [all...] |
H A D | autogroup.c | 35 autogroup_default.tg = &root_task_group; 42 void autogroup_free(struct task_group *tg) argument 44 kfree(tg->autogroup); 53 ag->tg->rt_se = NULL; 54 ag->tg->rt_rq = NULL; 56 sched_release_group(ag->tg); 57 sched_destroy_group(ag->tg); 88 struct task_group *tg; local 93 tg = sched_create_group(&root_task_group); 94 if (IS_ERR(tg)) 129 task_wants_autogroup(struct task_struct *p, struct task_group *tg) argument 285 autogroup_path(struct task_group *tg, char *buf, int buflen) argument [all...] |
H A D | rt.c | 195 void unregister_rt_sched_group(struct task_group *tg) argument 197 if (tg->rt_se) 198 destroy_rt_bandwidth(&tg->rt_bandwidth); 202 void free_rt_sched_group(struct task_group *tg) argument 207 if (tg->rt_rq) 208 kfree(tg->rt_rq[i]); 209 if (tg->rt_se) 210 kfree(tg->rt_se[i]); 213 kfree(tg->rt_rq); 214 kfree(tg 217 init_tg_rt_entry(struct task_group *tg, struct rt_rq *rt_rq, struct sched_rt_entity *rt_se, int cpu, struct sched_rt_entity *parent) argument 244 alloc_rt_sched_group(struct task_group *tg, struct task_group *parent) argument 312 unregister_rt_sched_group(struct task_group *tg) argument 314 free_rt_sched_group(struct task_group *tg) argument 316 alloc_rt_sched_group(struct task_group *tg, struct task_group *parent) argument 502 next_task_group(struct task_group *tg) argument 2696 tg_has_rt_tasks(struct task_group *tg) argument 2717 struct task_group *tg; member in struct:rt_schedulable_data 2722 tg_rt_schedulable(struct task_group *tg, void *data) argument 2779 __rt_schedulable(struct task_group *tg, u64 period, u64 runtime) argument 2796 tg_set_rt_bandwidth(struct task_group *tg, u64 rt_period, u64 rt_runtime) argument 2841 sched_group_set_rt_runtime(struct task_group *tg, long rt_runtime_us) argument 2855 sched_group_rt_runtime(struct task_group *tg) argument 2867 sched_group_set_rt_period(struct task_group *tg, u64 rt_period_us) argument 2880 sched_group_rt_period(struct task_group *tg) argument 2902 sched_rt_can_attach(struct task_group *tg, struct task_struct *tsk) argument [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dce110/ |
H A D | dce110_timing_generator.h | 117 #define DCE110TG_FROM_TG(tg)\ 118 container_of(tg, struct dce110_timing_generator, base) 121 struct dce110_timing_generator *tg, 128 struct timing_generator *tg, 136 struct timing_generator *tg, 140 bool dce110_timing_generator_enable_crtc(struct timing_generator *tg); 141 bool dce110_timing_generator_disable_crtc(struct timing_generator *tg); 144 struct timing_generator *tg, 151 struct timing_generator *tg); 154 struct timing_generator *tg, [all...] |
H A D | dce110_timing_generator_v.c | 42 tg->ctx->logger 53 static bool dce110_timing_generator_v_enable_crtc(struct timing_generator *tg) argument 64 dm_write_reg(tg->ctx, 69 dm_write_reg(tg->ctx, mmCRTCV_MASTER_UPDATE_MODE, value); 74 dm_write_reg(tg->ctx, 80 static bool dce110_timing_generator_v_disable_crtc(struct timing_generator *tg) argument 84 value = dm_read_reg(tg->ctx, 90 dm_write_reg(tg->ctx, 94 * tg->funcs->disable_stereo(tg); 99 dce110_timing_generator_v_blank_crtc(struct timing_generator *tg) argument 119 dce110_timing_generator_v_unblank_crtc(struct timing_generator *tg) argument 139 dce110_timing_generator_v_is_in_vertical_blank( struct timing_generator *tg) argument 152 dce110_timing_generator_v_is_counter_moving(struct timing_generator *tg) argument 190 dce110_timing_generator_v_wait_for_vblank(struct timing_generator *tg) argument 214 dce110_timing_generator_v_wait_for_vactive(struct timing_generator *tg) argument 224 dce110_timing_generator_v_wait_for_state(struct timing_generator *tg, enum crtc_state state) argument 241 dce110_timing_generator_v_program_blanking( struct timing_generator *tg, const struct dc_crtc_timing *timing) argument 383 dce110_timing_generator_v_enable_advanced_request( struct timing_generator *tg, bool enable, const struct dc_crtc_timing *timing) argument 426 dce110_timing_generator_v_set_blank(struct timing_generator *tg, bool enable_blanking) argument 435 dce110_timing_generator_v_program_timing(struct timing_generator *tg, const struct dc_crtc_timing *timing, int vready_offset, int vstartup_start, int vupdate_offset, int vupdate_width, const enum signal_type signal, bool use_vbios) argument 450 dce110_timing_generator_v_program_blank_color( struct timing_generator *tg, const struct tg_color *black_color) argument 476 dce110_timing_generator_v_set_overscan_color_black( struct timing_generator *tg, const struct tg_color *color) argument 522 dce110_tg_v_program_blank_color(struct timing_generator *tg, const struct tg_color *black_color) argument 550 dce110_timing_generator_v_set_overscan_color(struct timing_generator *tg, const struct tg_color *overscan_color) argument 579 dce110_timing_generator_v_set_colors(struct timing_generator *tg, const struct tg_color *blank_color, const struct tg_color *overscan_color) argument 589 dce110_timing_generator_v_set_early_control( struct timing_generator *tg, uint32_t early_cntl) argument 602 dce110_timing_generator_v_get_vblank_counter(struct timing_generator *tg) argument 612 dce110_timing_generator_v_did_triggered_reset_occur( struct timing_generator *tg) argument 619 dce110_timing_generator_v_setup_global_swap_lock( struct timing_generator *tg, const struct dcp_gsl_params *gsl_params) argument 627 dce110_timing_generator_v_enable_reset_trigger( struct timing_generator *tg, int source_tg_inst) argument 635 dce110_timing_generator_v_disable_reset_trigger( struct timing_generator *tg) argument 642 dce110_timing_generator_v_tear_down_global_swap_lock( struct timing_generator *tg) argument 649 dce110_timing_generator_v_disable_vga( struct timing_generator *tg) argument [all...] |
H A D | dce110_timing_generator.c | 66 struct timing_generator *tg, 92 struct timing_generator *tg) 97 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); 100 value = dm_read_reg(tg->ctx, addr); 106 struct timing_generator *tg, 110 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); 113 regval = dm_read_reg(tg->ctx, address); 116 dm_write_reg(tg->ctx, address, regval); 123 bool dce110_timing_generator_enable_crtc(struct timing_generator *tg) argument 127 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); 65 dce110_timing_generator_apply_front_porch_workaround( struct timing_generator *tg, struct dc_crtc_timing *timing) argument 91 dce110_timing_generator_is_in_vertical_blank( struct timing_generator *tg) argument 105 dce110_timing_generator_set_early_control( struct timing_generator *tg, uint32_t early_cntl) argument 151 dce110_timing_generator_program_blank_color( struct timing_generator *tg, const struct tg_color *black_color) argument 232 dce110_timing_generator_disable_crtc(struct timing_generator *tg) argument 254 program_horz_count_by_2( struct timing_generator *tg, const struct dc_crtc_timing *timing) argument 280 dce110_timing_generator_program_timing_generator( struct timing_generator *tg, const struct dc_crtc_timing *dc_crtc_timing) argument 365 dce110_timing_generator_set_drr( struct timing_generator *tg, const struct drr_params *params) argument 469 dce110_timing_generator_set_static_screen_control( struct timing_generator *tg, uint32_t event_triggers, uint32_t num_frames) argument 512 dce110_timing_generator_get_vblank_counter(struct timing_generator *tg) argument 533 dce110_timing_generator_get_position(struct timing_generator *tg, struct crtc_position *position) argument 569 dce110_timing_generator_get_crtc_scanoutpos( struct timing_generator *tg, uint32_t *v_blank_start, uint32_t *v_blank_end, uint32_t *h_position, uint32_t *v_position) argument 600 dce110_timing_generator_program_blanking( struct timing_generator *tg, const struct dc_crtc_timing *timing) argument 703 dce110_timing_generator_set_test_pattern( struct timing_generator *tg, enum controller_dp_test_pattern test_pattern, enum dc_color_depth color_depth) argument 1113 dce110_timing_generator_validate_timing( struct timing_generator *tg, const struct dc_crtc_timing *timing, enum signal_type signal) argument 1172 dce110_timing_generator_wait_for_vblank(struct timing_generator *tg) argument 1196 dce110_timing_generator_wait_for_vactive(struct timing_generator *tg) argument 1217 dce110_timing_generator_setup_global_swap_lock( struct timing_generator *tg, const struct dcp_gsl_params *gsl_params) argument 1315 dce110_timing_generator_tear_down_global_swap_lock( struct timing_generator *tg) argument 1395 dce110_timing_generator_is_counter_moving(struct timing_generator *tg) argument 1409 dce110_timing_generator_enable_advanced_request( struct timing_generator *tg, bool enable, const struct dc_crtc_timing *timing) argument 1472 dce110_timing_generator_set_lock_master(struct timing_generator *tg, bool lock) argument 1489 dce110_timing_generator_enable_reset_trigger( struct timing_generator *tg, int source_tg_inst) argument 1578 dce110_timing_generator_enable_crtc_reset( struct timing_generator *tg, int source_tg_inst, struct crtc_trigger_info *crtc_tp) argument 1710 dce110_timing_generator_disable_reset_trigger( struct timing_generator *tg) argument 1774 dce110_timing_generator_did_triggered_reset_occur( struct timing_generator *tg) argument 1797 dce110_timing_generator_disable_vga( struct timing_generator *tg) argument 1845 dce110_timing_generator_set_overscan_color_black( struct timing_generator *tg, const struct tg_color *color) argument 1893 dce110_tg_program_blank_color(struct timing_generator *tg, const struct tg_color *black_color) argument 1922 dce110_tg_set_overscan_color(struct timing_generator *tg, const struct tg_color *overscan_color) argument 1952 dce110_tg_program_timing(struct timing_generator *tg, const struct dc_crtc_timing *timing, int vready_offset, int vstartup_start, int vupdate_offset, int vupdate_width, const enum signal_type signal, bool use_vbios) argument 1967 dce110_tg_is_blanked(struct timing_generator *tg) argument 1984 dce110_tg_set_blank(struct timing_generator *tg, bool enable_blanking) argument 2012 dce110_tg_validate_timing(struct timing_generator *tg, const struct dc_crtc_timing *timing) argument 2018 dce110_tg_wait_for_state(struct timing_generator *tg, enum crtc_state state) argument 2035 dce110_tg_set_colors(struct timing_generator *tg, const struct tg_color *blank_color, const struct tg_color *overscan_color) argument 2048 dce110_arm_vert_intr(struct timing_generator *tg, uint8_t width) argument 2084 dce110_is_tg_enabled(struct timing_generator *tg) argument 2098 dce110_configure_crc(struct timing_generator *tg, const struct crc_params *params) argument 2175 dce110_get_crc(struct timing_generator *tg, uint32_t *r_cr, uint32_t *g_y, uint32_t *b_cb) argument [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/inc/hw/ |
H A D | timing_generator.h | 161 bool (*validate_timing)(struct timing_generator *tg, 163 void (*program_timing)(struct timing_generator *tg, 183 bool (*enable_crtc)(struct timing_generator *tg); 184 bool (*disable_crtc)(struct timing_generator *tg); 185 void (*phantom_crtc_post_enable)(struct timing_generator *tg); 186 void (*disable_phantom_crtc)(struct timing_generator *tg); 187 bool (*immediate_disable_crtc)(struct timing_generator *tg); 188 bool (*is_counter_moving)(struct timing_generator *tg); 189 void (*get_position)(struct timing_generator *tg, 192 uint32_t (*get_frame_count)(struct timing_generator *tg); [all...] |
/linux-master/block/ |
H A D | blk-throttle.c | 92 static inline struct blkcg_gq *tg_to_blkg(struct throtl_grp *tg) argument 94 return pd_to_blkg(&tg->pd); 121 struct throtl_grp *tg = sq_to_tg(sq); local 123 if (tg) 124 return tg->td; 147 static uint64_t tg_bps_limit(struct throtl_grp *tg, int rw) argument 149 struct blkcg_gq *blkg = tg_to_blkg(tg); 156 td = tg->td; 157 ret = tg->bps[rw][td->limit_index]; 161 tg 177 tg_iops_limit(struct throtl_grp *tg, int rw) argument 244 throtl_qnode_init(struct throtl_qnode *qn, struct throtl_grp *tg) argument 341 struct throtl_grp *tg; local 388 struct throtl_grp *tg = pd_to_tg(pd); local 418 tg_update_has_rules(struct throtl_grp *tg) argument 438 struct throtl_grp *tg = pd_to_tg(pd); local 455 struct throtl_grp *tg = blkg_to_tg(blkg); local 476 struct throtl_grp *tg = pd_to_tg(pd); local 491 struct throtl_grp *tg = pd_to_tg(pd); local 520 struct throtl_grp *tg; local 529 tg_service_queue_add(struct throtl_grp *tg) argument 555 throtl_enqueue_tg(struct throtl_grp *tg) argument 564 throtl_dequeue_tg(struct throtl_grp *tg) argument 633 throtl_start_new_slice_with_credit(struct throtl_grp *tg, bool rw, unsigned long start) argument 657 throtl_start_new_slice(struct throtl_grp *tg, bool rw, bool clear_carryover) argument 675 throtl_set_slice_end(struct throtl_grp *tg, bool rw, unsigned long jiffy_end) argument 681 throtl_extend_slice(struct throtl_grp *tg, bool rw, unsigned long jiffy_end) argument 692 throtl_slice_used(struct throtl_grp *tg, bool rw) argument 736 throtl_trim_slice(struct throtl_grp *tg, bool rw) argument 796 __tg_update_carryover(struct throtl_grp *tg, bool rw) argument 818 tg_update_carryover(struct throtl_grp *tg) argument 831 tg_within_iops_limit(struct throtl_grp *tg, struct bio *bio, u32 iops_limit) argument 856 tg_within_bps_limit(struct throtl_grp *tg, struct bio *bio, u64 bps_limit) argument 901 tg_may_dispatch(struct throtl_grp *tg, struct bio *bio, unsigned long *wait) argument 961 throtl_charge_bio(struct throtl_grp *tg, struct bio *bio) argument 985 throtl_add_bio_tg(struct bio *bio, struct throtl_qnode *qn, struct throtl_grp *tg) argument 1009 tg_update_disptime(struct throtl_grp *tg) argument 1045 tg_dispatch_one_bio(struct throtl_grp *tg, bool rw) argument 1088 throtl_dispatch_tg(struct throtl_grp *tg) argument 1126 struct throtl_grp *tg; local 1174 struct throtl_grp *tg = sq_to_tg(sq); local 1279 struct throtl_grp *tg = pd_to_tg(pd); local 1290 struct throtl_grp *tg = pd_to_tg(pd); local 1312 tg_conf_updated(struct throtl_grp *tg, bool global) argument 1375 struct throtl_grp *tg; local 1495 struct throtl_grp *tg = pd_to_tg(pd); local 1567 struct throtl_grp *tg; local 1733 struct throtl_grp *tg = blkg_to_tg(blkg); local 1765 __tg_last_low_overflow_time(struct throtl_grp *tg) argument 1776 tg_last_low_overflow_time(struct throtl_grp *tg) argument 1803 throtl_tg_is_idle(struct throtl_grp *tg) argument 1829 throtl_low_limit_reached(struct throtl_grp *tg, int rw) argument 1843 throtl_tg_can_upgrade(struct throtl_grp *tg) argument 1861 throtl_hierarchy_can_upgrade(struct throtl_grp *tg) argument 1887 struct throtl_grp *tg = blkg_to_tg(blkg); local 1902 throtl_upgrade_check(struct throtl_grp *tg) argument 1933 struct throtl_grp *tg = blkg_to_tg(blkg); local 1960 throtl_tg_can_downgrade(struct throtl_grp *tg) argument 1977 throtl_hierarchy_can_downgrade(struct throtl_grp *tg) argument 1994 throtl_downgrade_check(struct throtl_grp *tg) argument 2055 blk_throtl_update_idletime(struct throtl_grp *tg) argument 2153 blk_throtl_update_idletime(struct throtl_grp *tg) argument 2157 throtl_downgrade_check(struct throtl_grp *tg) argument 2161 throtl_upgrade_check(struct throtl_grp *tg) argument 2181 struct throtl_grp *tg = blkg_to_tg(blkg); local 2316 struct throtl_grp *tg; local [all...] |
H A D | blk-throttle.h | 32 struct throtl_grp *tg; /* tg this qnode belongs to */ member in struct:throtl_qnode 51 unsigned long first_pending_disptime; /* disptime of the first tg */ 185 struct throtl_grp *tg = blkg_to_tg(bio->bi_blkg); local 191 blkg_rwstat_add(&tg->stat_bytes, bio->bi_opf, 194 blkg_rwstat_add(&tg->stat_ios, bio->bi_opf, 1); 198 if (tg->has_rules_iops[rw]) 201 if (tg->has_rules_bps[rw] && !bio_flagged(bio, BIO_BPS_THROTTLED))
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/linux-master/drivers/gpu/drm/amd/display/dc/dce80/ |
H A D | dce80_timing_generator.h | 34 struct dce110_timing_generator *tg,
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H A D | dce80_timing_generator.c | 87 static void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_100hz) argument 91 + DCE110TG_FROM_TG(tg)->offsets.dmif; 92 uint32_t value = dm_read_reg(tg->ctx, addr); 105 dm_write_reg(tg->ctx, addr, value); 108 static void program_timing(struct timing_generator *tg, argument 118 program_pix_dur(tg, timing->pix_clk_100hz); 120 dce110_tg_program_timing(tg, timing, 0, 0, 0, 0, 0, use_vbios); 124 struct timing_generator *tg, 128 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); 130 uint32_t value = dm_read_reg(tg 123 dce80_timing_generator_enable_advanced_request( struct timing_generator *tg, bool enable, const struct dc_crtc_timing *timing) argument [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dce60/ |
H A D | dce60_timing_generator.h | 34 struct dce110_timing_generator *tg,
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H A D | dce60_timing_generator.c | 87 static void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_100hz) argument 91 + DCE110TG_FROM_TG(tg)->offsets.dmif; 92 uint32_t value = dm_read_reg(tg->ctx, addr); 105 dm_write_reg(tg->ctx, addr, value); 108 static void program_timing(struct timing_generator *tg, argument 118 program_pix_dur(tg, timing->pix_clk_100hz); 120 dce110_tg_program_timing(tg, timing, 0, 0, 0, 0, 0, use_vbios); 124 struct timing_generator *tg, 128 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); 130 uint32_t value = dm_read_reg(tg 123 dce60_timing_generator_enable_advanced_request( struct timing_generator *tg, bool enable, const struct dc_crtc_timing *timing) argument 178 dce60_is_tg_enabled(struct timing_generator *tg) argument 192 dce60_configure_crc(struct timing_generator *tg, const struct crc_params *params) argument [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dce120/ |
H A D | dce120_timing_generator.c | 86 struct timing_generator *tg) 89 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); 91 tg->ctx, 102 struct timing_generator *tg, 111 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); 114 tg, 128 static bool dce120_tg_validate_timing(struct timing_generator *tg, argument 131 return dce120_timing_generator_validate_timing(tg, timing, SIGNAL_TYPE_NONE); 136 static bool dce120_timing_generator_enable_crtc(struct timing_generator *tg) argument 139 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); 85 dce120_timing_generator_is_in_vertical_blank( struct timing_generator *tg) argument 101 dce120_timing_generator_validate_timing( struct timing_generator *tg, const struct dc_crtc_timing *timing, enum signal_type signal) argument 156 dce120_timing_generator_set_early_control( struct timing_generator *tg, uint32_t early_cntl) argument 169 dce120_timing_generator_get_vblank_counter( struct timing_generator *tg) argument 184 dce120_timing_generator_get_crtc_position( struct timing_generator *tg, struct crtc_position *position) argument 210 dce120_timing_generator_wait_for_vblank(struct timing_generator *tg) argument 232 dce120_timing_generator_wait_for_vactive(struct timing_generator *tg) argument 245 dce120_timing_generator_setup_global_swap_lock( struct timing_generator *tg, const struct dcp_gsl_params *gsl_params) argument 282 dce120_timing_generator_tear_down_global_swap_lock( struct timing_generator *tg) argument 303 dce120_timing_generator_enable_reset_trigger( struct timing_generator *tg, int source) argument 350 dce120_timing_generator_disable_reset_trigger( struct timing_generator *tg) argument 370 dce120_timing_generator_did_triggered_reset_occur( struct timing_generator *tg) argument 387 dce120_timing_generator_disable_vga(struct timing_generator *tg) argument 428 dce120_timing_generator_program_blanking( struct timing_generator *tg, const struct dc_crtc_timing *timing) argument 488 dce120_timing_generator_program_blank_color( struct timing_generator *tg, const struct tg_color *black_color) argument 501 dce120_timing_generator_set_overscan_color_black( struct timing_generator *tg, const struct tg_color *color) argument 543 dce120_timing_generator_set_drr( struct timing_generator *tg, const struct drr_params *params) argument 592 dce120_timing_generator_get_crtc_scanoutpos( struct timing_generator *tg, uint32_t *v_blank_start, uint32_t *v_blank_end, uint32_t *h_position, uint32_t *v_position) argument 621 dce120_timing_generator_enable_advanced_request( struct timing_generator *tg, bool enable, const struct dc_crtc_timing *timing) argument 659 dce120_tg_program_blank_color(struct timing_generator *tg, const struct tg_color *black_color) argument 682 dce120_tg_set_overscan_color(struct timing_generator *tg, const struct tg_color *overscan_color) argument 694 dce120_tg_program_timing(struct timing_generator *tg, const struct dc_crtc_timing *timing, int vready_offset, int vstartup_start, int vupdate_offset, int vupdate_width, const enum signal_type signal, bool use_vbios) argument 709 dce120_tg_is_blanked(struct timing_generator *tg) argument 730 dce120_tg_set_blank(struct timing_generator *tg, bool enable_blanking) argument 749 dce120_tg_wait_for_state(struct timing_generator *tg, enum crtc_state state) argument 766 dce120_tg_set_colors(struct timing_generator *tg, const struct tg_color *blank_color, const struct tg_color *overscan_color) argument 777 dce120_timing_generator_set_static_screen_control( struct timing_generator *tg, uint32_t event_triggers, uint32_t num_frames) argument 793 dce120_timing_generator_set_test_pattern( struct timing_generator *tg, enum controller_dp_test_pattern test_pattern, enum dc_color_depth color_depth) argument 1054 dce120_arm_vert_intr( struct timing_generator *tg, uint8_t width) argument 1080 dce120_is_tg_enabled(struct timing_generator *tg) argument 1093 dce120_configure_crc(struct timing_generator *tg, const struct crc_params *params) argument 1139 dce120_get_crc(struct timing_generator *tg, uint32_t *r_cr, uint32_t *g_y, uint32_t *b_cb) argument [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
H A D | dcn201_hwseq.c | 163 struct timing_generator *tg) 177 tg->funcs->get_otg_active_size(tg, 182 tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1); 270 struct timing_generator *tg = res_pool->timing_generators[i]; local 272 if (tg->funcs->is_tg_enabled(tg)) { 273 dcn201_init_blank(dc, tg); 278 struct timing_generator *tg local 161 dcn201_init_blank( struct dc *dc, struct timing_generator *tg) argument 302 struct timing_generator *tg = res_pool->timing_generators[i]; local 331 struct timing_generator *tg = res_pool->timing_generators[i]; local 347 struct timing_generator *tg = res_pool->timing_generators[i]; local [all...] |
H A D | dcn201_hwseq.h | 45 struct timing_generator *tg);
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/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
H A D | dcn10_hwseq.c | 103 struct timing_generator *tg; local 109 tg = pipe_ctx->stream_res.tg; 112 * Only lock the top pipe's tg to prevent redundant 118 !tg->funcs->is_tg_enabled(tg) || 409 struct timing_generator *tg = pool->timing_generators[i]; local 412 optc1_read_otg_state(DCN10TG_FROM_TG(tg), &s); 424 s.blank_enabled = tg->funcs->is_blanked(tg); 593 struct timing_generator *tg = pipe_ctx->stream_res.tg; local 900 false_optc_underflow_wa( struct dc *dc, const struct dc_stream_state *stream, struct timing_generator *tg) argument 1378 struct timing_generator *tg = dc->res_pool->timing_generators[i]; local 1431 struct timing_generator *tg = dc->res_pool->timing_generators[i]; local 1505 struct timing_generator *tg = dc->res_pool->timing_generators[i]; local 2049 wait_for_reset_trigger_to_occur( struct dc_context *dc_ctx, struct timing_generator *tg) argument 2266 struct timing_generator *tg; local 2332 struct timing_generator *tg; local 3036 struct timing_generator *tg; local 3076 struct timing_generator *tg = pipe_ctx->stream_res.tg; local 3379 struct timing_generator *tg = pipe_ctx->stream_res.tg; local 3402 struct timing_generator *tg = dc->res_pool->timing_generators[0]; local 3838 struct timing_generator *tg = pipe_ctx->stream_res.tg; local 3849 struct timing_generator *tg = pipe_ctx->stream_res.tg; local [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dce/ |
H A D | dce_hwseq.c | 56 if (lock && pipe->stream_res.tg->funcs->is_blanked && 57 pipe->stream_res.tg->funcs->is_blanked(pipe->stream_res.tg)) 60 val = REG_GET_4(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], 71 REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val, 76 REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val, 82 uint32_t value = REG_READ(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst]); 83 REG_WRITE(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst], value);
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/linux-master/drivers/firmware/efi/libstub/ |
H A D | arm64.c | 61 u64 tg; local 75 tg = (read_cpuid(ID_AA64MMFR0_EL1) >> ID_AA64MMFR0_EL1_TGRAN_SHIFT) & 0xf; 76 if (tg < ID_AA64MMFR0_EL1_TGRAN_SUPPORTED_MIN || tg > ID_AA64MMFR0_EL1_TGRAN_SUPPORTED_MAX) {
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/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
H A D | dcn35_hwseq.c | 251 struct timing_generator *tg = dc->res_pool->timing_generators[i]; local 255 if (tg) { 256 if (tg->funcs->is_tg_enabled(tg) && tg->funcs->get_optc_source) { 257 tg->funcs->get_optc_source(tg, &num_opps, 404 DC_LOG_DSC("Setting optc DSC config for tg instance %d:", pipe_ctx->stream_res.tg->inst); 405 pipe_ctx->stream_res.tg 691 struct timing_generator *tg = dc->res_pool->timing_generators[i]; local 744 struct timing_generator *tg = dc->res_pool->timing_generators[i]; local 818 struct timing_generator *tg = dc->res_pool->timing_generators[i]; local 922 struct timing_generator *tg = is_phantom ? pipe_ctx->stream_res.tg : NULL; local 993 struct timing_generator *tg = dc->res_pool->timing_generators[i]; local [all...] |
/linux-master/drivers/iio/chemical/ |
H A D | sgp40.c | 167 struct sgp40_tg_measure tg = {.command = {0x26, 0x0F}}; local 174 tg.rht_ticks = cpu_to_be16(ticks16); 175 tg.rht_crc = crc8(sgp40_crc8_table, (u8 *)&tg.rht_ticks, 2, SGP40_CRC8_INIT); 179 tg.temp_ticks = cpu_to_be16(ticks16); 180 tg.temp_crc = crc8(sgp40_crc8_table, (u8 *)&tg.temp_ticks, 2, SGP40_CRC8_INIT); 184 ret = i2c_master_send(client, (const char *)&tg, sizeof(tg)); 185 if (ret != sizeof(tg)) { [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
H A D | dcn20_hwseq.c | 276 if (pipe_ctx->stream_res.tg->funcs->set_gsl != NULL && 277 pipe_ctx->stream_res.tg->funcs->set_gsl_source_select != NULL) { 278 pipe_ctx->stream_res.tg->funcs->set_gsl( 279 pipe_ctx->stream_res.tg, 282 pipe_ctx->stream_res.tg->funcs->set_gsl_source_select( 283 pipe_ctx->stream_res.tg, group_idx, enable ? 4 : 0); 398 struct timing_generator *tg) 413 tg->funcs->get_otg_active_size(tg, 418 tg 396 dcn20_init_blank( struct dc *dc, struct timing_generator *tg) argument 736 struct timing_generator *tg = is_phantom ? pipe_ctx->stream_res.tg : NULL; local 964 struct timing_generator *tg = pipe_ctx->stream_res.tg; local 2048 struct timing_generator *tg = dc->current_state->res_ctx.pipe_ctx[i].stream_res.tg; local 2235 struct timing_generator *tg = dc->res_pool->timing_generators[0]; local 2662 struct timing_generator *tg = pipe_ctx->stream_res.tg; local 2882 struct timing_generator *tg = pipe_ctx->stream_res.tg; local 3014 struct timing_generator *tg = dc->res_pool->timing_generators[i]; local 3021 struct timing_generator *tg = dc->res_pool->timing_generators[i]; local 3045 struct timing_generator *tg = dc->res_pool->timing_generators[i]; local 3076 struct timing_generator *tg = dc->res_pool->timing_generators[i]; local 3092 struct timing_generator *tg = dc->res_pool->timing_generators[i]; local [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn314/ |
H A D | dcn314_hwseq.c | 113 DC_LOG_DSC("Setting optc DSC config for tg instance %d:", pipe_ctx->stream_res.tg->inst); 114 pipe_ctx->stream_res.tg->funcs->set_dsc_config(pipe_ctx->stream_res.tg, 120 pipe_ctx->stream_res.tg->funcs->set_dsc_config( 121 pipe_ctx->stream_res.tg, 167 pipe_ctx->stream_res.tg->funcs->set_odm_combine( 168 pipe_ctx->stream_res.tg, 172 pipe_ctx->stream_res.tg->funcs->set_odm_bypass( 173 pipe_ctx->stream_res.tg, [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn21/ |
H A D | dcn21_hwseq.c | 182 uint32_t otg_inst = pipe_ctx->stream_res.tg->inst; 209 struct timing_generator *tg = pipe_ctx->stream_res.tg; local 214 if (!abm || !tg || !panel_cntl) 217 otg_inst = tg->inst; 244 struct timing_generator *tg = pipe_ctx->stream_res.tg; local 248 if (!abm || !tg || !panel_cntl) 251 otg_inst = tg->inst;
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/linux-master/drivers/net/ethernet/microchip/vcap/ |
H A D | vcap_api_private.h | 48 const struct vcap_typegroup *tg; /* current typegroup */ member in struct:vcap_stream_iter 59 const struct vcap_typegroup *tg, u32 offset); 62 const struct vcap_typegroup *tg, u32 offset);
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