Searched refs:sp0 (Results 1 - 10 of 10) sorted by relevance
/linux-master/arch/x86/include/asm/ |
H A D | processor.h | 233 unsigned long sp0; member in struct:x86_hw_tss 239 * the same cacheline as sp0. We use ss1 to cache the value in 280 u64 sp0; member in struct:x86_hw_tss 426 unsigned long sp0; member in struct:thread_struct 510 native_load_sp0(unsigned long sp0) argument 512 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0); 525 * We can't read directly from tss.sp0: sp0 on x86_32 is special in 526 * and around vm86 mode and sp0 o 545 load_sp0(unsigned long sp0) argument [all...] |
H A D | switch_to.h | 69 /* sp0 always points to the entry trampoline stack, which is constant: */ 71 this_cpu_write(cpu_tss_rw.x86_tss.sp1, task->thread.sp0);
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H A D | paravirt.h | 111 static inline void load_sp0(unsigned long sp0) argument 113 PVOP_VCALL1(cpu.load_sp0, sp0);
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H A D | paravirt_types.h | 82 void (*load_sp0)(unsigned long sp0);
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/linux-master/arch/x86/kvm/ |
H A D | tss.h | 37 u16 sp0; member in struct:tss_segment_16
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/linux-master/arch/x86/kernel/ |
H A D | asm-offsets.c | 107 OFFSET(TSS_sp0, tss_struct, x86_tss.sp0);
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H A D | process.c | 68 * .sp0 is only used when entering ring 0 from a lower 73 .sp0 = (1UL << (BITS_PER_LONG-1)) + 1, 194 p->thread.sp0 = (unsigned long) (childregs + 1);
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H A D | vm86_32.c | 145 tsk->thread.sp0 = vm86->saved_sp0; 327 vm86->saved_sp0 = tsk->thread.sp0; 332 tsk->thread.sp0 += 16;
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H A D | traps.c | 368 * advantage of the fact that we're not using the normal (TSS.sp0) 369 * stack right now. We can write a fake #GP(0) frame at TSS.sp0 383 struct pt_regs *gpregs = (struct pt_regs *)this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1; 838 new_stack = (struct pt_regs *)__this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1;
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/linux-master/arch/x86/xen/ |
H A D | enlighten_pv.c | 935 static void xen_load_sp0(unsigned long sp0) argument 940 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0); 942 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0);
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