Searched refs:sja1105_xfer_u32 (Results 1 - 6 of 6) sorted by relevance

/linux-master/drivers/net/dsa/sja1105/
H A Dsja1105_mdio.c28 rc = sja1105_xfer_u32(priv, SPI_READ, addr, &tmp, NULL);
49 return sja1105_xfer_u32(priv, SPI_WRITE, addr, &tmp, NULL);
83 rc = sja1105_xfer_u32(priv, SPI_WRITE,
89 rc = sja1105_xfer_u32(priv, SPI_READ, regs->pcs_base[phy] + offset,
124 rc = sja1105_xfer_u32(priv, SPI_WRITE,
132 return sja1105_xfer_u32(priv, SPI_WRITE, regs->pcs_base[phy] + offset,
162 rc = sja1105_xfer_u32(priv, SPI_READ, addr, &tmp, NULL);
180 rc = sja1105_xfer_u32(priv, SPI_WRITE, addr, &reg, NULL);
186 rc = sja1105_xfer_u32(priv, SPI_READ, addr, &tmp, NULL);
205 return sja1105_xfer_u32(pri
[all...]
H A Dsja1105_spi.c150 int sja1105_xfer_u32(const struct sja1105_private *priv, function
183 return sja1105_xfer_u32(priv, SPI_WRITE, regs->rgu, &cold_reset, NULL);
193 return sja1105_xfer_u32(priv, SPI_WRITE, regs->rgu, &cold_reset, NULL);
207 return sja1105_xfer_u32(priv, SPI_WRITE, regs->rgu, &switch_reset, NULL);
217 rc = sja1105_xfer_u32(priv, SPI_READ, regs->port_control,
227 return sja1105_xfer_u32(priv, SPI_WRITE, regs->port_control,
H A Dsja1105.h330 int sja1105_xfer_u32(const struct sja1105_private *priv,
H A Dsja1105_ptp.c624 rc = sja1105_xfer_u32(priv, SPI_WRITE, regs->ptpclkrate, &clkrate32,
784 rc = sja1105_xfer_u32(priv, SPI_WRITE, regs->ptppindur,
H A Dsja1105_tas.c615 return sja1105_xfer_u32(priv, SPI_WRITE, regs->ptpclkcorp,
H A Dsja1105_main.c3276 rc = sja1105_xfer_u32(priv, SPI_READ, regs->device_id, &device_id,

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