183998Sbrooks/* SPDX-License-Identifier: GPL-2.0 */ 283998Sbrooks/* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH 3139823Simp * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com> 4139823Simp */ 5139823Simp#ifndef _SJA1105_H 683998Sbrooks#define _SJA1105_H 783998Sbrooks 883998Sbrooks#include <linux/ptp_clock_kernel.h> 983998Sbrooks#include <linux/timecounter.h> 1083998Sbrooks#include <linux/dsa/sja1105.h> 1184000Sbrooks#include <linux/dsa/8021q.h> 1283998Sbrooks#include <net/dsa.h> 1384000Sbrooks#include <linux/mutex.h> 1483998Sbrooks#include "sja1105_static_config.h" 1584000Sbrooks 1683998Sbrooks#define SJA1105ET_FDB_BIN_SIZE 4 1784000Sbrooks/* The hardware value is in multiples of 10 ms. 1884000Sbrooks * The passed parameter is in multiples of 1 ms. 1983998Sbrooks */ 2083998Sbrooks#define SJA1105_AGEING_TIME_MS(ms) ((ms) / 10) 2183998Sbrooks#define SJA1105_NUM_L2_POLICERS SJA1110_MAX_L2_POLICING_COUNT 2283998Sbrooks 2383998Sbrooks/* Calculated assuming 1Gbps, where the clock has 125 MHz (8 ns period) 2483998Sbrooks * To avoid floating point operations, we'll multiply the degrees by 10 2583998Sbrooks * to get a "phase" and get 1 decimal point precision. 2683998Sbrooks */ 2783998Sbrooks#define SJA1105_RGMII_DELAY_PS_TO_PHASE(ps) \ 2883998Sbrooks (((ps) * 360) / 800) 2983998Sbrooks#define SJA1105_RGMII_DELAY_PHASE_TO_PS(phase) \ 3083998Sbrooks ((800 * (phase)) / 360) 3183998Sbrooks#define SJA1105_RGMII_DELAY_PHASE_TO_HW(phase) \ 3283998Sbrooks (((phase) - 738) / 9) 3383998Sbrooks#define SJA1105_RGMII_DELAY_PS_TO_HW(ps) \ 3483998Sbrooks SJA1105_RGMII_DELAY_PHASE_TO_HW(SJA1105_RGMII_DELAY_PS_TO_PHASE(ps)) 3583998Sbrooks 3683998Sbrooks/* Valid range in degrees is a value between 73.8 and 101.7 3783998Sbrooks * in 0.9 degree increments 3883998Sbrooks */ 3983998Sbrooks#define SJA1105_RGMII_DELAY_MIN_PS \ 4083998Sbrooks SJA1105_RGMII_DELAY_PHASE_TO_PS(738) 4183998Sbrooks#define SJA1105_RGMII_DELAY_MAX_PS \ 4283998Sbrooks SJA1105_RGMII_DELAY_PHASE_TO_PS(1017) 4383998Sbrooks 4483998Sbrookstypedef enum { 4583998Sbrooks SPI_READ = 0, 4683998Sbrooks SPI_WRITE = 1, 4783998Sbrooks} sja1105_spi_rw_mode_t; 4883998Sbrooks 4983998Sbrooks#include "sja1105_tas.h" 5083998Sbrooks#include "sja1105_ptp.h" 5183998Sbrooks 5283998Sbrooksenum sja1105_stats_area { 5383998Sbrooks MAC, 5483998Sbrooks HL1, 5583998Sbrooks HL2, 5683998Sbrooks ETHER, 5783998Sbrooks __MAX_SJA1105_STATS_AREA, 5883998Sbrooks}; 5983998Sbrooks 6083998Sbrooks/* Keeps the different addresses between E/T and P/Q/R/S */ 6183998Sbrooksstruct sja1105_regs { 6283998Sbrooks u64 device_id; 6383998Sbrooks u64 prod_id; 6483998Sbrooks u64 status; 6583998Sbrooks u64 port_control; 6683998Sbrooks u64 rgu; 6783998Sbrooks u64 vl_status; 6883998Sbrooks u64 config; 6983998Sbrooks u64 rmii_pll1; 7083998Sbrooks u64 ptppinst; 7183998Sbrooks u64 ptppindur; 7283998Sbrooks u64 ptp_control; 7383998Sbrooks u64 ptpclkval; 7483998Sbrooks u64 ptpclkrate; 7583998Sbrooks u64 ptpclkcorp; 7683998Sbrooks u64 ptpsyncts; 7783998Sbrooks u64 ptpschtm; 7883998Sbrooks u64 ptpegr_ts[SJA1105_MAX_NUM_PORTS]; 7983998Sbrooks u64 pad_mii_tx[SJA1105_MAX_NUM_PORTS]; 80181803Sbz u64 pad_mii_rx[SJA1105_MAX_NUM_PORTS]; 8183998Sbrooks u64 pad_mii_id[SJA1105_MAX_NUM_PORTS]; 8283998Sbrooks u64 cgu_idiv[SJA1105_MAX_NUM_PORTS]; 8383998Sbrooks u64 mii_tx_clk[SJA1105_MAX_NUM_PORTS]; 8483998Sbrooks u64 mii_rx_clk[SJA1105_MAX_NUM_PORTS]; 8583998Sbrooks u64 mii_ext_tx_clk[SJA1105_MAX_NUM_PORTS]; 8683998Sbrooks u64 mii_ext_rx_clk[SJA1105_MAX_NUM_PORTS]; 8783998Sbrooks u64 rgmii_tx_clk[SJA1105_MAX_NUM_PORTS]; 8883998Sbrooks u64 rmii_ref_clk[SJA1105_MAX_NUM_PORTS]; 8983998Sbrooks u64 rmii_ext_tx_clk[SJA1105_MAX_NUM_PORTS]; 9083998Sbrooks u64 stats[__MAX_SJA1105_STATS_AREA][SJA1105_MAX_NUM_PORTS]; 9183998Sbrooks u64 mdio_100base_tx; 9283998Sbrooks u64 mdio_100base_t1; 93147256Sbrooks u64 pcs_base[SJA1105_MAX_NUM_PORTS]; 94147256Sbrooks}; 9583998Sbrooks 9683998Sbrooksstruct sja1105_mdio_private { 9783998Sbrooks struct sja1105_private *priv; 9883998Sbrooks}; 9983998Sbrooks 10083998Sbrooksenum { 10183998Sbrooks SJA1105_SPEED_AUTO, 10283998Sbrooks SJA1105_SPEED_10MBPS, 10383998Sbrooks SJA1105_SPEED_100MBPS, 10483998Sbrooks SJA1105_SPEED_1000MBPS, 10583998Sbrooks SJA1105_SPEED_2500MBPS, 10683998Sbrooks SJA1105_SPEED_MAX, 10783998Sbrooks}; 10883998Sbrooks 10983998Sbrooksenum sja1105_internal_phy_t { 11083998Sbrooks SJA1105_NO_PHY = 0, 11183998Sbrooks SJA1105_PHY_BASE_TX, 11283998Sbrooks SJA1105_PHY_BASE_T1, 113131155Sjulian}; 11483998Sbrooks 11583998Sbrooksstruct sja1105_info { 11683998Sbrooks u64 device_id; 11783998Sbrooks /* Needed for distinction between P and R, and between Q and S 11883998Sbrooks * (since the parts with/without SGMII share the same 11983998Sbrooks * switch core and device_id) 12083998Sbrooks */ 12183998Sbrooks u64 part_no; 12283998Sbrooks /* E/T and P/Q/R/S have partial timestamps of different sizes. 12383998Sbrooks * They must be reconstructed on both families anyway to get the full 12483998Sbrooks * 64-bit values back. 12583998Sbrooks */ 12683998Sbrooks int ptp_ts_bits; 12783998Sbrooks /* Also SPI commands are of different sizes to retrieve 12883998Sbrooks * the egress timestamps. 12983998Sbrooks */ 13083998Sbrooks int ptpegr_ts_bytes; 13183998Sbrooks int num_cbs_shapers; 13283998Sbrooks int max_frame_mem; 13383998Sbrooks int num_ports; 13483998Sbrooks bool multiple_cascade_ports; 13583998Sbrooks /* Every {port, TXQ} has its own CBS shaper */ 13683998Sbrooks bool fixed_cbs_mapping; 13783998Sbrooks enum dsa_tag_protocol tag_proto; 13883998Sbrooks const struct sja1105_dynamic_table_ops *dyn_ops; 13983998Sbrooks const struct sja1105_table_ops *static_ops; 14083998Sbrooks const struct sja1105_regs *regs; 14183998Sbrooks bool can_limit_mcast_flood; 14283998Sbrooks int (*reset_cmd)(struct dsa_switch *ds); 14383998Sbrooks int (*setup_rgmii_delay)(const void *ctx, int port); 14483998Sbrooks /* Prototypes from include/net/dsa.h */ 145129823Sjulian int (*fdb_add_cmd)(struct dsa_switch *ds, int port, 146129823Sjulian const unsigned char *addr, u16 vid); 147129823Sjulian int (*fdb_del_cmd)(struct dsa_switch *ds, int port, 148129823Sjulian const unsigned char *addr, u16 vid); 149129823Sjulian void (*ptp_cmd_packing)(u8 *buf, struct sja1105_ptp_cmd *cmd, 150129823Sjulian enum packing_op op); 151129823Sjulian bool (*rxtstamp)(struct dsa_switch *ds, int port, struct sk_buff *skb); 152129823Sjulian void (*txtstamp)(struct dsa_switch *ds, int port, struct sk_buff *skb); 153129823Sjulian int (*clocking_setup)(struct sja1105_private *priv); 154129823Sjulian int (*pcs_mdio_read_c45)(struct mii_bus *bus, int phy, int mmd, 155129823Sjulian int reg); 15683998Sbrooks int (*pcs_mdio_write_c45)(struct mii_bus *bus, int phy, int mmd, 15783998Sbrooks int reg, u16 val); 15883998Sbrooks int (*disable_microcontroller)(struct sja1105_private *priv); 15983998Sbrooks const char *name; 16083998Sbrooks bool supports_mii[SJA1105_MAX_NUM_PORTS]; 16183998Sbrooks bool supports_rmii[SJA1105_MAX_NUM_PORTS]; 16283998Sbrooks bool supports_rgmii[SJA1105_MAX_NUM_PORTS]; 16383998Sbrooks bool supports_sgmii[SJA1105_MAX_NUM_PORTS]; 16483998Sbrooks bool supports_2500basex[SJA1105_MAX_NUM_PORTS]; 16583998Sbrooks enum sja1105_internal_phy_t internal_phy[SJA1105_MAX_NUM_PORTS]; 16683998Sbrooks const u64 port_speed[SJA1105_SPEED_MAX]; 16783998Sbrooks}; 16883998Sbrooks 16983998Sbrooksenum sja1105_key_type { 17083998Sbrooks SJA1105_KEY_BCAST, 17183998Sbrooks SJA1105_KEY_TC, 17283998Sbrooks SJA1105_KEY_VLAN_UNAWARE_VL, 17383998Sbrooks SJA1105_KEY_VLAN_AWARE_VL, 17483998Sbrooks}; 17583998Sbrooks 17683998Sbrooksstruct sja1105_key { 17783998Sbrooks enum sja1105_key_type type; 17883998Sbrooks 17983998Sbrooks union { 18083998Sbrooks /* SJA1105_KEY_TC */ 18183998Sbrooks struct { 18283998Sbrooks int pcp; 18383998Sbrooks } tc; 18483998Sbrooks 18583998Sbrooks /* SJA1105_KEY_VLAN_UNAWARE_VL */ 18683998Sbrooks /* SJA1105_KEY_VLAN_AWARE_VL */ 18783998Sbrooks struct { 18883998Sbrooks u64 dmac; 18983998Sbrooks u16 vid; 19083998Sbrooks u16 pcp; 19183998Sbrooks } vl; 19283998Sbrooks }; 19383998Sbrooks}; 19483998Sbrooks 19583998Sbrooksenum sja1105_rule_type { 19683998Sbrooks SJA1105_RULE_BCAST_POLICER, 19783998Sbrooks SJA1105_RULE_TC_POLICER, 19883998Sbrooks SJA1105_RULE_VL, 19983998Sbrooks}; 20083998Sbrooks 20183998Sbrooksenum sja1105_vl_type { 20283998Sbrooks SJA1105_VL_NONCRITICAL, 20383998Sbrooks SJA1105_VL_RATE_CONSTRAINED, 20483998Sbrooks SJA1105_VL_TIME_TRIGGERED, 20583998Sbrooks}; 20683998Sbrooks 20783998Sbrooksstruct sja1105_rule { 20883998Sbrooks struct list_head list; 20983998Sbrooks unsigned long cookie; 21083998Sbrooks unsigned long port_mask; 21183998Sbrooks struct sja1105_key key; 21283998Sbrooks enum sja1105_rule_type type; 21383998Sbrooks 21483998Sbrooks /* Action */ 21583998Sbrooks union { 21683998Sbrooks /* SJA1105_RULE_BCAST_POLICER */ 21783998Sbrooks struct { 21883998Sbrooks int sharindx; 21983998Sbrooks } bcast_pol; 22083998Sbrooks 22183998Sbrooks /* SJA1105_RULE_TC_POLICER */ 22283998Sbrooks struct { 22383998Sbrooks int sharindx; 22483998Sbrooks } tc_pol; 22583998Sbrooks 22683998Sbrooks /* SJA1105_RULE_VL */ 22783998Sbrooks struct { 22883998Sbrooks enum sja1105_vl_type type; 22983998Sbrooks unsigned long destports; 23083998Sbrooks int sharindx; 23183998Sbrooks int maxlen; 23283998Sbrooks int ipv; 23383998Sbrooks u64 base_time; 23483998Sbrooks u64 cycle_time; 23583998Sbrooks int num_entries; 23687599Sobrien struct action_gate_entry *entries; 23783998Sbrooks struct flow_stats stats; 23883998Sbrooks } vl; 239121816Sbrooks }; 24083998Sbrooks}; 24183998Sbrooks 24283998Sbrooksstruct sja1105_flow_block { 24383998Sbrooks struct list_head rules; 244184205Sdes bool l2_policer_used[SJA1105_NUM_L2_POLICERS]; 24583998Sbrooks int num_virtual_links; 24683998Sbrooks}; 247121816Sbrooks 24883998Sbrooksstruct sja1105_private { 24983998Sbrooks struct sja1105_static_config static_config; 25083998Sbrooks int rgmii_rx_delay_ps[SJA1105_MAX_NUM_PORTS]; 25183998Sbrooks int rgmii_tx_delay_ps[SJA1105_MAX_NUM_PORTS]; 25283998Sbrooks phy_interface_t phy_mode[SJA1105_MAX_NUM_PORTS]; 253132780Skan bool fixed_link[SJA1105_MAX_NUM_PORTS]; 25483998Sbrooks unsigned long ucast_egress_floods; 25583998Sbrooks unsigned long bcast_egress_floods; 256121816Sbrooks unsigned long hwts_tx_en; 25783998Sbrooks unsigned long hwts_rx_en; 258121816Sbrooks const struct sja1105_info *info; 25983998Sbrooks size_t max_xfer_len; 26083998Sbrooks struct spi_device *spidev; 26183998Sbrooks struct dsa_switch *ds; 26283998Sbrooks u16 bridge_pvid[SJA1105_MAX_NUM_PORTS]; 26384060Sbrooks u16 tag_8021q_pvid[SJA1105_MAX_NUM_PORTS]; 26483998Sbrooks struct sja1105_flow_block flow_block; 26583998Sbrooks /* Serializes transmission of management frames so that 26683998Sbrooks * the switch doesn't confuse them with one another. 26783998Sbrooks */ 26883998Sbrooks struct mutex mgmt_lock; 26983998Sbrooks /* Serializes accesses to the FDB */ 270126203Sphk struct mutex fdb_lock; 27183998Sbrooks /* PTP two-step TX timestamp ID, and its serialization lock */ 27283998Sbrooks spinlock_t ts_id_lock; 27383998Sbrooks u8 ts_id; 274126196Scperciva /* Serializes access to the dynamic config interface */ 27583998Sbrooks struct mutex dynamic_config_lock; 27683998Sbrooks struct devlink_region **regions; 27783998Sbrooks struct sja1105_cbs_entry *cbs; 27883998Sbrooks struct mii_bus *mdio_base_t1; 27983998Sbrooks struct mii_bus *mdio_base_tx; 28083998Sbrooks struct mii_bus *mdio_pcs; 281132780Skan struct dw_xpcs *xpcs[SJA1105_MAX_NUM_PORTS]; 28283998Sbrooks struct sja1105_ptp_data ptp_data; 28383998Sbrooks struct sja1105_tas_data tas_data; 28483998Sbrooks}; 28583998Sbrooks 28683998Sbrooks#include "sja1105_dynamic_config.h" 28784060Sbrooks 28883998Sbrooksstruct sja1105_spi_message { 28983998Sbrooks u64 access; 29083998Sbrooks u64 read_count; 29183998Sbrooks u64 address; 29283998Sbrooks}; 29383998Sbrooks 29483998Sbrooks/* From sja1105_main.c */ 29583998Sbrooksenum sja1105_reset_reason { 29683998Sbrooks SJA1105_VLAN_FILTERING = 0, 29783998Sbrooks SJA1105_AGEING_TIME, 29883998Sbrooks SJA1105_SCHEDULING, 29983998Sbrooks SJA1105_BEST_EFFORT_POLICING, 30083998Sbrooks SJA1105_VIRTUAL_LINKS, 30183998Sbrooks}; 30283998Sbrooks 30383998Sbrooksint sja1105_static_config_reload(struct sja1105_private *priv, 30483998Sbrooks enum sja1105_reset_reason reason); 30583998Sbrooksint sja1105_vlan_filtering(struct dsa_switch *ds, int port, bool enabled, 30683998Sbrooks struct netlink_ext_ack *extack); 30783998Sbrooksvoid sja1105_frame_memory_partitioning(struct sja1105_private *priv); 30883998Sbrooks 30983998Sbrooks/* From sja1105_mdio.c */ 31083998Sbrooksint sja1105_mdiobus_register(struct dsa_switch *ds); 31183998Sbrooksvoid sja1105_mdiobus_unregister(struct dsa_switch *ds); 31283998Sbrooksint sja1105_pcs_mdio_read_c45(struct mii_bus *bus, int phy, int mmd, int reg); 313111119Simpint sja1105_pcs_mdio_write_c45(struct mii_bus *bus, int phy, int mmd, int reg, 31483998Sbrooks u16 val); 31583998Sbrooksint sja1110_pcs_mdio_read_c45(struct mii_bus *bus, int phy, int mmd, int reg); 31683998Sbrooksint sja1110_pcs_mdio_write_c45(struct mii_bus *bus, int phy, int mmd, int reg, 31783998Sbrooks u16 val); 31883998Sbrooks 31983998Sbrooks/* From sja1105_devlink.c */ 32083998Sbrooksint sja1105_devlink_setup(struct dsa_switch *ds); 32183998Sbrooksvoid sja1105_devlink_teardown(struct dsa_switch *ds); 32283998Sbrooksint sja1105_devlink_info_get(struct dsa_switch *ds, 32383998Sbrooks struct devlink_info_req *req, 32483998Sbrooks struct netlink_ext_ack *extack); 32583998Sbrooks 32683998Sbrooks/* From sja1105_spi.c */ 32783998Sbrooksint sja1105_xfer_buf(const struct sja1105_private *priv, 32883998Sbrooks sja1105_spi_rw_mode_t rw, u64 reg_addr, 32983998Sbrooks u8 *buf, size_t len); 33083998Sbrooksint sja1105_xfer_u32(const struct sja1105_private *priv, 33183998Sbrooks sja1105_spi_rw_mode_t rw, u64 reg_addr, u32 *value, 33283998Sbrooks struct ptp_system_timestamp *ptp_sts); 33383998Sbrooksint sja1105_xfer_u64(const struct sja1105_private *priv, 33483998Sbrooks sja1105_spi_rw_mode_t rw, u64 reg_addr, u64 *value, 33583998Sbrooks struct ptp_system_timestamp *ptp_sts); 33683998Sbrooksint static_config_buf_prepare_for_upload(struct sja1105_private *priv, 33783998Sbrooks void *config_buf, int buf_len); 33883998Sbrooksint sja1105_static_config_upload(struct sja1105_private *priv); 33983998Sbrooksint sja1105_inhibit_tx(const struct sja1105_private *priv, 34083998Sbrooks unsigned long port_bitmap, bool tx_inhibited); 34183998Sbrooks 34283998Sbrooksextern const struct sja1105_info sja1105e_info; 34383998Sbrooksextern const struct sja1105_info sja1105t_info; 34483998Sbrooksextern const struct sja1105_info sja1105p_info; 34583998Sbrooksextern const struct sja1105_info sja1105q_info; 34683998Sbrooksextern const struct sja1105_info sja1105r_info; 34783998Sbrooksextern const struct sja1105_info sja1105s_info; 34883998Sbrooksextern const struct sja1105_info sja1110a_info; 34983998Sbrooksextern const struct sja1105_info sja1110b_info; 35083998Sbrooksextern const struct sja1105_info sja1110c_info; 35183998Sbrooksextern const struct sja1105_info sja1110d_info; 35283998Sbrooks 35383998Sbrooks/* From sja1105_clocking.c */ 35483998Sbrooks 35583998Sbrookstypedef enum { 35683998Sbrooks XMII_MAC = 0, 35783998Sbrooks XMII_PHY = 1, 35883998Sbrooks} sja1105_mii_role_t; 35983998Sbrooks 36083998Sbrookstypedef enum { 36183998Sbrooks XMII_MODE_MII = 0, 36283998Sbrooks XMII_MODE_RMII = 1, 36383998Sbrooks XMII_MODE_RGMII = 2, 36483998Sbrooks XMII_MODE_SGMII = 3, 36583998Sbrooks} sja1105_phy_interface_t; 36683998Sbrooks 36783998Sbrooksint sja1105pqrs_setup_rgmii_delay(const void *ctx, int port); 36883998Sbrooksint sja1110_setup_rgmii_delay(const void *ctx, int port); 36983998Sbrooksint sja1105_clocking_setup_port(struct sja1105_private *priv, int port); 37083998Sbrooksint sja1105_clocking_setup(struct sja1105_private *priv); 37183998Sbrooksint sja1110_disable_microcontroller(struct sja1105_private *priv); 37283998Sbrooks 37383998Sbrooks/* From sja1105_ethtool.c */ 37483998Sbrooksvoid sja1105_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data); 37583998Sbrooksvoid sja1105_get_strings(struct dsa_switch *ds, int port, 37683998Sbrooks u32 stringset, u8 *data); 37783998Sbrooksint sja1105_get_sset_count(struct dsa_switch *ds, int port, int sset); 37883998Sbrooks 37983998Sbrooks/* From sja1105_dynamic_config.c */ 38083998Sbrooksint sja1105_dynamic_config_read(struct sja1105_private *priv, 38183998Sbrooks enum sja1105_blk_idx blk_idx, 38283998Sbrooks int index, void *entry); 38383998Sbrooksint sja1105_dynamic_config_write(struct sja1105_private *priv, 38483998Sbrooks enum sja1105_blk_idx blk_idx, 38583998Sbrooks int index, void *entry, bool keep); 38683998Sbrooks 38783998Sbrooksenum sja1105_iotag { 38883998Sbrooks SJA1105_C_TAG = 0, /* Inner VLAN header */ 38983998Sbrooks SJA1105_S_TAG = 1, /* Outer VLAN header */ 39083998Sbrooks}; 39183998Sbrooks 39283998Sbrooksenum sja1110_vlan_type { 39383998Sbrooks SJA1110_VLAN_INVALID = 0, 39483998Sbrooks SJA1110_VLAN_C_TAG = 1, /* Single inner VLAN tag */ 39583998Sbrooks SJA1110_VLAN_S_TAG = 2, /* Single outer VLAN tag */ 39683998Sbrooks SJA1110_VLAN_D_TAG = 3, /* Double tagged, use outer tag for lookup */ 39783998Sbrooks}; 39883998Sbrooks 39983998Sbrooksenum sja1110_shaper_type { 40083998Sbrooks SJA1110_LEAKY_BUCKET_SHAPER = 0, 40183998Sbrooks SJA1110_CBS_SHAPER = 1, 40283998Sbrooks}; 40383998Sbrooks 40483998Sbrooksu8 sja1105et_fdb_hash(struct sja1105_private *priv, const u8 *addr, u16 vid); 40583998Sbrooksint sja1105et_fdb_add(struct dsa_switch *ds, int port, 40683998Sbrooks const unsigned char *addr, u16 vid); 40783998Sbrooksint sja1105et_fdb_del(struct dsa_switch *ds, int port, 40883998Sbrooks const unsigned char *addr, u16 vid); 409141195Sruint sja1105pqrs_fdb_add(struct dsa_switch *ds, int port, 41083998Sbrooks const unsigned char *addr, u16 vid); 41183998Sbrooksint sja1105pqrs_fdb_del(struct dsa_switch *ds, int port, 41283998Sbrooks const unsigned char *addr, u16 vid); 41383998Sbrooks 414141195Sru/* From sja1105_flower.c */ 41583998Sbrooksint sja1105_cls_flower_del(struct dsa_switch *ds, int port, 41683998Sbrooks struct flow_cls_offload *cls, bool ingress); 41783998Sbrooksint sja1105_cls_flower_add(struct dsa_switch *ds, int port, 41883998Sbrooks struct flow_cls_offload *cls, bool ingress); 41983998Sbrooksint sja1105_cls_flower_stats(struct dsa_switch *ds, int port, 42083998Sbrooks struct flow_cls_offload *cls, bool ingress); 42183998Sbrooksvoid sja1105_flower_setup(struct dsa_switch *ds); 42283998Sbrooksvoid sja1105_flower_teardown(struct dsa_switch *ds); 42383998Sbrooksstruct sja1105_rule *sja1105_rule_find(struct sja1105_private *priv, 42483998Sbrooks unsigned long cookie); 42583998Sbrooks 42683998Sbrooks#endif 42783998Sbrooks