Searched refs:set_rate_and_parent (Results 1 - 10 of 10) sorted by relevance

/linux-master/drivers/clk/ti/
H A Ddpll.c31 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
56 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
69 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
110 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
122 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
134 .set_rate_and_parent = &omap3_dpll4_set_rate_and_parent,
/linux-master/drivers/clk/qcom/
H A Dclk-rcg2.c489 .set_rate_and_parent = clk_rcg2_set_rate_and_parent,
502 .set_rate_and_parent = clk_rcg2_set_floor_rate_and_parent,
637 .set_rate_and_parent = clk_edp_pixel_set_rate_and_parent,
695 .set_rate_and_parent = clk_byte_set_rate_and_parent,
765 .set_rate_and_parent = clk_byte2_set_rate_and_parent,
856 .set_rate_and_parent = clk_pixel_set_rate_and_parent,
970 .set_rate_and_parent = clk_gfx3d_set_rate_and_parent,
1149 .set_rate_and_parent = clk_rcg2_shared_set_rate_and_parent,
1411 .set_rate_and_parent = clk_rcg2_dp_set_rate_and_parent,
H A Dclk-regmap-mux-div.c227 .set_rate_and_parent = mux_div_set_rate_and_parent,
H A Dclk-rcg.c862 .set_rate_and_parent = clk_rcg_bypass2_set_rate_and_parent,
874 .set_rate_and_parent = clk_rcg_pixel_set_rate_and_parent,
886 .set_rate_and_parent = clk_rcg_esc_set_rate_and_parent,
910 .set_rate_and_parent = clk_dyn_rcg_set_rate_and_parent,
/linux-master/drivers/clk/tegra/
H A Dclk-tegra20-emc.c220 .set_rate_and_parent = emc_set_rate_and_parent,
/linux-master/drivers/clk/mmp/
H A Dclk-mix.c431 .set_rate_and_parent = mmp_clk_mix_set_rate_and_parent,
/linux-master/drivers/clk/
H A Dclk-composite.c311 clk_composite_ops->set_rate_and_parent =
H A Dclk.c2439 if (core->ops->set_rate_and_parent) {
2441 core->ops->set_rate_and_parent(core->hw, core->new_rate,
3960 if (core->ops->set_rate_and_parent &&
/linux-master/drivers/clk/microchip/
H A Dclk-core.c553 .set_rate_and_parent = roclk_set_rate_and_parent,
/linux-master/include/linux/
H A Dclk-provider.h170 * @set_rate_and_parent: Change the rate and the parent of this clock. The
174 * for most .set_rate_and_parent implementation. The fourth
255 int (*set_rate_and_parent)(struct clk_hw *hw, member in struct:clk_ops

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