Searched refs:seq_state (Results 1 - 8 of 8) sorted by relevance

/linux-master/arch/alpha/kernel/
H A Dcore_cia.c944 const char *seq_state;
979 seq_state = "Idle";
982 seq_state = "DMA READ or DMA WRITE";
985 seq_state = "READ MISS (or READ MISS MODIFY) with victim";
988 seq_state = "READ MISS (or READ MISS MODIFY) with no victim";
991 seq_state = "Refresh";
994 seq_state = "Idle, waiting for DMA pending read";
997 seq_state = "Idle, ras precharge";
1000 seq_state = "Unknown";
1030 printk(KERN_CRIT " Memory sequencer state: %s\n", seq_state);
941 const char *seq_state; local
[all...]
/linux-master/drivers/spi/
H A Dspi-fsi.c368 u64 seq_state; local
384 seq_state = status & SPI_FSI_STATUS_SEQ_STATE;
403 } while (seq_state && (seq_state != SPI_FSI_STATUS_SEQ_STATE_IDLE));
/linux-master/drivers/hwtracing/coresight/
H A Dcoresight-etm4x-cfg.c69 CHECKREG(TRCSEQSTR, seq_state);
H A Dcoresight-etm4x.h817 * @seq_state: Set, or read the sequencer state.
861 u32 seq_state; member in struct:etmv4_config
940 u32 seq_state; member in struct:etmv4_save_state
H A Dcoresight-etm4x-sysfs.c227 config->seq_state = 0x0;
1420 val = config->seq_state;
1437 config->seq_state = val;
1440 static DEVICE_ATTR_RW(seq_state);
H A Dcoresight-etm4x-core.c459 etm4x_relaxed_write32(csa, config->seq_state, TRCSEQSTR);
/linux-master/arch/mips/kernel/
H A Dsmp-cps.c304 u32 stat, seq_state; local
343 seq_state = stat & CPC_Cx_STAT_CONF_SEQSTATE;
344 seq_state >>= __ffs(CPC_Cx_STAT_CONF_SEQSTATE);
347 if (seq_state == CPC_Cx_STAT_CONF_SEQSTATE_U6)
/linux-master/drivers/net/ieee802154/
H A Dmcr20a.c885 u8 seq_state = lp->irq_data[DAR_IRQ_STS1] & DAR_PHY_CTRL1_XCVSEQ_MASK; local
894 switch (seq_state) {

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