Searched refs:seq (Results 1 - 25 of 70) sorted by relevance

123

/u-boot/drivers/ddr/altera/
H A Dsequencer.c57 ((non_skip_value) & seq->skip_delay_mask)
74 static void set_failing_group_stage(struct socfpga_sdrseq *seq, argument
81 if (seq->gbl.error_stage == CAL_STAGE_NIL) {
82 seq->gbl.error_substage = substage;
83 seq->gbl.error_stage = stage;
84 seq->gbl.error_group = group;
109 static void phy_mgr_initialize(struct socfpga_sdrseq *seq) argument
131 if ((seq->dyn_calib_steps & CALIB_SKIP_ALL) == CALIB_SKIP_ALL)
134 ratio = seq->rwcfg->mem_dq_per_read_dqs /
135 seq
151 set_rank_and_odt_mask(struct socfpga_sdrseq *seq, const u32 rank, const u32 odt_mode) argument
324 scc_mgr_set_dqs_io_in_delay(struct socfpga_sdrseq *seq, u32 delay) argument
331 scc_mgr_set_dm_in_delay(struct socfpga_sdrseq *seq, u32 dm, u32 delay) argument
344 scc_mgr_set_dqs_out1_delay(struct socfpga_sdrseq *seq, u32 delay) argument
351 scc_mgr_set_dm_out1_delay(struct socfpga_sdrseq *seq, u32 dm, u32 delay) argument
393 scc_mgr_set_all_ranks(struct socfpga_sdrseq *seq, const u32 off, const u32 grp, const u32 val, const int update) argument
410 scc_mgr_set_dqs_en_phase_all_ranks(struct socfpga_sdrseq *seq, u32 read_group, u32 phase) argument
425 scc_mgr_set_dqdqs_output_phase_all_ranks(struct socfpga_sdrseq *seq, u32 write_group, u32 phase) argument
440 scc_mgr_set_dqs_en_delay_all_ranks(struct socfpga_sdrseq *seq, u32 read_group, u32 delay) argument
462 scc_mgr_set_oct_out1_delay(struct socfpga_sdrseq *seq, const u32 write_group, const u32 delay) argument
514 scc_mgr_zero_all(struct socfpga_sdrseq *seq) argument
578 scc_mgr_load_dqs_for_write_group(struct socfpga_sdrseq *seq, const u32 write_group) argument
601 scc_mgr_zero_group(struct socfpga_sdrseq *seq, const u32 write_group, const int out_only) argument
650 scc_mgr_apply_group_dq_in_delay(struct socfpga_sdrseq *seq, u32 group_bgn, u32 delay) argument
669 scc_mgr_apply_group_dq_out1_delay(struct socfpga_sdrseq *seq, const u32 delay) argument
681 scc_mgr_apply_group_dm_out1_delay(struct socfpga_sdrseq *seq, u32 delay1) argument
694 scc_mgr_apply_group_dqs_io_and_oct_out1(struct socfpga_sdrseq *seq, u32 write_group, u32 delay) argument
712 scc_mgr_apply_group_all_out_delay_add(struct socfpga_sdrseq *seq, const u32 write_group, const u32 delay) argument
764 scc_mgr_apply_group_all_out_delay_add_all_ranks(struct socfpga_sdrseq *seq, const u32 write_group, const u32 delay) argument
783 set_jump_as_return(struct socfpga_sdrseq *seq) argument
800 delay_for_n_mem_clocks(struct socfpga_sdrseq *seq, const u32 clocks) argument
874 delay_for_n_ns(struct socfpga_sdrseq *seq, const u32 ns) argument
889 rw_mgr_mem_init_load_regs(struct socfpga_sdrseq *seq, u32 cntr0, u32 cntr1, u32 cntr2, u32 jump) argument
918 rw_mgr_mem_load_user_ddr2(struct socfpga_sdrseq *seq, const int handoff) argument
965 rw_mgr_mem_load_user_ddr3(struct socfpga_sdrseq *seq, const u32 fin1, const u32 fin2, const int precharge) argument
1029 rw_mgr_mem_load_user(struct socfpga_sdrseq *seq, const u32 fin1, const u32 fin2, const int precharge) argument
1045 rw_mgr_mem_initialize(struct socfpga_sdrseq *seq) argument
1129 rw_mgr_mem_handoff(struct socfpga_sdrseq *seq) argument
1148 rw_mgr_mem_calibrate_write_test_issue(struct socfpga_sdrseq *seq, u32 group, u32 test_dm) argument
1293 rw_mgr_mem_calibrate_write_test(struct socfpga_sdrseq *seq, const u32 rank_bgn, const u32 write_group, const u32 use_dm, const u32 all_correct, u32 *bit_chk, const u32 all_ranks) argument
1360 rw_mgr_mem_calibrate_read_test_patterns(struct socfpga_sdrseq *seq, const u32 rank_bgn, const u32 group, const u32 all_ranks) argument
1436 rw_mgr_mem_calibrate_read_load_patterns(struct socfpga_sdrseq *seq, const u32 rank_bgn, const int all_ranks) argument
1495 rw_mgr_mem_calibrate_read_test(struct socfpga_sdrseq *seq, const u32 rank_bgn, const u32 group, const u32 num_tries, const u32 all_correct, u32 *bit_chk, const u32 all_groups, const u32 all_ranks) argument
1611 rw_mgr_mem_calibrate_read_test_all_ranks(struct socfpga_sdrseq *seq, const u32 grp, const u32 num_tries, const u32 all_correct, const u32 all_groups) argument
1639 rw_mgr_decr_vfifo(struct socfpga_sdrseq *seq, const u32 grp) argument
1653 find_vfifo_failing_read(struct socfpga_sdrseq *seq, const u32 grp) argument
1690 sdr_find_phase_delay(struct socfpga_sdrseq *seq, int working, int delay, const u32 grp, u32 *work, const u32 work_inc, u32 *pd) argument
1728 sdr_find_phase(struct socfpga_sdrseq *seq, int working, const u32 grp, u32 *work, u32 *i, u32 *p) argument
1764 sdr_working_phase(struct socfpga_sdrseq *seq, const u32 grp, u32 *work_bgn, u32 *d, u32 *p, u32 *i) argument
1796 sdr_backup_phase(struct socfpga_sdrseq *seq, const u32 grp, u32 *work_bgn, u32 *p) argument
1845 sdr_nonworking_phase(struct socfpga_sdrseq *seq, const u32 grp, u32 *work_end, u32 *p, u32 *i) argument
1876 sdr_find_window_center(struct socfpga_sdrseq *seq, const u32 grp, const u32 work_bgn, const u32 work_end) argument
1949 rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(struct socfpga_sdrseq *seq, const u32 grp) argument
2121 search_stop_check(struct socfpga_sdrseq *seq, const int write, const int d, const int rank_bgn, const u32 write_group, const u32 read_group, u32 *bit_chk, u32 *sticky_bit_chk, const u32 use_read_test) argument
2178 search_left_edge(struct socfpga_sdrseq *seq, const int write, const int rank_bgn, const u32 write_group, const u32 read_group, const u32 test_bgn, u32 *sticky_bit_chk, int *left_edge, int *right_edge, const u32 use_read_test) argument
2289 search_right_edge(struct socfpga_sdrseq *seq, const int write, const int rank_bgn, const u32 write_group, const u32 read_group, const int start_dqs, const int start_dqs_en, u32 *sticky_bit_chk, int *left_edge, int *right_edge, const u32 use_read_test) argument
2417 get_window_mid_index(struct socfpga_sdrseq *seq, const int write, int *left_edge, int *right_edge, int *mid_min) argument
2465 center_dq_windows(struct socfpga_sdrseq *seq, const int write, int *left_edge, int *right_edge, const int mid_min, const int orig_mid_min, const int min_index, const int test_bgn, int *dq_margin, int *dqs_margin) argument
2541 rw_mgr_mem_calibrate_vfifo_center(struct socfpga_sdrseq *seq, const u32 rank_bgn, const u32 rw_group, const u32 test_bgn, const int use_read_test, const int update_fom) argument
2689 rw_mgr_mem_calibrate_guaranteed_write(struct socfpga_sdrseq *seq, const u32 rw_group, const u32 phase) argument
2732 rw_mgr_mem_calibrate_dqs_enable_calibration(struct socfpga_sdrseq *seq, const u32 rw_group, const u32 test_bgn) argument
2796 rw_mgr_mem_calibrate_dq_dqs_centering(struct socfpga_sdrseq *seq, const u32 rw_group, const u32 test_bgn, const int use_read_test, const int update_fom) argument
2844 rw_mgr_mem_calibrate_vfifo(struct socfpga_sdrseq *seq, const u32 rw_group, const u32 test_bgn) argument
2944 rw_mgr_mem_calibrate_vfifo_end(struct socfpga_sdrseq *seq, const u32 rw_group, const u32 test_bgn) argument
2975 rw_mgr_mem_calibrate_lfifo(struct socfpga_sdrseq *seq) argument
3043 search_window(struct socfpga_sdrseq *seq, const int search_dm, const u32 rank_bgn, const u32 write_group, int *bgn_curr, int *end_curr, int *bgn_best, int *end_best, int *win_best, int new_dqs) argument
3125 rw_mgr_mem_calibrate_writes_center(struct socfpga_sdrseq *seq, const u32 rank_bgn, const u32 write_group, const u32 test_bgn) argument
3288 rw_mgr_mem_calibrate_writes(struct socfpga_sdrseq *seq, const u32 rank_bgn, const u32 group, const u32 test_bgn) argument
3315 mem_precharge_and_activate(struct socfpga_sdrseq *seq) argument
3347 mem_init_latency(struct socfpga_sdrseq *seq) argument
3388 mem_skip_calibrate(struct socfpga_sdrseq *seq) argument
3479 mem_calibrate(struct socfpga_sdrseq *seq) argument
3666 run_mem_calibrate(struct socfpga_sdrseq *seq) argument
3712 debug_mem_calibrate(struct socfpga_sdrseq *seq, int pass) argument
3783 initialize_reg_file(struct socfpga_sdrseq *seq) argument
3851 initialize_tracking(struct socfpga_sdrseq *seq) argument
3903 struct socfpga_sdrseq seq; local
[all...]
H A Dsequencer.h9 #define RW_MGR_NUM_DM_PER_WRITE_GROUP (seq->rwcfg->mem_data_mask_width \
10 / seq->rwcfg->mem_if_write_dqs_width)
12 seq->rwcfg->true_mem_data_mask_width \
13 / seq->rwcfg->mem_if_write_dqs_width)
15 #define RW_MGR_NUM_DQS_PER_WRITE_GROUP (seq->rwcfg->mem_if_read_dqs_width \
16 / seq->rwcfg->mem_if_write_dqs_width)
17 #define NUM_RANKS_PER_SHADOW_REG (seq->rwcfg->mem_number_of_ranks \
/u-boot/drivers/tpm/
H A Dsandbox_common.c43 enum sandbox_nv_space seq, u8 *buf, int data_ofs,
46 const struct nvdata_state *nvd = &nvdata[seq];
57 enum sandbox_nv_space seq, const u8 *buf, int data_ofs,
60 struct nvdata_state *nvd = &nvdata[seq];
65 memcpy(&nvdata[seq].data, buf + data_ofs, length);
69 enum sandbox_nv_space seq, int length)
71 struct nvdata_state *nvd = &nvdata[seq];
42 sb_tpm_read_data(const struct nvdata_state nvdata[NV_SEQ_COUNT], enum sandbox_nv_space seq, u8 *buf, int data_ofs, int length) argument
56 sb_tpm_write_data(struct nvdata_state nvdata[NV_SEQ_COUNT], enum sandbox_nv_space seq, const u8 *buf, int data_ofs, int length) argument
68 sb_tpm_define_data(struct nvdata_state nvdata[NV_SEQ_COUNT], enum sandbox_nv_space seq, int length) argument
H A Dsandbox_common.h72 * @seq: Sequence number to read
78 enum sandbox_nv_space seq, u8 *recvbuf, int data_ofs,
87 * @seq: Sequence number to read
93 enum sandbox_nv_space seq, const u8 *buf, int data_ofs,
102 * @seq: Sequence number to set up
106 enum sandbox_nv_space seq, int length);
H A Dtpm_tis_sandbox.c126 int seq; local
183 seq = sb_tpm_index_to_seq(index);
184 if (seq < 0)
187 sb_tpm_write_data(tpm->nvdata, seq, sendbuf, 22, length);
192 seq = sb_tpm_index_to_seq(index);
193 if (seq < 0)
195 printf("tpm: nvread index=%#02x, len=%#02x, seq=%#02x\n", index,
196 length, seq);
200 sb_tpm_read_data(tpm->nvdata, seq, recvbuf, TPM_HDR_LEN + 4,
210 seq
[all...]
H A Dtpm2_tis_sandbox.c768 int index, seq; local
773 seq = sb_tpm_index_to_seq(index);
774 if (seq < 0)
776 printf("tpm: nvread index=%#02x, len=%#02x, seq=%#02x\n", index,
777 length, seq);
781 sb_tpm_read_data(tpm->nvdata, seq, recvbuf,
786 int index, seq; local
793 seq = sb_tpm_index_to_seq(index);
794 if (seq < 0)
796 printf("tpm: nvwrite index=%#02x, len=%#02x, seq
805 int policy_size, index, seq; local
[all...]
/u-boot/tools/patman/
H A Dstatus.py56 This shows the prefix, version, seq, count and subject.
62 seq (int): Sequence number within series (1=first) parsed from sequence
76 self.seq = None
99 See RE_PATCH for details. The parsed info is placed into seq, count,
122 self.seq = int(mat_seq.group(1))
125 self.seq = 1
169 for seq, cmt in enumerate(series.commits):
172 patch_for_commit[seq] = pmatch[0]
176 (seq + 1, cmt.subject,
180 (seq
[all...]
/u-boot/net/
H A Dfastboot_udp.c23 unsigned short seq; member in struct:fastboot_header
58 .seq = htons(sequence_number)
144 response_header.seq = htons(response_header.seq);
205 if (header.seq != sequence_number) {
206 response_header.seq = htons(sequence_number);
261 header.seq = ntohs(header.seq);
274 if (header.seq == sequence_number) {
278 } else if (header.seq
[all...]
/u-boot/boot/
H A Dvbe.c93 int ret, seq; local
96 seq = simple_strtol(name, &endp, 16);
109 ret = uclass_get_device_by_seq(UCLASS_BOOTMETH, seq, &dev);
H A Dbootmeth_efi.c152 * @seq: Sequence number, to cycle through options (0=first)
157 static int distro_efi_get_fdt_name(char *fname, int size, int seq) argument
163 switch (seq) {
220 int ret, seq; local
243 for (seq = 0; ret == -ENOENT; seq++) {
244 ret = distro_efi_get_fdt_name(fname, sizeof(fname), seq);
H A Dbootdev-uclass.c392 int seq, len, method_flags; local
397 seq = trailing_strtoln_end(label, NULL, &end);
402 log_debug("find %s: seq=%d, id=%d/%s\n", label, seq, id,
423 *seqp = seq;
433 int seq, ret, method_flags = 0; local
438 ret = label_to_uclass(label, &seq, &method_flags);
448 /* if there is no seq, match anything */
449 if (seq != -1 && dev_seq(media) != seq) {
491 int ret = -ENODEV, seq; local
809 bootdev_hunt_drv(struct bootdev_hunter *info, uint seq, bool show) argument
[all...]
H A Dcedit.c616 int seq, found; local
618 seq = 0;
622 found = seq;
625 seq++;
639 uint i, seq; local
650 seq = ret;
651 log_debug("%s: seq=%d\n", menu->obj.name, seq);
659 for (i = 0; i < obj->bit_length; i++, seq >>= 1) {
663 if (seq
[all...]
/u-boot/test/boot/
H A Dbootstd_common.c75 uint seq; local
86 seq = mmc - start;
87 ut_asserteq(BIT(seq), std->hunters_used);
/u-boot/cmd/x86/
H A Dhob.c101 int seq = -1; /* Show all by default */ local
112 seq = simple_strtol(*argv, NULL, 16);
123 if (seq != -1 && seq != i)
161 "[-v] [seq] Print Hand-Off Block (HOB) information",
163 " seq - Record # to show (all by default)"
/u-boot/drivers/phy/qcom/
H A Dphy-qcom-usb-hs-28nm.c85 const struct hsphy_init_seq *seq; local
92 seq = data->init_seq;
94 for (i = 0; i < data->init_seq_num; i++, seq++) {
95 writeb(seq->val, priv->base + seq->offset);
96 if (seq->delay)
97 udelay(seq->delay);
/u-boot/lib/efi_selftest/
H A Defi_selftest_console.c83 const u8 seq[] = { local
87 for (i = 0; i < sizeof(seq); ++i) {
88 if (seq[i] == '-')
91 printx(p[seq[i]], 2, buf);
/u-boot/drivers/video/
H A Dvidconsole_internal.h141 int console_simple_get_font(struct udevice *dev, int seq, struct vidfont_info *info);
H A Dorisetech_otm8009a.c105 #define dcs_write_seq(dev, seq...) \
107 static const u8 d[] = { seq }; \
111 #define dcs_write_seq_hs(dev, seq...) \
113 static const u8 d[] = { seq }; \
117 #define dcs_write_cmd_at(dev, cmd, seq...) \
122 dcs_write_seq(device, (c) >> 8, seq); \
/u-boot/common/
H A Dstdio.c163 int seq, ret; local
166 seq = trailing_strtoln(name, NULL);
167 if (seq == -1)
168 seq = 0;
169 ret = uclass_get_device_by_seq(id, seq, &dev);
173 debug("No %s device for seq %d (%s)\n", uclass_get_name(id),
174 seq, name);
/u-boot/tools/binman/
H A Dbintool_test.py30 self.seq = None
127 if self.seq:
129 self.seq += 1
142 self.seq = 0
171 self.seq += 1
172 result = bintool.FETCHED if self.seq & 1 else bintool.FAIL
176 self.seq = 0
202 btool = list(self.btools.values())[self.seq]
203 self.seq += 1
215 self.seq
[all...]
/u-boot/tools/dtoc/
H A Ddtb_platdata.py404 seq: Sequence number of the device (unique within its uclass), or
423 node.seq = -1
779 self.buf('\t.seq_ = %d,\n' % node.seq)
830 def list_node(self, member, node_refs, seq):
832 self.buf('\t\t.prev = %s,\n' % node_refs[seq - 1])
833 self.buf('\t\t.next = %s,\n' % node_refs[seq + 1])
846 for seq, uclass in enumerate(uclass_list):
847 self.buf(' * %3d: %s\n' % (seq, uclass.name))
853 for seq, node in uclass.alias_num_to_node.items():
854 self.buf(' * %d: %s\n' % (seq, nod
[all...]
/u-boot/tools/binman/etype/
H A Dfit.py518 seq = self._fdts.index(self._fit_default_dt)
519 val = val[1:].replace('DEFAULT-SEQ', str(seq + 1))
584 for seq, fdt_fname in enumerate(self._fdts):
585 node_name = node.name[1:].replace('SEQ', str(seq + 1))
604 b'SEQ', tools.to_bytes(str(seq + 1)))
635 for (seq, start, data) in segments:
636 node_name = node.name[1:].replace('SEQ', str(seq + 1))
645 if seq == 0:
/u-boot/include/dm/
H A Duclass-internal.h191 * This searches for a device with the given seq.
196 * @seq: Sequence number to find (0=first)
197 * @devp: Returns pointer to device (there is only one per for each seq)
200 int uclass_find_device_by_seq(enum uclass_id id, int seq,
/u-boot/lib/zstd/common/
H A Dzstd_internal.h317 MEM_STATIC ZSTD_sequenceLength ZSTD_getSequenceLength(seqStore_t const* seqStore, seqDef const* seq) argument
320 seqLen.litLength = seq->litLength;
321 seqLen.matchLength = seq->mlBase + MINMATCH;
322 if (seqStore->longLengthPos == (U32)(seq - seqStore->sequencesStart)) {
/u-boot/drivers/i2c/
H A Dnx_i2c.c366 uint seq)
388 if (seq)
473 uint alen, uchar *buffer, uint len, uint seq)
499 &xaddr[4 - alen], alen, buffer, len, seq);
510 uint alen, uchar *buffer, uint len, uint seq)
533 &xaddr[4 - alen], alen, buffer, len, seq);
359 i2c_transfer(struct nx_i2c_regs *i2c, uchar cmd_type, uchar chip_addr, uchar addr[], uchar addr_len, uchar data[], unsigned short data_len, uint seq) argument
472 nx_i2c_read(struct udevice *dev, uchar chip_addr, uint addr, uint alen, uchar *buffer, uint len, uint seq) argument
509 nx_i2c_write(struct udevice *dev, uchar chip_addr, uint addr, uint alen, uchar *buffer, uint len, uint seq) argument

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