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d678a59d |
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18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> |
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53237675 |
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01-May-2024 |
Tom Rini <trini@konsulko.com> |
phy: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> |
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a12a73b6 |
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12-Mar-2023 |
Johan Jonker <jbx6244@gmail.com> |
drivers: use dev_read_addr_ptr when cast to pointer The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use dev_read_addr_ptr instead of the dev_read_addr function in the various files in the drivers directory that cast to a pointer. As we are there also streamline the error response to -EINVAL on return. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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0b746d28 |
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04-Aug-2022 |
Sumit Garg <sumit.garg@linaro.org> |
phy: Add support for drivers to enable USB on QCS404 SoC QCS404 SoC supports two types of PHY, one supports high speed mode or USB2 PHY and the other supports super speed mode or USB3 PHY. So add corresponding PHY drivers. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> |
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53237675 |
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01-May-2024 |
Tom Rini <trini@konsulko.com> |
phy: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> |
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a12a73b6 |
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12-Mar-2023 |
Johan Jonker <jbx6244@gmail.com> |
drivers: use dev_read_addr_ptr when cast to pointer The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use dev_read_addr_ptr instead of the dev_read_addr function in the various files in the drivers directory that cast to a pointer. As we are there also streamline the error response to -EINVAL on return. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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0b746d28 |
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04-Aug-2022 |
Sumit Garg <sumit.garg@linaro.org> |
phy: Add support for drivers to enable USB on QCS404 SoC QCS404 SoC supports two types of PHY, one supports high speed mode or USB2 PHY and the other supports super speed mode or USB3 PHY. So add corresponding PHY drivers. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> |
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a12a73b6 |
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12-Mar-2023 |
Johan Jonker <jbx6244@gmail.com> |
drivers: use dev_read_addr_ptr when cast to pointer The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use dev_read_addr_ptr instead of the dev_read_addr function in the various files in the drivers directory that cast to a pointer. As we are there also streamline the error response to -EINVAL on return. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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0b746d28 |
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04-Aug-2022 |
Sumit Garg <sumit.garg@linaro.org> |
phy: Add support for drivers to enable USB on QCS404 SoC QCS404 SoC supports two types of PHY, one supports high speed mode or USB2 PHY and the other supports super speed mode or USB3 PHY. So add corresponding PHY drivers. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> |
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0b746d28 |
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04-Aug-2022 |
Sumit Garg <sumit.garg@linaro.org> |
phy: Add support for drivers to enable USB on QCS404 SoC QCS404 SoC supports two types of PHY, one supports high speed mode or USB2 PHY and the other supports super speed mode or USB3 PHY. So add corresponding PHY drivers. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> |