Searched refs:reg_tbl (Results 1 - 14 of 14) sorted by relevance
| /linux-master/drivers/net/ethernet/qlogic/qlcnic/ |
| H A D | qlcnic_hw.h | 39 readl(((a)->ahw->pci_base0) + ((a)->ahw->reg_tbl[addr]))
43 writel(value, ((a)->ahw->pci_base0) + ((a)->ahw->reg_tbl[addr]))
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| H A D | qlcnic_83xx_hw.c | 263 ahw->reg_tbl = (u32 *)qlcnic_83xx_reg_tbl;
3614 sizeof(*adapter->ahw->reg_tbl));
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| H A D | qlcnic.h | 530 u32 *reg_tbl; member in struct:qlcnic_hardware_context
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| H A D | qlcnic_sriov_common.c | 664 ahw->reg_tbl = (u32 *)qlcnic_83xx_reg_tbl;
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| H A D | qlcnic_main.c | 2457 ahw->reg_tbl = (u32 *) qlcnic_reg_tbl;
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| /linux-master/drivers/media/platform/qcom/venus/ |
| H A D | core.c | 544 .reg_tbl = msm8916_reg_preset,
574 .reg_tbl = msm8996_reg_preset,
628 .reg_tbl = sdm660_reg_preset,
804 .reg_tbl = sm8250_reg_preset,
864 .reg_tbl = sm7280_reg_preset,
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| H A D | core.h | 66 const struct reg_val *reg_tbl; member in struct:venus_resources
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| H A D | hfi_venus.c | 360 const struct reg_val *tbl = res->reg_tbl;
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| /linux-master/drivers/scsi/qla4xxx/ |
| H A D | ql4_def.h | 817 uint32_t *reg_tbl; member in struct:scsi_qla_host
1057 return ha->isp_ops->rd_reg_direct(ha, ha->reg_tbl[crb_reg]);
1064 ha->isp_ops->wr_reg_direct(ha, ha->reg_tbl[crb_reg], value);
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| H A D | ql4_83xx.c | 453 ha->reg_tbl[QLA8XXX_CRB_DEV_PART_INFO]);
455 drv_active = qla4_83xx_rd_reg(ha, ha->reg_tbl[QLA8XXX_CRB_DRV_ACTIVE]);
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| H A D | ql4_os.c | 8660 ha->reg_tbl = (uint32_t *) qla4_82xx_reg_tbl;
8672 ha->reg_tbl = (uint32_t *)qla4_83xx_reg_tbl;
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| /linux-master/drivers/net/ethernet/broadcom/bnx2x/ |
| H A D | bnx2x_ethtool.c | 2240 } reg_tbl[] = { local
2352 for (i = 0; reg_tbl[i].offset0 != 0xffffffff; i++) {
2354 if (!(hw & reg_tbl[i].hw))
2357 offset = reg_tbl[i].offset0 + port*reg_tbl[i].offset1;
2358 mask = reg_tbl[i].mask;
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| /linux-master/drivers/net/ethernet/broadcom/ |
| H A D | bnx2.c | 5557 } reg_tbl[] = { local
5671 for (i = 0; reg_tbl[i].offset != 0xffff; i++) {
5673 u16 flags = reg_tbl[i].flags;
5678 offset = (u32) reg_tbl[i].offset;
5679 rw_mask = reg_tbl[i].rw_mask;
5680 ro_mask = reg_tbl[i].ro_mask;
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| H A D | tg3.c | 13163 } reg_tbl[] = { local
13306 for (i = 0; reg_tbl[i].offset != 0xffff; i++) {
13307 if (is_5705 && (reg_tbl[i].flags & TG3_FL_NOT_5705))
13310 if (!is_5705 && (reg_tbl[i].flags & TG3_FL_5705))
13314 (reg_tbl[i].flags & TG3_FL_NOT_5788))
13317 if (is_5750 && (reg_tbl[i].flags & TG3_FL_NOT_5750))
13320 offset = (u32) reg_tbl[i].offset;
13321 read_mask = reg_tbl[i].read_mask;
13322 write_mask = reg_tbl[i].write_mask;
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