Searched refs:pt_base (Results 1 - 25 of 25) sorted by relevance

/linux-master/drivers/gpu/drm/msm/
H A Dmsm_gpummu.c14 dma_addr_t pt_base; member in struct:msm_gpummu
79 dma_free_attrs(mmu->dev, TABLE_SIZE, gpummu->table, gpummu->pt_base,
101 gpummu->table = dma_alloc_attrs(dev, TABLE_SIZE + 32, &gpummu->pt_base,
114 void msm_gpummu_params(struct msm_mmu *mmu, dma_addr_t *pt_base, argument
117 dma_addr_t base = to_msm_gpummu(mmu)->pt_base;
119 *pt_base = base;
H A Dmsm_mmu.h56 void msm_gpummu_params(struct msm_mmu *mmu, dma_addr_t *pt_base,
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dgfxhub_v1_0.c56 uint64_t pt_base; local
59 pt_base = amdgpu_gmc_pd_addr(adev->gmc.pdb0_bo);
61 pt_base = amdgpu_gmc_pd_addr(adev->gart.bo);
63 gfxhub_v1_0_setup_vm_pt_regs(adev, 0, pt_base);
H A Dgfxhub_v2_0.c136 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); local
138 gfxhub_v2_0_setup_vm_pt_regs(adev, 0, pt_base);
H A Dgfxhub_v3_0_3.c138 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); local
140 gfxhub_v3_0_3_setup_vm_pt_regs(adev, 0, pt_base);
H A Dgfxhub_v1_2.c77 uint64_t pt_base; local
81 pt_base = amdgpu_gmc_pd_addr(adev->gmc.pdb0_bo);
83 pt_base = amdgpu_gmc_pd_addr(adev->gart.bo);
85 gfxhub_v1_2_xcc_setup_vm_pt_regs(adev, 0, pt_base, xcc_mask);
H A Dmmhub_v1_8.c79 uint64_t pt_base; local
84 pt_base = amdgpu_gmc_pd_addr(adev->gmc.pdb0_bo);
86 pt_base = amdgpu_gmc_pd_addr(adev->gart.bo);
88 mmhub_v1_8_setup_vm_pt_regs(adev, 0, pt_base);
H A Dgfxhub_v11_5_0.c140 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); local
142 gfxhub_v11_5_0_setup_vm_pt_regs(adev, 0, pt_base);
H A Dmmhub_v3_0_2.c145 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); local
147 mmhub_v3_0_2_setup_vm_pt_regs(adev, 0, pt_base);
H A Dmmhub_v2_0.c203 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); local
205 mmhub_v2_0_setup_vm_pt_regs(adev, 0, pt_base);
H A Dmmhub_v2_3.c135 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); local
137 mmhub_v2_3_setup_vm_pt_regs(adev, 0, pt_base);
H A Dmmhub_v3_0.c152 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); local
154 mmhub_v3_0_setup_vm_pt_regs(adev, 0, pt_base);
H A Dmmhub_v3_0_1.c154 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); local
156 mmhub_v3_0_1_setup_vm_pt_regs(adev, 0, pt_base);
H A Dgfxhub_v3_0.c135 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); local
137 gfxhub_v3_0_setup_vm_pt_regs(adev, 0, pt_base);
H A Dmmhub_v3_3.c146 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); local
148 mmhub_v3_3_setup_vm_pt_regs(adev, 0, pt_base);
H A Dmmhub_v1_7.c68 uint64_t pt_base; local
71 pt_base = amdgpu_gmc_pd_addr(adev->gmc.pdb0_bo);
73 pt_base = amdgpu_gmc_pd_addr(adev->gart.bo);
75 mmhub_v1_7_setup_vm_pt_regs(adev, 0, pt_base);
H A Dmmhub_v1_0.c70 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); local
72 mmhub_v1_0_setup_vm_pt_regs(adev, 0, pt_base);
H A Dgfxhub_v2_1.c139 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); local
141 gfxhub_v2_1_setup_vm_pt_regs(adev, 0, pt_base);
H A Dmmhub_v9_4.c77 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); local
79 mmhub_v9_4_setup_hubid_vm_pt_regs(adev, hubid, 0, pt_base);
/linux-master/arch/x86/xen/
H A Dmmu_pv.c1189 addr = xen_start_info->pt_base;
1193 xen_start_info->pt_base = (unsigned long)__va(__pa(xen_start_info->pt_base));
1679 static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end, argument
1682 if (*pt_base == PFN_DOWN(__pa(addr))) {
1685 (*pt_base)++;
1708 unsigned long pt_base, pt_end; local
1720 pt_base = PFN_DOWN(__pa(xen_start_info->pt_base));
1721 pt_end = pt_base
[all...]
H A Denlighten_pv.c1437 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base,
/linux-master/drivers/iommu/
H A Dexynos-iommu.c263 u32 pt_base; /* page table base address (physical) */ member in struct:sysmmu_variant
367 .pt_base = 0x14,
376 .pt_base = 0x0c,
390 .pt_base = 0x0c,
406 .pt_base = 0x800c,
472 u32 pt_base; local
475 pt_base = pgd;
477 pt_base = pgd >> SPAGE_ORDER;
479 writel(pt_base, SYSMMU_REG(data, pt_base));
[all...]
/linux-master/include/xen/interface/
H A Dxen.h606 * g. bootstrap page tables [pt_base, CR3 (x86)]
639 unsigned long pt_base; /* VIRTUAL address of page directory. */ member in struct:start_info
/linux-master/drivers/gpu/drm/msm/adreno/
H A Da2xx_gpu.c112 dma_addr_t pt_base, tran_error; local
116 msm_gpummu_params(gpu->aspace->mmu, &pt_base, &tran_error);
158 gpu_write(gpu, REG_A2XX_MH_MMU_PT_BASE, pt_base);
/linux-master/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm.c1291 u64 pt_base; local
1334 pt_base = amdgpu_gmc_pd_addr(adev->gart.bo);
1344 page_table_base.high_part = upper_32_bits(pt_base);
1345 page_table_base.low_part = lower_32_bits(pt_base);

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